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CoreMark®/MHz* 2.33 2.46 1.85 2.64 3.34 3.42 4.02 4.02 5.01
Pipeline Stages 3 2 3 2 3 3 3 3 6
Maximum MPU
0 8 0 16 8 8 16 16 16
Regions
Yes
Yes Yes Yes
Floating Point (option
No No No No No (option (option (option
Hardware SP +
SP) SP) SP)
DP)
Yes Yes
(option (option
2- 16kB 4-64kB
Built-in Caches No No No No No No No
I-cache,
I-cache D-
cache)
Yes
(option
Tightly Coupled 0-16MB
No No Yes No No No No No
Memory I-
TCM/D-
TCM)
AXI4,
AHB AHB AHB AHB
AHB AHB AHB5, AHB5, AHB5,
Bus Protocol Lite, Lite, Lite, Lite,
Lite Lite Fast I/O APB APB
Fast I/O APB APB APB,
TCM
Wake-up Interrupt
Yes Yes No Yes Yes Yes Yes Yes Yes
Controller Support
Integrated
Interrupt Yes Yes Yes Yes Yes Yes Yes Yes Yes
Controller (NVIC)
Maximum #
32 32 32 240 240 240 480 480 240
External Interrupts
CMSIS Support Yes Yes Yes Yes Yes Yes Yes Yes Yes