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Chapter 6 - P2 - Open Collector-Drain - Integrated Circuits
Chapter 6 - P2 - Open Collector-Drain - Integrated Circuits
Lecture:
DIGITAL SYSTEMS
Chapter 5:
Integrated Circuits
1
University of Technology and Education
Faculty of Electrical & Electronic Engineering
Integrated Circuits
2
Nguyen Thanh Hai, PhD
University of Technology and Education
Faculty of Electrical & Electronic Engineering
Integrated Circuits
Open-Collector/Open-Drain Outputs Rp is connected
outside
Rp
(external)
V0
V0 at the
output
Q3 ON V0 = VOL ≤ 0.4 V
Rp = 10k is small enough for the
Q3 OFF V0 = VOL = +5 V minimum below VOH and IOL(max)
3
Nguyen Thanh Hai, PhD
University of Technology and Education
Faculty of Electrical & Electronic Engineering
Integrated Circuits
Open-Collector/Open-Drain Outputs
4
Nguyen Thanh Hai, PhD
University of Technology and Education
Faculty of Electrical & Electronic Engineering
Integrated Circuits
Open-Collector/Open-Drain Outputs
5 V
A 10 k
A
B
B
Output A.B. C
C
C Symbolizes the
wired-AND
connection (AND
74LS05 (open -collector) gate with 3 inputs
or
74HC05 (open -drain)
Integrated Circuits
24 V
74LS112 7406
24 V, 25 mA
J Q
CLK V0
K Q
Integrated Circuits
5 V
Rs
74HCT74 7406
D Q
CLK
Q
Example:
-In this case, 7406 open-collector output is to drive an indicator LED.
-The resistor Rs is for limiting the current
-For example of some series and parallel resistors/Leds 7
Nguyen Thanh Hai, PhD
University of Technology and Education
Faculty of Electrical & Electronic Engineering
Integrated Circuits
The End
8
Nguyen Thanh Hai, PhD