Register Number:

NATIONAL COLLEGE OF ENGINEERING, MARUTHAKULAM – 627151

Electronics and Communication Engineering
Third Semester
EC6302-Digital Electronics
INTERNAL ASSESSMENT TEST---III
Time: 1 ½ hours Maximum: 50 marks
Answer ALL Questions
PART A (5x2=10 Marks)

1.what are the different type of PLD?

2. Difference between PLA and PAL?
3. How memories are classified?
4.Draw the logic diagram of STATIC and DYNAMIC RAM cell.
5. What is Volatile and Non-Volatile memory?
6. Give the advantages of RAM.
7.what are Hazards?
8.difference between flow chart and ASM chart.
9.differentiate fundamental mode and pulse mode.
10.Design 3 input AND gate using Verilog.
11. What is Synchronous Sequential Circuit?
12. Write short notes on Hazards.

PART B (8+16+16=40 marks)

6.a)Implement the given functions using PROM F1=Σm(0,1,3,4,6,7)

F2=Σm(1,2,3,5) (8)

a) Implement the given function using PROM and PAL F1=Σm(0,1,3,5,7,9)

F2=Σm(1,2,4,7,8,10,11) (8)
 OR

b)A sequential circuit has 3 D flip flop. A,B and C and one input X. It is desired by
the following flip flop functionsDA =(BC’+B’C)X +(BC+B’C’)X’ ; DB=A , DC=B
Derive the state table for the circuit and draw two state diagrams for X=0 and other
for X=1 (8)

b)Explain the method to eliminate static hazard in an asynchronous circuit with an

example (8)

7. (a) Implement the following Boolean functions with a PLA

F1(A ,B ,C ) = Σ(0, 1, 2, 4)
F2( A,B ,C ) = Σ(0, 5, 6, 7)
F3(A ,B , C) = Σ(0, 3, 5, 7) . (16)
a)i)Write a note on SRAM based FPGA (8)
ii)What are the advantages of FPGA (8)
OR
b) Explain the operation of static and dynamic MOS RAM cell with necessary
diagrams (16)
b)Explain the operation of bipolar and MOSFET RAM cell with necessary diagram.
(16)
8)a)i)Design full adder using two half adder by writing verilog programs. (8)
ii) Design a binary to gray code converter using verilog. (8)
a)Design an asynchronous sequential circuit that has 2 inputs X2 and X1 and one
output z. When X1=0 ,the output z is O. The first change X2 that occurs while X1 is
1will cause output Z to be 1. The output Z will remain 1 until X1 returns to 0.
(16)
OR
b)Find the circuit that has no static hazards and implement the Boolean function
F(A,B,C,D)=Σm(1,3,5,7,8,9,14,15) and write notes on ASM. (16)
b)What are called as essential hazards? How does the hazard occur in sequential
circuits? How can the same be eliminated using SR latches?Give an example.
(16)