I- 426 - - - - - - - - - - - - - - - - ~ Fundamentals of Compller Design 1 I- Code Optimization and Gl!nf!

ratlon - - - - - - - - - - - - - - - 427),
Solution. Given expression is Now [et us apply the above discussed algorithm, which gives following Da~,...
a= (J' + q) ((r + s) - f) with heuristic ordering.
Following table will generates thc_~n:truc~n---~- _ _ _ _ _ _ __

Compiler Construction 8 -24

Code Generation Compiler Construction 8-25
8.12 Generating Code from DAG
The code can be generated by translating the three address code line by line.
Generating code from DAG is much simpler than the linear sequence of three MOVa, RO
address code. Using DAG we can rearrange some sequence of instructions and
ADD b, RO
generate an efficient code. There are various algoritluns used generating code from
DAG as shown in Fig. 8.10. MOV c, R1
SUB d, R1
MOVRO, t 1 t1 = a+b
Code generation from DAG
MOVe, RO R1 has c--<l
ADD RO, Rl /'R1 contams e+(c-d)'/
MOVt 1, RO t>RO contains a+b•/
Rearranging order Heuristic ordering Labelling algorithm
ADD R1, RO
MOVRO, t 4
Fig. 8.10 Code generation from DAG
Now if we change the ordenng sequence of the above three ad<hess code

Let us understand how effective it is to generate code using DAG instead of using t,:=c-d
a three address code sequence. t 3:=e+t2
t 1:=a+b
8.12.1 Rearranging Order
t,:=t,+t,
The order of three address code affects st of the ob;ect code being generated.
then we get an improved code as
In the sense that by changing the order whl computations are done we can
obtain the object code with minimum cost. MOVc, RO
SUB d , RO
For example :
MOVe, R1
ti7=a+b ADD RO, Rl
t2:=c--d MOVa, RO
tf=e-rt2 ADDb, RO
t4·=t;---t3 ADD Rl, RO
For the expression (a+b)+(e+(c--d)) MOV RO, t 4
A DAG can be constructed for the above sequence as follows.
8.12.2 Heuristic Ordering
The heurbhc l)rder~ al~t)ritlun is as fd!t)WS..
1) Oht.un Jll the intt-ri..,r n,x!~ Cl'n.-ider tht'::'e interior nodes as unlisted

'
interior n,X1t'S.
I ~) whilt' (unli:,tt,i i.ntt'rk,r ""le; re-main)

-1) p1d;. \t}' ,\I\ unh::-tt,i m,k I\, ,~ h,'-.'<.' 'f'lrent::- h.1n.• ~"t!n listed.
4) hst n;
Fig. 8.11 DAG fc,r (atb) i (ot(c d))
 ••
11 hi$ unlltl\t'd pprmt AND is not leaf

The left f J IS 4 All parent

which ha! Ii fed parent (J e

l ~345681
As now onl 8 IS remammg from the anJisted inferkJr nacfe •
!ll1lnt' \'ffl nprt•ssmn
Hence the resulting list JS I 2 4 5 6 8 Then the order of c:1emnni;P1111ii1111•.i
wn in lhl' foll \\-Ing Fill 8 12.
bv mersmg this list We get the order of !?Valuation as IJ & 5 4 3 2
that we have to perform the computations at these nodes m the pa anfet.
Is .= d e
~ =a-t,

l.i=½'ts
t =~,-"
I - t6 • !.i
I ~•~

The, ~ 11:S the Optimized

ITS)Slll:1'5.
 Code Ge era
6-

0
{e Fg 115

i=g s.131-aooledtn:efor((a lb c)) (c+(d~e))) Case 3

A~,:lrith:n
'\ e " fi.~-t ..il.."'---us::' the imr~~rtant n,ltaboru used in this alsonthm
1 The function Gen_code n) i:, u:-cd that produce" the code to c, aluatc a node
labelled as n n,
:.. Fa;- the ref-Ster allocabon a stack 1s U!'ed called 'Rc~Stack'. InitiaU) this
stad co.,taJ..-.s all the a,·ailat,le rcpstcrs RO, Rl, ... Rk :such that the reg1ster RO
1• en the top of the stack
3. The Ge.,.,__code n) e,-aluatcs n m the register which is on the top ot the stack
4 Another stack is used to ,tore the temporaries called 'Temp_stad. it contains Fig 8 16
all the temporanes TO, Tl .Tk ha, m~ TO on the top of the stack
5 The function s\vap(Reg_!:-itack) is used to swap top two registers on the stack.
6 The furu:bon Pnnt is used to concatenate U1l' argum.:-nts m the order in which
they ar amung The 1s used to indicate the concatenation. In this function
the non-quot<.>d arguments nl"ed to be .:-valuated first. Case 4.
7 ThL' function GeJLoode 1s a funcbon that generates the code. This function then,
of vanous ca Let u cons1d<!r th,•se cases.

Cue1 B h nod" nd I I I, f nod,·

~
:Prtm( MOV I 1,,amit 11 ', • tOJJ(Reg Sta It))
Ben the node n i na1111:cl h) «in 1d1 nlih r
11111/J/ ·n J ll m, a11 lo cJ

nam, into r f' I 1

f'.•u eu
~ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Fundamen
tals of Campi/er Design~

5. State error recovery in operator- Precedenc e Parsing.

k\_ns. There are two points in the parsing process at which an operator-p recedence parser can
disi:over the syntactic errors:

ii~t
li) If no precedence relation holds between the terminal on top
of the stack and the
current input.
(ii) If a handle has been found, but there is no production
with this handle as a right
side.

: Objectiv e Type Questio ns ode Opt imi zati o~- ---- -..-- --
1. Any description error can be repaired by
(i) Insertion alone
(iii) Insertion and deletion alone
(ii) Deletion alone
(iv) Replaceme nt alone
2. _ _ _ _ sequence of characters that does not match the
and Gen era tion
pattern of any token:
(i) Lexical Error (ii) Syntax Error INSIDE THIS CHAPTER
(iii) Semantic Error (iv) Parsing Error 13.1. Introductio n to Code Optimizatio n 13.2. Optimizatio
n Strategy 13.3. Loop Optimizati on
3. Scope and declaration errors are _ _ _ _ errors. 13.4. Global Data-Flow Analysis 13.5. Elimination of Induction
Variables 13.6. Elimination of Common
Subexpress ion 13.7. Loop Unrolling 13.8. Introductio
(i) Run time (ii) Compile Time n to Code Generation 13.9. Machine
Architecture currently in Use 13.10. Major :ssues of Code
(iii) Both (i) and (ii) Generation 13.11. A Machine Model and
(iv) None Code Generation 13.12. A Simple Code Generator 13.13.
Code Generation From DAG 13.14. Register
4. _ _ _ _ are errors committed by programme rs during Allocation 13.15. Dynamic Programmin g (DP) 13.16.
coding process. Peephole Optimizatio n
(i) Lexical Error (ii) Syntax Error
(iii) Semantic Em;,r (iv) Parsing Error 13.1. INTRODUCTION TO CODE OPTIMIZATION
s. _ _ _ are errors take placed during declaration and scoping.
Due to the cost factor of the software, now-a-da ys emph::>.sis
(i) Lexical Error (ii) Syntax Error - has shifted from the
construct ion of efficient programs to that of more natural
(iii) Semantic Error (iv) Parsing Error or more 'conveni ent'
programs .
( Answer s J The process of optimizat ion is aimed at improvin g the execution
efficienc y of a
program. Optimiza tion aims mainly at rearrang ing the computa
1. (iii) 2. (i) 3. (ii) 4. (ii) 5. (iii) tion in a prograin
so as to gain the advantag e of execution speed, without changing
the meaning of

..
a program .
□□□
"So finally we can say that code optimizati on refers to
the technique used by the
compiler to improve the execution efficiency of the generated
object code_..
I
Optimiza tion may be machine dependen t or may be machine
independ ent_
Machine- independ ent optimizat ion can be performe d independ
ently of che tan?:et
machine for which the compiler is generatin g the code. On
the other hand. machi~e -
dependen t optimizat ion requires knowledg e of target machine
architect ure. ,ve should
know the target machine architectu re so that better utilizatio
n of registers and other
architectu re characteri stics may be possible.
A good optimizer has to expJoit :
(i) Cha~acter is~cs of the ~arget machine in tenns of
the addressin g structure
and mstrucuo n repertoire .
(ii) Character istics of the particular program in tc-rms
of progr.un structure 3lld
nature of computat ion involved.
Optimiza tion may be local and global :
l_n case of loc~1 I ~pti'.niznt ion. Wl' ~-onsider ,)nly sm:tll porti'-")n
of prognun c d
ln this type of op1tm1znt ton 011ly r<:stnl'k'd mn,,\mt 1.lf an:thsis
•
required b 0
e:
• ut gain of
.
405
~ 406--------- - - - Fundamentals a/ Comp/le~ Design~ J- Code Optimization and Generation - - - - - - - - - - - - - - - - - - - - ~ ~
optimization is restricted in thi:- type of optinlll:ahon. On the other hand in global • represent control flow relationships between basic blocks using a O
optimization the scope is not restricted to short code sequences. Thus optimization
flow graph.
oflarge program sections-mcluding entire loops can be performed. While this requires
For example :
considerable analysis of the program structure, its gains are also higher than those
of local optimirntion L1 : if x > y goto '-o
t1 =X+ 1
1.3.2. OPTIMIZATION STRATEGY x= t1
l0 y= 0
Some common steps in optimization may be as follows :
goto l 1
• Examine the program to find out certain properties of interest, it is said to
can be represent as follows :
be Data Slow Analysis.
• Use this mfonnation to change the code in a way that improves performance.
("code optimization"). Examples of optimization include:
(a) Code Motion out of Loops. If a computation inside a loop produces the
same result for all iterations (that is computing the base address of a local array), it
may be possible to move the computation outside the loop. Complete process, we
\,ill study under loop optimization.
(b) Common Sub-expression Flimination. If the same expression is computed
in many places (that is array address computations; result of macro expansion),
compute it once and reuse the result.
(c) Copy Propagation. If we have an intermediate code "copy" instructio
'x: y'. replace subsequent uses of xbyy (where possible).
(d) Dead Code Elimination. Delete instruction whose results are not used.
Fig. 13.1.
13.3. LOOP OPTIMIZATION
. I. Representation of Three-address Code in to B .
Loop optimization is most valuable machine-independent optimization becaus JS a sequence of consecutive instruction such that . asJc Bloclts. .-\ basic block
a program's inner loop are good candidate for improvement. I. Control enters at the beginnino- ·
The execution efficiency of a loop can be optimized by moving out some cod 2. Control leaves at the end; and,,,.
which is loop-invarienL Such code would now be executed just once prior to loo
3. c_ontro! cannot halt or branch except ac the end.
entry, and not repeatedly during execution of the loop. For example, in
IdentificatJon of Basic Block can done b"· foll .
while (i<Jl Step J D • • seeps ·
{ . etemune the set of Leaders th . th01!1.'ID!?
..:.:. - .
block : · ar JS e uut IDStroction o f ' ~ basic
a=X*2-Z*2;
(a) The :"'st ins_truction of the function is a header.
(b) Any mstruction that is the t~et f b .
The evaluation of (x * 2 - z * 2) can be moved out of the loop provided it i and unconditional goto) .,,. o a tr:lllch is a header(~ of '-"'C!Ddi.tiooal
invariant. This kind of code movement also called Frequency Reductio (c) Any instmction immedi.11eh folio\\ in,.. a ( • .
transformation. a branch is n header. - .:- .. ondition:il orunC'Qaditioo.d sroto)
The major tasks in loop optimization are : Step 2. For ea ..·h ht'ader. Hs t>as1 ..• t>1 ·k .. . -. -
(i) Detecting loops in a program. upro, but not indudi,1g. the fit''\t h 'Jd • o.: ..-o~.sJ.sts N tt.self md all instruction
L' . < < r (or end of function).
(it) Deducing the feasibility of moving certain code out of lhe loop. .--or e'\nmplt• lc>t us <-',)n,-i..kr th<" f)ll .
Up '"' ' l l)\\1n,_g pn,gr.uu h':lgme.nt •
13.3.1. Analysis of Program for Loop Optimization
(
For program analy~i1; and loop oplimizalwn, it is u~uully neccssury, lo !,.mi lntP= l;
control now relation~hip~ be1ween cJiffcrenl pieceR of wcJc for (/ • 2 ; /, • , ; /++)
For this we: p•p • I
• gmup three-addre~" 1r1Nlruc111,n "' 11, Um1k UlockH. r•turn (p).
)
 I- Code Optimization and Generation
- Fundamentals of Compiler Design
1I Step 2. There is a d" - - - - - - - - - - - - - 409 -I
42 6 uiree-nddress-code for above code fragment · f II (a) There is a (cond:;tocteld edge from block B, to block 82 if
\- so\'',,.- . lS as O OWS : na or unconditional) ju
of B, to the first instruction of B . or
f h
mp rom t e last instruction
(l)P::::l. 2
(2) ; == 2 (b) B
d 2 immediately
. f 0 IJ ows B in
· the ' textual order of the program and B
I 1
=x
(3) if i
(4) p = p * i
< goto (8)
foll:::. oes not end in an unconditional jump. •
example th e control flow graph for the basic blocks in Fig. 13.3 is as
(5) 11 = i + l
a,
(6) i = t\
(7) goto (3)
(8) goto caller program Bz
Here header statement are :
(i) statement 1, because it is first instruction.
(ii) instruction 3, since it is target of goto. a,
(iii) instruction 4, since it follows a conditional goto.
(iv) instruction 8 , since it is target of conditional goto statement.
a.
Now it is simple to find the basic blocks :
• Block B, has instructions 1 and 2. Fig. 13.3.

• Block B 2 has instruction 3.
• Block B has instructions from 4 to 7 .
3
• Block B 4 has instruction 8.
a, :
3. Identifying the Dominators. A node a is a dominator of node b if every path
from the initial node of the flow graph to b goes through a.
Dommators (dom) relationship have the following properties :
(i) There are reflexive; that is every node is domioatorS of itself.
(ii) Transitivity holds that is, if a dom b and b dom c this implies a dom c.
p = 1;
i=2 For example for the following given flow graph :

82 : [ If i <= x goto (8) J

p = p. i
11 = i + 1
i =1 1
goto O

84 : goto calling program

Fig. 13.2-

2. Finding Control Flow Graph from Basic-Blocks :

•• ,,.·- . . - . d ra h G - (V, E) whose nodes are the _basic

A flow graph for a function is a duecte g ~ff control can leave 'a' and immediately
blocks of the function , and where a ---t b E E
enter b. ' h . the b as ic block whose header Fig. 13-"'-
The di stinguished intial node i~ a flow grap is
• of the funcuon.
is the first instructton t uct as follows :
FloW graph can be con_s rb]ock of the function .
St.eP 1. Identify the basic
,.
 L dTA

tiO n ond Generation

Fundamentals a/ Camp/fer Design l I- code Optlm 1zo d.
(i) The forward edges form an acy JC gr
aph in which every node can be reach

I- 4 1 0 - - - - - - - - - - - - from the initial node _of G .l f d es whose beads dominates their tails.
Dommators tree can be shown as follows : (ii) The back edges consist on Y o e g
Let us consider the followfog flow graph :

Fig. 13.5.
4. Back Edges Identification. AIL those edges are called Back Edges, whose
heads dominate their tails.
13.3.2. Loop Detection
Now after previous analysis, it is to detect a loop in a flow graph. A loop is a
Fig. 13.6.
cycle in the flow graph that satisfies two properties :
l. A loop must have a single entry point, called the "header". This entry point Here 4 ➔ 3, 7 ➔ 4, 8 ➔ 3 9 ➔ I and 10 7 are back edges., whose heads
dominates their tail. ' -
dominates all nodes in the loop, it makes possible to move all of the loop
invariant computations to a unique place, called a "preheader", which is a . Now let us remove the back edges from the .
block/node placed outside the loop, just infrout of the header. gives us reduced flow graph. flow graph shown m Fig. 13.6, it
2. There must be at least one way to iterate the loop, that is one path back to Now new flow graph is as follows :
the header.
For example consider the flow graph given in Fig. 13.4. In which
4 dom 7, 7 dom 10, 3 dom 4 , 3 dom 8 and 1 dom 9.
Now it is easy to detect the loop. "If a given back edge is a ➔ d, we define the
natural loop of tte edge to be d plus the set of nodes that can reach a without going
through d. Node d is the header of the loop".
So clearly the natural loop of the edge 10 ➔ 7 consists of nodes 7, 8 and l 0,
since 8 and 10 are all those nodes that can reach 10 without going through 7. The
natural loop of 9 ➔ I is the entire flow graph. Fig. 13.7. A non-n-ducible flow graph
13.3.4. Pre-Headers
13.3.3. Reducible Flow Graph
_ It is as~umed that code optimization ·operations can be easy ly performed by To more statements "bet:
~rehender. The preheader haso:U~e header node" we de.fine a ne\lo header
~smg red~~•~I~ now graph. A flow graph G is reducible if we can partition the edges __,.,
) the header as su.:ce-s.sor• all the ..-...ges
header through prehead called
mto two d1 sJomt groups, often called the forward edges a nd back edges with the • er. ~ enters in
following two properties : '

I.
 ig. 3.8 :-howi- a flow o .
c,raph w1th loop : entals of compller Design l I- Code Opt/m Iration and Generation
fla1: • true
{hlle lfla1) do

fla1., false
~or each block 8 do

for each predecessor P of •

In new (BJ = In new (BJ
~ In new (BJ ~ In [BJ the: out (P);
Nou• af . Fig. 13.8. fla1 = true
" ter mtroducin g the preheader it becomes as follows : in (BJ = In new (BJ
;ut [BJ = lln (BJ - kill (BJ) v 1en (BJ;

}.
Preheader Now let us consider an ex
flow graph : ample to clear the concept. Consider the following

Fig. 13.9.

S.3.4. GLOBAL DATA-FLOW ANALYSIS

To optimize the code efficiently compiler collects the information about the
program as whole and distribute this information to each block of the flow graph.
F"1&-13.18.
This process is known as data-flow analysis.
To a-et the data-flow information we define certain data-flow equations and where 81 : (1) b =1
(2) c:2
solution°of those equation gives the data-flow information. Bz (3) a=b+c
• Data-flow-equations. A typical equation is (4) d=a-b
Out [Bl = (in [Bl - Kill [Bl) v gen [Bl ... (1) 83 (5) d=c • d
84 (6) c=lll+c
(7} e=a-b
B is basic block 8 (8} d=lll+c
where: Toe set of all the definitions generated in block B. 5
(9) e=e+l
gen (B) Toe set of all definitions outside block B that define the same B5 (10) b = c * d
Kill [Bl (11) c= IJ-d
variable as are defined in block B. ... (2)
Step 1. Calculate the gen and kill as follows:
in (Bl v out (Pl, where pis predecessor of B.
Equation (1) and (2) are data-flow eiatio;s-ns We can define the following
0
• Jtrative solution of Data-flow ~ua • 11 .
l
a gon
"thro to find out the solution to equations as fo ows .
I• lntlalii.e out on the assumption In
{BJ - cl> for all B
-
*'
for each block B do

out {B} : = gen {B} ;

. I
I- 414 - - - - - - -- -
- - - - - - - Fun dam I- Code Optimization and Generation
Step 2. Now let us apply
the itrati ve meth od to solve
ental s a/ Camp i/er Desig
n -I Here In [BJ beco mes to
Out [BJ, so we mus ~ slop
't ratio n here
the data- flow equa tions . I e <
lntia lly ln [B] = <I> and out . f U e Defi nHi on Cha ins •
[B] = gen [B] Step 3. Com putm g o . s - :
So : . n as "Us e-de finit ion cha ins" or "ud- chai
Block In It is easy to store the info ns",
Out whic h are lisls, for each rma u? fall the defi nitio n that reac
B, use of a van able , o h that use.
<I> ll, 21
B~ ,t, l3, 4) We can calc ulate ud-c hain
8.1
as follo ~s : ded b no unam bigi ous
<I> (S) (i) If a use of varia ble defi nitio n of
n. a in bloc k B isfpr o_ce h e~
<I> l6. 7) a then the ud-c hain for thal use o a is t e s of defi nitio n in In[B J
that are
B, <I> (8, 9)
B• <I> (10, 11)
d~fin ition of a.
(ii) If the use of a in bloc . . h
ll1D k B is proc eede d by its
a cont ains only the defin ition defi nitio n, t en the ud chai n of
-

l $,,
lntlol ly, we take In [BJ prio r to this use of a .
for every block that is
robe gen (BJ, ond we comp to be an empt y set, and
we take out [BJ For exam ple, cons ider flow
ute In new [BJ. If it is differ grap h is Fig. 13.1 0.
.:-ut [BJ and more to ne,ct ent from In [BJ, we comp
ute a new The use of a in defin ition . .
Iterat ion, accor ding to
algor ithm discu ssed in 4, bloc k B is prec eded
previ ous sectio n. defin ition of a. Hen ce ud-c 2 by defi nitio n 3, whic h
nft<' r first itcrn tion In hain for this use of a cont IS the
nnd out valu es are : use of b in B is not prec ains only defi njtio n 3.
eded by any defin ition of But the
Uln~k 2 b in B 2 , so ud-c haio for
In Out of b will be { 13, whic h is this use
u, the onJy defin ition of bin
<I> Step 4. Dete ction of Loo In[B ]J.
n, { l , 2 , 6 , 7}
ll, 21
(1,2, 3 . 4 , 6,71
p-In vari ant Com puta tion
s :
11 , By the use of ud-c bain
(3 , 4 , 8, 9}
(3, s. 91
, we can dete ct the loop
Supp ose a := b + c js at a -inv arian t.
"·n,
B,
{3. 4 , SJ
(SJ
l3. 4 , s. 6 , 71
(8 . 9}
and c are outs ide the loop
posi tion in the loop whe
(incl udin g the spec ial case
re alll poss ible defi nitio
n of b
( 6, 7} (7, 10. 11} then the calcu latio n of b whe re b and/ or c are cons
+ c will be the sam e each tant ),
.\fl:cr seco nd itera tion ln and inva rian t in the loop . tjme enco unte red, so jt
Out value s are : is loop -
Block
Step 5. Cod e Mot io'l (Mo
In ving loop -inv aria nt code
Out mov e loop -jnva riant outs ide out o-f the loop ) : We
the loop if follo wing cond can
<I> (1 , 2} (a) The bloc k in whic ition s are met :
l 1, 2, 3, 4 , s. 6 . 7 J h a loop inva riant state men
{l . 2,3 , 4 , 6,7] - of all exist s of the loop , t occu rs shou ld be a dom inat or
ll , 2, 3, 4 , 6, 7 . 8, 9 ] or the nam e assig ned to
{l , 2 , 3 . 5 , 6 . 7 . 9} used outsi de the loop . the bloc k shou ld not be
( l. 2 , 3 , 4 , 5, 6 , 7 , 9 ] .
{ l , 3 , 4, S. 6 , 7}
{3. 5 , 9] (b) We c3:nn ot mov e
{3 , 8 , 9} a loop -inva riant state men
(3 , 4, s, 6 . 7}
{3, 4. s, 7 . 10, l1 J there ts anot her state men t assig ned to a into preh
t in the loop that assig n eade r if'
Afte r third itera tion In and For exam ple, cons ider the to a.
out valu" s are as follo ws : follo wing flow grap h ,
Block In
Out
<I> {1 . 2)
(1 , 2, 3 , 4 , 5 , 6 , 7}
lJ , 2, 3, 4. 6 , 71
{l, 2 , 3 , 4 , 5 , 6, 7, 8 , 9]
{l , 2 , 3, 5 , 6, 7 , 9]
l 1 , 2 , 3 . 4 , 5. 6, 7, 9J
ll, 3, 4 , s. 6 , 71
{1 , 2 , 3 , 5 , 6 , 7. 9)
{1 , 2. 3 , 6, 8 . 9}
{l, 3, 4, 5 , 6 , 71 {1, 3, 4 , s. 7, 10, 11}
Afte r Four th Itera tion In and
Out value s are as follo ws
:
Block In
Out
<I> {l,2}
( 1, 2 , 3 , 4 , s. 6,'7)
{l. 2, 3, 4, 6, 7}
{l , 2, 3 , 4, 6 , 7 , 8 , 9]
(1,2, 3,5 , 6,7,9 }
{1 , 2, 3 , 4 , 5, 6, 7. 9}
(1 , 3 , 4, 5 , 6, 7}
(1 , 2 , 3 . 5, 6 , 7, 9} {l , 2, 3, 6 , 8, 9}
{1.3 ,4,5 , 6,7} { 1, 3, 4 , 5, 7, 10, 11}
Fig. 13.11 .
 Fundamentals of c I
flcre a =4in B cannot be moved outside .
the I . .
ompller Design -I

rrunator
.
2
o f other block of loop · si·nce movmg . . to th
it
oop msplte of that B 2 1s • f- Code Optimlzatfon and Genercrtion
We note that the purpose of_I_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 417.J
fie meanmg ·of the program Because •i f a _- 4 1s . e preheader will chang e
moved Of
,alue that "v1ll be assigned to •v in B 5 Wl. 11 b e 3 1f . the out · the loop, then th e purpose of T, is to step through th JS to count from 1 to. 20 in the loop • while th e
e arrays four bytes at
fo b /
.,.
Tb~; 4
execution path is B1 - B2 - . ur ytes word. At the assignment T __ a tune, since we are assuming
83 - B~ - B2 - B4 - B5 whereas for same exec ti
assign~ toy m B • u on path, the original program time through the beginning of loop. T t ~ ~ on the values I. 2, ...• 20 each
5 after ~ach _assignment to T, . That is both ,'
and ; ;evaJues 4, _8, •.. , ~O immediately
(i) The move is illegal if g_ is used in the loo and . such ,denttfiers are called induction variables" ' form anthmatJc progression.
of g_ other than the statement to be moved. p g_ is reached by any definillon
As the relationship T, = 4 * I surely holds aft th .
For example. consider the following flow-graph. not ~banged elsewhere in the loop, it follows the:~assignment to T,. and Ti is
relat10nsbip T, = 4 * I - 4 must hold. a r stalemenc I := / + I the

13.6. ELIMINATION OF COMMON SUBEXPRESSION

. R~rn~ving common sub expression is another important feature of code
optlIOl~at10n . Common subexpression elimination implies the elimina1i
express10n evaluation from a place in the program if an ~equivalent" value an ~:;f
been computed and can be used. For example, eady
A=B ,.... C
8s
X B *" C+ 5
can be write as follows :
T= B++C
A=T

X= T+5
Fig. 13.12. Above optimization is possible only when. none of the state=ts in.c..·•rvenina
between the evaluation of B .,_. C and its use in the computation of X changes th;
Here a= 2 (from Bi) cannot be moved out since use of a in B 4 is also reached
value of B ** C. -
• the
bY definition
Note that, if all 1 in Bi-
a=above discussed condition are met then we can move out loop- 13.6.1. Elimination of Local Common Subexpression

in',;aria:nt code, from the loop. Local common subexpression can be eliminating by Dag Constroetion-
_ _ _ Let us define a function node (id), ..,.inch return the most recentl,; crear.ed node
U.S. ELIMINATION OF INDUCTION VARIABL~ associated with its id. For every three address statement.>:=; OP::.:,:·= OP y. or:,:=
We can decrease total number of instruction and §eedup the loop by elimJnaung
y in the block, we have co follow the following steps :
the induction variable. . · ent within Step 1. If node (y) is undefined. create a leaf labelled y. and let node (...·) be this
"'Induction variables of a loop are th0 ~e names w:ose : : : : ~ ~ :value does node. If node (z) is undefined. create a leaf labelli:d ::. and let tbar le:n be node(;:). If
the loop are of the form I = I± C, where C is a constan or a the statement is of the form .T = OP y or x = y. then if node C...·) is tmdefu:.ed. creares a
not change within the loop." leaf labelled y, and lee node (y) be the node.

eonside< we%""'" flow ::,;:,;

PROD:= 0
I:= 0
r 2 := addr (A) - 4
Step 2. If a node exists that is labelled OP whose left child is node (.vl :md
whose right child is node (::) {to catch common subexpression). then remrns this
node. Otherwise. create such a node. and return it. If the so.rement is of the fonn .T =
OP y, then check if a node eust that is labelled OP"' 11= ool) .:bild is ncde (.v). Rerum
T := addr (B) - 4
4
T1 :=4 >< I this node. Otherwise. create such a node and rerum. Let th<! reruroed node be,..
r,:= r 2 cr1 1 Step 3. Apend .- to the list of identifiers for~ n~><k n ~ e d 1JI Step~ Delete .T
from the list of a11ached identifier.,; for node t 1:).. and ~ nc,:,e (.T) to _t-e ~ "'.-

~
T := T4 [T1 ] •
5
T6 := T3 • Ts Let us consu.lcr an e-...;1111ple to make the c-,n.:ept -:1--.i.r. ~-onsxder the roUowmg
PROD := PROD+ T,
/:= /+ 1
1he block of code
(I) S 1 ·= -1 • I
If / S 20 goto 82

Fig. 13.13.
l--414---- . . ation and Generation D for complete code. as fo
I- code opt1m1z we can find the ag

Fun d amen tats 01

,
compiler Design ~ 4. Finally in same way.
+ 5 8 , PROD

I- 418
(2) 5 2 := addr (A) - 4
(3) S 3 := S 2 [S 1]
(4) S4 := 4 * I 5
(5) s,:= addr (B) - 4
(6) S 6 := S 5 [S4 )
(7) S1 := S3 * S6 S9, J 20
(8) 5 8 := PROD + S 7
(9) PROD := S• PRODO

(I 0) S9 := I + 1
(11) I= S 9
(12) if/<=20got0{1) Fig. 13.14(d).
Now Jet us construct the Dag for above code step-by-step :
1. Very first instruction ( 1) is s, := 4 * I, we will create leaves n,. and n 2 lab_elled
From the Fig. 13.14(d), it is clear that PROD O indicates the initial value of ·
4 an / then a node n labelled * and we also attach an idenufier S, to 1t : PROD and / 0 indicates the initial value of I. S 1 and S 4 are same when their value are
3
0
computed, same value is assigned to S 8 and PROD, so we can eliminate these common
subexpression by selecting one of the attached identifiers (one that is needed outside
the loop). Here we assume that none of the tempories is needed outside the block.
Finally block will be :
(I) S, := 4 * I
(2) S 2 := addr (A) - 4
Fig. 13.14(a)
(3) SJ := S 2 [S,J
(4) S 5 := addr (B) - 4
2. Now for S 2 := add (A) - 4 in same manner.
(5) S 6 := S 5 [S,]
S2 s, (6) S 7 := SJ * S6
(7) PROD := PROD + s7
(8) I:= I+ I
n, (9) if I~ 20 goto (1)
addr(A) 13. 7. LOOP UNROLLING
Fig. 13.14(b). If number of iterations are constant then we
3. Figure 13.14(c) represents the Dag for S 3 := S 2 [S 1] of the loop to reduce the required number of test::no::~u~~sthe replicating the body
For example, consider the following loop: p called loop unco1Jing.
= [] I= 1
while (I <= 100)
{
S2 x{I) =O;
I:= I+ 1;

addr (A) In this case the test I<= 100 w·11 b

loop is replicated as follows: J e performed 100 times. But if"the body of"the
Fig. 13.14(c). I= 1
While (I <= 100)
 Fun damen tals af C
amp/fer Design I Cod11 Opl/m/1att
x[l] • 0 (a) I\ wld,• on and G•n•ratlan

~
1;
I: .. I .... -•lack I rr,nl(c "' mldr"••ing
(l,J A ~mu~umc• etc, mr,dc• lo •u - --
xCIJ = O;
I:= I+ 1
(q M,,. . "''"'""'"'re
indc~u;i.C<:tal purp11scg i ;•e~• (usually "~"'~""'"'"'
16 or I ys, records,42'
lists,
(d) 'l'wo-add;:~. , cg1S1er•, for cxampl::~-,
l11L·n rJ1e number of times this t est will
INTRODUCT ION TO C
(<) ~Ore""'"· '""'""'""''""'"A ""'°" m,, ""=~"' Im
,1.3.S. need to be petformed
. . ,inablc len th . + /J -A, where A
I< ;, the las<h ODE GENER woll be 50 (/) Instruct ions :,it~n•_truction. • B may be complex
dependent p,o=s p ase of compile, d . ATION ?) Widely differen •ide effect•. for ex
h) Control i t execution tim ample aulo-incrc
;;,ie. We mus< be ve,; c"''"i of machine "~~~c"',tioo, is mac hi"'
to generate goods so without knowing tJ~st!n process. Code 2. RISC (R mplemented by micr cs for instruclJOns. mcnt instructions.
selection since a
rnugh algolithm ,c,ent algolithm may bMe "." aboot code g =to,e, ii isd iffico lt characteristics. educed Instruction ;:;ogam.
Let us see pie< . e tw,ce as fast as co':i:''""o" algo,i•hm (a) Simply addressin omputer) : RISC• have the .
:ures view of code . generated by an (b) Many re . g modes usual! _ followmg
(c) All regis~~::e:, at least 32. y only mvolvmg registers.
Intermediate generallon phase :
(d) Three-address :;teneral purpose.
code
(e) Fixed length instruru~tJons but only involvin
I
(f) One result p . ctJon (32 bits). g registers that is r =r +
Code
!
'-
optimizer 1
I
(g) Bae, iostroC::o:";:;'ctioo ooly. , ' ,,
( h ) Control is hard w·ire_,,
:s arather
similar length
than . of time to execute.
/,/F- --- , 13. 10. MAJOR ISSUES O nucroprngrammed.

~--~------ The code generator m ·n1F CODE GENERATION

• M
emory management
ai y concern with

• loStrnCtion selection
: Register Utilization (Allocation)
Fig. 13.15. 1 Storage allocation.
. Memory
symbol-tab~e Management Duri
A_ good generation must do following things :
enterie~ have to be.ma
mapped•• m,=ction addre=· p
pedng code generation process references
macOWP......,..,.,....,-m::

~
(i) Produce correct code
_(ii) Make use of machine architecture Mapping names in the source ro
pa,s I (Floo, ,od) and p= 2(co.l'e :.=:.,;;""""
of da<a - - m
(iii) Run efficiently. Local vanables (local to functions .•
• Input to code generator : ,ctioarioo reconl while glootl -,,ri;obt~:::. ~ : . -.. . - mm,
(i)
(ii)
•
Intermediate code program
Symbol table
Output of code generatur : is target program

This can be any of :

2. _1nstructio_n Selection. The nature of instrUcti
de,e=••• ~t~ooo. P~utiarities in m< """'' · •
acCO"OL Fo, ~ - ' " -
- of
m, -

(a) The MC68K treats address and data registerS diffc:rcnth'-

--= --
D .. -

(b) Some instn1ctions tthat is MUL- DIV) may oeed pairs~~ md taB
-
-
.
=-
(i) ,Assembly language program se,eral ?cles to complete ltbat is.:an·t~tb-.--.se~forome£purposes).
(ii) Absolute machine-language program. tc) Ad~ssmg mode tFC-relati,-e vs.. absolute). sp,111 (soort VS- Iong).
(iii) Relocatable rnachine-Janguage prograrn - is regular lhal is UDifanD (all
Instruction sde.:tion is ··easy·· if ;nsauctiOll set
:1,3.9. ""ACHINE ARCHITEcTURE CURRENTLY Iii USE ttipl< oddl<s<<' ,UI s<,ok ,i...1< ,,,,...,,, "°" ,,.,..,,_ (""' of - .. -,
aefo« considering oth<' i,sues, we should took at the two main types of machine
1
operation)_
l cisC
a,rchitectu«' (Comple•
curren<IY in Instruction
use Set computer), c1sc, "" designed w,< . b;'~
· · f n·gh Jevel Janguages in mind and wou ld 1hen,fo1e seem, th<' "
3) picl. up unlistt'l.i n,-.Je
~
.in
4) list n,; n. r,irents have been
;,nple,nent.auon
candid• o for
te as u,rge< • com
- .
pile<' . ,yp,cal . .,cs.
characte"" "'° .. . \\h,..~

--• ,a..-oJ + (e+(c - d))

\- _________
422 _ _ _ _ _ _ _ Fund
If we don' t care abou t effic
amentals a/ Cam pi/er
Design t I- Code Optlmlzotlon and Generation
forw ard.
ienc y of targe t prog ram,
instr uctio n selec tion is strai
ght The re are follo win g
adv anta ges for this . . 423
"'
-I
For exam ple. the thre e kind of dela y dec1 s
addr ess code is : allo cati on. 1o n a b out sto rag~
(i) We can push mac
a := b + c
d :=a + e (ii) Var iabl es that are
hine dep end enc ies to
opti miz ed awa y nee d
the bac k end ; . '
Inef ficie nt asse mbly code (iii) Vari able s that can not take up spa ce,
is be kep t in regi ster s do
1. MOV b, R not take up stor age unle
0 R0 - b 13. 11. A MACHINE MO ss nece ssar y.
2 ADD c, R DEL AN D CO DE GEN
0 R0 - c + R0 ERA TIO N
3. MOV R , a It is very clea r now that
0 a - R0 cod e gen erat ion requ ired
4-. MOV a, R arch itect ure. By kno win very dee p kno wle dge
0 R0 - a g the mac hine spec ific of mac hine
S. ADD e, R com plet e lang uage effic atio n, we can gen erat
0 R0 - e + R0 ient ly. e a cod e f o r
6. MOV R , d For exam ple, let us see
0 d - R0 two type of mac hine
1. Tar get Mac hine Firs spec ific atio n :
3. Reg ister Allo cati on t hav ing foll owi ng spec
: Reg ister c::.n be acce ssed ific atio n :
Freq uent ly acce ssed vari faste r than m~m ory w~rd (i) We have byte add
able s shou ld resid e in regi s. ress able mac hine (tha
assi gnm ent is pick ing a sters (reg ister alloc ation (ii) 4 byie per wor d. t is 2 15 16-- bit wor ds)
spec ific regi ster for each ). Reg ister of mem ory.
Form ally, ther e are two such vari able . (iii) We have 16 to
step s in regis ter alloc ation 32 (or n) gen eral purp
(a) Reg ister allo cati . (iv) Mac hine has two ose regi ster s.
on (wh at regi ster ?) : add ress able inst ruct ion
in whic h we sele ct the This is a regi ster sele ctio of the form :
set of vari able s that will n proc ess OP sour ce, dest inati on
(b) Reg ister assi gnm resid e in regi ster.
ent (wh at vari able ?) that is, MOV A., B
cont ain vari able . Note : Her e we pick the regi ster A.DD A.,D
that this is a NP- com plet that
Som e of the issu es that e prob lem. 2. Tar get Mac hine Sec
com plic ate regi ster allo ond hav ing foll owi ng
(i) Spec ial use of hard cati on (i) Mac hine has bit spec ifica tion :
war e for exam ple, som add ress ing (fac tor of
regi ster. e inst ruct ion requ ire spec (ii) Thr ee addr ess inst 1)
ific ruct ion of form s :
(ii) Con vent ion for soft
ware :
For exam ple : OP sour cel, SCUT ce2,
dest inati on
For exam ple :
• Reg ister R (say ) alwa
6 ys retu rn addr ess.
• Reg ister R (say) for
5 stac k poin ter. ADD A, B,C
• Sim ilarl y, we assi gned . No"' . let us see two
regi sters for bran ch and
(iii) Cho ice of eval uatio link , fram es, heap s etc. with thei r addr essi ng addr ess inst ruct ion of the fon n mne mon
n orde r, may prod uce mor mod e. ic sou rce, des tina tion
This is NP- com plet e prob e effic ient code .
le!D but we can by pass Mod e
code for quad rupl es in this hind ranc e by gene
the orde r in whic h they ratin g Form Add ress
code gene rato r. have been prod uced by Abso lute
i..Qtermediate M E:Jmmple
A.DD x, y, T Regi ster M
1
Inde x R R Add lto, ~
A.DD a, b, T
is lega l beca use x, y and
2 C(R ) Add ll::m p.R.
a , b are diffe rent . Indir ect regis ter C + cont ents (R)
.. R Cont ent \R) ADD lOO (llz) .R
4. Stor age Allo cati on Indir ect Inde x
: Dela y deci sion abou 4'C(R ) ADD •Rz -R.1
code gene ratio n, whe n t stor age allo catio n unti Cont ent (C+)
the widt h of each type l fina l AD D• 100
• Initi aliz e loca tion is know n : Liter al Cont ent (R)
field of each iden tifie (R.;:,). R
UND EF. r/tem pora ry to a spec Cons t:mt C
ial valu e
• Mai ntain a coun ter Not e. here cost 1 mea
that give s the disp lace men ns that it o...--cupies onh
the !.tac k fram e. t of the next avai lable "Ea ch inst ruc tion has one .,.,-ord of
slot in dest inat ion" . a cos t of
• Dur ing code gene ratio 1 plu · mem my.
n, if ther e is a refe renc e s add ed c-os ts for the
loca tion is UND BF, then to a sym bol tabl e entr y who sou rce and
set the valu e usin g the se Cos
t of inst ruct ion l + Cos
any code . Upd ate the loca coun ter befo re gene ratin Th" t of SO\.U"C'e' Q~d d • •
tion coun ter usin g type g •
info . c-ost
Sl1me ot e'\amcorr
t~ espo nds t~" the leng th \in
,,orc ts'I • . • e:sn
...., nanoo mod e
ple : -
c,t 1nstr u.::n. on. Let us ana
lyse the
J 424 - - - - - - - - - - - - - - - - - Fundamentals a/ Campi/er Design~ I- Code Optimization and Generation - - - - - - - - - - - - - - - - - 425 ..J
1. Move register to memory R 0 +- M When the index of statement a = b OP c is passed to the getreg ( ) as argument
l\1OV R 0 , M cost = 1 + 1 = 2(since address of memory location then it performs followings jobs.
M is in word following the instruction) (a) It searches for a register already containing the name b. If such a register
2. Indirect indexed mode : exists, and if b has no further use after the execution of a = b OP c and if it
MOV * 4 (R 0 ), M is not live at the end of the block and holds the value of no other name, then
return the register for L.
cost= l + l + 1 (since one word for memory location M, one word
(b) ?ther~ise, getreg () searches for an empty register, and if an empty register
for result of * 4(R0 ) and one for instruction)
IS available, then it returns it for L.
3. Indexed Mode :
(c) If no empty register exist and if a has further use in the block or OP is an
MOV 4(R 0 ), M op_erator such as indexing that requires a register, then getreg ( ) finds a
cost = l + 1 + 1 = 3 suitable, occupied register. The register is emptied by storing its value in the
4. Literal Mode : proper memory location M, the address descriptor is updated, the register is
MOV#l,R 0 return~d to L: The least-recently used strategy can be used to find a suitable,
cost= l + l = 2 (one word for constant 1 and one for instruction) occupied register to be obtained.
5. MOVE memory to memory : Code Gener~tion Algorithm : Let a = b OP c is to be perforr•.-,d, then when
MOV m, m cost = l + 1 + l = 3 (two for memory locations and one we ~all getreg () it returns a location L, where the computation of b OP c take place.
Basically getreg ( ) returns a register.
for instruction)
Let us discuss the algorithm for code generation.
13.12. A SIMPLE CODE GENERATOR Begin
Give a sequence of three-address statement partitioned into basic blocks, straight For every three-address statement of the form a =b
forward code generation involves generating code for each three-address statement OP c in any basic block
in tum by taking the advantages of any of the operands of the three address statement {
thi-t are in the register as long as possible. We store it only if the register is needed
for another computation or just before a procedure call, jump or labelled statement, th Step 1. <?all function getreg () to find out the location (register) L to performed
such as at the end of a basic block is encountered. The reason for this that after e computation for b OP c; getreg () function takes index of the statement a _ b OP
c as argument. -
leaving a basic block, we may go to several different blocks, or we may go to one
particular block that can be reached from several others. S!ep 2. Try_ to find out the location of the operand b by ccrsu.Itin its ad
To avoid the error, our code-generation strategy stores everything across the descriptor and If the value of bis currently both · th _g dress
in th · t th m e memory 1ocation as well as
basic block boundaries. Note that to make this strategy s uccessful we should keep e m eger, en prefer the register. If the value of b is currentl vaila ·
track of what in currently in each register. For this we maintain the "register then generate an instruction MOV b L upda th ddr ~ not a ble m L
now is in L. ' ,e e a ess descriptor for show that
descriptor" which is simply a pointer to a list that contains information about what
is currently in each of the register. Initially all registers are empty. Step 3. Do the same for c (Now b and c are in L)
We also maintain the "address descriptor" for each name in black to keep track Step 4. If the current values of b and/or c are .in the ·
for the location for each name where the current value of the name can b!! found at ~ e r use for them, and they are not live at the end of reg:ister. and we have no
run time. register descriptor to indicate that. the block. then after the
A space is required to perform the computation specified by each of the (d) If a is not used in block or not suitable occ .ed
three-address statement. We will define a function getreg ( ) to find that location. getreg ( ) selects a memory location and returns for i; 71 .
register cao be found,
After the execution of the statement a = b OP c , those register will no longer
contain b and/or C . Example 13.I. Consider the following expression. with its three address code :
a = (p + q) - ((r + s) - t)
Store all the results '1 = p +q
End tz = r+s
Mechanism of Getreg ( ) Function : We can have the view of mechanism of t3 = 1z - t
getreg ( ) function by folJowing poinlS. a= t 1 - t3 ;1
Apply the algorithm of "'Ode- gene-ration on it.
 I- 426 - - - ~ ~ - - - - - ~-- Fundamentals of Comp/fer Desfgn ~ I Code Optlmlzot/on and Generation - - - - - - - - - - - - - - - - - 427.J
Solution. Given cxprc~~1on i~
Now Jet us apply the above discussed algorithm, which gives following Dag_
a = (p + q) - ((r + l) - t)
with heuristic ordering. ·
Following table will gcncralci; lhc in~lruclion
St.alcmcnl I,ocallon L Jmtructlon Rl!gii;tcr Addre.~s
gencr11tcd descriptor dct,~
All registers
empty initially
11 =f' + q Ro MOY p, R 0 R 0 will hold 11 11 is in R 0
ADD q, R0

'2 =r +, MOY r, R 1 R 1 will hold 12 12 is in R 1 4 +

RI
ADD s, R 1
t 3 =t2 -t RI SUB t,R 1 R 1 will hold 13 13 is inR 1
a= 11 -1 3 Ro SUB R 1. R0 R 0 will bold a a is in R0
MOY R0 , a a is in R 0
and memory
13.13. CODE GENERATION FROM DAG
From the dag we can move easily rearrange the order of the final computation
sequence than we can starting from a linear sequence of quadruples . So first we
0
F"ig. 13.17.
obtain the Dag representation of the basic block, and then we order the nodes of the
DAG using heuristics. Heuristics attempt to order the nodes of DAG so that, if So the computation order will be as follows :

j
possible, a node immediately follows the evaluation of its left-most operand . /6 =q+r
Algorithm for Ordering Nodes of Dag : This algorithm lists the nodes of a t5 = t6 + s
Dag such that the node's reverse listing res•Jlts in the computation order. 14 = p + t6
Begin
while there exists an unlisted interior node g.Q t3 = 13. + t5
lz = I.: - t5
!e1ect an unlisted node n whose parent have been listed
tl = tz - f3
!~i~ tnere exists a left-most child m of n that
not a leaf do
has no parent listed anclm is
13.2.4. REGISTER ALLOCATION ,.1
listm
m=n
Registers are a finite resource. Sources and targets for many instractions
modern RISC like architectures. Code generation assmnes an unbounded number of
registe~s to simplify matters. In register allocation we map anbounded number to
00
j
order = reverse of the order of listing of nodes the firute set. Key to this is knowing whether a value within a register is still needed.
End
. "Register allocation is the process of assigning a large number of target prognu;.n
Let us see an example, consider the given Dag in Fig. 13.16. vanables onto a small number of CPU re!!isters.. -
It is the process of compiler back end as foll~ws:

IR Instruction Register h5lruciion Ua:::hnt coda

Selection AJloca.tion ~

En'Ols

Flg. 13.l&. Regis~r allo..~ p,ocas

Fig. 13.16.