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1 Embedded System
An embedded system is a combination of hardware and software with some attached
peripherals to perform a specific task or a narrow range of tasks with restricted resources. It is
an electronic system that is not directly programmed by the user, unlike a personal computer.
An embedded system is a device that incorporates a computer within its implementation,
primarily as a means to simplily the system design, and to provide flexibility; and the user of
the device is not even aware that a computer is present. It is a microcontroller-based, so Rware-
driven, reliable, real time control system,. Autonomous or human or network interactive,
operating on diverse physical variables and in diverse cenvironments, and sold in a competitive
and cost conscious market. Generally, an embedded system is a subsystem in ~ Jarger system
and it is application specific. The generic block diagram of an embedded system is shown in
Figure 1.1. Every embedded system consists of certain input devices such as: key boards,
switches, sensors, actuators; output devices such as: displays, buzzers, sensors; processor along
with a control program embedded in the off-chip or on-chip memory, and a real time operating
system (RTOs).
Input Output
Input Output
Devices Processor Devices
Memory
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1.1.2 Characteristics of an Embedded System:
size of the system should be as for as possible small and the readings must be accurate with
minimum eror. The system must be easily adaptable for different situations.
Embedded systems can be classified into the following 4 categories based on their
functional and performance requirements.
Embedded system
Functional Performance
1. Stand-alone embedded systems Small scale embedded system
2. Real time embedded system 2. Medium scale embedded s/m
a) Hard real time E.S 3. Large scale embedded system
b) Soft Real time E.S Or
is input ports, calibrates, converts, and processes the data, and outputs the resulting data to its
atached output device, which either displays data, or controls and drives the attached devices.
EX: Temperature measurement systems, Video game consoles, MP3 players, digital
cameras, and microwave ovens are the examples for this category.
An embedded system which gives the required output in a specified time or which
strictly follows the time deadlines for completion ofa task is known as a Real time system i.e.
a Real Time system, in addition to functional correctness, also satisfies the time constraints
There are two types of Real time systems. (i) Soft real time system and (ii) Hard real time
system.
Soft Real-Time system: A Real time system in which, the violation of time constraints
will cause only the degraded quality, but the system can continue to operate is known
as a Soft real time system. In soft real-time systems, the design focus is to offer a
guaranteed bandwidth to each real-time task and to distribute the resources to the tasks.
Hard Real-Time system: A Real time system in which, the violation of time
constraints will cause critical failure and loss of life or property damage or catastrophe
is known as a Hard Real time system.
These systems usually interact directly with physical hardware instead of through a human
being The hardware and software of hard real-time systems must allow a worst case execution
(WCET) analysis that guarantees the execution be completed within a strict deadline. The chip
selection and RTOS selection become important factors for hard real-time system design.
Ex: Deadline in a missile control embedded system, Delayed alarm during a Gas leakage,
car airbag control system, A delayed response in pacemakers ,Failure in RADAR functioning
etc.
access the resources. The connected network can be a Local Area Network (LAN) or a Wide
Area Network (WAN), or the Intemet. The connection can be cither wired or wireless.
The networked embedded system is the fastest growing area in embedded systems
applications. The embedded web server is such a system where all embedded devices are
connected to a web server and can be accessed and controlled by any web browser.
Ex: A home security system is an example of a LAN networked embedded system where all
sensors (e.g. motion detectors, light sensors, or smoke sensors) are wired and running on the
TCP/IP protocol.
Mobile Embedded systems:
The portable embedded devices like mobile and cellular phones, digital cameras, MP3
players, PDA (Personal Digital Assistants) are the example for mobile embedded systems. The
basic limitation of these devices is the limitation of memory and other resources.
Based on the performance ofthe Microcontroller they are also classified into (i) Small
scaled embedded system (ii) Medium scaled embedded system and (ii) Large scaled embedded
system.
use as a programming tool. These systems may also employ the readily available ASSPs
and 1Ps (explained lter) for the various functions-for example, for the bus interfacing.
encrypting. deciphering, discrete cosine transformation and inverse transformation,
TCP/IP protocol stacking and network connecting functions.
Standalone embedded system includes different types of processors, power supply unit, clock,
reset circuit, memories which are considered to be most essential hardware components of
standalone embedded systems. A brief discussion on important features of these components
are given below
Processor: A processor is the heart of the embedded system. It is responsible for execution of
instruction and controlling flow of data to and from processor. Designer should have proper
knowledge regarding eficiency of different types of processor and based on which one should
select the appropriate processor as per requirement. Different types of processors available can
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be categorized into four broad categories () General purpose processor (GPP) (2) Application
specific System processor (ASSP) (3) Multiprocessor system and (4) GPP core or ASIP core.
a). Having predefined known instruction set resulting fast system development.
b). Board and I/0 Interfaces designed for GPP can be used for different system changing the
software.
c) Ready availability of computer facilities in high level language along with compiler and
debugger, resulting in fast development of a new system.
d)GPP or ASEP core: GPP core or ASIP core is integrated into either an Application
Specific Integrated Circuit (ASIC) or a VL.SI or an FPGA (Field programming Gate Array)
core integrated with processor units. Lately a new innovation in this area is System on
Chip (SOC). A SOC may be embedded with multiple processors, memories, multiple
standard source solutions called IP (Intellectual Property) core and other logic and analog
units. It may have also a network protocol embedded on it. It can embed DSP applications
and FPGA core.
For a number of applications GPP core may not be a suitable solution. For
various security application, smart card, video game, mobile Internet, Gbps transceiver,
Gbps LAN, missile system needs a special processing unit on a VLSI design circuit to
function as a processor. These units are called Application Specific Instruction Processor
(ASIP). Sometime for an application both configurable processor (FPGA or ASIP) and
non-configurable processor (DSP or microprocessor or microcontroller) might be needed
on a chip. Gcnerally this type of applications are very important in some killer applications
(application which is useful to millions of people) such as HDTV, cll-phone etc.
Generally embedded system has its own Power supply unit. Four range of votage (i) 5.0V
+0.25V (i) 3.3V+0.3V (ii) 2.0V +0.2V (iv) 1.5V+0.2V are used
for operation ofdifferent
units. Additionally 12V+0.2V supply is needed for a flash or EEPROM and R$232 Serial
Interfaces. Supply of voltage to the chip depends on number of pins provided in the chip
which is generally in pair supply and ground. A processor may have more than two pins
of Vdd Vss which are responsible for distribution of power and reduction of inferences in
all the sections. Supply should separately power the (a) External Il/O driving port (b) timers
and (c) clock and reset circuits. Clock and reset circuit should be specially designed to be
free from radio frequency inference
Embedded systems which don't have a power source at their own are
either connected to an external power supply or use charge pump for necessary power
supply. Example of first type may be Network nterface Card (NIC) and Graphics
accelerator which do not have their own power supply are connected to PC power-supply
line. In the second type charge pump brings power from a non-supply line. It consist of a
diode in the series followed by a charging capacitor. The diode gets forward bias input
from an external signal, say RTS (Request to Send) signal in case a mouse used with the
computer. The charge pump inside the mouse store charge in inactive state and dissipate
The function of this oscillator circuit is to provide an accurate and stable periodic clock
signal to a processor. The processor needs a clock oscillator as clock controls the various
clocking requirements of CPU. The clocking requirements are the system timers and CPU
machine cycles. The machine cycle includes (i) Fetching code and data from memory and
Decoding and execution and (ii) Transferring results to memory. The clock controls the
time for executing an instruction. The clock circuit uses eithera crystal (External to the
processor) or a ceramic resonator (internally associated with the processor) or an external
IC attached to the processor. (a)The crystal resonator gives the highest stability in
frequency with temperature and drift in the circuit. The crystal in association with an
appropriate resistance in parallel and a pair of series capacitance at both pins. The crystal
is kept as near as feasible to the two pins of the processor, (b) The internal ceramic
generator, if available in a processor, saves the use of the external crystal and gives a
reasonable though not very high frequency (c) The external IC based clock oscillator has
a significantly higher power dissipation compared to the internal processor resonator. It
provides a higher driving capability, which might be needed when various embedded
circuits ofembedded systems concurrently driven for e.g. in multiprocessor based systems.
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A timer is suitably configured as system clock sometime referred as RTC (Real Time
Clock). RTC is used by scheduler for real time programming. A hardware timer is a counter
that is incremented at a fixed rate when the system clock pulses. There are several different
types of timers available. A timer/counter can perform several different tasks. The CPU
uses the timer to keep track of time accurately. The timer can generate a stream of pulses
or a single pulse at different frequencies. It can be used to start and stop tasks at desired
times A CP (computer operating properly) or watchdog timer checks for runaway code
execution. The hardware implementation of watchdog timers varies considerably between
difterent processors. In general watchdog timers must be turned on once within the first
few cycles after reset and then reset periodically with software. Some watchdog timers can
programmed for different time-out delays. The reset sequence is sometimes as simple as a
specialized instruction or as complex as sending a sequence of bytes to a port. Watchdog
timers either reset the processor or execute an interrupt when they time out.
More than one timers using the RTC may be needed for various timing and counting
need. There may be hardware and software implementations of timers. At least one
hardware timer device is must in a system which is used as system clock. The hardware
timer gets the input from a clock out signal from processor and activates the system clock
as per the number ticks present at the hardware timer. Number of hardware timers present
are generally limited.
A software timer is a software that executes and increases or decreases a count variable
(count value) or an interrupt on a timer output or on a real time clock interrupt. A software
timer can also generate interrupt on over low of count value or the final value of count
variable. Software timers are used as virtual timing devices. There are number of control
bits and time out status flags in cach timer device. A timer device when given count inputs,
in place of clock pulses performs as a counting device.
1.4.1.5 Interrupt Handlers
A system possesses. number of devices and the system processor has to control and
handle the requirements of devices by running appropriate Interrupt Service Routine (ISR)
for cach. An interrupt handling mechanism must exist in cach system to handle interrupt
from various processes in the system. An interrupt is an event that suspends regular
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program operation while the event is serviced by another program. Interrupts increase the
Reset instruction start execution from starting address otherwise execution start from
this address when it is powered up. The reset circuit activates for a fixed period (a few
clock cycles) and then deactivates to let the program proceed from a de fau lt beginning
address. On deactivation of the reset that succeed the processor activation, a program
executes from start-up address. Reset can be activated either by external reset circuit that
activates on power up or by software instruction or by a programmed timer known as
watchdog timer. Watchdog timer is a timing device that resets the system after a predefined
timeout this time is usually configured and the watchdog timer is activated within the first
few clock cycles after power up. It has many applications. In many embedded systems
reset by a watchdog timer is very essential because it helps in rescuing the system from
program hangs. On restart program can function normally.
1.4.1.7 Memories
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Embedded system makes use of different types of memories based on their features. These can
be viewed with following chart. These may be bricfly explained based on their functionality (i
Internal RAM used for registers, temporary data and stack. (Gi) Internal ROM/PROM/EPROM
for application program (ii) Extemal RAM for temporary data and stack (iv) Intemal cache
available in case of some microcontroler or microprocessor. (v)EEPROM of flash memory for
saving the results (vi) External ROM or PROM for embedding software used in non
microcontroller based systems. (vii) RAM memory buffers at ports. Caches for superscalar
microprocessors.
Diferent types of memory devices in varying sizes are available for use as per
requirement. These are (a) Masked ROM or EPROM of flash which stores the embedded
software (ROM image). Masked ROM s for bulked manufacturing (2)EPROM or
EEPROM is used for testing and design stages. (3)EEPROM (SV form) is used to store
the results during the system program run time. It is erased byte by byte and written during
the system run. It is useful to store modifiable bytes for example run time system status,
time and date. Flash is very useful when a processed image or voice is to be siored or a
data set or system configuration data is to be stored which can be upgraded as and when
required. In a flash new images after compressing and processing can be stored and the
old one is erased from a sector in a single instruction cycle. In boot block flash a OPT
sector is reserved to store once only at the time of first boot. It stores boot program and
initjal data or permanent system configuration data. This OTP sector can be used to store
ROM image. (4)RAM is mostly used in SRAM form in a system. Advanced system uses
RAM in the form of a DRAM, SDRAM, or RDRAM (5) Parameterised distributed RAMM
is used when I/0 devices and subunits require a memory bufer. (6) Subunits like MAC
The system gets input from physical devices such as keypads/boards, sensors,
transducer cireuits ete. It gets the values by read operations at the port address. The system
has output ports through which it sends output bytes to the real world. It sends the values
to output by a wrte operation at the port address. In case of some devices a port may be
used as both input as well as output port. One example is mobile phone which sends as
well as receives signals. There are two types of 1/0 ports (i) Parallel port and (ii) Serial
port. In a serial port, system gets a serial stream of bits at an input and sends the signal as
bits through a modem. A serial port faciltates long distance communications and
interconnections. A serial port may be serial URAT, a serial synchronous port or serial
intertacing port. A system may get inputs from mutiple channels or may have to send
multiple output channels. A demultiplexer takes input from various channels and transfers
the input to a selected channel. A multiplexer takes output from the system and sends it to
another system. A system might have tao be connected to a number of other devices and
systems. For networking system there are different types of buses e.g., 12C, CAN, USB,
ISA, EISA and PCI.
1.4.1.8 DACIADC
For automatic control and signal processing applications, a system must provide
necessary interfacing circuit and software for Digital to Analog Conversion (DAC) unit
and Analog to Digital Conversion (ADC) unit. A DAC operation is done with the help of
a combination of PWM (Pulse Width Modulation) unit in the microcontroller and External
Integrator chip. ADC operations are needed in systems for voice processing
Instrumentation, Data acquisition systems and automatic control
We refine the high level functional diagram to ilustrate a typical bus configuration
comprising the address, data and control lines
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Control
Opud
Datapath
Address
Data
Control
Figure 1.5 A typical Bus structure comprising address, data and control signals.
Address bus and data bus
According to computer architecture, a bus is defined as a system that trans fers data
between hardware components of a
computer or between two separate computers.
Initially, buses were made up using electrical wires, but now the term bus is used more
broadly to identify any physical subsystem that provides equal functionality as the
carlier electrical buses.
Computer buses can be parallel or serial and can be connected as multi drop, daisy chain
or by switched hubs.
System bus is a single bus that helps all major components of a computer to
communicate with each other.
It is made up of an address bus, data bus and a control bus. The data bus carries the
data to be stored, while address bus carries the location to where it should be stored.
Address Bus
Address bus is a part of the computer system bus that is dedicated for specifying a
physical address.
When the computer processor needs to read or write from or to the nory, it uses the
address bus to specify the physical address of the individual memory block it needs to
access (the actual data is sent along the data bus).
More correctly, when the processor wants to write some data to the memory, it will
assert the write signal, set the write address on the address bus and put the data on to
the data bus.
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Similarly, when the processor wants to read some data residing in the memory, it will
assert the read signal and set the read address on the address bus.
After receiving this signal, the memory controller will get the data from the specific
memory block (arter checking the address bus to get the read address) and then it will
place the data of the memory block on to the data bus.
The size of the memory that can be addressed by the system determines the width of
the data bus and vice versa. For example, if the width of the address bus is 32 bits, the system
can address 232 memory blocks (that is equal to 4GB memory space, given that one block
holds I byte of data).
Data Bus
A data bus simply carries data. Intenal buses cary information within the processor,
while external buses carry data between the processor and the memory.
Typically, the same data bus is used for both read/write operations. When it is a write
operation, the processor will put the data (to be written) on to the data bus.
When it is the read operation, the memory controller will get the data from the specific
memory block and put it in to the data bus.
Data bus is bidirectional, while address bus is unidirectional. That means data travels
in both directions but the addresses will travel in only one direction.
The reason for this is that unlike the data, the address is always specified by the
processor. The width of the data bus is determined by the size ofthe individual memory
block, while the width of the address bus is determined by the size of the memory that
should be addressed by the system.
*A destgn meic s a measure o a implementations
eature Such as cost, sze, pe igrm ance and pouer,
Comm only used desan natrits a r e :
NRE Cs:[ NonTecuTring enqtneer ng costJ
The one time mo netoy cost o
degning the sytm
Once the sytem if
dest9ned,
be manujacured oithout
any number o uni can
ole sgn cost. Hente the terminurring any aolditonal
ronfe curng.
-
UaitcosE-
The monetary cost O manujatiang each
he
syeten, ecluding NRE Cost.
coP
8 Size
The
ph*lcal space required by the system, T-s
oten measused bytes $otoare and gatec or
transistTE hardwaue.
4Peaprmance
The ee ution time b System,
5 Posae
The amount o power Consumed by the system,
ohfch may detumine he lijeime oa batery or Coon
Tequirements o the tC, Since more Pouer means more
heat
b
GEleb?liy
The abltty to change the ueHonality o the
system othout incuTrin9 heavy NRE. Cos.
4)Time-to-prototpe
The time necded to bu>ld a oor King Nerston
OThe sykem, hich may be bYgger or more expensiue
than the inal system implementation but 't can be
used to ver+ijy the stems usloess and Corectness
and to *joe the sutem unctionalit.
& ne to market
The time equired to deuelop a sytem to
the that tE be eleased and sold
porot tan to tusto
mers.
The main contributor are desgn tine, manuau buring9
time, and tesing time.
a Mainkainabiliy
The
abilttiy to modiy
the sustem ater
itt
nttal e le ase, especially by desrgners sho did not
The
our con dence that we have implemented
syatems neHonallty correety. le check he can
uncHo nality throughout +he procss o designing the
syetem and we can in sert test ctruuitry to check
that manujaetuing 0s Co7reck.
1 Sate
The probabYli ty theat the system koill not cause
harm.
Mehics typfcally compete oith another
one
mproving
one ote leads to Koorsen ng oK another,
Performance Size
NREcost