Ateneo de Davao University

School of Engineering and Architecture

Logic Circuit and Switching Theory

Plate # 1

Submitted by:
Jayson Becosacer
Fourth Year BSECE

Submitted to:
Engr. Cedric Matthew Gador

December 6, 2017
Problem:
Create a circuit that would display the square a 4-bit input value. Display the outputs
through 8 LEDs arranged from left ( MSB ) to right ( LSB ). If in case the square of the input
exceeds 8 bits, ignore the extra bits and display only the 8 least significant bits. Use AND, OR
and NOT gates only.

Analysis:

The first approach in this circuit is to solve for the squares of the individual 4-bit inputs
from 0 to 15. Since the circuit uses eight LEDs to display the output, this would mean that the
square of the numbers is also represented in binary form. After getting the square of the numbers,
we should convert them into binary form for us to create a truth table that indicates whether the
LED on a specific output bit is either high or low depending on the given 4-bit binary input. The
truth table will be the basis of our fundamental equations and will help us establish a simplified
working circuit.

Truth Table:

A B C D F7 F6 F5 F4 F3 F2 F1 F0

0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 0 0 0 0 1

0 0 1 0 0 0 0 0 0 1 0 0

0 0 1 1 0 0 0 0 1 0 0 1

0 1 0 0 0 0 0 1 0 0 0 0

0 1 0 1 0 0 0 1 1 0 0 1

0 1 1 0 0 0 1 0 0 1 0 0

0 1 1 1 0 0 1 1 0 0 0 1

1 0 0 0 0 1 0 0 0 0 0 0

1 0 0 1 0 1 0 1 0 0 0 1

1 0 1 0 0 1 1 0 0 1 0 0

1 0 1 1 0 1 1 1 1 0 0 1
 1 1 0 0 1 0 0 1 0 0 0 0

1 1 0 1 1 0 1 0 1 0 0 1

1 1 1 0 1 1 0 0 0 1 0 0

1 1 1 1 1 1 1 0 0 0 0 1

Equations:

F7 = ABC’D’ + ABC’D + ABCD’ + ABCD

= ABC’(D’+ D) + ABC(D’+D) ; (D’+D) = 1
= AB(C’+C) ; (C’+C) = 1
= AB

F6 = AB’C’D’ + AB’C’D + AB’CD’ + AB’CD + ABCD’ + ABCD

= AB’C’(D’+ D) + AB’C(D’+D) + ABC(D’+D) ; (D’+D) = 1
= AB’(C’+C) + ABC ; (C’+C) = 1
= AB’ + ABC

F5 = A’BCD’ + A’BCD + AB’CD’ + AB’CD + ABC’D + ABCD

= C[ A’B (D’+D) + AB’(D’+D) ] + ABD(C’+C) ; (D’+D) = 1 , (C’+C) = 1
= C[ A’B + AB’] + ABD

F4 = A’BCD + AB’C’D + AB’CD + ABC’D’ + A’BC’D’ + A’BC’D

= BCD’(A’+A) + CD(AB’+A’B) + C’D(AB’+A’B)
= BCD’(A’+A) + [D(AB’+A’B)][C + C’] ; (C’+C) = 1, (A’+A) = 1
= BCD’ + D(AB’+A’B)

F3 = A’B’CD + A’BC’D + AB’CD + ABC’D

= B’CD(A’+A) + BC’D(A’+A) ; (A’+A) = 1
= B’CD + BC’D
= D(B’C + BC’)
 F2 = A’B’CD’ + A’BCD’ + AB’CD ‘ + ABCD’
= CD’( A’B’ + A’B + AB’ + AB) ; ( A’B’ + A’B + AB’ + AB) = 1
= CD’

F1 = 0

F0 = A’B’C’D + A’B’CD + A’BC’D + A’BCD + AB’C’D + AB’CD + ABC’D

+ ABCD
F0 = A’B’D(C’+C) + A’BD(C’+C) + AB’D(C’+C) + ABD(C’+C) ; (C’+C) = 1
F0 = A’B’D + A’BD + AB’D + ABD
F0 = D(A’B’ + A’B + AB’ + AB) ; (A’B’ + A’B + AB’ + AB) = 1
F0 = D

Circuit Diagram:

Refer to the next page.