You are on page 1of 15

QUESTION PAPER CODE:71731

B.E/B.Tech DEGREE EXAMINATION,APRIL/MAY 2017


Fourth Semester
EC 6404 – LINEAR INTEGRATED CIRCUITS
(Common to Medical Electronics and Robotics And Automation Engineering)
(Regulation 2013)
Time: Three Hours Maximum : 100 Marks
Answer ALL Questions.
PART-A(10x2=20 Marks)

1. List the ideal characteristics of OpAmp.


 Infinite open-loop gain G = vout / v. ...
 Infinite input impedance Rin, and so zero input current.
 Zero input offset voltage.
 Infinite output voltage range.
 Infinite bandwidth with zero phase shift and infinite slew rate.
 Zero output impedance R.

2. Why is the current mirror circuit used in differential amplifier stage?


Higher the value of CMRR, better is the performance of differential
amplifier.Thus higher the value of RE, lesser the value of AC, and higher is the value of
CMRR. But practically RE can not be selected very highy due to certain limitations. So
instead of increasing RE various other methods are used which provide effect of increased
RE without any limitations, such method is current mirror circuit.

3. What is the need for converting a First order Filter into a Second order filter?
In case of first order filter, the gain rolls off very fast after the cut-off frequency,in
stop band.
In first order filter ,it rolls off at the rate of 20dB /decade but in second order filter
the gain rolls off at the rate of 40dB /decade. Thus the slope of the frequency response
after f=fH is - 40dB /decade.
4. How is the current characteristics of a PN junction employed in a Log amplifier?
The diode current is its forward current If ,
If = I0 eV/Ƞvt
This indicates that the forward current increases exponentially with the respect to the
bias Voltage.

5. How a square root and a square of a signal obtained with multiplier circuit?
Voltage Squarer:
The inputs can be positive or negative, represented by any corresponding voltage
level between 0 and 10V. The input voltage Vi to be squared is simply connected to both
the input terminals, and hence we have, Vx = Vy = Vi and the output is V0 = KVi2.
The circuit thus performs the squaring operation.

Square Root
A multiplier configured as squaring circuit in the feedback loop of OpAmp.

6. How is frequency stability obtained in PLL by use of a VCO?


VCO is an oscillator circuit that controls the frequency of oscillation and provides
a linear relationship between the applied voltage and the oscillation frequency.
The error voltage, VE forces the VCO to change its output frequency in the
direction that reduces the difference between the i/p and o/p frequency of VCO. This
action is called capture process it continues till the output frequency of VCO is same as
i/p signal frequency i.e

fs = f 0

When fs = f0 , the system is said to be locked.

7. An 8-bit A/D converter accepts an input voltage signal of range 0 to 12 V.What is


the digital output for an input voltage of 6V?

8. Why are schottky diode used in sample and hold circuits?

The Schottky diode also known as hot-carrier diode, is a semiconductor


diode formed by the junction of a semiconductor with a metal. It has a low forward
voltage drop and a very fast switching action. When sufficient forward voltage is applied,
a current flows in the forward direction. A silicon diode has a typical forward voltage of
600–700 mV, while the Schottky's forward voltage is 150–450 mV. This lower forward
voltage requirement allows higher switching speeds and better system efficiency.

9. What is the need for voltage regulator ICs?


Voltage sources in a circuit may have fluctuations resulting in not giving fixed
voltage outputs. Voltage regulator IC maintains the output voltage at a constant value.
7805 IC, a voltage regulator integrated circuit (IC) is a member of 78xx series of fixed
linear voltage regulator ICs used to maintain such fluctuations. The xx in 78xx indicates
the fixed output voltage it provides.

10. Distinguish the principle of linear regulator and a switched mode power supply.

No Linear Regulator Switched mode regulator


1 Series pass transistor used acts in Series pass transistor used acts either in
active region cutoff region or saturation region.
2 Weight is high It is weightless
3 Low cost High cost
4 Simple to design Complex to design

PART-B (5x16=80 Marks)

11. (a) (i) Derive the functional parameters for an Inverting mode negative feedback
gain circuit with a 741 OpAmp IC Inverting, with R1=1K ohm, Rf=40K ohm
and compute Af, Rif, Rof, BW; offset voltage.
(ii) Discuss briefly on the differential mode Instrumentation amplifier. (7+6)

In a number of industrial and consumer applications, one is required to measure and


control physical quantities. Some typical examples are measurement and control of
temperature, humidity, light intensity, water flow etc. these physical quantities are usually
measured with help of transducers.

The output of transducer has to be amplified so that it can drive the indicator or display
system. This function is performed by an instrumentation amplifier. The important features
of an instrumentation amplifier are
1. high gain accuracy
2. high CMRR
3. high gain stability with low temperature coefficient
4. low output impedance
There are specially designed op-amps such as µA725 to meet the above stated
requirements of a good instrumentation amplifier. Monolithic (single chip) instrumentation
amplifier are also available commercially such as AD521, AD524, AD620, AD624 by
Analog Devices, LM363.XX (XX -->10,100,500) by National Semiconductor and INA101,
104, 3626, 3629 by Burr Brown.

The above circuit is a basic instrumentation amplifier. The output voltage, V0 is given by

For , we obtain

-------------- (A)

The source V1 sees an i/p impedance of R3+R4 (101k) and input


impedance seen by source V2 is only R1 (1k). This low impedance loads the signal
source heavily. So a high impedance buffer is used preceding each input to avoid the
loading effect.
Consider the following where Op-Amps. A1 and A2 have differential input voltage as
zero. Under common mode condition i.e., for V1 = V2, the drop across R is zero. No
current flows through resistor R and R 1. So non-inverting amplifier A 1 acts as voltage
follower, hence V2 = . Similarly, A2 acts as voltage follows having output

If , then current flows through R and R1 and


Thus the circuit has high CMRR and high differential gain.

The voltage at (+) input terminal of Op-amp A 3 is . Using superposition

theorem,

-------------- (1)

current passing through R is given by

-------------- (2)

The same current flows upwards through R1 since op-amp i/p current is zero.

-------------- (3)

-------------- (4)

Substituting equations (3) and (4) in equation (1), we get

--------------- (B)

The difference gain of this amplifier can be varied by using a variable resistor R.

(Or)

(b) (i) What is the input and output voltage and current offsets ? How are they
compensated? (N/D 14 &13, M/J 14,A/M 15)
(ii) With neat diagram derive the AC performance close loop characteristics of
OpAmp to discuss on the circuit Bandwidth, Frequency response and slew
rate. (N/D 16 & 14) (7+6)

12. (a) With neat figure describe the circuit using OpAmps on the functioning of
(i) Integrator and double integrator circuit. (N/D 16 & 13)
(ii) First order High pass filter.
First order HP Butterworth filter: High pass filters are often formed simply by
interchanging frequency-determining resistors and capacitors in low-pass filters. (i.e) I order
HPF is formed from a I order LPF by interchanging components R & C. Similarly II order
HPF is formed from a II order LPF by interchanging R & C.
Here I order HPF with a low cut off frequency of fL. This is the frequency at
which the magnitude of the gain is 0.707 times its passband value. Here all the
frequencies higher than fL are passband frequencies.

(Or)
(b) With neat figures describe the circuit using OpAmps on the operation of
(i) Zerocross Detecter,Clipper and Clamper circuits.( N/D 16,M/J 14)
Zerocross Detecter:
One of the application of comparator is the zero crossing detector or ―sine wave to
Square wave Converter‖. The basic comparator can be used as a zero crossing detector by
setting Vref is set to Zero. (Vref =0V). This Fig shows when in what direction an input
signal Vin crosses zero volts. (i.e) the o/p V0 is driven into negative saturation when the
input the signal Vin passes through zero in positive direction. Similarly, when Vin passes
through Zero in negative direction the output V0 switches and saturates positively.
Drawbacks of Zero- crossing detector: In some applications, the input Vin
may be a slowly changing waveform, (i.e) a low frequency signal. It will take Vin
more time to cross 0V, therefore V0 may not switch quickly from one saturation
voltage to the other. Because of the noise at the op-amp‘s input terminals the output
V0 may fluctuate between 2 saturations voltages +Vsat and –Vsat. Both of these
problems can be cured with the use of regenerative or positive feedback that cause the
output V0 to change faster and eliminate any false output transitions due to noise
signals at the input. Inverting comparator with positive feedback . This is known as
Schmitt Trigger‖.
(ii) Schmitt Trigger. (N/D 13,A/M 15) (7+6)

13. (a) With neat diagram explain the design of


(i) Frequency synthesizer. (N/D 15)
(ii) Frequency Division circuit using PLL IC 565. (N/D 16 & 13,A/M 16) (7+6)
(Or)
(b) With neat figure explain the emitter couple circuit based design of
(i) Gilbert multiplier cell for four quadrant multiplication.( N/D 16)
(ii) The operation of VCO. (7+6)

(ii) The operation of VCO.


A voltage controlled oscillator is a oscillator ckt in which the frequency of oscillation is
controlled by externally applied voltage called control voltage. This ckt is also called voltage
to frequency converter .

From block diagram, timing capacitor, CT is changed and discharged linearly by a


constant current source. The current value can be controlled by either by changing the control
voltage given at the modulating input (pin 5) or by changing the timing resistor (R T)
connected to pin 6.If control voltage at pin 5 in increased, the voltage at pin 6 also increases
resulting in less voltage across RT and thereby decreasing the changing current. The voltage
across capacitor CT is applied to (-) terminal of schemit trigger (A z ) via buffer (A1)
The output of schemit trigger is designed to swing between 0.5Vcc and Vcc . The
voltage at (+) terminal of schemit trigger swings between 0.25 Vcc and 0.5 Vcc. When
capacitor voltage exceeds 0.5 Vcc, output of schemitt trigger goes LOW (0.5Vcc) and
capacitor starts discharging.

When capacitor voltage discharges to 0.25 Vcc, the output of Schmitt trigger
goes H/GH (+Vcc).Since source and sink currents are equal, capacitor charging and
discharging time are equal so the output at pin 3 is a triangular waveform.

14. (a) (i) How are A/D converters categorized?(M/J 14)


(ii) Discuss on the successive approximation type ADC. (M/J 16 &15, N/D 15)

(6+7)
(Or)
(b) (i) What is meant by resolution, offset error in ADC.
Resolution:
Smallest change in analog input for a one bit change at the output is called
Resolution.
Offset error in ADC:
It is defined as the non zero level of output voltage,when all theinputs are zero.
(ii) Discuss on the dual slope type ADC. (A/M 15) (6+7)

15. (a) Describe the 555 Timer IC.Design a Astable multivibrator circuit to generate
output pulse of 25%,50% duty cycle using a 555 Timer IC with choice of C=0.01
µ F,frequency as 1.0K. (13)
(Or)
(b) Answer any two of the following:
(i) Switched capacitor filters.
A switched capacitor filter is a three terminal element, which consists of
capacitors, periodic switches and operational amplifiers and whose open circuit voltage
transfer function represents filtering characteristics. The operation of the filter is based on
the ability of on-chip capacitors and MOS switches to stimulate resistors.
The main advantages of switched capacitor filter are,
a) Low system cost.
b) component count.
c) High accuracy.
d) Excellent temperature stability.

Switched Capacitor Resistor:


The simplest switched capacitor (SC) circuit is the switched capacitor resistor,
made of one capacitor C and two switches S1 and S2 which connect the
capacitor with a given frequency alternately to the input and output of the SC. Each
switching cycle transfers a charge q from the input to the output at the switching
frequency f. Recall that the charge q on a capacitor C with a voltage V between the
plates is given by:

where V is the voltage across the capacitor. Therefore, when S1 is closed while S2
is open, the charge transferred from the source to CS is:

And when S2 is closed while S1 is open, the charge transferred from CS


to the load is:

Thus, the charge transferred in each cycle is:

Since a charge q is transferred at a rate f, the rate of transfer of charge per


unit time is:

Note that we use I, the symbol for electric current, for this quantity. This is to
demonstrate that a continuous transfer of charge from one node to another is
equivalent to a current. Substituting for q in the above, we have:

Let us define V, the voltage across the SC from input to


output, thus:

We now have a relationship between I and V, which we can rearrange to give an


equivalent resistance R:

Thus, the SC behaves like a resistor whose value depends


on CS and f.
The SC resistor is used as a replacement for simple resistors in
integrated circuits because it is easier to fabricate reliably with a wide range of
values. It also has the benefit that its value can be adjusted by changing the
switching frequency. See also: operational amplifier applications.
Switched Capacitor Filer IC:
Some of the Switched capacitor filter ICs is MF 5, MF10 and MF100
Switched capacitor IC MF10:
The MF10 contains two of the second-order universal filter sections found in the
MF5. Therefore with MF10, two second order filters or one fourth-order filter can be
built. As the MF5 and MF10 have similar filter sections, the design procedure for
them is same.

(ii) Audio power amplifier.(M/J 16)


(iii) Opto coupler.( N/D 16)
(7+6)

PART-C (1x15=15 Marks)


16. (a) With neat block diagram explain the stages for developing the signsl analysis
circuit required for an instrumentation module of say a vibration sensor data
using instrumentation amplifier,wave shaper,comparator and ADC using
OPAMP and required components.
(Or)
(b) With a neat figure design a PLL with free running frequency of 500K and
bandwidth of lowpass filter is 50K.Will the loop acquire the lock for an input
signal of 600K.Justify your answer. Assume that the phase detector needs to
produce sum snd difference frequency components.
A phase Locked Loop (PLL) is a frequency selective circuit designed to synchronize
(lock) with an incoming signal and maintain the synchronization (locked state ) inspite of
noise or variations in the input signals. The basic PLL system comprises a phase
detector, Loop filter, error amplifier and voltage controlled oscillator (VCO)

The phase detector will produce ,


fi + fc = 600kHz +500kHz =1100kHz
fi - fc = 600kHz -500kHz =100kHz
Both sum and frequency component are outside the bandpass of Low-pass
filter.Hence the loop will not acquire lock.

You might also like