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B.

Tech II Year I Semester Examinations, 2022


ELECTRONIC DEVICES AND CIRCUITS
Time: 3 Hours Max. Marks: 75
Note: This question paper contains two parts A and B.
Part A is compulsory which carries 25 marks. Answer all questions in Part A. Part B consists of 5
Units. Answer any one full question from each unit. Each question carries 10 marks and may have
a, b, as sub questions.

PART – A (25 Marks)

1. a) Give the values of ripple factor and efficiency of a bridge rectifier. [2]
b) What is early effect? [2]
c) What is meant by latching current and holding current? [2]
d) Draw the h-parameter equivalent model of CE and CB configuration. [2]
e) Draw the symbols of Enhancement type and Depletion type MOSFETs. [2]
f) Compare half wave, full wave and bridge rectifier. [3]
g) What are α, β and γ of transistor and what is the relation between them? [3]
h) State any three differences between JFET and BJT. [3]
i) What are the typical values of h-parameters in CE, CB and CC configurations? [3]
j) What are the Conditions for different regions of operation of N-Channel MOSFET. [3]

PART – B (50 Marks)


2. a) With a neat circuit diagram, Explain the operation of Half Wave Rectifier with Capacitor filter.[4]
b) A Half Wave Rectifier circuit supplies 100 mA DC current to a 250 Ω load. Find the DC output
voltage, PIV rating of the diode and rms voltage for the transformer supplying the rectifier. [6]
OR
3. a) State and prove Clamping Circuit Theorem. [5]
b) An unsymmetrical square wave with T 1 = 1 msec and T 2 = 1 µsec has an amplitude of 10 V.
This signal is applied to the restorer circuit of figure below, in which R f = 50Ω, R = 50 KΩ. Assume
that the capacitor C is arbitrarily large, so that the output is a square wave without tilt. Find
where, on the waveform, the zero level is located. [5]
[5]
4. a) Explain briefly the input and output characteristics of BJT in CE configuration. [5]
b) In the circuit shown below, with β = 100. Determine ICQ, VCEQ and draw the DC load line. [5]

OR
5. a) Explain the working of the transistor as a switch. [5]
b) In a silicon transistor with a fixed bias, V CC = 9 V, RC = 3 kΩ, RB = 8 kΩ, β = 50, VBE = 0.7 V. Find
the operating point and stability factor S.

[5]

[5]

6. a) Illustrate the construction and principle of operation of JFET with necessary diagrams. [6]

[ ]
2
V GS
b) A FET follows the relation ID = IDSS 1− . what are the values of ID and gm for VGS= -1.5 V if IDSS
VP
and VP are given as 8.4 mA and -3 V respectively? [4]
OR
7. a) Explain the construction of SCR with neat diagram. Draw its V-I characteristics. [5]
b) Determine the value of RL that will establish maximum power conditions for the zener diode
shown is circuit below. [5]

8. Draw the h-parameter equivalent circuit for a typical common emitter amplifier and derive
expression for Ai, Av, Ri and Ro. [10]
OR
9. a) Draw the circuit diagram of CB amplifier and explain its operation in detail. [5]
b) In the CE amplifier calculate the mid frequency voltage gain and lower 3-dB point. The
transistor has h-parameters hfe = 400 and hie = 10 kΩ, the circuit details are R s = 600 Ω, RL = 5 kΩ, Re =
1 kΩ, Vcc = 12 V R1 = 15kΩ, R2 = 2.2 kΩ and Ce = 50µF. [5]

10. a) What does it mean “the channel is pinched off”? [4]


b) Draw the transfer and drain characteristics of MOSFET and explain the three regions of
operation of a MOSFET. [6]
OR
11. Derive an expression for voltage gain, input impedance and output impedance of CG amplifier at
low frequencies. [10]

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