Mcp48Fxbxx: Typical Performance Curves

MCP48FXBXX
Typical Performance Curves
1.0 TYPICAL PERFORMANCE CURVES

Note 1: The following performance graphs are for the devices that are documented in the MCP48FEBXX data
sheet (DS-20005429). This document allows the MCP48FEBXX data sheet’s functional description to be
in PDF format with a file size smaller than the 10 MB limit of many email file servers.
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
2: For quick indexing of Characterization Graphs, expand the PDF bookmarks. Graphs related to all devices
(IDD, IPD, VIH, VIL, VOH, VOL, VIHH, and VOUT drive) are before the device VOUT linearity graphs (Total
Unadjusted Error, INL, and DNL).
Note: Unless otherwise indicated, TA = +25°C, VDD = 5.5V.
FIGURE 1-1: Average Device Supply FIGURE 1-3: Average Device Supply
Active Current (IDDA) (at 5.5V and Active Current (IDDA) (at 5.5V and
FSCK = 20 MHz) vs. Temperature and DAC FSCK = 1 MHz) vs. Temperature and DAC
Reference Voltage Mode. Reference Voltage Mode.
FIGURE 1-2: Average Device Supply FIGURE 1-4: Average Device EEPROM
Active Current (IDDA) (at 5.5V and Write Cycle Current (IWC) vs. Temperature and
FSCK = 10 MHz) vs. Temperature and DAC Voltage. (MCP48FEBXX only).
Reference Voltage Mode.
 2015 Microchip Technology Inc. DS20005440A-page 1

MCP48FXBXX
FIGURE 1-5: Average Power-Down

Current (IDDP) vs. Temperature and Voltage.
FIGURE 1-6: Average Device Current

with High Voltage Command Pin (HVC) = VIHH
vs. Temperature and Voltage, SCK = VIH or VIL.
DS20005440A-page 2  2015 Microchip Technology Inc.

MCP48FXBXX
Current - Active Interface (IDDA) (FSCK = 20 MHz) Current - Inactive Interface (IDD) (SCK = VIH or VIL)
vs. Voltage and Temperature, vs. Voltage and Temperature,
VRxB:VRxA = ‘00’ (VDD mode). VRxB:VRxA = ‘00’ (VDD mode).
Current - Active Interface (IDDA) (FSCK = 10 MHz) Current vs. FSCK Frequency, Voltage and
vs. Voltage and Temperature, Temperature, VRxB:VRxA = ‘00’ (VDD mode).
VRxB:VRxA = ‘00’ (VDD mode).
FIGURE 1-9: Average Device Supply

Current - Active Interface (IDDA) (FSCK = 1 MHz)
vs. Voltage and Temperature,
VRxB:VRxA = ‘00’ (VDD mode).

MCP48FXBXX
vs. Voltage and Temperature, Temperature, VRxB:VRxA = ‘01’,
VRxB:VRxA = ‘01’ (Bandgap mode). (Bandgap mode).

VRxB:VRxA = ‘01’ (Bandgap mode).

VRxB:VRxA = ‘01’ (Bandgap mode).

MCP48FXBXX
vs. Voltage and Temperature, Temperature,
VRxB:VRxA = ‘10’ (VREF Unbuffered mode). VRxB:VRxA = ‘10’ (VREF Unbuffered mode).

VRxB:VRxA = ‘10’ (VREF Unbuffered mode).

VRxB:VRxA = ‘10’ (VREF Unbuffered mode).

MCP48FXBXX
Current - Active Interface (IDDA) (FSCK = 20 MHz) Current - Inactive Interface (IDD) (SCK = VIH or VIL)
vs. Voltage and Temperature, vs. Voltage and Temperature,
VRxB:VRxA = ‘11’ (VREF Buffered mode). VRxB:VRxA = ‘11’ (VREF Buffered mode).
vs. Voltage and Temperature, Temperature, VRxB:VRxA = ‘11’
VRxB:VRxA = ‘11’ (VREF Buffered mode). (VREF Buffered mode).

VRxB:VRxA = ‘11’ (VREF Buffered mode).

MCP48FXBXX
FIGURE 1-25: Average VIH and VIL (SDI, FIGURE 1-28: Average VIH (SDI, SCK, CS,
SCK, CS, and LAT pins) (VDD = 5.5V) vs. and LAT pins) vs. Voltage and Temperature.
Temperature.
FIGURE 1-26: Average VIH and VIL (SDI, FIGURE 1-29: Average VIL (SDI, SCK, CS,
SCK, CS, and LAT pins) (VDD = 2.7V) vs. and LAT pins) vs. Voltage and Temperature.
Temperature.
FIGURE 1-27: Average VIH and VIL (SDI,

SCK, CS, and LAT pins) (VDD = 1.8V) vs.
Temperature.

MCP48FXBXX
FIGURE 1-30: Average VOH (SDO pin) vs. FIGURE 1-32: Average HVC pin High
Voltage and Temperature. Voltage Entry Voltage (VIHHENTRY) vs.
VDD Voltage and Temperature.
FIGURE 1-31: Average VOL (SDO pin) vs. FIGURE 1-33: Average HVC pin High
Voltage and Temperature. Voltage Exit Voltage (VIHHEXIT) vs. VDD Voltage
and Temperature.

MCP48FXBXX
Typical Device
Typical Device
FIGURE 1-34: VOUT Short-Circuit Current FIGURE 1-37: VOUT vs. RLOAD and Voltage
(ISC) vs. Voltage and Temperature. (at +25°C) (RLOAD 0 - 2500).
Typical Device
FIGURE 1-35: VOUT vs. IOUT and Voltage FIGURE 1-38: Half-Scale Settling Time –
(at +25°C). 400h to C00h (MCP48FXB2X).
Typical Device
FIGURE 1-36: VOUT vs. RLOAD and Voltage FIGURE 1-39: Half-Scale Settling Time –
(at +25°C). C00h to 400h (MCP48FXB2X).

MCP48FXBXX
12-bit: VRxB:VRxA = ‘00’ (VDD Mode), Gx = ‘0’ (1x)
Typical Device Typical Device
FIGURE 1-40: Total Unadjusted Error FIGURE 1-43: Total Unadjusted Error
(VOUT) vs. DAC Code, and Temperature (VOUT) vs. DAC Code, and Temperature
(Single Channel - MCP48FXB21) (Dual Channel - MCP48FXB22)
(12-bit: VDD = 5.5V, VRxB:VRxA = ‘00’ (VDD), (12-bit: VDD = 5.5V, VRxB:VRxA = ‘00’ (VDD),
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),
(see Appendix B.1 for additional information). (see Appendix B.1 for additional information).

MCP48FXBXX
FIGURE 1-46: INL Error vs. DAC Code, FIGURE 1-49: INL Error vs. DAC Code,
and Temperature (Code 100 - 4000) and Temperature (Code 100 - 4000)
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX
FIGURE 1-52: DNL Error vs. DAC Code, FIGURE 1-55: DNL Error vs. DAC Code,
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX
12-bit: VRxB:VRxA = ‘01’ (Bandgap Mode)
(12-bit: VDD = 5.5V, VRxB:VRxA = ‘01’ (12-bit: VDD = 5.5V, VRxB:VRxA = ‘01’
(Bandgap), Gx = ‘1’ (2x)). (Bandgap), Gx = ‘1’ (2x)).

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
12-bit: VRxB:VRxA = ‘10’ (VREF Unbuffered Mode), VREF = VDD, Gx = ‘0’ (1x)
(12-bit: VDD = 5.5V, VREF = VDD, (12-bit: VDD = 5.5V, VREF = VDD,
VRxB:VRxA = ‘10’ (VREF Unbuffered), Gx = ‘0’ (1x)). VRxB:VRxA = ‘10’ (VREF Unbuffered), Gx = ‘0’ (1x)).
VRxB:VRxA = ‘10’ (VREF Unbuffered), Gx = ‘0’ VRxB:VRxA = ‘10’ (VREF Unbuffered), Gx = ‘0’
(1x)), (see Appendix B.2 for additional information). (1x)), (see Appendix B.2 for additional information).

MCP48FXBXX
(12-bit: VDD = 2.7V, VREF = VDD, VRxB:VRxA = ‘10’ (12-bit: VDD = 2.7V, VREF = VDD, VRxB:VRxA = ‘10’
(VREF Unbuffered), Gx = ‘0’ (1x)). (VREF Unbuffered), Gx = ‘0’ (1x)).

MCP48FXBXX

MCP48FXBXX
12-bit: VRxB:VRxA = ‘10’ (VREF Unbuffered Mode), VREF = 1V, Gx = ‘0’ (1x)
(12-bit: VDD = 5.5V, VREF = 1V, VRxB:VRxA = ‘10’ (12-bit: VDD = 5.5V, VREF = 1V, VRxB:VRxA = ‘10’

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
(VREF Unbuffered), Gx = ‘1’ (2x)), (VREF Unbuffered), Gx = ‘1’ (2x)),

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
12-bit: VRxB:VRxA = ‘10’ (VREF Unbuffered Mode), VREF = 2.048V
(12-bit: VDD = 5.5V, VREF = 2.048V, (12-bit: VDD = 5.5V, VREF = 2.048V,

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
12-bit: VRxB:VRxA = ‘11’ (VREF Buffered Mode), VREF = VDD, Gx = ‘0’ (1x)
VRxB:VRxA = ‘11’ (VREF Buffered), Gx = ‘0’ (1x)). VRxB:VRxA = ‘11’ (VREF Buffered), Gx = ‘0’ (1x)).
VRxB:VRxA = ‘11’ (VREF Buffered), Gx = ‘0’ (1x)), VRxB:VRxA = ‘11’ (VREF Buffered), Gx = ‘0’ (1x)),

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
12-bit: VRxB:VRxA = ‘11’ (VREF Buffered Mode), VREF = 1V, Gx = ‘0’ (1x)
(VREF Buffered), Gx = ‘0’ (1x)). (VREF Buffered), Gx = ‘0’ (1x)).

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
(VREF Buffered), Gx = ‘1’ (2x)), (VREF Buffered), Gx = ‘1’ (2x)),

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
12-bit: VRxB:VRxA = ‘11’ (VREF Buffered Mode), VREF = 2.048V

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
VRxB:VRxA = ‘10’ (VREF Unbuffered), Gx = ‘0’ (1x)), VRxB:VRxA = ‘10’ (VREF Unbuffered), Gx = ‘0’ (1x)),

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
Typical Device

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
Typical
Typical Device
Device Typical Device

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)). Gx = ‘0’ (1x)).
Gx = ‘0’ (1x)), Gx = ‘0’ (1x)),

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX

MCP48FXBXX
NOTES:

MCP48FXBXX
APPENDIX A: REVISION HISTORY APPENDIX B: CHARACTERIZATION
GRAPH
Revision A (September 2015) PERFORMANCE
• Original Release of this Document. INSIGHTS
This Appendix discusses some of the device’s
operational performance reflected in the supplied
device performance graphs.
The device’s performance is calibrated in a single
configuration. This factory calibration is in the VDD
mode (VRxB:VRxA = ‘00’) at 5V.
An example of this is the observed device performance
differences between VDD mode, VREF Unbuffered
mode with VREF = VDD, and VREF Buffered mode with
VREF = VDD. In an ideal implementation, the
performance would be identical. Due to device circuit
implementation differences, there are performance
differences that occur. Looking at the Total Unadjusted
Error graphs for each mode gives an indication of
where the output buffer is no longer operating in the
linear region. If this occurs before code 4000, the INL
and DNL graphs will reflect this nonlinearity. INL data
would be good if calculations were based on an upper
code value that is in the linear range.
Note: If output nonlinearity occurs before DAC
code 4000, which is indicated by the Total
Unadjusted Error curve changing from a
straight line, the INL and DNL graphs will
reflect this in their graphs as well.
B.1 VDD Mode at VDD = 1.8V

At low device voltages (such as 1.8V), the output buffer’s
performance is degraded. That is, for high DAC register
codes, the output voltage is no longer linear. This is
shown in the Total Unadjusted Error graph.
Since INL is determined by the measured voltages at
code 100 and code 4000, with code 4000 having
significant error, the INL graph also reflects that error. If
the INL for this data set is calculated with a high code still
in the linear region, INL would look similar to the graph at
2.7V.
The device’s DNL is also affected once the output buffer
is no longer in its linear range.

MCP48FXBXX
B.2 VREF Unbuffered Mode with B.4 VREF Buffered Mode with
VREF = VDD and a Gain of 1x at VREF = VDD and a Gain of 1x at
VDD = 1.8V VDD = 1.8V
At low device voltages (such as 1.8V), the output buffer’s Due to the VREF input voltage being equal to the device
performance is degraded. That is, for high DAC register VDD voltage, the VREF input buffer is saturated and the
codes, the output voltage is no longer linear. This is voltage on the resistor ladder is lower than either the
shown in the Total Unadjusted Error graph. VDD mode or the VREF Unbuffered mode.
Since INL is determined by the measured voltages at At low device voltages (such as 1.8V), the output
code 100 and code 4000, with code 4000 having buffer’s performance is degraded. That is, for high DAC
significant error, the INL graph also reflects that error. If register codes, the output voltage is no longer linear.
the INL for this data set is calculated with a high code still This is shown in the Total Unadjusted Error graph.
in the linear region, INL would look similar to the graph at Due to this decline in the voltage on the resistor ladder,
2.7V. the following occurs:
The device’s DNL is also affected once the output buffer • Total Unadjusted Error is worse than VDD mode
is no longer in its linear range.
• The output buffer saturates at a higher code than
VDD mode
B.3 VREF Unbuffered Mode with
Since INL is determined by the measured voltages at
VREF = 1V and a Gain of 2x at
code 100 and code 4000, with code 4000 having
VDD = 1.8V significant error, the INL graph also reflects that error. If
With a VREF of 1V and a Gain of 2x, theoretically, the the INL for this data set is calculated with a high code still
output would go to 2V. But since VDD is at 1.8V, the in the linear region, INL would look similar to the graph at
output is “clipped”. This clipping impacts the graphs for 2.7V.
Total Unadjusted Error, INL and DNL. If the INL for this The device’s DNL is also affected once the output buffer
data set is calculated with an upper point that was in the is no longer in its linear range.
linear region (lower than code 4000), the INL graph
If the widest DAC code range for better INL performance
would look similar to the 1.8V graph where Gain was
is required, then evaluate this device configuration, but
set to 1x (in the calculated code range).
in most cases the VDD mode (VRxB:VRxA = ‘00’) is the
suggested device configuration.
B.5 VREF Buffered Mode with

VREF = 1V and a Gain of 2x at
VDD = 1.8V
With a VREF of 1V and a Gain of 2x, theoretically, the
output would go to 2V. But since VDD is at 1.8V, the
output is “clipped”. This clipping impacts the graphs for
Total Unadjusted Error, INL and DNL. If the INL for this
data set is calculated with an upper point that was in the
linear region (lower than code 4000), the INL graph
would look similar to the 1.8V graph where Gain was
set to 1x (in the calculated code range).

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, dsPIC,
and may be superseded by updates. It is your responsibility to
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
ensure that your application meets with your specifications.
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
MICROCHIP MAKES NO REPRESENTATIONS OR
OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC,
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
SST, SST Logo, SuperFlash and UNI/O are registered
IMPLIED, WRITTEN OR ORAL, STATUTORY OR trademarks of Microchip Technology Incorporated in the
OTHERWISE, RELATED TO THE INFORMATION, U.S.A. and other countries.
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR The Embedded Control Solutions Company and mTouch are
FITNESS FOR PURPOSE. Microchip disclaims all liability registered trademarks of Microchip Technology Incorporated
arising from this information and its use. Use of Microchip in the U.S.A.
devices in life support and/or safety applications is entirely at Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
the buyer’s risk, and the buyer agrees to defend, indemnify and CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
hold harmless Microchip from any and all damages, claims, Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
suits, or expenses resulting from such use. No licenses are KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB
conveyed, implicitly or otherwise, under any Microchip Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
intellectual property rights unless otherwise stated. Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O,
Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-63277-825-3
QUALITY MANAGEMENT SYSTEM Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
CERTIFIED BY DNV Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
== ISO/TS 16949 ==
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
Corporate Office Asia Pacific Office China - Xiamen Austria - Wels
2355 West Chandler Blvd. Suites 3707-14, 37th Floor Tel: 86-592-2388138 Tel: 43-7242-2244-39
Chandler, AZ 85224-6199 Tower 6, The Gateway Fax: 86-592-2388130 Fax: 43-7242-2244-393
Tel: 480-792-7200 Harbour City, Kowloon China - Zhuhai Denmark - Copenhagen
Fax: 480-792-7277 Hong Kong Tel: 86-756-3210040 Tel: 45-4450-2828
Technical Support: Tel: 852-2943-5100 Fax: 86-756-3210049 Fax: 45-4485-2829
http://www.microchip.com/ Fax: 852-2401-3431 India - Bangalore France - Paris
support
Australia - Sydney Tel: 91-80-3090-4444 Tel: 33-1-69-53-63-20
Web Address:
Tel: 61-2-9868-6733 Fax: 91-80-3090-4123 Fax: 33-1-69-30-90-79
www.microchip.com
Fax: 61-2-9868-6755 India - New Delhi Germany - Dusseldorf
Atlanta Tel: 91-11-4160-8631 Tel: 49-2129-3766400
China - Beijing
Duluth, GA
Tel: 86-10-8569-7000 Fax: 91-11-4160-8632 Germany - Karlsruhe
Tel: 678-957-9614
Fax: 86-10-8528-2104 India - Pune Tel: 49-721-625370
Fax: 678-957-1455
China - Chengdu Tel: 91-20-3019-1500 Germany - Munich
Austin, TX Tel: 86-28-8665-5511
Tel: 512-257-3370 Japan - Osaka Tel: 49-89-627-144-0
Fax: 86-28-8665-7889 Tel: 81-6-6152-7160 Fax: 49-89-627-144-44
Boston Fax: 81-6-6152-9310
China - Chongqing Italy - Milan
Westborough, MA
Tel: 86-23-8980-9588 Japan - Tokyo Tel: 39-0331-742611
Tel: 774-760-0087
Fax: 86-23-8980-9500 Tel: 81-3-6880- 3770 Fax: 39-0331-466781
Fax: 774-760-0088
China - Dongguan Fax: 81-3-6880-3771 Italy - Venice
Chicago Tel: 86-769-8702-9880 Korea - Daegu Tel: 39-049-7625286
Itasca, IL
Tel: 630-285-0071 China - Hangzhou Tel: 82-53-744-4301 Netherlands - Drunen
Fax: 630-285-0075 Tel: 86-571-8792-8115 Fax: 82-53-744-4302 Tel: 31-416-690399
Fax: 86-571-8792-8116 Korea - Seoul Fax: 31-416-690340
Cleveland
China - Hong Kong SAR Tel: 82-2-554-7200 Poland - Warsaw
Independence, OH
Tel: 216-447-0464 Tel: 852-2943-5100 Fax: 82-2-558-5932 or Tel: 48-22-3325737
Fax: 216-447-0643 Fax: 852-2401-3431 82-2-558-5934
Spain - Madrid
China - Nanjing Malaysia - Kuala Lumpur Tel: 34-91-708-08-90
Dallas
Tel: 86-25-8473-2460 Tel: 60-3-6201-9857 Fax: 34-91-708-08-91
Addison, TX
Tel: 972-818-7423 Fax: 86-25-8473-2470 Fax: 60-3-6201-9859
Sweden - Stockholm
Fax: 972-818-2924 China - Qingdao Malaysia - Penang Tel: 46-8-5090-4654
Tel: 86-532-8502-7355 Tel: 60-4-227-8870
Detroit UK - Wokingham
Fax: 86-532-8502-7205 Fax: 60-4-227-4068
Novi, MI Tel: 44-118-921-5800
Tel: 248-848-4000 China - Shanghai Philippines - Manila Fax: 44-118-921-5820
Tel: 86-21-5407-5533 Tel: 63-2-634-9065
Houston, TX
Tel: 281-894-5983 Fax: 86-21-5407-5066 Fax: 63-2-634-9069
China - Shenyang Singapore
Indianapolis
Tel: 86-24-2334-2829 Tel: 65-6334-8870
Noblesville, IN
Tel: 317-773-8323 Fax: 86-24-2334-2393 Fax: 65-6334-8850
Fax: 317-773-5453 China - Shenzhen Taiwan - Hsin Chu
Tel: 86-755-8864-2200 Tel: 886-3-5778-366
Los Angeles
Fax: 86-755-8203-1760 Fax: 886-3-5770-955
Mission Viejo, CA
Tel: 949-462-9523 China - Wuhan Taiwan - Kaohsiung
Fax: 949-462-9608 Tel: 86-27-5980-5300 Tel: 886-7-213-7828
Fax: 86-27-5980-5118 Taiwan - Taipei
New York, NY
Tel: 631-435-6000 China - Xian Tel: 886-2-2508-8600
Tel: 86-29-8833-7252 Fax: 886-2-2508-0102
San Jose, CA
Tel: 408-735-9110 Fax: 86-29-8833-7256 Thailand - Bangkok
Tel: 66-2-694-1351
Canada - Toronto
Tel: 905-673-0699 Fax: 66-2-694-1350
Fax: 905-673-6509
07/14/15

Mcp48Fxbxx: Typical Performance Curves

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Mcp48Fxbxx: Typical Performance Curves

Uploaded by

Copyright:

Available Formats

MCP48FXBXX

Typical Performance Curves

1.0 TYPICAL PERFORMANCE CURVES

Note: Unless otherwise indicated, TA = +25°C, VDD = 5.5V.

 2015 Microchip Technology Inc. DS20005440A-page 1

FIGURE 1-5: Average Power-Down

FIGURE 1-6: Average Device Current

DS20005440A-page 2  2015 Microchip Technology Inc.

FIGURE 1-9: Average Device Supply

 2015 Microchip Technology Inc. DS20005440A-page 3

FIGURE 1-13: Average Device Supply

FIGURE 1-14: Average Device Supply

DS20005440A-page 4  2015 Microchip Technology Inc.

FIGURE 1-17: Average Device Supply

FIGURE 1-18: Average Device Supply

 2015 Microchip Technology Inc. DS20005440A-page 5

FIGURE 1-22: Average Device Supply

DS20005440A-page 6  2015 Microchip Technology Inc.

FIGURE 1-27: Average VIH and VIL (SDI,

 2015 Microchip Technology Inc. DS20005440A-page 7

DS20005440A-page 8  2015 Microchip Technology Inc.

 2015 Microchip Technology Inc. DS20005440A-page 9

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

DS20005440A-page 10  2015 Microchip Technology Inc.

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

 2015 Microchip Technology Inc. DS20005440A-page 11

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

DS20005440A-page 12  2015 Microchip Technology Inc.

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

 2015 Microchip Technology Inc. DS20005440A-page 13

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

DS20005440A-page 14  2015 Microchip Technology Inc.

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

 2015 Microchip Technology Inc. DS20005440A-page 15

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

DS20005440A-page 16  2015 Microchip Technology Inc.

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

 2015 Microchip Technology Inc. DS20005440A-page 17

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

DS20005440A-page 18  2015 Microchip Technology Inc.

Typical Device Typical Device

Typical Device Typical Device

Typical Device Typical Device

 2015 Microchip Technology Inc. DS20005440A-page 19

Typical Device Typical Device