INTERNATIONAL UNIVERSITY

SCHOOL OF ELECTRICAL ENGINEERING

Digital Logic Design Laboratory

Lab 7

Counter ICs

Full name: …………………………………………….

Student number: ………………………………….
Class: ……………………………………………….......
Date: …………………………………………………....

Digital Logic Design Laboratory 1-7

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

I. Objectives

In this laboratory, students will study:

- Understand the operation of Counter of IC
- Use a Counter of IC and design/implement a circuit.

II. Procedure

1. Design and implement a synchronous counter by the given state diagram

Design and implement a synchronous 3-bit counter shown in the given diagram as
shown in Figure 1 using D Flip Flops

Figure 1. State diagram

Transition Table
Present State Next State
Q2 Q1 Q0 D2 D1 D0 Q2 Q1 Q0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Digital Logic Design Laboratory 2-7

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

D0 = ………………….. D1 = ………………….. D2 = …………………..

Implement the circuit via simulation software and paste the result in here

Make comment on the results

2. Decade counter 74XX90

a. Investigate decade counter 74XX90
IC 74XX90 contains a divide-by-two counter and a divide-by-five counter as shown in
Figure 2. The truth table for the counter 74XX90 is shown in Table 1.
 Connect Clock signal to CPO
 Connect Q0 to CP 1
 Connect MS1, MS2, MR1, MR2 to switches for controlling operations
 Connect outputs (Q0, Q1, Q2, Q3) to BCD to 7-segment display block

Figure 2. IC 74XX90

Digital Logic Design Laboratory 3-7

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Table 1. Truth table for 74XX90

Implement the circuit (Figure 2) via simulation software and paste the result in here

Make comment on the results

b. Adjust the circuit to make a MOD-7 counter (counting from 0 to 6)

Implement the circuit via simulation software and paste the result in here

Digital Logic Design Laboratory 4-7

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Make comment on the results (show the way to implement)

3. Decade counter 74HC390

a. Investigate Dual 4-Bit Decade Counter
 IC 74HC390 includes 2 decimal counters
 Ra, Rb: Clear (high level active)
 QA, QB, QC and QD: outputs of the MOD-10 counter

Figure 3. 74HC390 Counter having M=100

- The outputs QA, QB, QC and QD are connected to BCD TO 7-SEGMENT
DISPLAY
- The Ra, Rb inputs are connected to switches to control the circuit operation.

Implement the circuit (Figure 3) via simulation software and paste the result in here

Digital Logic Design Laboratory 5-7

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Make comment on the results

b. Design 74HC390 as a MOD-60 counter (counting from 0 to 59)

Implement the circuit via simulation software and paste the result in here

Make comment on the results (show the way to implement)

Digital Logic Design Laboratory 6-7

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING

Digital Logic Design Laboratory 7-7