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Features
Description
■ CMOS compatible I/O’s
The VNQ500 is a monolithic device designed in
■ Chip Enable STMicroelectronics VIPower M0-3 technology,
■ Junction over temperature protection and intended for driving any kind of load with one side
diagnostic connected to ground.
■ Current limitation Active current limitation, combined with latched
■ Shorted load protection thermal shutdown, protect the device against
overload.
■ Undervoltage shutdown
■ Protection against loss of ground In the case of over temperature of one channel
the relative I/O pin is pulled down.
■ Very low standby current
The device automatically turns off in the case of
■ In compliance with the 2002/95/EC european
ground pin disconnection.
directive
Contents
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 14
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 14
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 15
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 16
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
List of tables
List of figures
VCC
UNDERVOLTAGE
DETECTION
VCC
CLAMP
CE
GND
I/O 1
OT1 CLAMP POWER
OUTPUT 1
I/O 2
LOGIC OUTPUT 2
OT2
CURRENT LIMITER
OUTPUT 3
I/O 3
OT3 JUNCTION TEMP.
DETECTION OUTPUT 4
Same structure for all
I/O 4 channels
OT4
2 CE Chip Enable
TAB = VCC
GND 12 VCC
1
CE 2 11 OUTPUT1
I/O1 3 10 OUTPUT2
I/O2 4 9 OUTPUT3
I/O3 5 8 OUTPUT4
I/O4 6 7
VCC
PowerSSO-12
2 Electrical specifications
VCC
ICE
CE
VCE
GND
IGND
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
Operating supply
VCC(1) 5.5 13 36 V
voltage
Undervoltage
VUSD(1) 3 4 5.5 V
shutdown
VOV(1) Overvoltage shutdown 36 V
IOUTn = 0.25A; Tj = 25°C 500 mΩ
RON On-state resistance
IOUTn = 0.25A 1000 mΩ
Off-state; VCC = 13V;
VCE = VI/On = 0V; 25 µA
ton toff
VIN
VOUT
80% 90%
dVOUT/dt(on) dVOUT/dt(off)
tr 10% tf
MCOUTn Rprot(1)
I/On OUTPUTn
Rprot(1)
Rprot(1)
CE
L H L L
Normal operation
H H H H
L H L L
Current limitation
H H H H
L H L L
Over temperature
H H L (latched) L
L H L L
Undervoltage
H H H L
Standby X L X L
Figure 6. Waveforms
1) NORMAL OPERATION
CE
MCOUTn
I/On
VOUTn
2) UNDERVOLTAGE
CE
VUSDhyst
VCC
VUSD
MCOUTn
I/On
VOUTn
CE
TTSD
Tjn
MCOUTn
VOL
I/On
IOUTn
0.27 5.5
Vcc=36V Vin=3.25V
0.24 5
0.21 4.5
0.18 4
0.15 3.5
0.12 3
0.09 2.5
0.06 2
0.03 1.5
0 1
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)
9.5 900
Iin=1mA Vcc=13V
9 800
Rl=6.5Ohm
8.5 700
8 600
7.5 500
7 400
6.5 300
6 200
5.5 100
5 0
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)
55 750
Vcc=13V
50 700
Rl=6.5Ohm
45 650
40 600
35 550
30 500
25 450
20 400
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)
0.9 900
Vcc=13V Iout=0.25A
0.8 800
0.7 700
Tc= 150°C
0.6 600
0.5 500
0.4 400
Tc= 25°C
0.3 300
0.2
Tc= -40°C
200
0.1 100
0 0
-50 -25 0 25 50 75 100 125 150 175 5 10 15 20 25 30 35 40
Tc (°C) Vcc (V)
Figure 15. Input high level Figure 16. Input hysteresis voltage
3.4 1.3
3.2 1.2
3 1.1
2.8 1
2.6 0.9
2.4 0.8
2.2 0.7
2 0.6
1.8 0.5
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)
Figure 17. On-state resistance vs Tcase Figure 18. Input low level
800
Iout=0.25A 2.75
Vcc=8V, 13V & 36V
700
2.5
600
2.25
500
2
400
1.75
300
200 1.5
100 1.25
0 1
-50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175
Tc (°C) Tc (°C)
3 Application information
+5V
VCC
Rprot CE
Dld
mC Rprot I/0n
OUTPUT
Rprot
Diagnostic GND
feedback
RGND
VGND DGND
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
Example
For the following conditions:
VCCpeak= - 100V
Ilatchup ≥ 20mA
VOHμC ≥ 4.5V
5kΩ ≤ Rprot ≤ 180kΩ.
Recommended values are:
Rprot =10kΩ
I LM AX (A)
10
B
C
0,1
10 100 1000
L( mH)
VIN, IL
Demagnetization Demagnetization Demagnetization
Note: Layout condition of Rth and Zth measurements (PCB FR4 area= 78mm x 78mm, PCB
thickness=2mm,Cu thickness=35μm, Copper areas: from minimum pad lay-out to 16 cm2).
Figure 22. Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb( °C/ W)
75
70
65
60
55
50
45
0 2 4 6 8 10
PCB Cu heat sink area ( cm^ 2)
ZTH (°C/ W)
1000
100 Footprint
8 cm2
10
0,1
0 0 0,01 0,1 1 10 100 1000
Time (s)
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = tp ⁄ T
A 1.250 1.620
A1 0.000 0.100
A2 1.100 1.650
B 0.230 0.410
C 0.190 0.250
D 4.800 5.000
E 3.800 4.000
e 0.800
H 5.800 6.200
h 0.250 0.500
L 0.400 1.270
k 0º 8º
X 1.900 2.500
Y 3.600 4.200
ddd 0.100
B
C Base Q.ty 100
Bulk Q.ty 2000
Tube length (± 0.5) 532
A
A 1.85
B 6.75
C (± 0.1) 0.6
Reel dimensions
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0.05) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.1) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Start
Top No components Components No components
cover
tape 500mm min
Empty components pockets
500mm min
saled with cover tape.
6 Revision history
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