1054 IEEE ANTENNAS AND WIRELESS PROPAGATION LETTERS, VOL.

8, 2009

Substrate-Integrated Waveguide Ku-Band

Cavity-Backed 2 2 Microstrip Patch Array Antenna
Mohamed H. Awida, Student Member, IEEE, and Aly E. Fathy, Fellow, IEEE

Abstract—A Ku-band cavity-backed microstrip patch 2 2 an-

tenna array has been implemented using the substrate-integrated
waveguide (SIW) technology—a low-cost multilayer printed cir-
cuit board (PCB) process. Cavities are emulated using vias, and
the patches are fed using microstrip lines that are centrally fed by
a shielded coaxial probe feed line. Simple design guidelines for the
cavity, patch, and substrate selection are presented. The array was
fabricated, and its measured results agreed very well with theoret-
ical predictions and indicated a relatively high efficiency and wide
bandwidth of greater than 70% and 9%, respectively.
Index Terms—Microstrip array, cavity-backed, substrate-inte-
grated waveguide (SIW).

I. INTRODUCTION
MAJOR hurdle in the microstrip patch antenna array de-
A sign is its limited bandwidth [1]. Techniques have been
developed to address this drawback by using suspended sub-
strates [2], cavity-backed patches [3], or even a combination of
both [4].
Using suspended substrate designs is more common than
cavity-backed patches due to the relative ease of their manufac-
turing. In fact, cavity-backed patches’ fabrication would require
the integration of metal cavities in the back of the radiating
elements, which would require a two-step fabrication process.
The first step is the conventional printed circuit board (PCB)
process to print the microstrip patch layer, and the second
step is most likely a computer numerical controlled (CNC)
machining or metal casting processing in order to fabricate
the waveguide metallized cavities. The previously prescribed
fabrication scenarios potentially increase the total fabrication
cost and complicate the structure assembly.
Nevertheless, cavity-backed patches exhibit a superior per-
formance relative to the suspended substrate structures due to
their salient features of surface wave suppression, extremely
high isolation from the surroundings, reduced coupling, better
matching, and a wider scan performance in an infinite array en-
vironment [3].
Recently, substrate-integrated waveguide (SIW) technology
was elegantly suggested as an alternative technique to facili-
tate the low-cost implementation of waveguide-like components
using a standard PCB technology [5]. In principal, the wave-
guide metal walls could be emulated using via-holes properly
Manuscript received July 22, 2009. First published September 01, 2009; cur-
rent version published October 02, 2009.
The authors are with the Department of Electrical Engineering, University of
Tennessee at Knoxville, Knoxville, TN 37996 USA (e-mail: awida@ieee.org).
Color versions of one or more of the figures in this letter are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LAWP.2009.2031416
1536-1225/$26.00 © 2009 IEEE
Fig. 1. Proposed SIW cavity-backed microstrip patch antenna. (a) Front view
with semi-transparent layers. (b) Section view along the patch center.
spaced at about , which is essentially similar to the previ-
ously presented laminated and post-wall waveguides [6].
Utilization of SIW technology should help in reducing the
cost of realizing the cavity-backed antennas. For example, [7]
has demonstrated slotted single-element antennas backed by a
substrate-integrated cavity. However, its design exhibited a rel-
atively narrow bandwidth of only 1.7%. In this letter, we extend
the use of the SIW cavities to back microstrip patches instead of
the conventional metallized ones. The proposed design is easy
to fabricate and should lead to a significant cost reduction. As a
demonstration, a 2 2 array has been designed, fabricated, and
tested, and its results will be presented here.
II. SIW CAVITY-BACKED MICROSTRIP PATCH ANTENNA
DESIGN GUIDELINES
The proposed SIW cavity-backed patch antenna is comprised
of a stack of two substrates—namely, a microstrip substrate
of a dielectric constant and a cavity substrate of dielectric
constant as shown in Fig. 1. A rectangular square patch
of side length “a” is printed on the microstrip substrate while
being fed through a microstrip line as shown in Fig. 1(a). The
ground of the microstrip substrate and the top layer of the cavity
substrate have a circular opening of radius “R” underneath the
patch. Many via holes spaced along the circular opening are
laser-drilled in the cavity substrate and are platted-through, con-
stituting the SIW circular cavity backing the patch as shown in
Fig. 1.
AWIDA AND FATHY: SIW KU-BAND CAVITY-BACKED 2 2 MICROSTRIP PATCH ARRAY ANTENNA
Fig. 2. Design chart showing the fractional bandwidth versus normalized
cavity height of the SIW cavity-backed patch and the normalized resonant
2 2
side length of the patch for both the single element (1 1) and the 2 2
array (assuming h = 0:381 mm, " = 2:2, " = 2:2; L = a=5, and
R = 0:84a.
To that end, the design of the SIW cavity-backed patch an-
tenna involves the selection of the properties of both substrates
(thickness and ) and the dimensions of the patch and cavity. In
this section, we will give brief guidelines to the design of such
an antenna.
a) Microstrip Substrate Properties: The rule of thumb is
to select a quite thin substrate for the microstrip feed
and patch layer. Use of a low-loss, low-dielectric-constant
thin substrate is preferred to minimize both dielectric and sur-
face wave losses. In our demonstration here, we have used a
0.381-mm-thick Rogers 5880 substrate for the microstrip sub-
strate corresponding to a 0.016 .
b) Cavity Substrate Properties: The bandwidth of the an-
tenna is highly dependent on the cavity substrate thickness and
. As far as the dielectric constant, the bandwidth is inversely
proportional to , which is very similar to the conventional
microstrip patch [8]. The high substrates tend to trap the en-
ergy more than the low ones, which will increase the quality
factor of the patch and subsequently decreases the bandwidth
and lowers the radiation efficiency [1]. Therefore, it is recom-
mended to use a low- substrate for the SIW cavity to achieve
the desired bandwidth enhancement advantage. On the other
hand, the SIW dielectric filled cavity will have a miniaturizing
effect on the patch size.
c) Cavity and Patch Dimensions: Based on initial HFSS
gain optimization runs that include both the cavity radius and
patch side length, we have adapted a simple empirical design
rule for selecting the cavity radius, which is given by:
, where R is the cavity radius and a is the patch side length.
Subsequently, we have carried out a parametric study for the
effect of cavity height on both the bandwidth and patch reso-
nant side length as shown in Fig. 2. The effective bandwidth of
the cavity-backed patch antenna structure is obviously a func-
tion of the cavity height. Increasing the cavity height can lead
to a wider bandwidth operation. Fig. 2 indicates that the an-
tennas’ fractional bandwidth is less than 2% when the cavity
height is zero, but it increases significantly to 9% upon utilizing
a cavity height of . However, use of a relatively thicker
cavity is generally not recommended to keep the low-profile,
1055
Fig. 3. Photograph of the fabricated structure depicting the top and bottom art-
works of the microstrip substrate, 1Top and 1Bottom, and the cavity substrate,
2Top and 2Bottom.
lightweight structure. Therefore, in our implementation we lim-
ited the height to be only . However, a further increase
of the bandwidth can be achieved upon vertically stacking more
patches at different layers above the cavity where, for example,
more than 19% has been obtained while keeping a low-profile
structure [9].
In our single-element design to achieve about 7% fractional
bandwidth, we needed to use the cavity height of (i.e.,
mm) and a patch side length of 7.2 mm. The associ-
ated single-element gain is 7.8 dBi (assuming mm,
, and ), which is equivalent to a 76% aper-
ture efficiency.
III. SUBSTRATE INTEGRATED CAVITY-BACKED MICROSTRIP
PATCH 2 2 ARRAY
A 2 2 array was designed and fabricated utilizing the pro-
posed single element as shown in Fig. 3. Similar to the single-el-
ement design, Rogers 5880 substrates of thicknesses 0.381 and
1.575 mm were selected for the microstrip and cavity substrates,
respectively. It is worth mentioning that keeping the same ma-
terial for both substrates would maintain a thermal expansion
matching between the two layers. An integrated 50- coaxial
probe feed topology similar to that proposed by [10] has been
adopted to excite the antenna array shown in Fig. 3. The coaxial
probe outer shield has been implemented using a circular array
of via-holes as shown in Fig. 3, and a simple microstrip feed di-
vider with a quarter-wave transformer is used to guide the wave
from the probe feed to the patches. The combined loss due to
the coaxial and the microstrip feed network is estimated to be
about 0.3 dB based on HFSS simulation.
The parametric study was repeated for the 2 2 array struc-
ture keeping the cavity size the same (i.e., ). The nor-
malized resonant side length of the patch versus the normalized
cavity height was also calculated and shown solid in Fig. 2. It is
also noticeable that the resonant length of the patch side in an
array environment is slightly larger than that for the single-ele-
ment design because of mutual coupling, which also favorably
enhances the fractional bandwidth as shown in Fig. 2. The final
design parameters are: a patch side mm, a trimmed cut
length mm, an array spacing of mm, and
a cavity radius of mm, while vias of radius
mm were used.
1056 IEEE ANTENNAS AND WIRELESS PROPAGATION LETTERS, VOL. 8, 2009

analyzer, versus the simulated one; this led to a very good agree-
ment except for a slight frequency shift of less than 1%.
Measurements of the far-field antenna radiation patterns are
shown in Fig. 5 for the E-plane cut, where the sidelobe and
cross-polarization levels are 12 and 20 dB lower than the main
polarization, respectively. The measured gain and aperture radi-
ation efficiency versus frequency are shown in Fig. 6 with over
13.6 dB at 12.6 GHz. This gain measurement is consistent with
our estimate of 13.5 dB, which is based on a single-element gain
of 7.8 dBi and feed-lines’ insertion loss of 0.3 dB. The measured
2 2 aperture radiation efficiency is better than 70% along a
very wide frequency range from 11.5 to 12.71 GHz.

Fig. 4. Measured reflection response (solid) versus simulated one (dotted) of

2
the cavity-backed microstrip patch 2 2 array.
IV. CONCLUSION
The SIW is an excellent alternative technology to fabricate
the whole cavity-backed structures using a standard PCB fabri-
cation process, which leads to a significant fabrication cost re-
duction. In our implementation, a two-layer structure was uti-
lized—the top layer for the 2 2 array, and the bottom one for
the SIW cavity and the coaxial feed. The patch layer is relatively
thin in order to minimize surface wave effects; meanwhile, the
bottom layer should be relatively thick to obtain a wideband per-
formance. The measured array performance exhibits an aperture
radiation efficiency of better than 70% over a wide frequency
range from 11.5 to 12.71 GHz. In this 2 2 array design, a mi-
crostrip feed network was used, but for larger antenna array de-
signs, a waveguide feed network with substantial lower loss feed
should be utilized to sustain the high-efficiency performance.
The multilayer structure could be easily designed for wideband
operation as well upon vertically stacking the patches.
Fig. 5. Measured normalized gain pattern (dotted) versus the simulated one
2
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