Proceedings of the Second International Conference on Artificial Intelligence and Smart Energy (ICAIS-2022)

IEEE Xplore Part Number: CFP22OAB-ART; ISBN: 978-1-6654-0052-7

Design of High-Confidence Embedded Operating

System based on Artificial Intelligence and Smart
Chips
2022 Second International Conference on Artificial Intelligence and Smart Energy (ICAIS) | 978-1-6654-0052-7/22/$31.00 ©2022 IEEE | DOI: 10.1109/ICAIS53314.2022.9742917

Qinmin Ma
School of Artificial Intelligence, Shenzhen Polytechnic, Shenzhen, Guangdong, 518055, China
Maqinminshenzhencn1211@gmail.com

Abstract— Design of the high-confidence embedded operating
system based on artificial intelligence and smart chips is studied
in this paper. The cooperative physical layer security system is
regarded as a state machine. Relay nodes with untrusted
behavior will affect the physical layer security of the system, and
the system tries to prevent the untrusted behavior of relay nodes.
While implementing public verification, it realizes the protection
of data privacy. The third party can directly verify the data
holding of the data stored in the cloud without verification by the
user, and in the process of system expansion and growth,
software can ensure vigorous vitality. For the verification, the
smart chips are combined for the systematic implementations.
The experimental results have shown the satisfactory results.
(2) Trusted execution environ ment refers to a trusted,
isolated and independent execution environ ment on the device
independent of the untrusted operating system. It provides a
secure and confidential space for private data and sensitive
computing in the untrusted environment. Its security is usually
guaranteed by hardware related mechanisms.
The application of game theory to the research of physical
layer security has been a research hotspot in recent years. The
main application of game theory to the selection o f the relay
nodes is that the behavior type of the node is known. In the
figure 1, the initial structure has been denoted.

Keywords— High-confidence model; embedded operating

system; artificial intelligence; smart chips

I. INT RODUCT ION

Different fro m the traditional cloud co mputing model, the
edge computing model adds a layer of netwo rk edge nodes
between the data source and the cloud computing center.
These network edge nodes can not only perform t wo -way
data transmission with the cloud co mputing center, but also
efficiently perform some co mputing tasks with high real-t ime
requirements near the data source. In the early wo rk, the
automatic conversion of code mod ification mostly adopted the
method of the manual feature engineering, that is, manually
proposed rules to limit and explain the adaptation conditions,
modification process and modification results of the general
modification scheme in the modification example.
However, these rules are often based on researchers' expert
knowledge of specific languages, and it takes a lot of time and
energy to summarize and refine. A majo r feature of co mputing
is distribution on demand, and the blockchain itself is a
resource, and there is a demand for on-demand supply.
It is an integral part of the cloud co mputing, so cloud
computing technology and the blockchain technology can be
integrated with each other, hence, the core ideas are listed.
(1) In recent years, the PDP schemes are still a research
hotspot, but most of them are limited to a core single private
verification or public verification, wh ich has great limitations.
Although the trustworthiness of the server is well verified, it
ignores whether the user is trustworthy research.
Fig. 1. T he High-confidence Embedded Operating Syst em Structure
In the designed model, the high-confidence scenarios will
be combined. The consensus protocol of the core blockchain
requires each node in the blockchain network to process each
block in the blockchain, so that all nodes in the whole system
can exchange data freely and safely in distrusted environment.
However, in the practical applicat ions, in a distributed
environment, due to the node's own energy constraints or the
control of malicious nodes, node behaviors not only have
cooperative behaviors, but also selfish, malicious blocking and
other behaviors may be possible.
These untrustworthy behaviors greatly affect the security
performance of the system. High scalability represents a kind
of elasticity. In the proces s of system expansion and growth,
software can ensure vigorous vitality. With few changes or
even just the addition of the hardware equip ment, the linear
growth of the processing capacity of the whole system can be
realized, and high throughput and low latency performance
can be achieved, in the next sections, the details of the model
will be modelled and analyzed.

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 Proceedings of the Second International Conference on Artificial Intelligence and Smart Energy (ICAIS-2022)
IEEE Xplore Part Number: CFP22OAB-ART; ISBN: 978-1-6654-0052-7
II. T HE PROPOSED MET HODOLOGY
A. The High-confidence Embedded System
The scalability limitation caused by the consensus protocol
of the blockchain makes the transaction throughput of the
blockchain low. Whether the transaction throughput can be
then improved is the key issue whether the blockchain can be
widely used. On the one hand, given a modification examp le,
the method parses the code before and after modification into
an abstract syntax tree, and finds the correspondence between
its nodes. Based on the correspondence between nodes, the
method uses graphs to represent the given core sample code
modification to then enhance the model's ability to captu re the
structural info rmation in the code modification; on the other
hand, the method is effective through the graph convolutional
network and Transformer architecture co mb ining with each
other to enhance the model's ability to capture the dependency
informat ion between codes, especially long-range dependency
relationship. In the figure 2, the structure is defined.
Fig. 2. T he General Structure Model
The CPU will save its state informat ion in a core special
memo ry area called system management RAM. Th is s pecial
memo ry area cannot be addressed and accessed by programs
running in other execution modes. By default, the addressing
request to the system management RAM will be transferred to
the image memory.
This feature allows the system management RAM to be
used as the secure storage device. It is worth noting that the
system management interrupt handler is loaded into the
system management RAM by the BIOS when the system is
started and the handler can access the physical memo ry space
without restriction, and can execute privileged instructions. In
the following formulas, the models are defined.
ysd  Ps hsd xs  nsd
ysr  Ps hsr xs  nsr
yse  Ps hse xs  nse
The consensus of the blockchain requires each node in the
blockchain network to process each block in the blockchain,
so that all nodes in the entire system can exchange data freely
and securely in a trustless environment. At the same t ime,
since all nodes on the block mus t verify each transaction, the
throughput of transactions on the blockchain is lo w. Un like
traditional b lockchains, TBchain uses traditional blockchains
as the base layer or the "first layer", and builds a three -layer
blockchain model on top of the secure base layer blockchain,
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which extends the public block The usefulness of the chain
allo ws interaction to occur when needed, but it can still be
traced back to a reliab le base layer. In real life, due to profit-
driven, malicious users are real. Therefore, when verify ing the
possession of data in the cloud, it is necessary to verify the
credibility of the cloud service provider and the cloud user at
the same time. Although the existing studies have proposed
models based on public verificat ion, private verification, and
the hybrid verificat ion, they are all aimed at the cloud service
providers for credib ility verification without considering the
credibility o f the users. Hence, for the better understanding,
the figure 3 shows the system model.
Fig. 3. T he High-confidence Embedded System Model
B. The Artificial Intelligence Embedded Model
It is the demanding requirements of h igh performance, low
power consumption, and the strong real-time performance that
drive the embedded intelligent computing system to adopt a
heterogeneous multi-processor architecture.
The heterogeneous mult i-processors described here and the
symmetric mu lti-processors used for scientific co mputing, it is
completely different. Therefore, how to then design a hybrid
heterogeneous computing platform in wh ich a general-purpose
embedded processor and also a dedicated intelligent processor
cooperate with each other, with an excellent performance-to-
power rat io, has then become the primary problem facing the
embedded intelligent co mputing system. Embedded software
technology will be then programmed again in the application
process. The basic principle is the same as that of the JA VA
programming software. The processing power of the processor
is improved through programming again. The develop ment of
embedded software technology will then give JAVA software
development provides great help.
On the one hand, the integration of mu ltip le software
(1) applications can be realized through the application of general
embedded software technology, which increases a s oftware
(2) application platfo rm. On the other hand, the increase in the
application platforms can provide for the develop ment and
(3) embedding of JA VA software technology. The development
of modular software technology provides more support, wh ich
not only contributes to the development of the smart software
programming technology, but also then enables technological
innovation of multip le technologies. The hybrid embedded
training system refers to the design of the embedded train ing
system by adopting independent or integrated design ideas
when it is inconvenient to design the independent or integrated
embedded train ing system. The design of a hybrid embedded
training system is usually to increase the function of the
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 Proceedings of the Second International Conference on Artificial Intelligence and Smart Energy (ICAIS-2022)
IEEE Xplore Part Number: CFP22OAB-ART; ISBN: 978-1-6654-0052-7
embedded train ing system under the core condition that the
avionics system has been designed. This system uses the Wi-
Fi network and cellular network that have been fully deployed
in modern society to transmit the image data that embedded
devices need to calculate to the cloud. The cloud uses the
deployed server and workstation clusters to perform high -
speed calculations and return results while making full use of
embedded the features of co mpact equip ment are s mall and
suitable for deployment at the front end. In the figu re 4, the
systematic model is defined.
Fig. 4. T he Systematci Model Defined
The cluster server manages all GPU workstations in a
cluster. It will establish the communication server program.
When various computing programs on the GPU workstation
are connected, they will be centrally managed by the cluster
server to monitor the computing load of each task in real time
with the data such as model name and version. Relying on the
communicat ion program, the GPU process can then inform the
cluster server's own model version and load pressure and other
informat ion. Afterwards, after receiving the image data sent
by the cluster server, the GPU immediately starts calculation
and returns the calculation result.
In order to improve the operating efficiency of software
and hardware, each co mputing process supports a data buffer
queue, and subsequent data will be received in advance and
placed in the queue, which can reduce the data waiting time
for each calculation shown in the figure 5.
Fig. 5. Artificial Intelligence Embedded Model
C. The Embedded Operating System with Smart Chips
Relying on the streaming media informat ion and also the
teaching system supported by the operating system, it can
work in parallel with the core computer CPU, wh ich is truly
independent of the CPU, and its functions have been further
strengthened. The communication system selects STM32 as
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the main control chip to co mplete the control operation of the
system, including data transfer p rocessing, control and general
coordination of various modules to cooperate to complete the
communicat ion work. In this article, the STM 32 main control
chip is specifically STM32103ZET6.
STM32103ZET6 has abundant peripheral resources, which
greatly simplifies the circuit design work, and also has strong
signal processing capabilities and anti-interference
capabilities.
For embedded Ethernet data acquisition system hardware
design and control system respectively, and then based on the
SPI serial interface design imp lementation of the Ethernet data
acquisition system and control system integration, build ing
embedded Ethernet data acquisition and also control system
optimization function, co mp lete the design of the embedded
Ethernet data acquisition and control system. The figrue 6
gives the connection model.
Fig. 6. T he System Connection Model
III. THE EXPERIMENT
The current data acquisition boards generally use a bus,
which can be inserted into the host to form an interposing
working mode. These bus technologies use the powerful data
processing capabilities of the machine and abundant software
and hardware resources to provide very favorable conditions
for data application as the user environment and short training
period for operators when the system is put into operation.
Software develop ment is convenient, and C2420 itself
integrates 8051 core, wireless transceiver module, etc.
Therefore, when the circu it design is carried out, no
complicated peripheral circu it design is required to form a
complete wireless short-range communication data transceiver
system. The circu it design is simp le, so the project cycle is
shortened and the reliab ility of the system is imp roved. The
embedded Ethernet data collection module has been refined
and divided into: data migration module, data cleaning
module, and data filtering module that filters the collected
Ethernet data after collecting data, the figure 7 shows the
simulation result.
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 Proceedings of the Second International Conference on Artificial Intelligence and Smart Energy (ICAIS-2022)
IEEE Xplore Part Number: CFP22OAB-ART; ISBN: 978-1-6654-0052-7
Fig. 7. T he System Performance Estimation Result
IV. CONCLUSION AND SUMMARY
Design of the high-confidence embedded operating system
based on artificial intelligence and smart ch ips is studied in
this paper. The embedded Ethernet data have been collected
and filtered, wh ich is conducive to its control. Th is paper uses
fuzzy associative space theory to filter embedded Ethernet
data. The cluster server manages all GPU workstations in the
cluster. It will establish the communication server program,
and at the same time, the simu lations are conducted to validate
the model. The future study will focus on how to imp lement
the system with higher complexity.
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