25/01/2020

Memory Segmentation
 The total memory size is divided into segments of various sizes

8086 Microprocessor Architecture

 A segment is an area in memory
(Segmentation)
 The process of dividing memory into segments is called
Segmentation

2 8086 Architecture 25/01/2020

Memory Segmentation… Memory Segmentation…

 The 8086’s 1MB memory is divided into 16 logical segments
 In memory, data is stored as bytes and each byte has a
 Each segment contains 64Kbyte of memory
specific address
F0000

 Intel 8086 has a 20-line address bus E0000 8000:FFFF

D0000
C0000
 With 20 address lines, the memory that can be addressed is B0000
A0000

220 bytes. 220 = 1,048,576 bytes (1 MB) 90000

80000
70000

 8086 can access memory with address ranging from 00000H to 60000
8000:0250
50000
0250
40000
FFFFFH 30000 8000:0000
20000
10000
seg ofs
00000

3 8086 Architecture 25/01/2020 4 8086 Architecture 25/01/2020

1
 25/01/2020

Segment Registers Segment Registers…

 In 8086, memory has four different types of segments. These

are:

 Code Segment

 Data Segment

 Stack Segment

 Extra Segment

5 8086 Architecture 25/01/2020 6 8086 Architecture 25/01/2020

Segment Registers… Physical Address

 Each of these segments are addressed by an address stored in  How is a 20-bit address obtained if there are only 16-bit

corresponding segment register registers?

 The 20-bit address of a byte is called its Physical Address

 Segment registers are 16-bit in size (PA)

 PA is specified as a Logical Address. Logical address is in the

form of:
 Each register stores the base address (starting address) of the
Base Address : Offset
corresponding segment

 Offset is the displacement of the memory location from the

 Because the segment registers cannot store 20 bits, they only
starting location of the segment
store the upper 16 bits

7 8086 Architecture 25/01/2020 8 8086 Architecture 25/01/2020

2
 25/01/2020

Example: PA Computation Example: PA Computation…

 If the value of Data Segment Register (DS) is 2222H and the  To calculate the effective address of the memory, BIU uses the

BIU wants to convert this 16-bit address into a 20-bit address following formula:
then:  Effective Address = Starting Address of Segment + Offset

 the BIU appends 0H to the LSBs of the address  To find the starting address of the segment, BIU appends the

 after appending, the starting address of the Data Segment contents of Segment Register with 0H

becomes 22220H  Then, it adds offset to it

 if the data at any location has a logical address specified  Therefore:

as: EA = 22220H

2222H : 0016H + 0016H

 then the number 0016H is the offset and 2222H is the ------------

value of DS 22236H

9 8086 Architecture 25/01/2020 10 8086 Architecture 25/01/2020

Example: PA Computation… Physical Address…

 All offsets are limited to 16-bits. It means that the maximum

size possible for segment is 216 = 65,535 bytes (64 KB)

 The offset of the first location within the segment is 0000H

 The offset of the last location in the segment is FFFFH

11 8086 Architecture 25/01/2020 12 8086 Architecture 25/01/2020

3
 25/01/2020

Exercise Solutions
 The contents of the following registers are:  CS = 1111H

 The base address of the code segment is 11110H.

 CS = 1111H
 Effective address of memory is given by 11110H + 1232H =
 DS = 3333H
12342H.
 SS = 2526H  DS = 3333H
 IP = 1232H  The base address of the data segment is 33330H.

 SP = 1100H  Effective address of memory is given by 33330H + 0020H =

33350H.
 DI = 0020H
 SS = 2526H
 Calculate the corresponding physical addresses for the address
 The base address of the stack segment is 25260H.
bytes in CS, DS and SS.  Effective address of memory is given by 25260H + 1100H =
26360H

13 8086 Architecture 25/01/2020 14 8086 Architecture 25/01/2020

Assignment 1 Assignment 1…
Question One [12 Marks] Question Two [8 Marks]

 Suppose you had a processor that was designed and operated  The contents of the following registers are: CS = 0199H, DS =

similarly to the 8086 architecture with the following 4298H, SS = 22E5H, IP = 14F8H, SP = 1179H, and DI =
differences: All of the registers are 8-bit registers, and the 0A96H. Compute the corresponding physical addresses and the
physical address (PA) is a 10-bit number. ranges of addresses for the code, data and stack segments.

i. Illustrate how the memory of such a processor would be

segmented giving details of how the PA would be realized.

Clearly show the start and end addresses of each segment.

ii. Determine the size of each of the segments in (i).

iii.Determine the total memory addressable by this processor.

15 8086 Architecture 25/01/2020 16 8086 Architecture 25/01/2020

4
 25/01/2020

END

17 8086 Architecture 25/01/2020