3. Error Control (contin.

)
 3.3 Error detection methods

3.3.1 Parity bit method - The most used method for detecting bit errors
with asynchronous and character-oriented synchronous transmission.
the transmitter adds an additional bit - the parity bit - to each transmitted
character (byte) prior to transmission. The parity bit used is a function of the bits
that make up the character being transmitted.

The receiver performs a similar function on the received character and compare
the result with the received parity bit. If they are equal, no error is assumed, but
if they are different, then a transmission error has occurred.

The parity bit is chosen so that the total number of 1 bits (including the parity bit
itself) is either even - even parity - or odd - odd parity. For example, with
character 0110101 the parity bit is 0 for even parity and 1 for odd parity. The set
of code words is thus said to have a minimum distance of 2.The receiver can thus
detect all single errors in each code words, but can’t correct any. In this
particular case, the distance between any two code words is an even number and
any error model with an odd number of errors is detected.
 3.3 Error detection methods (contin.)

Block (sum) check

character
An additional set of parity bits
computed from complete block of
characters (bytes) in the frame.

Each character (byte) in the frame

is assigned a parity bit as before
(transverse or row parity).

An extra bit is computed for each

bit position (longitudinal or column
parity) in the frame. The resulting set
of parity bits for each column is
named block (sum) check
character.
 3.3 Error detection methods (contin.)

Hamming distance for block codes

The Hamming weight of block U, denoted by w(U), is the number of non-zero
elements in U.
The Hamming distance between two blocks U and V is the number of elements
in which they differ:

d (U, V ) = w(U ⊕ V ); ⊕ = XOR = modulo-2 adder

Example: U = [1 0 1 1] and V = [1 0 0 1] → d(U,V) = 1.

The minimum distance of a block code is:
not
d = d min = min d (Ui , U j ) = min w(Ui )
i≠ j i

The Hamming distance for a block = the minimum distance d → any two code
words are different in at least d positions;
 3.3 Error detection methods (contin.)

Error Detection Capacity and Error Correction Capacity

A block code with the Hamming distance d can

detect d−1 errors or
correct (d−1)/2 errors.

If the block code is a linear one → the sum of any two words is also a code
word, and the minimum distance is equal with the minimum weight (the number
of 1 bits) of the nonzero code words.
 3.3 Error detection methods (contin.)

3.3.2 Polynomial (block) codes

An important class of block codes, with a high error detecting capacity;

Principle:
Any code polynomial (a polynomial associated to a code word, having as
coefficients the code word symbols, and the maximum degree n−1) is a multiple
of the same polynomial, called generator polynomial.

For a (n, k) polynomial code the degree of the generator polynomial is n−k.

The coding operation, to find the n−k control bits associated to each k-bits
information block is done by dividing a n−1 degree polynomial, (whose
coefficients are, in order, from the n−1 degree term to n−k degree term the k
information bits, the other coefficients being 0) by the generator polynomial.
 3.3 Error detection methods (contin.)

3.3.2 Polynomial (block) codes (contin.)

Principle (contin.):

The coefficients of the remainder polynomial are the control bits, representing the
FCS (frame check sequence), which are transmitted at the tail of information digits.
The operations with polynomial coefficients are made in GF 2 (Galois field 2, using
modulo 2 operations). Hence, the set of 2k multiple polynomials, with the maximum
degree n−1, of the generator polynomial (degree n−k) are the set of the 2k code
polynomials.

Similarly, on receipt, the received bit stream including the FCS digits is again
divided by the same generator polynomial and if no errors are present, the
remainder is all zeros. If an error is present, however, the remainder is non-zero.
 3.3 Error detection methods (contin.)

3.3.2 Polynomial (block) codes (contin.)

Example: A polynomial code (7, 4), n=7 and k=4, with the generator polynomial
g(x)=x3+x+1 (of degree n−k=3). All the information blocks have k=4 bits.

The minimum
weight of this code is
3, so the minimum
distance is also 3,
resulting that this
code can detect any
pattern of two or less
errors.
 3.3 Error detection methods (contin.)

3.3.2 Polynomial (block) codes (contin.)

Example: For the information block 0111 the corresponding polynomial to be
divided by g(x) to obtain the control bits is 0·x6+1·x5+1·x4+1·x3. The quotient q(x)
and the remainder r(x) are obtained as:

x5 + x 4 + x3 r ( x)
3
= q( x ) +
x + x +1 x3 + x + 1

So, we have r(x)=x=0·x2+1·x+0·x0 and the control bits are 010, and the
corresponding code word is 0111010.
 3.3 Error detection methods (contin.)

3.3.2 Polynomial (block) codes (contin.) – Cyclic codes

Cyclic codes = a particular class of the polynomial codes.

A cyclic code (n, k) is a polynomial code with the generator polynomial being a divider of
xn+1.

For a cyclic code any cyclic permutation, to the left or to the right, with one or more
positions, is also a code word.

The computed check (control) digits are referred to as the frame check sequence (FCS) or
the cyclic redundancy check (CRC) digits.

The number of check digits per frame is selected to suit the type of transmission errors
anticipated, although 16 and 32 bits are the most common.
 3.4 Error correction methods

3.4.1 Convolutional Codes

Used mainly for error correction;

More powerful than block codes, offering higher encoding gains at the same
structural complexity;

Principle: continuous encoding process, with memory, over the entire input data
sequence;
 3.4.1 Convolutional Codes (contin.)

Convolutional Codes (CC) Generation

CC are generated using a shift-register with m ≠ k cells and n output modulo-2 adders.

The CC is defined by:

k = the number of simultaneous input data bits;
n = the number of output bits, as a result of encoding the k input data bits;
The connections between the shift-register’s cells and the modulo-2 adders.

The encoding rate for a CC is given by:

R=k/n

The CC encoder state is defined by the shift-register content, which is completely

determined by the input sequence. The total number of possible states is 2m.
 3.4.1 Convolutional Codes (contin.)

The general structure of a CC encoder

k input bits
1 2 .... m 1 2 .... m 1 2 .... m

n modulo-2 adders
1 2 n

n bits output codeword

Note: the characteristic of the CC encoding process is the memory, each output bit depends
on the current input bit and on m-1 previous input bits.
 3.4.1 Convolutional Codes (contin.)
CC description using the generator polynomials

A CC is completely determined by the generator polynomials, which define:

The number of shift-register’s cells, given by the maximum polynomial degree;

The number of modulo-2 adders = the number of polynomials;

The connections between register’s cells and adders = the polynomials coefficients;
 3.4.1 Convolutional Codes (contin.)
Example 1: Draw the scheme of the CC defined by the following generator polynomials:

g1 ( x) = 1 + x + x 2 ⇔ g1 = [111]
g2 ( x) = 1 + x 2 ⇔ g2 = [101]

and determine the codeword corresponding to the following input data sequence:

u = (1011)
Solution: The encoder has 2 outputs, the shift register includes 2 cells, and the encoding rate
is R = 1/2. The input bits are entering the shift register from left to right. For each input
bit entering the encoder there are generated two output bits at the outputs of the modulo-2
adders. Hence, each input bit is influencing the 3 output bit intervals: over the current
interval, and over the next 2 bit intervals. The adders are read in an alternative manner,
such that the code rate is twice the input sequence rate.

The encoder structure is presented in the next figure:

 3.4.1 Convolutional Codes (contin.)
Example 1 (contin.)
The encoder structure is presented in the next figure:

Convolutional encoder (rate 1/2, m=2)

◦ A shift-register with 2 cells (the memory of the encoder).
g1 ( x) = 1 + x + x 2 ⇔ g1 = [111] Legend
g2 ( x) = 1 + x 2 ⇔ g2 = [101] - one bit delay (memory cell)
D
- modulo-2 adder (XOR)

v1,i First coded bit

(Branch word)
Input data bits D D Output coded bits
u ui ui −1 ui − 2 v1 , v2
v2,i
Second coded bit
 3.4.1 Convolutional Codes (contin.)
Example 1 (contin.)
Message sequence: u = (1011)

Time Output Time Output

(Branch word) (Branch word)
v1 v1
v1 v 2 v1 v 2
t1 D D t2 D D
1 0 0 1 1 0 1 0 1 0
v2 v2

v1 v1
v1 v 2 v1 v 2
t3 D D t4 D D
1 0 1 0 0 1 1 0 0 1
v2 v2
 3.4.1 Convolutional Codes (contin.)
Example 1 (contin.)
Message sequence: u = (1011)
Time Output Time Output
(Branch word) (Branch word)
v1 v1
v1 v 2 v1 v 2
t5 D D t6 D D
0 1 1 0 1 0 0 1 1 1
v2 v2

Time Output
(Branch word)
v1
v1 v 2
t7 D D
0 0 0 0 0
v2

u = (1011) Encoder v = (11 10 00 01 01 11)

 3.4.1 Convolutional Codes (contin.)
Example 1 (contin.)
The input sequence and the generator polynomials can be defined in either a polynomial or
a vectorial form. The input sequence can be expressed as

u( x) = u0 + u1 x + u2 x 2 + L + u j x j + L u j ∈ {0,1}

where the input bits are given by the vector:

u = u0 , u1 , u2 ,L u j L

Then, the output sequences are given by:

v1 ( x) = g1 ( x)u( x) = v1,0 + v1,1 x + v1,2 x 2 + L + v1, j x j + L ⇔ v1 = v1,0 , v1,1 , v1,2 ,L v1, j L
v2 ( x) = g2 ( x)u( x ) = v2,0 + v2,1 x + v2,2 x 2 + L + v2, j x j + L ⇔ v2 = v2,0 , v2,1 , v2,2 ,L v2, j L
 3.4.1 Convolutional Codes (contin.)
Example 1 (contin.)
The two output sequences are interleaved and the global output sequence is obtained:

v =  v1,0 , v2,0 , v1,1 , v2,1 , v1,2 , v2,2 ,L v1, j , v2, j L

For the given input data sequence the input polynomial is

u = (1011) ⇒ u( x ) = 1 + x 2 + x 3

One can determine both sequences at the adders’ outputs as

( )( )
v1 ( x ) = 1 + x 2 + x3 1 + x + x 2 = 1 + x + x5 ⇔ v1 = [110001]

v ( x) = (1 + x
2
2
+ x )(1 + x ) = 1 + x
3 2 3
+ x 4 + x5 ⇔ v2 = [100111]

and the generated output code sequence is

v = (11 10 00 01 01 11)