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Rev. BG96_Hardware_Design_V1.2
Date: 2017-12-22
Status: Released
www.quectel.com
LTE Module Series
BG96 Hardware Design
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History
Lyndon LIU/
1.0 2017-08-04 Initial
Daryl DU
1. Modified GSM features in Table 2.
2. Added a note for e-I-DRX in Chapter 3.3.
1.1 2017-08-31 Daryl DU 3. Elaborated the description of e-I-DRX in Chapter
3.4.3.
4. Updated RF receiving sensitivity in Chapter 6.6.
1. Added the storage temperature of the module in
Table 2 and Chapter 6.3.
2. Updated transmitting power values in Table 2.
3. Added the description of sleep mode in Table 5 and
Chapter 3.4.4.
4. Added the description of ADC interfaces in Chapter
3.16.
Lyndon LIU/
1.2 2017-12-22 5. Updated the GNSS performance in Table 21.
Daryl DU
6. Updated the peak supply current values in Table 28.
7. Updated the current consumption values in Chapter
6.4.
8. Updated RF output power values in Table 34.
9. Updated LTE Cat NB1 RF receiving sensitivity values
(without repetitions) in Table 35.
10. Updated the recommended footprint in Chapter 7.2.
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Contents
1 Introduction .......................................................................................................................................... 8
1.1. Safety Information...................................................................................................................... 9
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5 Antenna Interfaces............................................................................................................................. 47
5.1. Main Antenna Interface ........................................................................................................... 47
5.1.1. Pin Definition .................................................................................................................. 47
5.1.2. Operating Frequency ..................................................................................................... 47
5.1.3. Reference Design of RF Antenna Interface ................................................................... 48
5.1.4. Reference Design of RF Layout..................................................................................... 48
5.2. GNSS Antenna Interface ......................................................................................................... 50
5.3. Antenna Installation ................................................................................................................. 52
5.3.1. Antenna Requirements .................................................................................................. 52
5.3.2. Recommended RF Connector for Antenna Installation ................................................. 52
9 Appendix A References..................................................................................................................... 72
10 Appendix B GPRS Coding Schemes ............................................................................................... 75
11 Appendix C GPRS Multi-slot Classes .............................................................................................. 76
12 Appendix D EDGE Modulation and Coding Schemes ................................................................... 78
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Table Index
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Figure Index
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1 Introduction
This document defines BG96 module and describes its air interface and hardware interfaces which are
connected with customers’ applications.
This document can help customers quickly understand the interface specifications, electrical and
mechanical details, as well as other related information of BG96. To facilitate its application in different
fields, reference design is also provided for customers’ reference. Associated with application note and
user guide, customers can use the module to design and set up mobile applications easily.
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The following safety precautions must be observed during all phases of the operation, such as usage,
service or repair of any cellular terminal or mobile incorporating BG96. Manufacturers of the cellular
terminal should send the following safety information to users and operating personnel, and incorporate
these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for
customers’ failure to comply with these precautions.
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes
distraction and can lead to an accident. You must comply with laws and regulations
restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it is
switched off. The operation of wireless appliances in an aircraft is forbidden, so as
to prevent interference with communication systems. Consult the airline staff about
the use of wireless devices on boarding the aircraft, if your device offers an
Airplane Mode which must be enabled prior to boarding an aircraft.
Switch off your wireless device when in hospitals, clinics or other health care
facilities. These requests are designed to prevent possible interference with
sensitive medical equipment.
Cellular terminals or mobiles operating over radio frequency signal and cellular
network cannot be guaranteed to connect in all conditions, for example no mobile
fee or with an invalid (U)SIM card. While you are in this condition and need
emergent help, please remember using emergency call. In order to make or
receive a call, the cellular terminal or mobile must be switched on and in a service
area with adequate cellular signal strength.
Your cellular terminal or mobile contains a transmitter and receiver. When it is ON,
it receives and transmits radio frequency energy. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potentially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potentially explosive atmospheres include fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders, etc.
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2 Product Concept
BG96 is an embedded IoT (LTE Cat M1, LTE Cat NB1 and EGPRS) wireless communication module. It
provides data connectivity on LTE-TDD/LTE-FDD/GPRS/EDGE networks, and supports half-duplex
operation in LTE networks. It also provides GNSS1) and voice functionality2) to meet customers’ specific
application demands. The following table shows the frequency bands of BG96 module.
NOTES
1) GNSS
1. function is optional.
2. 2) BG96 supports VoLTE (Voice over LTE) under LTE Cat M1 network.
3) BG96 GSM only supports Packet Switch.
3.
With a compact profile of 22.5mm × 26.5mm × 2.3mm, BG96 can meet almost all requirements for M2M
applications such as smart metering, tracking system, security, wireless POS, etc.
BG96 is an SMD type module which can be embedded into applications through its 102 LGA pads. BG96
supports internet service protocols like TCP, UDP and PPP. Extended AT commands have been
developed for customers to use these internet service protocols easily.
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Features Details
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Compliant with USB 2.0 specification (slave only) and the data transfer rate
can reach up to 480Mbps
Used for AT command communication, data transmission, GNSS NEMA
USB Interface output, software debugging and firmware upgrade
Support USB drivers for Windows XP, Windows Vista, Windows 7,
Windows 8/8.1, Windows 10, Windows CE 5.0/6.0/7.0, Linux 2.6/3.x/4.1,
Android 4.x/5.x/6.x/7.x
UART1:
Used for data transmission and AT command communication
115200bps by default
The default frame format is 8N1 (8 data bits, no parity, 1 stop bit)
Support RTS and CTS hardware flow control
UART Interfaces UART2:
Used for module debugging and log output
115200bps baud rate
UART3:
Used for outputting GNSS data or NEMA sentences
115200bps baud rate
3GPP TS 27.007 and 3GPP TS 27.005 AT commands, as well as
AT Commands
Quectel enhanced AT commands
Network Indication One NETLIGHT pin for network connectivity status indication
RoHS All hardware components are fully compliant with EU RoHS directive
NOTES
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3. 2)Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There
are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like
Pout might reduce in their value and exceed the specified tolerances. When the temperature returns to
the normal operating temperature levels, the module will meet 3GPP specifications again.
The following figure shows a block diagram of BG96 and illustrates the major functional parts.
Power management
Baseband
DDR+NAND flash
Radio frequency
Peripheral interfaces
ANT_MAIN ANT_GNSS
Filter
PA PA LNA
VBAT_RF
(4G) (2G+ASM)
Tx Rx GNSS
NAND
Transceiver DDR2
SDRAM
VBAT_BB IQ Control
PWRKEY PMIC
Control
RESET_N
STATUS Baseband
NETLIGHT
ADCs 19.2M
XO
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NOTE
In order to help customers develop applications conveniently with BG96, Quectel supplies the evaluation
board (EVB), USB to RS-232 converter cable, USB data cable, earphone, antenna and other peripherals
to control or test the module. For more details, please refer to document [1].
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3 Application Interfaces
BG96 is equipped with 102 LGA pads that can be connected to customers’ cellular application platforms.
The following sub-chapters will provide detailed description of interfaces listed below:
Power supply
(U)SIM interface
USB interface
UART interfaces
PCM* and I2C* interfaces
Status indication
USB_BOOT interface
ADC interfaces*
NOTE
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RESERVED
RESERVED
RESERVED
ANT_MAIN
VBAT_RF
VBAT_RF
GND
GND
GND
GND
GND
GND
GND
55
56
62
61
60
59
58
54
53
52
51
50
PSM_IND* 1 57 49 ANT_GNSS
ADC1* 2 48 GND
82 81 80 79
GND 3 47 USIM_GND
USB_VBUS 8 42 USIM_PRESENCE
USB_DP 9 65 85 96 76 41 I2C_SDA*
USB_DM 10 40 I2C_SCL*
66 86 95 75 USB_BOOT
RESERVED 11 39 RI
67 87 94 74
RESERVED 12 38 DCD
RESERVED 13 68 88 93 73 37 RTS
RESERVED 14 36 CTS
1) 89 90 91 92
PWRKEY 15 35 TXD
RESERVED 16 69 70 71 72
34 RXD
RESET_N 17 33 VBAT_BB
W_DISABLE# 18 32 VBAT_BB
19
20
21
22
23
24
26
27
28
29
30
31
25
DBG_RXD
AP_READY*
DBG_TXD
NETLIGHT
RESERVED
ADC0*
UART3_RXD
DTR
STATUS
GND
UART3_TXD
VDD_EXT
GPIO26
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NOTES
The following tables show the pin definition and description of BG96.
Type Description
IO Bidirectional
DI Digital input
DO Digital output
PI Power input
PO Power output
AI Analog input
AO Analog output
OD Open drain
Power Supply
DC
Pin Name Pin No. I/O Description Comment
Characteristics
Power supply Vmax=4.3V
VBAT_BB 32, 33 PI for module’s Vmin=3.3V
baseband part Vnorm=3.8V
Power supply Vmax=4.3V
VBAT_RF 52, 53 PI for module’s RF Vmin=3.3V
part Vnorm=3.8V
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Turn on/off
DC
Pin Name Pin No. I/O Description Comment
Characteristics
The output voltage is
VIHmax=2.1V
Turn on/off the 0.8V because of the
PWRKEY 15 DI VIHmin=1.3V
module diode drop in the
VILmax=0.5V
Qualcomm chipset.
VIHmax=2.1V
Reset signal of If unused, keep this pin
RESET_N 17 DI VIHmin=1.3V
the module open.
VILmax=0.5V
Status Indication
DC
Pin Name Pin No. I/O Description Comment
Characteristics
Indicate the 1.8V power domain.
VOHmin=1.35V
STATUS 20 DO module’s If unused, keep this pin
VOLmax=0.45V
operation status open.
Indicate the
1.8V power domain.
module’s VOHmin=1.35V
NETLIGHT 21 DO If unused, keep this pin
network activity VOLmax=0.45V
open.
status
USB Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
Vmax=5.25V
USB_VBUS 8 PI USB detection Vmin=3.0V
Vnorm=5.0V
Compliant with
USB differential Require differential
USB_DP 9 IO USB 2.0 standard
data bus (+) impedance of 90Ω.
specification.
Compliant with
USB differential Require differential
USB_DM 10 IO USB 2.0 standard
data bus (-) impedance of 90Ω.
specification.
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(U)SIM Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin=-0.3V
(U)SIM card 1.8V power domain.
USIM_ VILmax=0.6V
42 DI insertion If unused, keep this pin
PRESENCE VIHmin=1.2V
detection open.
VIHmax=2.0V
For 1.8V (U)SIM:
Vmax=1.9V
Vmin=1.7V
Either 1.8V or 3.0V is
Power supply
USIM_VDD 43 PO supported by the module
for (U)SIM card For 3.0V (U)SIM:
automatically.
Vmax=3.05V
Vmin=2.7V
IOmax=50mA
For 1.8V (U)SIM:
VOLmax=0.45V
VOHmin=1.35V
Reset signal of
USIM_RST 44 DO
(U)SIM card
For 3.0V (U)SIM:
VOLmax=0.45V
VOHmin=2.55V
For 1.8V (U)SIM:
VILmax=0.6V
VIHmin=1.2V
VOLmax=0.45V
VOHmin=1.35V
Data signal of
USIM_DATA 45 IO
(U)SIM card
For 3.0V (U)SIM:
VILmax=1.0V
VIHmin=1.95V
VOLmax=0.45V
VOHmin=2.55V
For 1.8V (U)SIM:
VOLmax=0.45V
VOHmin=1.35V
Clock signal of
USIM_CLK 46 DO
(U)SIM card
For 3.0V (U)SIM:
VOLmax=0.45V
VOHmin=2.55V
Specified
USIM_GND 47 ground for
(U)SIM card
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UART1 Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin=-0.3V
Data terminal 1.8V power domain.
VILmax=0.6V
DTR 30 DI ready(sleep If unused, keep this pin
VIHmin=1.2V
mode control) open.
VIHmax=2.0V
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
RXD 34 DI Receive data If unused, keep this pin
VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
VOLmax=0.45V
TXD 35 DO Transmit data If unused, keep this pin
VOHmin=1.35V
open.
1.8V power domain.
VOLmax=0.45V
CTS 36 DO Clear to send If unused, keep this pin
VOHmin=1.35V
open.
VILmin=-0.3V
1.8V power domain.
Request to VILmax=0.6V
RTS 37 DI If unused, keep this pin
send VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
Data carrier VOLmax=0.45V
DCD 38 DO If unused, keep this pin
detection VOHmin=1.35V
open.
1.8V power domain.
VOLmax=0.45V
RI 39 DO Ring indicator If unused, keep this pin
VOHmin=1.35V
open.
UART2 Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
DBG_RXD 22 DI Receive data If unused, keep this pin
VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
VOLmax=0.45V
DBG_TXD 23 DO Transmit data If unused, keep this pin
VOHmin=1.35V
open.
UART3 Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
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PCM* Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
1.8V power domain.
PCM clock VOLmax=0.45V
PCM_CLK* 4 DO If unused, keep this pin
output VOHmin=1.35V
open.
PCM frame 1.8V power domain.
VOLmax=0.45V
PCM_SYNC* 5 DO synchronization If unused, keep this pin
VOHmin=1.35V open.
output
VILmin=-0.3V
1.8V power domain.
VILmax=0.6V
PCM_IN* 6 DI PCM data input If unused, keep this pin
VIHmin=1.2V
open.
VIHmax=2.0V
1.8V power domain.
PCM data VOLmax=0.45V
PCM_OUT* 7 DO If unused, keep this pin
output VOHmin=1.35V
open.
I2C* Interface
DC
Pin Name Pin No. I/O Description Comment
Characteristics
External pull-up resistor is
I2C serial clock.
required.
I2C_SCL* 40 OD Used for
1.8V only. If unused, keep
external codec.
this pin open.
External pull-up resistor is
I2C serial data.
required.
I2C_SDA* 41 OD Used for
1.8V only. If unused, keep
external codec.
this pin open.
Antenna Interfaces
DC
Pin Name Pin No. I/O Description Comment
Characteristics
Main antenna
ANT_MAIN 60 IO 50Ω impedance
interface
GNSS antenna If unused, keep this pin
ANT_GNSS 49 AI 50Ω impedance
interface open.
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Other Pins
DC
Pin Name Pin No. I/O Description Comment
Characteristics
1.8V power domain.
1)
Power saving VOLmax=0.45V
PSM_IND 1 DO If unused, keep this pin
mode indicator VOHmin=1.35V
open.
1.8V power domain.
Pull-up by default.
VILmin=-0.3V
In low voltage level, the
Airplane mode VILmax=0.6V
W_DISABLE#* 18 DI module can enter into
control VIHmin=1.2V
airplane mode.
VIHmax=2.0V
If unused, keep this pin
open.
VILmin=-0.3V
Application 1.8V power domain.
VILmax=0.6V
AP_READY* 19 DI processor sleep If unused, keep this pin
VIHmin=1.2V
state detection open.
VIHmax=2.0V
Force the VILmin=-0.3V
1.8V power domain.
module to enter VILmax=0.6V
USB_BOOT 75 DI If unused, keep this pin
into emergency VIHmin=1.2V
open.
download mode VIHmax=2.0V
VOLmax=0.45V
VOHmin=1.35V
General- 1.8V power domain.
VILmin=-0.3V
GPIO26 26 IO purpose input/ If unused, keep this pin
VILmax=0.6V
output interface open.
VIHmin=1.2V
VIHmax=2.0V
VOLmax=0.45V
VOHmin=1.35V
General- 1.8V power domain.
VILmin=-0.3V
GPIO64 64 IO purpose input/ If unused, keep this pin
VILmax=0.6V
output interface open.
VIHmin=1.2V
VIHmax=2.0V
ADC Interfaces*
DC
Pin Name Pin No. I/O Description Comment
Characteristics
General
purpose analog
Voltage range: If unused, keep this pin
ADC1* 2 AI to digital
0.3V to 1.8V open.
converter
interface
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General
purpose analog
Voltage range: If unused, keep this pin
ADC0* 24 AI to digital
0.3V to 1.8V open.
converter
interface
RESERVED Pins
DC
Pin Name Pin No. I/O Description Comment
Characteristics
11~14, 16,
25, 51, 56,
57, 63, 65, Keep these pins
RESERVED Reserved
66, 76~78, unconnected.
83~88,
92~99
NOTES
The table below briefly summarizes the various operating modes referred in the following chapters.
Mode Details
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Airplane AT+CFUN command or W_DISABLE#* pin can set the module into airplane mode. In this
Mode case, RF function will be invalid.
Minimum
AT+CFUN command can set the module into a minimum functionality mode without
Functionality
removing the power supply. In this case, both RF function and (U)SIM card will be invalid.
Mode
In this mode, the current consumption of the module will be reduced to a lower level.
Sleep Mode During this mode, the module can still receive paging message, SMS and TCP/UDP data
from the network normally.
Power Saving BG96 module may enter into Power Saving Mode for reducing its power consumption.
Mode PSM is similar to power-off, but the module remains registered on the network and there
(PSM) is no need to re-attach or re-establish PDN connections.
In this mode, the power management unit shuts down the power supply. Software is not
Power OFF
active. The serial interfaces are not accessible. But operating voltage (connected to
Mode
VBAT_RF and VBAT_BB) remains applied.
NOTES
1. During e-I-DRX, it is recommended to use UART interface for data communication, as the use of USB
interface will increase power consumption.
2. “*” means under development.
When the module enters into airplane mode, the RF function does not work, and all AT commands
correlative with RF function will be inaccessible. This mode can be set via the following ways.
Hardware:
W_DISABLE#* is pulled up by default. Driving it to low level will let the module enter into airplane mode.
Software:
AT+CFUN=<fun> command provides choice of the functionality level, through setting <fun> into 0, 1 or 4.
AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled.
AT+CFUN=1: Full functionality mode (by default).
AT+CFUN=4: Airplane mode. RF function is disabled.
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NOTES
1. Airplane mode control via W_DISABLE# is disabled in firmware by default. It can be enabled by
AT+QCFG=“airplanecontrol” command. The command is still under development.
2. The execution of AT+CFUN command will not affect GNSS function.
3. “*” means under development.
BG96 module can enter into PSM for reducing its power consumption. The mode is similar to power-off,
but the module remains registered on the network and there is no need to re-attach or re-establish PDN
connections. So BG96 in PSM cannot immediately respond users’ requests.
When the module wants to use the PSM it shall request an Active Time value during every Attach and
TAU procedures. If the network supports PSM and accepts that the module uses PSM, the network
confirms usage of PSM by allocating an Active Time value to the module. If the module wants to change
the Active Time value, e.g. when the conditions are changed in the module, the module consequently
requests the value it wants in the TAU procedure.
If PSM is supported by the network, then it can be enabled via AT+CPSMS command.
Either of the following methods will wake up the module from PSM:
NOTE
The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX
for reducing its power consumption, while being available for mobile terminating data and/or network
originated procedures within a certain delay dependent on the DRX cycle value.
Applications that want to use e-I-DRX need to consider specific handling of mobile terminating services or
data transfers, and in particular they need to consider the delay tolerance of mobile terminated data.
In order to negotiate the use of e-I-DRX, the UE requests e-I-DRX parameters during attach procedure
and RAU/TAU procedure. The EPC may reject or accept the UE request for enabling e-I-DRX. In case the
EPC accepts e-I-DRX, the EPC based on operator policies and, if available, the e-I-DRX cycle length
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value in the subscription data from the HSS, may also provide different values of the e-I-DRX parameters
than what was requested by the UE. If the EPC accepts the use of e-I-DRX, the UE applies e-I-DRX
based on the received e-I-DRX parameters. If the UE does not receive e-I-DRX parameters in the
relevant accept message because the EPC rejected its request or because the request was received by
EPC not supporting e-I-DRX, the UE shall apply its regular discontinuous reception.
NOTE
BG96 is able to reduce its current consumption to a lower value during the sleep mode. The following
sub-chapters describe the power saving procedure of BG96 module.
If the host communicates with module via UART interface, the following preconditions can let the module
enter into sleep mode.
The following figure shows the connection between the module and the host.
Module Host
RXD TXD
TXD RXD
RI EINT
DTR GPIO
AP_READY GPIO
GND GND
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Driving the host DTR to low level will wake up the module.
When BG96 has URC to report, RI signal will wake up the host. Please refer to Chapter 3.14 for
details about RI behavior.
AP_READY will detect the sleep state of the host (can be configured to high level or low level
detection). Please refer to AT+QCFG=“apready” command for details.
NOTE
BG96 provides the following four VBAT pins for connection with an external power supply. There are two
separate voltage domains for VBAT.
The following table shows the details of VBAT pins and ground pins.
The power supply range of the module is from 3.3V to 4.3V. Please make sure that the input voltage will
never drop below 3.3V.
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To decrease voltage drop, a bypass capacitor of about 100µF with low ESR should be used, and a
multi-layer ceramic chip capacitor (MLCC) array should also be reserved due to its low ESR. It is
recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array, and
place these capacitors close to VBAT pins. The main power supply from an external application has to be
a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB
trace should be no less than 1mm, and the width of VBAT_RF trace should be no less than 2mm. In
principle, the longer the VBAT trace is, the wider it will be.
In addition, in order to get a stable power source, it is suggested to use a zener diode with reverse zener
voltage of 5.1V and dissipation power more than 0.5W, and place it as close to the VBAT pins as possible.
The following figure shows the star structure of the power supply.
VBAT
VBAT_RF
VBAT_BB
+ +
D1 C1 C2 C3 C4 C5 C6 C7 C8
Module
AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to
document [2].
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When BG96 is in power off mode, it can be turned on to normal mode by driving the PWRKEY pin to a low
level for at least 100ms. It is recommended to use an open drain/collector driver to control the PWRKEY.
After STATUS pin outputting a high level, PWRKEY pin can be released. A simple reference circuit is
illustrated in the following figure.
PWRKEY
≥100ms
4.7K
10nF
Turn on pulse
47K
Another way to control the PWRKEY is using a button directly. When pressing the key, electrostatic strike
may generate from the finger. Therefore, a TVS component is indispensable to be placed nearby the
button for ESD protection. A reference circuit is shown in the following figure.
S1
PWRKEY
TVS
Close to S1
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NOTE
VBAT ≥100ms
VIH≥1.3V
PWRKEY VIL≤0.5V
RESET_N
≥ 4.8s
STATUS
(DO)
≥ 4.2s
≥ 4.9s
NOTE
Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than
30ms.
Either of the following methods can be used to turn off the module:
Normal power down procedure: Turn off the module using the PWRKEY pin.
Normal power down procedure: Turn off the module using AT+QPOWD command.
Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-down
procedure after the PWRKEY is released.
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VBAT
≥ 650ms ≥ 2s
PWRKEY
STATUS
It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the
module via PWRKEY pin.
The RESET_N pin can be used to reset the module. The module can be reset by driving RESET_N to a
low level voltage for time between 150ms and 460ms.
VIHmax=2.1V
Reset signal of the
RESET_N 17 VIHmin=1.3V
module
VILmax=0.5V
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The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.
RESET_N
150~460ms
4.7K
Reset pulse
47K
S2
RESET_N
TVS
Close to S2
VBAT
≤460ms
≥150ms
RESET_N VIH≥1.3V
VIL≤0.5V
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NOTES
1. Use RESET_N only when turning off the module by AT+QPOWD command and PWRKEY pin both
failed.
2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.
The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards
are supported.
USIM_
42 DI (U)SIM card insertion detection
PRESENCE
Specified ground for (U)SIM
USIM_GND 47
card
BG96 supports (U)SIM card hot-plug via the USIM_PRESENCE pin. The function supports low level and
high level detections, and is disabled by default. Please refer to document [2] about AT+QSIMDET
command for details.
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The following figure shows a reference design of (U)SIM interface with an 8-pin (U)SIM card connector.
VDD_EXT USIM_VDD
51K 15K
USIM_GND 100nF (U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
USIM_PRESENCE 0R
USIM_DATA 0R
GND
33pF 33pF 33pF
GND GND
Figure 12: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector
If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A
reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following
figure.
USIM_VDD
15K
USIM_GND 100nF
(U)SIM Card Connector
USIM_VDD
VCC GND
USIM_RST 0R
RST VPP
Module USIM_CLK
CLK IO
0R
USIM_DATA 0R
GND GND
Figure 13: Reference Circuit of (U)SIM Interface with a 6-Pin (U)SIM Card Connector
In order to enhance the reliability and availability of the (U)SIM card in applications, please follow the
criteria below in (U)SIM circuit design:
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Keep placement of (U)SIM card connector as close to the module as possible. Keep the trace length
as less than 200mm as possible.
Keep (U)SIM card signals away from RF and VBAT traces.
Assure the ground between the module and the (U)SIM card connector short and wide. Keep the
trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential.
Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it as
close to (U)SIM card connector as possible. If the system ground plane is complete, USIM_GND can
be connected to the system ground directly.
To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and
shield them with surrounded ground. USIM_RST should also be ground shielded.
In order to offer good ESD protection, it is recommended to add a TVS diode array with parasitic
capacitance not exceeding 15pF. In order to facilitate debugging, it is recommended to reserve series
resistors for the (U)SIM signals of the module. The 33pF capacitors are used for filtering interference
of GSM 900MHz. Please note that the (U)SIM peripheral circuit should be close to the (U)SIM card
connector.
The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace
and sensitive occasion are applied, and should be placed close to the (U)SIM card connector.
BG96 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0
specification and supports high-speed (480Mbps) and full-speed (12Mbps) modes. The USB interface is
used for AT command communication, data transmission, software debugging and firmware upgrade. The
following table shows the pin definition of USB interface.
Require differential
USB_DP 9 IO USB differential data bus (+)
impedance of 90Ω
Require differential
USB_DM 10 IO USB differential data bus (-)
impedance of 90Ω
GND 3 Ground
For more details about USB 2.0 specification, please visit http://www.usb.org/home.
The USB interface is recommended to be reserved for firmware upgrade in customers’ designs. The
following figure shows a reference circuit of USB interface.
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Test Points
Minimize these stubs
Module R3 NM_0R
MCU
VDD R4 NM_0R
R1 0R USB_DM
USB_DM
R2 0R
USB_DP USB_DP
In order to ensure signal integrity of USB data lines, components R1, R2, R3 and R4 must be placed
close to the module, and also should be placed close to each other. The extra stubs of traces must be as
short as possible.
The following principles should be complied with when design the USB interface, so as to meet USB 2.0
specification.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90Ω.
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layers but also right and left sides.
Pay attention to the influence of junction capacitance of ESD protection components on USB data
lines. Typically, the capacitance value should be less than 2pF.
Keep the ESD protection components as close to the USB connector as possible.
NOTE
The module provides three UART interfaces: UART1, UART2 and UART3 interfaces. The following are
their features.
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UART1 interface supports 9600, 19200, 38400, 57600, 115200, 230400, 460800 and 921600 baud
rates, and the default is 115200bps. It is used for data transmission and AT command
communication.
UART2 interface supports 115200bps baud rate. It is used for module debugging and log output.
UART3 interface supports 115200bps baud rate. It is used for outputting GNSS data and NEMA
sentences.
The following tables show the pin definition of the three UART interfaces.
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VOL 0 0.45 V
The module provides 1.8V UART interface. A level translator should be used if customers’ application is
equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments is
recommended. The following figure shows a reference design.
RI A1 B1 RI_MCU
DCD A2 B2 DCD_MCU
CTS A3 Translator B3 CTS_MCU
RTS A4 B4 RTS_MCU
DTR A5 B5 DTR_MCU
TXD A6 B6 TXD_MCU
RXD A7 B7 RXD_MCU
51K 51K
A8 B8
Another example with transistor translation circuit is shown as below. The circuit design of dotted line
section can refer to that of solid line section, in terms of both module input and output circuit designs, but
please pay attention to the direction of connection.
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4.7K
VDD_EXT VDD_EXT
1nF
MCU/ARM Module
10K
TXD RXD
RXD TXD
1nF
10K
VDD_EXT
VCC_MCU 4.7K
RTS RTS
CTS CTS
GPIO DTR
EINT RI
GPIO DCD
GND GND
NOTE
Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps.
BG96 provides one Pulse Code Modulation (PCM*) digital interface and one I2C* interface. The following
table shows the pin definition of the two interfaces which can be applied on audio codec design.
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The following figure shows a reference design of PCM* and I2C* interfaces with an external codec IC.
MICBIAS
INP
BIAS
INN
PCM_CLK BCLK
PCM_SYNC WCLK
PCM_IN ADC
PCM_OUT DAC
LOUTP
I2C_SCL SCL
I2C_SDA SDA LOUTN
Module Codec
4.7K
4.7K
1.8V
NOTE
BG96 provides one network status indication pin: NETLIGHT. The pin is used to drive a network status
indication LED. The following tables describe the pin definition and logic level changes of NETLIGHT in
different network activity status.
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VBAT
Module
2.2K
4.7K
NETLIGHT
47K
3.13. STATUS
The STATUS pin is used to indicate the operation status of BG96 module. It will output high level when
the module is powered on.
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VBAT
Module
2.2K
4.7K
STATUS
47K
3.14. Behaviors of RI
No matter on which port URC is presented, URC will trigger the behavior of RI pin.
NOTE
URC can be outputted from UART port, USB AT port and USB modem port, through configuration via
AT+QURCCFG command. The default port is USB AT port.
State Response
The default RI behaviors can be configured flexibly by AT+QCFG=“urc/ri/ring” command. For more
details, please refer to document [2].
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BG96 provides a USB_BOOT pin. During development or factory production, USB_BOOT can force the
module to boot from USB port for firmware upgrade.
Module
VDD_EXT
Test point 10K
USB_BOOT
NOTE
The module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 command can be
used to read the voltage value on ADC0 pin. AT+QADC=1 command can be used to read the voltage
value on ADC1 pin. For more details about these AT commands, please refer to document [2].
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In order to improve the accuracy of ADC voltage values, the trace of ADC should be surrounded by
ground.
NOTES
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4 GNSS Receiver
BG96 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of
Qualcomm (GPS, GLONASS, BeiDou/Compass, Galileo and QZSS).
BG96 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via
USB interface by default.
By default, BG96 GNSS engine is switched off. It has to be switched on via AT command. For more
details about GNSS engine technology and configurations, please refer to document [3].
Autonomous 31 s
Cold start
@open sky
XTRA* enabled TBD s
TTFF
Autonomous 21 s
(GNSS) Warm start
@open sky
XTRA* enabled TBD s
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Accuracy Autonomous
CEP-50 < 2.5 m
(GNSS) @open sky
NOTES
1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep
on positioning for 3 minutes.
2. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can
fix position again within 3 minutes after loss of lock.
3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixes
position within 3 minutes after executing cold start command.
4. “*” means under development.
The following layout guidelines should be taken into account in customers designs.
Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information.
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5 Antenna Interfaces
BG96 includes a main antenna interface and a GNSS antenna interface. The antenna ports have an
impedance of 50Ω.
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A reference design of main antenna pad is shown as below. A π-type matching circuit should be reserved
for better RF performance, and the π-type matching components (R1/C1/C2) should be placed as close
to the antenna as possible. The capacitors are not mounted by default.
Main
antenna
Module
R1 0R
ANT_MAIN
C1 C2
NM NM
For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. The
impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant,
the distance between signal layer and reference ground (H), and the clearance between RF trace and
ground (S). Microstrip line or coplanar waveguide line is typically used in RF layout for characteristic
impedance control. The following are reference designs of microstrip line or coplanar waveguide line with
different PCB structures.
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Figure 24: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground)
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Figure 25: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground)
In order to ensure RF performance and reliability, the following principles should be complied with in RF
layout design:
Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω.
The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
The distance between the RF pins and the RF connector should be as short as possible, and all the
right angle traces should be changed to curved ones.
There should be clearance area under the signal pin of the antenna connector or solder joint.
The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around
RF traces and the reference ground could help to improve RF performance. The distance between
the ground vias and RF traces should be no less than two times the width of RF signal traces (2*W).
The following tables show the pin definition and frequency specification of GNSS antenna interface.
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VDD
GNSS
0.1uF
Antenna 10R
Module
47nH
100pF
ANT_GNSS
NM NM
NOTES
1. An external LDO can be selected to supply power according to the active antenna requirement.
2. If the module is designed with a passive antenna, then the VDD circuit is not needed.
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The following table shows the requirements on main antenna and GNSS antenna.
VSWR: ≤ 2
Gain (dBi): 1
Max Input Power (W): 50
Input Impedance (Ω): 50
Polarization Type: Vertical
LTE/GSM Antenna
Cable Insertion Loss: < 1dB
(LTE B5/B8/B12/B13/B18/B19/B20/B26/B28
GSM850/GSM900)
Cable Insertion Loss: < 1.5dB
(LTE B1/B2/B3/B4/B39, DCS1800/PCS1900)
Frequency range: 1561~1615MHz
Polarization: RHCP or linear
VSWR: < 2 (Typ.)
Passive antenna gain: > 0dBi
GNSS Antenna
Active antenna noise figure: < 1.5dB
Active antenna gain: > -2dBi
Active antenna embedded LNA gain: 20dB (Typ.)
Active antenna total gain: > 18dBi (Typ.)
If RF connector is used for antenna connection, it is recommended to use the U.FL-R-SMT connector
provided by HIROSE.
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U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.
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Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are
listed in the following table.
VBAT_RF -1.2 6 V
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The operation and storage temperatures of the module are listed in the following table.
NOTES
1) Within
1. operation temperature range, the module is 3GPP compliant.
2)
2. Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There
are also no effects on radio spectrum and no harm to radio network. Only one or more parameters
like Pout might reduce in their value and exceed the specified tolerances. When the temperature
returns to the normal operating temperature levels, the module will meet 3GPP specifications again.
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Quiescent
AT+CFUN=0 0.8 1) mA
Current
@Real 2G Network 15 3) mA
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LTE Voice
Voice @LTE Cat M1 network 108 mA
(GNSS OFF)
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NOTES
1)
1. Typical value with USB and UART disconnected.
2)
2. Sleep state with UART connected and USB disconnected. The module can enter into sleep state
through executing AT+QSCLK=1 command via UART interface and then controlling the module’s
DTR pin. For details, please refer to Chapter 3.4.4.
3. 3) Standby state with UART connected and USB disconnected.
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The following table shows the conducted RF receiving sensitivity of BG96 module.
Sensitivity (dBm)
Network Band Primary Diversity
Cat M1/3GPP Cat NB11)/3GPP
Sensitivity (dBm)
Network Band Primary Diversity
GSM/3GPP
GSM850/GSM900 -109/-102
Not
GSM Supported
Supported
DCS1800/PCS1900 -108.5/-102
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NOTE
1)
LTE Cat NB1 receiving sensitivity without repetitions.
The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject
to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and
packaging procedures must be applied throughout the processing, handling and operation of any
application that incorporates the module.
The following table shows the electrostatic discharge characteristics of BG96 module.
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7 Mechanical Dimensions
This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm,
and the tolerances for dimensions without tolerance values are ±0.05mm.
22.50±0.15 2.3±0.2
26.50±0.15
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NOTES
1. For easy maintenance of the module, please keep about 3mm between the module and other
components on the host PCB.
2. All reserved pins must be kept open.
3. The thickness of stencil should be stepped-up to 0.18mm. The stencil openings should be shrunken
inward by 0.30mm and moved outward by 0.40mm. Cut four 1.00×1.00mm openings with 0.05mm
square chamfer on the pads in the center.
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NOTE
These are design effect drawings of BG96 module. For more accurate pictures, please refer to the
module that you get from Quectel.
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8.1. Storage
BG96 is stored in a vacuum-sealed bag. The storage restrictions are shown as below.
2. After the vacuum-sealed bag is opened, devices that will be subjected to reflow soldering or other
high temperature processes must be:
When the ambient temperature is 23ºC±5ºC and the humidity indication card shows the humidity
is >10% before opening the vacuum-sealed bag.
Device mounting cannot be finished within 168 hours at factory conditions of ≤30ºC/60%
NOTE
As the plastic package cannot be subjected to high temperature, it should be removed from devices
before high temperature (125ºC) baking. If shorter baking time is desired, please refer to
IPC/JEDECJ-STD-033 for baking procedure.
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Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the
stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly
so as to produce a clean stencil surface on a single pass. To ensure the module soldering quality, the
thickness of stencil for the module is recommended to be 0.18mm. For more details, please refer to
document [5].
It is suggested that the peak reflow temperature is 235~245ºC (for SnAg3.0Cu0.5 alloy). The absolute
max reflow temperature is 260ºC. To avoid damage to the module caused by repeated heating, it is
suggested that the module should be mounted after reflow soldering for the other side of PCB has been
completed. Recommended reflow soldering thermal profile is shown below.
ºC
Preheat Heating Cooling
250
Liquids Temperature
217
200
200ºC
40s~60s
160ºC
Temperature
150
70s~120s
100
Between 1~3ºC/s
50
Time
8.3. Packaging
BG96 is packaged in a vacuum-sealed bag which is ESD protected. The bag should not be opened until
the devices are ready to be soldered onto the application.
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The reel is 330mm in diameter and each reel contains 250 modules. The following figures show the
packaging details, measured in mm.
48.5
Cover tape
13
Direction of feed
100
44.5+0.20
-0.00
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Model Name MOQ for MP Minimum Package: 250pcs Minimum Package x 4=1000pcs
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9 Appendix A References
Abbreviation Description
CS Coding Scheme
DL Downlink
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FR Full Rate
I/O Input/Output
MO Mobile Originated
MT Mobile Terminated
RF Radio Frequency
Rx Receive
TX Transmitting Direction
UL Uplink
UE User Equipment
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USF 3 3 3 3
Pre-coded USF 3 6 6 12
BCS 40 16 16 16
Tail 4 4 4 -
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1 1 1 2
2 2 1 3
3 2 2 3
4 3 1 4
5 2 2 4
6 3 2 4
7 3 3 4
8 4 1 5
9 3 2 5
10 4 2 5
11 4 3 5
12 4 4 5
13 3 3 NA
14 4 4 NA
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15 5 5 NA
16 6 6 NA
17 7 7 NA
18 8 8 NA
19 6 2 NA
20 6 3 NA
21 6 4 NA
22 6 4 NA
23 6 6 NA
24 8 2 NA
25 8 3 NA
26 8 4 NA
27 8 4 NA
28 8 6 NA
29 8 8 NA
30 5 1 6
31 5 2 6
32 5 3 6
33 5 4 6
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Coding
Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot
Schemes
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