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Published in IET Power Electronics
Received on 24th December 2012
Revised on 14th July 2013
Accepted on 2nd August 2013
doi: 10.1049/iet-pel.2012.0749

ISSN 1755-4535

Modelling and control of a DC–DC quadratic boost

converter with R 2P 2
Jorge Alberto Morales-Saldaña1, Rodrigo Loera-Palomo1, Elvia Palacios-Hernández2,
Jorge Luis González-Martínez1
1
Facultad de Ingeniería, Universidad Autónoma de San Luis Potosí, Av. Dr. Manuel Nava No. 8, San Luis Potosí, S.L.P.,
78290 México
2
Facultad de Ciencias, Universidad Autónoma de San Luis Potosí, Av. Dr. Salvador Nava S/N, San Luis Potosí, S.L.P.,
78290 México
E-mail: jmorales@uaslp.mx

Abstract: In the past years, the development of topologies with step-up capacities has been important to satisfy the new
requirement of renewable source energy. This study presents a quadratic boost converter based on the reduced redundant
power processing (R 2P 2) principle, well as the controller design methodology using current-programmed control to satisfy the
specifications of output voltage regulation. Non-linear and linear models are developed; the latter exhibits fourth-order
characteristic dynamics with complex right-half plane zeros. In the proposed control scheme, the current of the switch is used
for feedback purposes. When the current loop is implemented, the fourth-order dynamics are changed to a dominant first
order, which simplifies the controller design of outer loop. For this loop, a conventional controller is designed. At the end,
experimental results are given for a 23 W quadratic boost converter, where open-loop and closed-loop responses are compared.

1 Introduction with a boost converter, voltage multipliers and coupled

During the past two decades, a great number of applications
for DC − DC converters have been reported [1, 2].
Currently, there is a growing interest in DC–DC conversion
systems because of the auge, which led to the use of
renewable energy and mobile power systems. New
technological developments require power supplies with
large step-up voltages, for example, in uninterrupted power
supply, fuel cells, embedded and photovoltaic systems,
where conversion efficiency is the most important
requirement, followed by converter cost and size [3, 4].
There are applications where the DC–DC basic converters
are not suitable, because they should operate at extremely
high duty ratios with the corresponding limitations on the
finite commutation times of the switching devices.
Therefore alternative topologies need to be considered
[5–7]. An alternate topology that provides a wider voltage
ratio is the connection of two or more basic DC − DC
converters in cascade; however, there is an increase in
power losses [7, 8]. Moreover, the input power is processed
twice by converters in cascade before reaching the load,
resulting in low efficiency.
In recent years, there have been a large number of
topologies that result in structures with high conversion
ratio. In [9, 10], a topology is suggested of a DC–DC boost
converter in combination with switching capacitors for a
system with large conversion ratios. These topologies are
constructed with a combination of basic converters
multiplying cells. In [11–13], topologies are given built
inductors for large ratios. Another aspect regarding the
converters with high transformation ratio is the use of soft
switching techniques, with this significantly improves the
conversion ratio [14]. The parallel interconnection of
switching converters is a strategy widely used to improve
the performance of the arrangements. In [15], a scheme is
proposed for multi input converters with high conversion
ratios for photovoltaic applications.
The quadratic boost converter [2] is a more reliable
topology that reduces the number of driver circuits Fig. 1b.
These advantages are the use of a single switch. However,
this topology is structurally similar to cascade configuration.
In the past years, quadratic converters have had been
reported [16], but it is difficult to find a discussion of
models [17] and some controller designs have been
proposed for a quadratic buck converter [8, 16] and
quadratic boost converter [18, 19]. Controller design has
been discussed in [20] for two stage DC–DC converters,
where a buck converter is used in the first stage and an
isolated converter for the second stage. The development of
new topologies of DC–DC converters has had a great
interest in power-processing applications, where these
converters should exhibit wider conversion ratio and higher
efficiency. This paper presents a topology of quadratic
boost converter based on the reduced redundant power
processing (R 2P 2) principle [21, 22]. The resulting topology
has the next characteristics: a single-switch, a quadratic
voltage conversion, and more efficient theoretically.
Additionally, in this paper is given a controller design

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Fig. 1 Quadratic boost converter circuit
a With two switches
b Single-switch
methodology for the converter using current-programmed
control. Note that this control technique has been widely
used for the control of DC–DC converters, where an inner
current loop is designed to maximise the bandwidth of
closed loop and a voltage external loop is implemented to
satisfy the regulation conditions. Also, in basic converters,
the current loop changes the second-order dynamics of the
converter to a dominant first-order dynamics. However, this
behaviour is not clear in more complex topologies.
The remainder of this paper is organised as follows.
In Section 2, a brief description about the R 2P 2 principle is
given. The operation and analysis of the quadratic boost
converter is presented in Section 3. The state-space
averaged and lineal models of quadratic boost are presented
in Section 4. A controller design procedure is developed in
Section 5 and the experimental results are given in Section
6. This paper concludes with some remarks in Section 7.
2 Switching converters with reduced
redundant power processing (R 2P 2)
The R 2P 2 principle was proposed in [21] for switching
converters with power factor correction and voltage
regulation, which are called power factor correction (PFC)
regulators. These PFC regulators are composed by two
basic DC–DC switching converters connected in
non-cascading configuration. In [22], a study is presented
about the characteristics and properties that new topologies
of converters should to satisfy to obtain schemes with these
requirements. A result of this study is that PFC regulator
can be constructed by selecting appropriate configurations
that minimise redundant processing of the constituent
converters. It is important to point out that these systems
were proposed for AC − DC applications; however, they
can be applied to DC − DC applications. In [23], a
systematic procedure is proposed to obtain a general
representation of several configurations of switching
converters based on R 2P 2 principle. The procedure is
developed from signal flow graphs methodology, using this
are obtained static and dynamic characteristics of
converters. The current work presents the practical design
and implementation of DC − DC quadratic boost converter
based R 2P 2 principle, which has the power flow showing in
Fig. 2a. Specifically, the DC–DC converter studied in this
paper belongs to the configuration Types I–IIA described in
[21, 22]. We will examine the conversion rate, continuous
conduction mode (CCM) conditions and it is proposed a
12
& The Institution of Engineering and Technology 2013
Fig. 2 Quadratic boost converter with R2P2
a Power flow diagram
b Schematic diagram
controller design methodology using a current-programmed
mode control for output voltage regulation.
The quadratic boost converter with R 2P 2 under study
consists of a buck–boost converter as converter 1 and boost
converter as converter 2; see Fig. 2b. Both converters are
operated in CCM. Here the input power (Pi) is split by k
factor, where the buck–boost converter processes the kPi
and the power (1 − k)Pi is transferred to output converter
which is the boost converter. The output port of buck–boost
converter is connected to capacitor C1. The input voltage of
boost converter corresponds to sum of input voltages E and
VC1. The output port of array is connected to output
capacitor and load, where the output voltage corresponds to
output voltage of boost converter.
3 Quadratic boost converter with R 2P 2
Based on the power flow description and synthesis procedure
presented [21, 22], we can construct circuits using two simple
converters. In the case of configuration I–IIA, a practical
circuit is shown in Fig. 3a, such realisation requires two
switches where the subindexes correspond to the constituent
converters and the control signal of these corresponds to d1
and d2. Now, under the consideration that the two active
switches are synchronised, the control signals d1 and d2 can
be represented by a unique control signal d. In addition,
the number of switches can be reduced to one, that is, the
function of switch Q1 on Fig. 3a can be realised by the
diode D3 of Fig. 3b. Note that two topologies with ideal
switches are electrically equivalents and exhibit similar
operation modes, which are shown in Fig. 4. The first mode
corresponds when the switch is on, during ton seconds,
where the relation D = ton/Ts is the nominal duty ratio and
Ts switching period. In the next operation mode, the switch
is ‘off during’ (1 − D)Ts seconds.
The operation modes are described next. During the
switch-on state, the inductor L1 is connected to input
voltage E and the inductor L2 exhibits the resulting voltage
of E + VC1, whereas the capacitor C2 transfers the power to
load R and the capacitor C1 transfers the power to inductor
L2 in Fig. 4a. In this mode, the corresponding differential
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Fig. 3 Quadratic boost converter with R2P2

a With two switches
b Single switch

equations are In addition, the relation of voltage and current ripples are
E ⎫ obtained with (1) and (2) which are useful for the design of
i̇L1 = ⎪
⎪ the converter. The voltage ripple relations are given by
⎪
⎪
L1 ⎪
⎪
E + vC1 ⎪
⎪
⎪
⎪ DETs DETs
i̇L2 = ⎬ DvC1 = DvC2 = (4)
L2
(1) (1 − D)3 RC1 (1 − D)2 RC2
i ⎪
v̇C1 = − L2 ⎪ ⎪
⎪
C1 ⎪ ⎪
⎪ The current ripple relations are
vC2 ⎪
⎪
⎪
v̇C2 = − ⎭
C2 R DETs DETs
DiL1 = DiL2 = (5)
L1 (1 − D)L2
When the switch turns off, the inductor currents close the
diodes D2 and D1, where the current iL1 is transferred to
capacitor C1, whereas the current iL2 is transferred to C2 A relevant factor for designing converters is the variation of
and R, Fig. 4b. The corresponding differential equations are inductor current and variation of capacitor voltage, this
factor corresponds to a relation between the ripple value
v ⎫
i̇L1 = − C1 ⎪ and steady-state value. The variations of inductor currents are
⎪
⎪
L1 ⎪
⎪
E + vC1 − vC2 ⎪
⎪
⎪
⎪ DiL1 /2 D(1 − D)4 Ts R
i̇L2 = ⎪
⎬ z1 = =
L2 IL1 2L1
i − iL2 (2) (6)
v̇C1 = L1 ⎪
⎪
⎪
⎪ Di /2 D(1 − D)2 Ts R
C1 ⎪
⎪ z2 = L2 =
⎪
⎪ IL2 2L2
iL2 vC2 ⎪
⎪
v̇C2 = − ⎭
C2 C2 R
The variations of capacitor voltages are

Assuming that turn-on and turn-off transitions of all diodes DvC1 /2 Ts

are synchronous with switching transitions of the switch Q, s1 = =
VC1 2(1 − D)2 RC1
the steady-state conditions are obtained using (1) and (2), (7)
where the average inductor voltages and capacitor currents Dv /2 DTs
s2 = C2 =
over a period are zero. Thus VC2 2RC2

E E To describe the behaviour of the converter, it is assumed that

IL1 = , IL2 =
(1 − D)4 R (1 − D)3 R it operates in CCM. This condition assumes that the current
(3) ripple is smaller than the DC component of inductor
ED E
VC1 = , V0 = VC2 = current; therefore the total current is always positive and the
(1 − D) (1 − D)2 diodes are forced to be ‘on’ when the transistor is ‘off’. The

Fig. 4 Operation modes of quadratic boost converter with R2P2

a Switch on
b Switch off

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above condition will be satisfied when where d is a variable denoting the time-varying duty cycle of
the PWM control signal for Q. Rewritten (10) and assuming
(1 − D)4 RD that 〈iL1〉 → iL1; 〈iL2〉 → iL2; 〈vC1〉 → vC1; and 〈vC2〉 → vC2.
L1 . , The state-space averaged model is given by
2fs
(8) ⎡ ⎤ ⎡ ⎤
(1 − D)2 RD 1−d ⎡ ⎤
L2 . i̇L1 0 0 − 0 iL1
⎢ ⎥ ⎢ L1 ⎥
2fs ⎢ ⎥ ⎢ ⎥⎢ ⎥
⎢ ⎥ ⎢ 1 1−d⎥ ⎢ ⎥
⎢ i̇L2 ⎥ ⎢ − ⎥⎢ ⎥
⎥ ⎢ L2 ⎥⎢
⎥ ⎥
0 0 iL2
⎢
where fs corresponds to switching frequency and D is nominal ⎢ ⎥=⎢
⎢
L2
⎥⎢
⎢ ⎥
⎥
duty ratio, which corresponds to the relation D = ton/Ts where ⎢ ⎥ ⎢1 − d 1 ⎥⎢ ⎥
⎢ ⎥ ⎢ − 0 0 ⎥⎢ ⎥
ton is conduction time of active switch and R is the load ⎢ v̇C1 ⎥ ⎢ C ⎥⎢ vC1 ⎥
⎢ ⎥ ⎢ 1 C1 ⎥⎣ ⎦
resistance. ⎣ ⎦ ⎣ 1−d 1 ⎦
Comparing the operation of quadratic boost converter with v̇C2 0 0 − vC2
R 2P 2 and the quadratic boost converter given in [18], the C2 C2 R
following differences are obtained on the operation of the ⎡ ⎤
d
quadratic boost converter with R 2P 2. ⎢ L1⎥
⎢ ⎥
⎢ 1 ⎥
† The input current of the converter ie corresponds to ie = iL1 ⎢ ⎥
⎢ ⎥
+ iL2 during the switch-on state. When the switch turns off, +⎢
⎢
L2⎥e
⎥
the input current corresponds to the inductor current iL2. ⎢ ⎥
⎢ 0 ⎥
This operation mode results of the non-cascading ⎢ ⎥
configurations. Although in the quadratic boost converter, ⎣ ⎦
the input current is always the current of the inductor L1. 0
† The stress voltage in the capacitor C1 results to be less.
(11)
† The voltage conversion ratio is same in both converters.
† The input voltage in the output converter is E + VC1,
whereas that in the quadratic boost converter is only VC1. where d [ R is the duty ratio and e [ R is the input voltage.
A general description of the averaged state-space model
can be given by
4 Modelling of quadratic boost converter
with R 2P 2 ẋ = Â(d)x + B̂(d)e (12)
The dynamic behaviour of power electronic circuits can be T
where x = iL1 iL2 vC1 vC2 [ R4 are the average
analysed using the averaged model concept. This concept
value of the state vector; Â is a matrix in R4×4 and B̂ is a
is traditionally used in the modelling of high-frequency
vector in R4 . The above representation is non-linear
DC–DC converters under the CCM [1]. There are several
because  and B̂ depend on the duty ratio d. This model
representations of model converter; however, the state-space
can be used for analysis and controllers design under
representation is widely used to model physical systems.
non-linear techniques. However, the linear techniques are
The averaged state space is based on the algebraic
most popular for the control of this system, because the
manipulation of a set of state-space equations of the
implementation is simpler. The linearisation of this model is
converter circuit. Thus, a state-space averaged model of the
easily carried out. This process describes the converter
quadratic boost converter with R 2P 2 is derived through
behaviour to small perturbations around an operation point.
the analysis of the networks defined by the conditions of
In this condition, small perturbations are applied to the
the active switches.
input signal and input voltage resulting that the responses
To obtain the averaged model of converter, it is necessary
can be decomposed into two parts. The first part contains
to take the average of the variables of the converter, where the
the nominal values denoted by uppercase letters and the
average value of time-varying variable x, being x the voltage
second part is the deviations from the nominal denoted by
or current, is the following
the superscript ˜. The terms of first-order or linear terms in
Ts the perturbation are preserved. The terms that involve
1 squares or products of small perturbations are neglected.
kxl = x dt (9)
Ts 0
The nominal steady-state operating point can be derived by
setting ÂX + B̂E = 0 and it is described by the following
According to (1)–(2) and (9), the averaged equations can be set of equations
obtained to be
E E
⎫ IL1 = , IL2 =
† Ed (1 − d)kvC1 l ⎪ (1 − D) R
4
(1 − D)3 R
kiL1 l = − ⎪
⎪ (13)
L1 L1 ⎪
⎪ ED E
⎪
⎪ VC1 = , V0 = VC2 =
† E + kvC1 l − (1 − d)kvC2 l ⎪
⎪
⎪ (1 − D) (1 − D)2
kiL1 l = ⎪
⎬
L 2
(10)
† (1 − d)kiL1 l − kiL2 l ⎪
⎪ In these expressions, the output voltage Vo depends
kvC1 l = ⎪
⎪
C1 ⎪
⎪ quadratically with respect to the duty ratio D. Now,
⎪
⎪
† (1 − d)kiL2 l kvC2 l ⎪
⎪
starting from these conditions, the perturbations are
kvC2 l = − ⎪
⎭ added as follows: d(t) = D + d̃ and e(t) = E + ẽ. These
C2 C2 R perturbations cause changes in the state variables and the

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output voltage, that is, x = X + x̃ and v0 = V0 + ṽ0 . The
resulting linear model has the following form

x̃˙ = Ax̃(t) + Bṽ(t) (14)

T
where x̃(t) [ R4 is the state vector, ṽ(t) = d̃ ẽ [
R2 , A [ R4×4 is a constant matrix and B is a constant
matrix in R 4 × 2. Thus, the resulting linear model is given by
⎡˙ ⎤ ⎡ ⎤⎡ ⎤
ĩ L1 1−D
⎢ ⎥ ⎢ 0 0 − 0 ⎥⎢
ĩL1
⎢ ⎥ ⎢ L1 ⎥⎢ ⎥
⎢ ⎥ ⎢ ⎥
⎢˙ ⎥ ⎢ 0 1 1 − D⎥⎥⎢ ⎥
⎢ ĩ L2 ⎥ ⎢ 0 − ⎥⎢⎢ ĩL2 ⎥
⎥
⎢ ⎥ ⎢ L L 2 ⎥⎢ ⎥
⎢ ⎥ = ⎢1 − D 2
⎥⎢ ⎥
⎢ ⎥ ⎢ 1 ⎥⎢ ⎥
⎢ ṽ˙ ⎥ ⎢ − 0 0 ⎥⎢ ṽC1 ⎥
⎢ C1 ⎥ ⎢ C1 C1 ⎥⎢ ⎥
⎢ ⎥ ⎢ ⎥
⎣ ⎦ ⎣ 1−D 1 ⎦⎣ ⎦ Fig. 5 Block diagram of current-programmed control
0 0 −
ṽ˙ C2 C2 C2 R ṽC2
⎡ ⎤
E D widely well-known methods. In the case of the proposed
⎢ (1 − D)L1 L ⎥ converter, the transfer function ĩs (s)/d̃(s) is given by
⎢ 1⎥
⎢ E 1 ⎥
⎢ ⎥  a s3 + a s2 + a s + a 0
⎢ (1 − D)2 L L2 ⎥ ĩs (s) q1 (s)
⎢ ⎥ d̃ = = 4 3 3 2 2 1 (16)
+⎢ 2
⎥ (15) d̃(s) p(s) s + b3 s + b2 s + b1 s + b0
⎢ E ⎥
⎢− 0 ⎥ ẽ
⎢ (1 − D) C1 R
4 ⎥
⎢ ⎥ where
⎣ E ⎦
− 0
(1 − D) C3 R
3
E E
a3 = +
(1 − D)L1 (1 − D)2 L2
If perturbations in the input voltage ẽ(t) are negligible, these
can be eliminated in the model by deleting the second column E E
a2 = +
in B. This linear time-invariant model describes (1 − D) L1 C1 R
3 (1 − D)L1 C2 R
approximately the behaviour of the quadratic boost
2E E
converter for low frequencies and is not suitable for + −
predicting subharmonic oscillations because of ripple (1 − D)2 L2 C2 R (1 − D)4 L2 C1 R
instabilities [1]. These models are valid in CCM.
E 2(2 − D)E
The model (15) can be used for the analysis and controller a1 = +
design under linear techniques under several approaches, e.g. (1 − D) L1 C1 C2 R
3 2 (1 − D)L1 L2 C1
the use of multivariable control strategies (multiple-input (1 − D)E E
multiple-output) or single-input single-output methods. In + −
the latter, the transfer function representation is more L1 L2 C2 (1 − D)4 L1 L2 C1 C2 R2
desirable. For control purposes, it is important to select (7 − 3D)E
appropriate variables from the viewpoint of performance a0 =
(1 − D)L1 L2 C1 C2 R
and implementation. In this converter, the natural state
variables correspond to the inductor currents and capacitor
voltages; additionally, there is a variable that can be 1 1 (1 − D)2 (1 − D)2
obtained directly, that is the switch current ĩs . This current b3 = ; b2 = + + ;
C2 R L2 C1 L1 C1 L2 C2
corresponds to ĩs = ĩL1 + ĩL2 when switch is ‘on’. The use
of a switch current is a common practice in 1 (1 − D)2 (1 − D)4
current-programmed control [24]. In practical applications, b1 = + ; b0 =
L2 C1 C2 R L1 C1 C2 R L1 L2 C1 C2
current-programmed control is implemented using a current
(inner) loop, which is designed to maximise the closed loop
The transfer function of ṽo (s)/ĩs (s) (output voltage-to-switch
bandwidth, and a voltage (outer) loop, Fig. 5. In basic
current) is given by
converters, the dynamic behaviour of the output
voltage-to-duty ratio is second order; however, when the
current loop is added, the dynamic behaviour is changed to ṽo (s) q2 (s) m3 s3 + m2 s2 + m1 s + m0
= = (17)
a dominant first order. This resulting system simplifies the ĩs (s) p2 (s) a3 s3 + a2 s2 + a1 s + a0
design of voltage loop substantially; however, the effect of
E E
the current loop is not clear in more complex topologies. m3 = − ; m2 =
A similar procedure is presented in [18], which is applied (1 − D)3 C2 R (1 − D)L2 C2
to quadratic boost converters; however, in the proposed 
quadratic converter, the switch current corresponds to input E 2L1 + L2 (1 − D)2 2E(1 − D)
m1 = ; m3 =
current because of non-cascading configuration. (1 − D) L1 L2 C1 C2 R
3 L1 L2 C1 C2
For the controller design process, it will derive transfer
functions from the linear model given in (15), through the The transfer function of ṽo (s)/d̃(s) (output voltage-to-duty

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ratio) is given by
ṽo (s) q2 (s) m s3 + m2 s2 + m1 s + m0
= = 4 3 (18)
d̃(s) p(s) s + b3 s3 + b2 s2 + b1 s + b0
The dynamics characteristics of the system are defined by
localisation of the zeros and poles of the transfer functions.
As it has been reported in the literature, the topologies
based in boost converters present transfer functions of
non-minimum phase, that is, ‘right-half plane’ (RHP) zeros
with Re(s) > 0.
Considering the polynomial q1(s) of ĩs (s)/d̃(s), it is
observed that this has solutions on ‘left-side plane’, Re(s) <
0, if the next conditions satisfy a3 . 0, a2 . 0,
a0 . 0, a2 a1 . a3 a0 which is true for typical values of the
proposed quadratic converter, that is, capacitors in the range
of units to hundreds of μF and inductors in the range of
tens to hundreds of μH. Therefore the function ĩs (s)/d̃(s)
exhibits fourth-order and minimum phase dynamics. Now,
the polynomial q2(s) of transfer function ṽo (s)/d̃(s) has at
least a solution on right-side plane because of to that the
coefficient m3 of q2(s) is negative; therefore this function
exhibits fourth-order and non-minimum phase dynamics. In
addition, it presents high resonance peaks, which depend on
converter’s parameters. The output voltage regulation is
difficult to achieve with a single loop, because the
resonance peaks present abrupt changes on the phase. To
minimise the effects of the resonance peak and to increase
the bandwidth [24], it is implements a current-programmed
control using the switch current for feedback purposes
together with the output voltage. The design procedure is
shown next.
5 Procedure for controller design
The controller design of quadratic boost converter with
(R 2P 2) using current-programmed mode is presented in this
section. The nominal values of converter are given in Table 1.
Using the above parameters, the capacitor voltage ripples
are obtained using (4), and the inductor current ripple using
(5), which are given by
DvC1 = 0.0960 V DvC2 = 0.0218 V
DiL1 = 0.6122 A DiL2 = 0.3129 A
As mentioned, the transfer function of output voltage-to-duty
ratio ṽo (s)/d̃(s) (18) exhibits fourth-order and non-minimum
Table 1 Parameters of the quadratic boost converter
output power 23 W output load R 100 Ω
input voltage E 12 V inductor L1 196 μH
767 μH
output voltage Vo 48 V inductor L2
nominal duty ratio D 0.5 capacitor C1 100 μF
switching frequency 50 kHz output capacitor C2 220 μF
phase dynamics, being the transfer function given by
(see equation at the bottom of the page)
As observed, this function has three RHP zeros and two
pairs of complex LHP poles. As mentioned, the output
voltage regulation is difficult to achieve with a single loop,
because the resonance peaks present abrupt changes on the
phase. For aspect of output voltage regulation is
implemented a multiloop control scheme, where it is used
an inner current loop and an outer voltage loop. The current
control scheme is chosen by taking into account the
following reasons: it is well known that the implementation
of an inner loop on power converter provides the best
dynamic characteristics such as attenuation of the resonance
peaks, thus increasing the bandwidth. In addition, the use of
the switch current is a measure of the input current of the
proposed converter, because it has a parallel connection of
constituent converters. Finally, this control scheme provides
faster response to failures of short circuit in the load in
comparison with the average current control [24–26]. The
current loop is implemented when the switch current of the
converter is fed back using the current gain N. Using the
proposed parameters, the transfer function ĩs (s)/d̃(s) is
given by (see equation at the bottom of the page)
Above function has three LHP zeros and two pairs of
complex poles. When the current loop is closed, the transfer
function of switch current-to-duty ratio is modified by a
gain N. This gain N adds damping to resonance peaks
where the resulting transfer function is changed to a single
dominant pole system. The scheme of implementation of
current loop is shown in Fig. 6.
The closed-loop function of ṽo (s)/ṽc (s) is given by
ṽo (s) 1 q2 (s)
= (19)
ṽc (s) Vp p(s) + (N/Vp )q1 (s)
where the characteristics polynomial is
N
p(s) + q (s) = 0 (20)
Vp 1

ṽo (s) q2 (s) −4.5454 × 103 s3 + 142.2306 × 106 s2 − 176.5033 × 109 + 3.6283 × 1015
= = 4
d̃(s) p(s) s + 47.3485s3 + 27.2745 × 106 s2 + 1.2212 × 109 s + 18.8976 × 1012

ṽo (s) q2 (s) (s − 30.870)(s − 210 + j5080)

= =
d̃(s) p(s) (s + 0.7052 + j5154)(s + 23 + j843)

ĩs (s) q1 (s) 1.8503 × 105 s3 + 3.6688 × 107 s2 + 4.9720 × 1012 s + 4.1574 × 1014
= = 4
d̃(s) p(s) s + 47.3485s3 + 27.2745 × 106 s2 + 1.2212 × 109 s + 18.8976 × 1012

ĩs (s) q1 (s) (s + 84)(s + 58 + j5182)

= =
d̃(s) p(s) (s + 0.7052 + j5154)(s + 23 + j843)

16 IET Power Electron., 2014, Vol. 7, Iss. 1, pp. 11–22

& The Institution of Engineering and Technology 2013 doi: 10.1049/iet-pel.2012.0749

Fig. 6 Current loop scheme in quadratic boost converter with
R2P2
For typical values, it can localise the low-frequency dominant
pole on slf = −3/RC2, then the value requiring N for achieving
this localisation is calculated by

p(s)Vp 
N=  (21)
q2 (s) s=− 3
C2 R
Using the converter parameters, the resulting value of N = 0.2
being the transfer function ṽo (s)/ṽc (s) is given by (see
equation at the bottom of the page)
As observed, this function has a low-frequency dominant
pole, a high-frequency pole and high-frequency complex
poles. It is noteworthy that although the restrictions are still
present in the non-minimum phase dynamics, the abrupt
changes of the phase are in high frequencies. In addition,
the current loop changes the fourth-order dynamics
behaviour of the converter into the single dominant pole
system. This is shown in the Bode plots, Fig. 7 shows the
frequency responses of transfer function ṽo (jv)/d̃(jv) and
Fig. 7 Frequency response of converter. (Grey) frequency response of ṽo jv /d̃ jv and (black) frequency response of ṽo jv /ṽc jv
ṽo (s) −1.5151 × 103 s3 + 47.4102 × 106 s2 − 58.8344 × 109 s + 1.2094 × 1015
= 4
ṽc (s) s + 12.3328 × 103 s3 + 29.7092 × 106 s2 + 331.3479 × 109 s + 46.5020 × 1012
ṽo (s) (s − 308705)(s − 210.1236 + j5.0807 × 103 )
=
ṽc (s) (s + 142.0454)(s + 12112)(s + 39.1983 + j5.1987 × 103 )
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the response corresponding to the implementation of current
loop ṽo (jv)/ṽc (jv). The resulting system simplifies
substantially the controller design in the voltage loop. Once
the current loop is realised, a conventional controller is
designed. This design is developed next.
The voltage loop is mainly designed to obtain a slope at
crossover frequency around −20 dB/dec by stability and
high gain at low frequency to improve steady-state
accuracy. As shown, the frequency response of
ṽ0 (jv)/ṽC (jv) exhibits a slope of −20 dB/dec at crossover
frequency, because the dominant pole localises in ωlf =
3/RC2. The high gain is obtained using a
proportional-integral (PI) controller, which has the transfer
function expressed as
 
1
K(s) = −Kp 1 + (22)
TI s
The proportional gain Kp has to be designed together with
output voltage sensor, which consists of voltage divider
network. This network is designed to feedback the output
voltage to an appropriate value for the control circuit. Kh is
the associated gain of the voltage divider network. The
resulting value of KpKh is choosen such that the resonance
peak of the high-frequency complex poles is below 0 dB.
For this converter chose value of KpKh = 0.3, result of
Kp = 3 and Kh = 0.1. Once the voltage divider network and
the proportional gain are chosen, the integrative time is
selected in neighbourhood to the dominant pole of
low-frequency Ti = 1/ωlf, in this example, Ti = 1/142 =
0.00704. The procedure of the controller design can be
summarised as follows:
1. Choose gain N of the current loop such that the resulting
transfer function corresponds to a single dominant pole
system using (21).
       
17
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Fig. 8 Frequency response of loop gain
2. Select the value of KpKh such that the resonance peak of
the high-frequency complex poles is below 0 dB.
3. The integrative time of the controller will be given by
Ti = 1/ωlf.
The resulting Bode plot of loop gain (divider network, PI
controller and ṽo (jv)/ṽC (jv) transfer function) is shown in
Fig. 8. This plot exhibits the slope at crossover
approximately − 20 dB/dec and an infinitum gain at low
frequency to improved steady-state accuracy. The ideal
Bode plot presents a crossing the 0 dec axis; however in the
practical the magnitude of resonance peak is not significant
[23], because of the parasitic. If the parasitic of the
elements is considered, damping is added to the resonance
peaks; therefore a better behaviour can be observed.
Fig. 9 Switching regulator using quadratic boost converter with current-programmed control
18
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6 Experimental results
So far, the procedure of controller design of the quadratic
boost converter with R 2P 2 has been given. In this section,
the experimental results of the switching regulator prototype
are presented which uses a quadratic boost converter with
current-programmed control to verify the performance
controller, Fig. 9. The controller designed is implemented
to quadratic boost converter, where the gain of the voltage
divider network is Kh = 0.1, which is obtained with two
resistances of 22 and 2.2 kΩ. Using the obtained values of
Kp and Ti, which are given by Kp = Rf/Ri as the proportional
gain and Ti = CfRf as the integrative time, resulting in
Rf = 15 kΩ Ri = 5 kΩ and Cf = 0.47 μF.
In switching regulators, the regulation of output voltage is a
relevant requirement, when there are variations on input
IET Power Electron., 2014, Vol. 7, Iss. 1, pp. 11–22
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voltage. To establish the quadratic converter operation,
experimental measurements are performed of the converter
output voltage under different input voltage levels.
Figs. 10a, and b show the output voltage responses of the
converter, where the input voltage takes values different to
the nominal value with a duty ratio of 0.5. These responses
were obtained in open-loop operation; it means that the
converter operates without feedback loops. In the case
of Fig. 10b, the power required by the load is greater
and therefore exhibits greater ripple than in Fig. 10a.
www.ietdl.org
As observed, the output voltage maintains the high
conversion ratio, however, does not match the calculated
value (3) because of the effect of parasitic. In addition, the
capacitor voltage ripples differ because the operating
characteristics change. Figs. 10c and d show the output
voltage responses in closed-loop operation, which means
that the converter operates with two feedback loops: the
inner current loop and outer voltage loop (divider network
and PI controller). As shown, the output voltage is
regulated even in the presence of variations in input

Fig. 10 Experimental measurements of the output voltage converter VC2

Open-loop:
a Input voltage E = 8.5 V (10 V/div) (time 20 ms/div)
b Input voltage E = 20 V (20 V/div) (time 20 ms/div)
Closed-loop:
c Input voltage E = 8.5 V (10 V/div) (time 20 ms/div)
d Input voltage E = 20 V (10 V/div) (time 20 ms/div)

Fig. 11 Experimental measurements of the capacitor voltage converter VC1

a Capacitor voltage VC1 = 10 V (5 V/div) (time 4 ms/div)
b Detailed response (1 V/div) (time 10 μs/div)

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Table 2 Experimental and simulated results
Test Experimental Simulated

Open-loop results
D = 0.5 and E = 8.5 V Vo = 30 V Vo = 30.37 V
D = 0.5 and E = 20 V Vo = 75 V Vo = 76.66 V
load, R = 96 Ω Vo = 46 V Vo = 42 V
(D = 0.5 and E = 12 V) Io = 0.4 A Io = 0.43 A
load, R = 48 Ω Vo = 40 V Vo = 40 V
(D = 0.5 and E = 12 V) Io = 0.6 A Io = 0.82 A
Closed-loop results
E = 8.5 V Vo = 48.07 V Vo = 48.01 V
E = 20 V Vo = 48.13 V Vo = 48.01 V
step load (R = 96 Ω → 48 Ω) Vomin = 46 V Vomin = 46.2 V
(E = 12 V) ts = 12 ms ts = 30 ms
Fig. 12 Experimental measurements of the current and voltage of
step load (R = 48 Ω → 96 Ω) Vomax = 50 V Vomax = 50 V
switch Q (E = 12 V) ts = 12 ms ts = 24 ms
Top switch current (2 A/div) (time 10 μs/div). Bottom switch voltage (20 V/
div)(time 10 μs/div)

Another test consists to apply changes in the load on the

voltage, which ensures that the controller satisfies the
conditions required by the regulator, besides the voltage
ripple is not perceptible.
As mentioned, in the proposed topology, the voltage stress
in the capacitor C1 is lower to quadratic boost converter [2,
18]. To verify these results we performed experimental
measurement of voltage capacitor, which is shown in
Fig. 11. In this, the voltage corresponds to VC1 = 10 V,
Fig. 11a, the voltage ripple corresponds to ΔVC1 = 0.76 V,
the detailed waveform is shown in Fig. 11b. In nominal
operation, the waveforms of current and voltage switches
were obtained in Fig. 12, where are observed that the
transitions are well defined.
converter. Fig. 13a shows the experimental measurement of
the output voltage and output current when are applied
changes of the resistance load of 48–96 Ω in open loop, as
observed the voltage amplitude varies about 10 V. When
the controller is implemented, the output voltage is
regulated even in the change load conditions in Fig. 13b.
Detailed measurements of the response of the converter are
shown in Figs. 13c and d. There are shown the output
voltage as well as the response of the output current during
load transitions. The obtained voltage ripple corresponds to
5% of nominal value.
To aspects of comparison, Table 2 was added in which are
shown the experimental and simulation results. For

Fig. 13 Transient responses of output current and voltage of converter under changes of load
a Open loop (10 V/div) (500 mA/div) (time 20 ms/div)
b Closed loop (10 V/div) (500 mA/div) (time 20 ms/div)
c Detailed response during step up in closed loop (10 V/div) (500 mA/div) (time 20 ms/div)
d Detailed response during step down in closed loop (10 V/div) (500 mA/div) (time 20 ms/div)

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& The Institution of Engineering and Technology 2013 doi: 10.1049/iet-pel.2012.0749

Fig. 14 Transient responses of regulator and detailed waveforms of response
a Transient responses to dynamic changes of input voltage in switching regulator
b Detailed waveforms of response
simulation results, the system was built in the toolbox
SimPower System of MATLAB©. As observed in the table,
the simulated results are close to the experimental results of
the proposed prototype.
As mentioned, the regulator must be able to reject the
disturbance present in the input voltage, to verify the
effectiveness of the controller, are applied dynamic changes
in the input voltage, which correspond to steps of 10–20 V.
Fig. 14a shows the transient responses of regulator which
are applied in the steps. It can be seen that the output
voltage remains at 48 V, which shows that the regulator has
good load regulation. The detailed waveforms of response
are shown in Fig. 14b, where the peak response is 8.33% of
nominal value. In addition, the setting time of the response
is 12 ms. As shown, there are low-frequency oscillations in
the responses; these are the results of transient behaviour of
the converter under a high input voltage step. These
oscillations are more evident in the transition from 10 to
20 V. As shown, these oscillations are not present in the
transition from 20 to 10 V. This may be associated with the
output power requirements. It can be noted that regulator
performs quite well since the output voltage is maintained
at 48 V. It is important mentioned that this paper proposes a
quadratic boost converter, as well as, the controller design
procedure based on traditional method of frequency
response. A comparative study of several controllers applied
to proposed converter is beyond the scope of this work.
However, this study will be reported in future work.
7 Concluding remarks
This paper presents a quadratic boost converter based on
R 2P 2 concept, which has a single-switch. In addition, it
proposes a control scheme to satisfy the task of output
voltage regulation. The transfer functions of the output
voltage-to-duty ratio correspond to fourth-order and
non-minimum phase system. However, the transfer
function of switch current-to-duty ratio is fourth-order and
minimum phase; therefore the switch current is proposed
for current-programmed control. When the current loop is
introduced, the fourth-order dynamics is changed to a
dominant first order; this fact is used for the proper
selection of the gain N. In addition, it proposes a simple
design procedure of control, which can be easily
implemented with IC low cost. To show the converter’s
performance, experimental results were obtained to
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compare open-loop and closed-loop responses. Transient
responses to step changes on the load and reference
voltage exhibit the robustness of the controller. The
methodology can be extended to other converters of the
family. As shown, the R 2P 2 concept can be useful for
developing new topologies of high-order DC–DC
converters with new functions. Further research in this
topic is underway.
8 Acknowledgment
This work was supported in part by PROMEP under grant
‘PROMEP/UASLP/12/CA03’ and Universidad Autónoma
de San Luis Potosí under grant ‘C13-FAI’-03-28.28.
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