COA PROJECT

Group Members:

Prashant Singh Shekhawat-21ucs158

Kanishak Mittal-21ucs103
Sarthak Bansal-21ucs182
Sarvagya Acharya-21ucs183
 ISA
(Instruction Set Architecture)
A "contract" between software and hardware

• Functional definitions of operations, modes, and storage where the

hardware supports
• Precise description of how to call and access them
 ISA Design

1. Word Length: 8 bits

a) Size of Register = 1 byte (8 bits)

b) Length of memory address = 1 byte (8 bits)

c) Length of main memory = 2^8=256 bytes

2. Instruction Length: 2 words (16 bits)

3. Registers:
Register length: 3 bits
a) General Purpose:

Register Bit Representation

R0 000

R1 001

R2 010

R3 011

R4 100

R5 101

R6 110

R7 111
b) Special purpose:
1. Memory Address Register (MAR): 1 (8 bits)
2. Instruction Register (IR): 2 (16 bits)
3. Program Counter (PC): 1 (8 bits)

4. ADDRESSING MODES (A.M.):1 Bit

If the value is taken from :0

the register

If Immediate value taken :1

5. INSTRUCTION FORMAT:

Opcode A.M. Register Memory Address

4 Bits 1 Bit 3 Bits 8 Bits

0 – 3 = Opcode
4 = A.M.
5- 7 = Immediate value/Address of register
8-15 = Memory Address
6. CAPABILITIES/OPERATIONS PERFORMED BY CPU:

Total Operations: 16
Bits required to represent 16 operations: 4 Bits

Capabilities:
● Data movement
● Logical operations
● Arithmetic operations
● Unconditional branching
● Conditional branching
 OPERATIONS BIT FORMAT DESCRIPTION
REPRESENTATION

DATA MOVEMENT

MOVE 0000 MOV R0, R1 Moves content of R1to R0

LOAD 0001 LD R0,99 Loads the value of

present at memory
location 99 to R0

LD R0, #54 Loads the value 54 to

R0

STORE 0010 STR R0,156 Stores value at register R0

at memory address 156

ARITHMETIC

ADDITION 0011 ADD R0, #7 Adds value 7 to value

present at register
R0 and stores at R0.

ADD R0, R1 Adds value in R1 to

R0 and stores in R0.

SUBTRACTION 0100 SUB R0, #7 Subtracts 7 from the

value at register R0 and
stores at R0
 SUB R0, R1 Subtracts value in R1from
R0 and stores in R0

MULTIPLICATION 0101 MUL R0, #7 Multiplies 7 to value at

register R0
and stores at R0

Multiplies value in R1 to
MUL R0, R1
value in R0 and stores to
R0

DIVISION 0110 DIV R0, #7 Divides 7 to value at

register R0 and stores at
R0

Multiplies value in R1 to
DIV R0, R1
value in R0 andstores to
R0

LOGICAL

AND 0111 AND R0, R1 Calculates logical

AND of values at R0
and R1 and stores to
R0

OR 1000 OR R0, R1 Calculates logical

OR of values at R0
and R1 and stores at
R0

NOT 1001 NOT R0 Calculates logical

 NOT of values at R0and
stores at R0

XOR 1010 XOR R0, R1 Calculates logical XOR

of values at R0and R1 and
stores atR0

BRANCHING

CMP 1011 CMP R0, R1 Compares the value of R0

and R1 and gives 1 if R0>R1

-1 if R0<R1

JMP 1100 JMP(Location) Jump to the given location

JEQ 1101 JMP (offset) Jump if CMP gives 0

JNE 1110 JMP (offset) Jump if CMP is not 0

CONTROL FLOW:

Program counter on each instruction: PC= PC+2

Conditional jumping: PC = PC + ((cond)? X:2)
Condition can be equal or not equal
Unconditional Jumps: PC =X