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Faculty, DEET
Summary
Intro:
Mid:
First, a layer of silicon dioxide is laid down on top of the wafer upon which a layer of
silicon nitride is applied. Then, a very thin coating of photoresist is also applied using a spin
coating technique. Next, the prefabricated stencil composed of transparent glass and
opaque chrome is then projected onto a lens which reduces the size of the stencil pattern.
Moreover, photoresist becomes soluble wherever it is exposed to UV light. By applying an
appropriate solvent, dark areas can also be removed. Finally, a further chemical etching of
the silicon regions is shown. Another layer of silicon dioxide which will serve as insulation
between the transistors is applied while etching and grinding processes expose the silicon
underneath. Photolithography is used once again in the process of doping the silicon
regions for the purpose of protecting the regions which are not to be dumped. Then, the
silicon regions are treated with either N or P-type doping with a process called ion
implantation. The photoresist is removed, revealing implanted electrons which are able to
move freely in doped regions and are now finally able to carry electrical current.
Conclusion:
Summary
Intro:
Mid:
The process of making a microchip shown in the video starts with the growing or
depositing of a thin non-conducting layer of silicon dioxide on the surface of the wafer, also
known as deposition. Then, it is coated with photosensitive and light resistant and is then
fed into a lithography machine which exposes the wafer to UV light passed through a reticle
containing the chip's blueprint. The areas exposed to light are hardened while unexposed
areas are then etched away by hot gasses to leave a three-dimensional microchip. Moreover,
via doping with chemicals under heat and pressure. electrical conductivity of different parts
of the chip can also be altered. Also, to create conducting paths between the components, a
thin layer of metal such as aluminum can be overlaid onto the chip and the etching process
is used to remove everything except the thin conducting pathways. This process can repeat
hundreds of times, resulting in a more and more complex IC architecture.
Conclusion:
Finally, after testing the performance of each chip on the wafer, it will then be
separated by a specialized saw. With the rate that technology is advancing, shrinking
transistor sizes to fit more into chips has become a standard. Chips are likely to only get
smaller and smaller, yet cramming more and more transistors in, year by year, according to
Moore's law.
Semiconductor Technology at TSMC
Summary
Intro:
Mid:
Raw polycrystalline silicon material, the basic raw material in the manufacturing of
ICS, is first heated to a high temperature. This process creates a cylindrical ingot of
crystalline silicon which will then be pulled out, and its outer surface of the wafer will be
ground to a uniform diameter and then sliced into thin silicon wafers. This silicon wafer is a
type of semiconductor. This semiconductive wafer allows control of conductivity and
characteristics through a series of complex processes which include doping the wafer with
different elements such as arsenic, phosphorus and boron, making it a suitable material for
manufacturing integrated circuits.
With the use of TSMC's advanced technological capabilities, each circuit of the IC is
laid out, and using electron beams or lasers, patterns are then transferred to photo masks.
IC design engineers use sophisticated computer-aided design systems to do this, assuring
accuracy and precision for each of the ICs.
The fab for manufacturing ICs is divided into several major areas: the division area,
the chemical vapor deposition (CVD) area, the etching area, and the chemical-mechanical
polishing area. The division area is where the silicon wafer stays in an oven tube for thin
film growth where temperature and gas flow rate is accurately controlled for some time.
Here, the surface reacts with the high temperatures and forms an insulating silicon
compound film. Next, in the CVD area, a solid state reactant formed due to reactive chemical
vapors is deposited on the chip surface as a thin film. It is then sent to the photolithography
area for the transfer of circuit patterns.
Chemical reactions occur in the reaction chamber. and the reactive chemical
vapors form a solid state reactant which is deposited on the chip surface as a thin film.
The wafer is now covered in a thin film and sent to the photolithography area for the
transfer of circuit patterns. a thin layer of photoresist, a photosensitive liquid, is
uniformly coated on the wafer surface. The photo mask is then placed over the wafer.
light is exposed onto the wafer through the photo mask creating a pattern of exposed
and unexposed areas based on the pattern of the photo mask. unexposed areas remain
covered with photoresist. After photolithography processing, the silicon wafer will be
sent into the etching area to etch out the exposed regions. The remaining pattern is the
area needed for the circuits. The components are then connected with metal
conducting wires so that they can perform their designated functions. Finally, it is sent
to the chemical mechanical polishing area. Here, mechanical principles and chemical
reactions effectively remove materials on the silicon wafer and make it flat in
preparation for later thin film deposition. All these complex yet precise processes are
repeatedly performed in the fab to successfully manufacture working integrated
circuits.
Conclusion:
After successfully passing a series of tests, wafers as well as completed ICs must
be transported back and forth between the different manufacturing areas. Usually,
silicon wafers and ICs are transported manually using carts. However, in recent years,
TSMC leads in introducing automatic material transport systems and automatic
real-time dispatch systems. This aids in a much efficient workflow, ensuring ICs are
manufactured at a much faster rate than ever before.