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Thermal Analysis of Power Amplifier Package in Cellular Phones

Chun-Kai Liu and Yi-Hsiang Cheng


Thermal & Structure Design Technology Department
APCiERSOilTRI
310, Chutung, Hsinchu, Taiwan

Abstract On the other hand, for the low price demand, the
Portable electronic devices, like the cellular phones, substrate material is inclining to organic materials that have
offer increasing electronic functions. Radio frequency (RF) less thermal conductivity than ceramic materials.
components featured by small form factor, high power Furthermore, the Gallium Arsnide (GaAs) chip in PApackage
dissipation and low cost are readily used in such portable offers lower heat conductivity than Si chip does. Such that,
pmducts. On the other hand, the RF component packages the heat transfer worker must clearly understand the influence
'such as power amplifiers (PA) trend to multi chip package of materials and design properly.
(MCP) and plastic package with organic substrate. The Fig. I shows a PA package schematic structure. The PA
thermal management becomes the challenge related to the module consists dozens of passive units and two active
component performance and reliability. devices: one GaAs chip (2.lmmxl.6mmx0.0855mm) and one
This paper studies the thermal management of PA MCP silicon chip (1.4mmxl.2mmxO.Ol25mm) adhered on I sq. cm
under pulsed power excitation. We offer the experimental substrate. The package is designed in a Leadless Grid Array
validated numerical models solved by computational fluid (LGA) package and mounted to the 80mmxlOOmm six-layer
dynamic (CFD) s o h a r e - FLOTHERM to predict maximum printed circuit board (PCB) by solders.
junction temperature of PA. Thermal analyses of different While analyzing the heat transfer of electronic devices,
substrate materials, substrate structures and the effects of the thermal performance of an electronic component is
thermal vias are discussed. The results show that after proper usually expressed in terms of its junction to ambient thermal
thermal design, the maximum junction temperature can resistance (R,,). It is simply a matter of calculating Ric from
satisfy the PA package thermal requirement. the equation (I).

1. Introduction
With the development of electronic devices and whcrc q. is the junction temperalure, T,<is the ambienl
communication technologies, the cellular phones are temperature and P is the input power. Howevcr, a dynamic
becoming essential. Numbers of digital and analog devices thermal behavior of the system is needed to predict the
used in such products decrease its module sizes and increase package thermal performance while components excites with
the work functions. One of the critical elements in these pulse input power.
devices is PA due to its increasing amount of power density Resistance networks shown in Fig. 2 provide an
being dissipated [I]. This worse case becomes serious analysis of the thermal paths from junction to the other end of
especially when PA is designed in MCP. Therefore, the the package. The thermal paths can be roughly scparaled into
process of thermal management is important and widely two directions: one is upward from junction to the mold
concemcd for the purpose of functional integration [2-51. compound; the other is downward from junction to the PCB

0-7803-7682-X/02/$1 O.OO(C)ZOOZ IEEE 4 15 2002 Int'l Symposium on Electronic Materials and Packaging
through the substrate and solders. Consequently, thermal above.
energy in the package body is dissipated to the ambient by One knows that the system response is a summation of
convection and radiaticn. The downward heat transfer is DC (steady state) and AC (pulse) components. The DC part is
major under nature convection, but the situation is the simply the result of analyzing the model with average power
opposite while force convection. The implement of thermal load (Pxd, &duty cycle); the AC part is the result of
enhancement is basing on not only the package geometry, but analyzing the model for single onloff load. Therefore, the
also the proper choice of materials along the thermal paths. operating junction temperature is a summation of two
All of the previous related works were used ANSYS components expressed in equation (2).
sothvare [3,4,5]that spends more time to get a result. In this 7;= TDc+ TAc (2)
paper we present a set of simulation using CFD software - where TOc and TAL.
are steady state and transient components
FLOTHERM that were performed transient thermal analysis of the operation junction temperature over the ambient. More
on'a PA excited by pulse input power. Furthermore, thermal exactly, TAc is on the centroid of the temperature response
analyses of different substrate materials, substrate structures curve with average power load.
and the effects of thermal vias are discussed. The time patches are set up as exponential decay
function while calculating T., This method can obtain
II. Numerical modeling of the PA in cellular phones reasonable results and saves at lease one-tenth time [SI.
1.Basic Characteristics of PA
Fig.3 shows an example of power dissipation as a 3.Modelling
function of time for PA-MCPs. In this figure, d is the power The numerical modeling is set up and simulated by
dissipation duty cycle, / is the power frequency (-216 Hz), finite volume soflware FLOTHERM. A typical PA MCP
and P,, is the maximum value of the power dissipation in model given in Fig. 5 includes GaAs and Si chips, mold
watts. It should be noted thatfis different front RF operating compound, the substrate with various materials (variety of 4
frequency that is between 900 Hz to 2.4 GHz. Fig.4 is a layers BT, 2 layers BT, Aluminum Nitride (ALN) and
typical transient temperature response resulted from the pulse Alumina (AL201)), die attach, thermal vias, solders and PCB
input power. Due to the power consumption of PA is not [ 6 ] .The power dissipation characteristics of PA are shown in
constant, the temperature response to the pulse power is Table I . Table 2 lists the material properties of the materials
changing with time as a waveform and going to stable for a used in the finite volume analysis. The thermal conductivity
long time [2-5]. of the substrate and PCB are simulated by effective thermal
conductivity calculated by the following equations: addition
2.Concepts of simulation of conductivity for conduction paths in parallel, and addition
The current steady state thermal resistance definition ofreciprocals for conduction paths in scries:
cannot be used for this type of power dissipation; rather a
dynamic thermal behavior of the system is needed to predict
the package thermal performance. For the pulse heat source,
the setup of interval of time patches in simulation should he
small enough so that the temperature responses can represent where k, and 1, is the thermal conductivity and thickness of
the influence of pulse power. However, the problems of time the ith layer ofthe substrate or PCB.
extravagancy and memory deficit will happen when the time The MCP is mounted horizontally referring to SEMI
patches are too tight. It is important to consider the mention standards [7]. Under this condition, convection occurs due to

416 2002Int'l Symposium on ElecuonicMaterials andPackaging


buoyancy caused by temperature gradient. Therefore, the top of mold compound. The temperature on the top of thc
computational domain chosen sufficiently large to allow a mold compound is 6°C lower than the one on the die section.
fully developcd flow above the package is important. In our We can know that increasing thermal conductivity of PCB
models, the computational domain extends in 30mm above promotes heat dissipation from package grcatly while natural
the package, 6mm below the board and lOmm in excess of convcction. The PCB conductivity can be enhanced by
the side of PCB. Still air is constructed for each of the changing the amount of copper metal traces patterned on and
package model and radiation effect is considered. in it.
Fig. 5 gives a conception of the numerical model. The The temperature profile for lateral section o l G a A s die
GaAs and Si chips are mounted on the substrate with epoxy. with alumina suhstratc is shown in Fig. 8. The alumina
Since the power is generated in the top layer of the chip, the substrate has a perfect conductivity and spreads heat in thc
heat source is modeled as a plate heat source attached on the horizontal and vertical directions quickly. The die
top of the chip. The MCP is surface mounted on the six layer temperature with alumina substrate is much lower due to the
test board consisting of 5% copper trace and 95% FR-4. The ease of spreading heat form substrate to PCB. A temperature
effective thermal conductivity of the test board is then distribution profile of GaAs chip with 2 layers BT substrate is
calculated. Each of the solders is modeled as an equivalent given in Fig.9. The die temperature with BT substrate is
cuboid and is placed on thc cxact location to ablate the error higher than the one with alumina substrate and that causes a
caused by the different location of solders. In this study, each high temperature gradient while package is BT substrate. The
component in the model is of the same dimensions as the heat spreading etTect of the alumina compared to the BT can
actual devices. Grid cells are much closer in which place has explain this phenomenon. The alumina offers less internal
a high temperature gradient. resistance form one end of the package to the other reducing
the temperature gradient across the package.
ill. Discussion To compare the influence of a variety of substrate
Since the highest temperature of the chip is in the materials on the heat transfer rate, four different substrate
junction, we do monitor the relationship of temperalure with materials are performed. The numerical modellings in this
time here strictly. Substrate with 4 layers BT as an example, paper present the substrates with 4 layers BT, 2 layers BT,
the temperature profiles shown in Fig. 6 (a) and (b) represent ALN and ALIO, respectively. The simulation results are
the mean value of maximum junction temperature (TDc)and listed in Table 3, which reveal that the material of ALN has
the maximum junction temperature of pulsed component the best thermal performance and the next is AL20,. It is
(TAc). The operation temperalure can be obtained by noted that the worse two cases are substrate materials of 4
summating Tnc and TAc. Equation ( 5 ) and (6) express the layers BT and 2 layers BT. The die temperature of package
junction temperature of GaAs chip and Si chip respectively. with 4 layers BT substrate is lower than 2 layers BT substrate.
When the substrate is organic materials, the use of additional
~;(G~~,=TDC ~ C ~ U ( ~77.03+1.78
+TAC~C~A,= , = 78.81% (5) copper layers in BT substrate will enhance heat transfer to the
= T,,,, +TA,,,= 63+0.4 = 6 3 . 4 ~ (6) package solders and package body. Referring to Table 3, the
More than 70% of heat is dissipated from the junction temperature of the model with BT substrate
downward thermal path while natural convection due lo the approaches to the upper limit over which the electronic
thermal conductivity of PCB under the package is higher than device is unreliable.
the one ofair above the package. Fig.7 shows the temperature By adding extra thermal vias, the thermal performance
profile in the x-y cross-sections of bottom of PCB, die and of the package with BT substrate can he improved to the

417 2002 Int'l Sgmposium on Electronic Materials and Packaging


equivalent level of the package of ALN substrate. Table 4 References
shows the simulation results about the effect of thermal vias. 1. 1. Walker, “High-Power GaAs FET Amplifier”,
Packages with 4 layers BT as an example, Fig. I O (a) and (h) ARCTECH HOUSE, Inc., 1993.
give a comparison of temperature distributions between the 2. D. L. Monthei, “Package Electrical Modeling, Thermal
packages with and without thermal vias. The package with Modeling, and Processing for GaAs Wireless
thermal vias has an extra heat transfer throughout the Applications, Kluwer Academic Publishers, 1999.
substrate and that circumstantiates an emphasis role of 3. A. Langari and H. Hashemi, ”A Cooling Solution for
thermal vias. Power Amplifier Modules in Cellular Phone
Applications, Electronic Components and Technology
Ill .Conclusion Conference, 316, 1999.
A detailed CFD simulation was performed to analysis 4. A. Langari and H. Hashemi, “High Speed Power
the phenomenon of heat transfer of PA MCP module. To Dissipation Analysis of a GaAs Device”, International
analyze the thermal response of pulse input power, the parts Journal of Microcircuits and Elcctronic Packaging, Vol.
of stable temperature and the transient temperature are 22, 62, 1999.
simulated separately. The results show a variety of thermal 5 , G.K. Mui, et al., “Thermal Analysis of a Power Amplifier
performances caused from different substrate materials. The Module with Experimental Calibriation”, International
package with an aluminum nitride substrate has the best Journal of Microcircuits and Electronic Packaging,
thermal characteristic, while alumina substrate is the second. V01.22, 319, 1999.
For the organic substrate, the use of copper metal 6 CX77302 Tri-Band Power Amplifier Module, Data Sheet,
trace and layer enhances heat transfer to the package solders Connexant Inc.
and package body. The package with 4 layers BT substrate 7 SEMI standard, ”Test Method Still- and Forced-Air
has a junction temperature less about 10°C comparing to the Junction-To-Ambient Thermal Resistance Measurements
2 layers BT substrate; the package with AL201substrate has a of Integrated Circuit Packages, SEMI ‘338-87.
junction temperature less about 13°C comparing to the 8 R. S . Li, “Optimization of Thermal Via Design
package with 2 layers BT substrate. The thermal vias can Parameter Based on an Analytical Thermal Resistance
cause a junction temperature difference about 20’C between Model, InterSociety Conference on Thermal Phenomena,
the packages with and without them. Even at the same 475, 1998.
ambient temperature and input power, the temperature
difference of die between the best case and the worse one can
reach 30’C that declares the importance of choosing the
substrate material in designing a package.

418 2002 Int’l Symposium on Electronic Materials and Packaging


, .. . .. . .
e-.

I I
Figure 5. Modeling of PA.
Figure I . PA package internal structure.

I I
--I-'

Figure 3. Simplified pulse power excitation.

Figure 6. Simulation result of model with 4


layers BT substrate
Figure 4. System response to the pulse power excitation.

4 19 2002 Int'l Symposium on Electronic Materials and Packaging


Figure 7. Each representative cross-sectionof model with 2
(a) Without thermal vias
layers BT substrate.

(b) With thermal vias

Figure IO. Temperalure distribution in x-z cross section


I of model with A1203substrate.
Figure 8. Temperature distribution in x-z cross section of
model with Al20, substrate.

~~ ~

Figure 9. Temperature distribution in x-z cross section of


model with 2 layers BT substrate.

420 2002Int'l Symposium onElecuanicMaterials andPackaging


GaAs Chip Si Chip GaAs Chip
Withoutvia I With Via
Duty Cycle
I
TAC TE I T, I TK Tn T;
Table 1. Basic characteristics of PA used in this study

I Without Via
TAC . Ttc
Si Chip

Ti
I
TAC
With Via
TK T,
Die Attach ET(4 layers) 0.4 63 63.4 0.4 54 54.4
Thermal Via 7145 BT(2layers) 0.41 66.4 66.81 0.43 54 54.43
Solder 30.1 8500
~ FCB I
I
50,50,0.3
I
I 12W
I
I 880
Table 4. Thermal performances of the packages with
and without thermal vias.
Molding I 1 I 1703 I loo0

r Substrate konductivid Density. I Scecific


. Heat I
material I
(WlmK) l(kg/m"3)1 (JkgK)
BT(4 lavers)/I 38.38.0.3 II 1200 II 880
ET(2 1ayers)l 16,16,0.23 I 1200 I 880
Aluminum I 320 I 3200 I 732
Nitride 1
Alumina I 38 I 3970 I 910

Table 2. Material properties used in the model

I I ~.
GaAsChio I Si Chio I
Substrate TA= To, T, TA, TK T,
material
BT(4 layers) 1.781 77.03 178.81 0.4 63 I I 63.4
BT(2 layers) 1.74 86.25 87.99 0.41 66.4 66.81

Nitride I
Alumina 12.03 I 64.34 I 66.37 10.41 159.5 I 59.91
I I I I I I I I
Table 3. Simulation results for the variety of materials

42 1 2002 Int'l Symposium on Electronic Materials and Packaging

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