You are on page 1of 12

EEE 303

Digital Electronics
Analysis and Synthesis
Rajat Chakraborty
Lecturer
Dept. of EEE, BUET
Analysis
❖ Analysis - To determine the function performed by an existing network

Given

Network
Synthesis
❖ Synthesis - To design a new network that implements a desired functional behaviour

Find

Network
Analysis Technique
Truth Table
Input Node Output

❖ LSB (𝑥2 ) changes (oscillates between 0 and 1) the most while MSB (𝑥1 ) changes
the least
❖ Total number of inputs = 2𝑛 where n= number of input bits
❖ Show the intermediate nodes
Timing Diagram

❖ LSB (𝑥2 ) changes the most (time period small) while MSB (𝑥1 ) changes the least
(time period large)
❖ Use 2X time period for every next bit from LSB
❖ Show the intermediate nodes
XOR Gate

Circuit Symbol
𝐿 = 𝑥𝑦ത + 𝑥𝑦
ҧ
Truth Table
Basic Gate Implementation
❖ If both inputs are same output is 0, if the inputs are different output is 1
❖ Symbol - ⊕ , ^

❖ 𝑥 ⊕ 0 = 𝑥 and 𝑥 ⊕ 0 = 𝑥ҧ → xor with 0 retains the input while xor with 1


complements the inptut
XNOR Gate
Try yourself first!!!

𝐿 =𝑥⊕𝑦
Circuit Symbol
Truth Table
❖ If both inputs are same output is 1, if the inputs are different output is 0

❖ 𝑥 ⊕ 0 = 𝑥ҧ 𝑎𝑛𝑑 𝑥 ⊕ 1 = 𝑥 → xnor with 1 retains the input while xnor with 0


complements the inptut
Synthesis
❖ Task- Addition of two one-digit binary numbers

Steps:

➢ Find out all the cases

➢ Form a truth table (make sure you have given all the inputs)

➢ Find out the required logic gates


Synthesis
Remember the
definition – It
helps

❖ 𝑠1 = 𝐴𝑁𝐷 →Output is 1 only when both the inputs are 1

❖ 𝑠2 = 𝑋𝑂𝑅 → Output is 0 when both inputs are same, output is 1 when inputs differ
More on XOR
Modulo 2 addition
❖ For many input XOR gate consider it as a modulo 2 addition

1. Sum all the inputs as using normal algebra


2. Divide by 2. The resultant modulus (remainder) is the output

Example:
𝐹𝑖𝑣𝑒 𝑖𝑛𝑝𝑢𝑡 𝑥𝑜𝑟: 𝟏 ⊕ 𝟎 ⊕ 𝟏 ⊕ 𝟏 ⊕ 𝟏 =? ? ?

1. 1+ 0 + 1 + 1 + 1 = 4
2. 4 ÷ 2 → Remainder is 0. So the output is 0.
❖ In another way, we can say that if the number of 1 is even the o/p is 0 and if the
number of 1 is odd o/p is 1
Summary

❖ Analysis and synthesis – definition and techniques

❖ Truth table and timing diagram

❖ XOR and XNOR gates

You might also like