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Config - AC
Config - AC
51]
[FILE VERSION=R2.00.001.001_00102366 DATE=2012-03-14 TIME=21:48:28]
[DEVICE TYPE=PCS-902 NAME=����ѹ��·��� � � �ױUHV_Line_Protection
INSTANCE=����ͨ����
· ���� � �װUniversal_Version ]
[TASK LEVEL1=250 LEVEL2=833.3:694.4 LEVEL3=5000 LEVEL4=20000]
[RACK NUM=1 MCPU=1]
[CARD NUM=16 MDSP=4]
ADDR=0 TYPE=#NR1302A
ADDR=1 TYPE=NR1101 COMP_NUM=7
SLAVE Goose : 1024:64:args
LCD Lcd : args
IEC103 Iec103 : args
IEC61850 Iec61850 : args
PRINT Print : args
CALLBACK Callback : args
DNP30 Dnp30 : args
ADDR=2 TYPE=@#NR1401-6I6U-1A40-A
ADDR=4 TYPE=NR1161 COMP_NUM=147
RX_HDLC RX_HDLC1 : args
LINK LINK1 : args
TASuperv TASuperv1 : args
TVSuperv TVSuperv1 : args
TVNSuperv TVNSuperv1 : args
Or16 Or163 : args
Or16 Or164 : args
EquipSelfcheck EquipSelfcheck1 : args
AdcSample AdcSample1 : args
Vol3P Vol3P1 : args
Cur3P Cur3P2 : args
CurSum3P CurSum3P1 : args
Cur1P Cur1P1 : args
VolSyn VolSyn1 : args
FreqCal FreqCal1 : args
BkrStatus BkrStatus1 : args
Or2 Or24 : args
OpenPole OpenPole1 : args
Calc Calc1 : args
OverLoad OverLoad1 : args
Or2 Or230 : args
Or16 Or161 : args
PickUp PickUp1 : args
AuxPickUp AuxPickUp1 : args
DIROCCalc DIROCCalc1 : args
DZMRelay DZMRelay1 : args
DTT DTT1 : args
LoadEnch LoadEnch1 : args
ZoneQuad ZoneQuad1 : args
Or4 Or46 : args
Or2 Or214 : args
Or3 Or31 : args
Or8 Or85 : args
Or2 Or216 : args
Or2 Or217 : args
PSD PSD1 : args
PilotROC PilotROC1 : args
Or2 Or215 : args
Or8 Or82 : args
Or2 Or28 : args
Or2 Or29 : args
Or2 Or210 : args
Or2 Or211 : args
Or2 Or212 : args
OR_Uint8 OR_Uint81 : args
OR_Uint8 OR_Uint83 : args
Or2 Or229 : args
Not Not4 : args
And2 And21 : args
And2 And22 : args
GPLogic GPLogic1 : args
Or2 Or213 : args
TX_HDLC TX_HDLC1 : args
Or4 Or44 : args
Not Not1 : args
HarmBlk1P HarmBlk1P1 : args
OverCurrent1P OverCurrent1P1 : args
OverCurrent1P OverCurrent1P2 : args
OverCurrent1P OverCurrent1P3 : args
OverCurrent1P OverCurrent1P4 : args
Or4 Or42 : args
Or4 Or410 : args
HarmBlk3P HarmBlk3P1 : args
OverCurrent3P OverCurrent3P1 : args
OverCurrent3P OverCurrent3P2 : args
OverCurrent3P OverCurrent3P3 : args
OverCurrent3P OverCurrent3P4 : args
Or4 Or43 : args
Or4 Or411 : args
Or2 Or219 : args
Or2 Or220 : args
Or2 Or221 : args
OR_Uint8 OR_Uint82 : args
Or2 Or223 : args
Or2 Or224 : args
Or2 Or225 : args
ZSOTF ZSOTF1 : args
ROCSOTF ROCSOTF1 : args
OCSRelay OCSRelay1 : args
ROCSRelay ROCSRelay1 : args
StbOC StbOC1 : args
UnderVoltage UnderVoltage1 : args
UnderVoltage UnderVoltage2 : args
OverVoltage OverVoltage1 : args
OverVoltage OverVoltage2 : args
Or2 Or27 : args
Not Not3 : args
And3 And31 : args
PDRelay PDRelay1 : args
BrkCond BrkCond1 : args
UnderFreq UnderFreq1 : args
OverFreq OverFreq1 : args
Or2 Or226 : args
Or3 Or34 : args
Or4 Or45 : args
Or2 Or25 : args
Or8 Or100 : args
Or2 Or222 : args
Or8 Or810 : args
Or2 Or227 : args
Or8 Or86 : args
Or16 Or162 : args
Or4 Or47 : args
Or8 Or87 : args
Or2 Or228 : args
Or2 Or241 : args
Or8 Or81 : args
Or8 Or811 : args
Or8 Or88 : args
OR_Uint8 OR_Uint84 : args
OR_Uint8 OR_Uint85 : args
OR_Uint8 OR_Uint86 : args
OR_Uint8 OR_Uint87 : args
Or3 Or33 : args
ORM_Uint8 ORM_Uint82 : args
Or3 Or36 : args
ORM_Uint8 ORM_Uint81 : args
PhSel PhSel1 : args
Or3 Or32 : args
TrpLogic TrpLogic1 : args
Or3 Or35 : args
Or3 Or37 : args
Or3 Or38 : args
CBTrpOut CBTrpOut1 : args
Or2 Or21 : args
ARLogicFunc ARLogicFunc1 : args
SynChkFunc SynChkFunc1 : args
Or8 Or83 : args
DSPComu DSPComu1 : args
Analog3To1 Analog3To11 : args
Or2 Or26 : args
Locator Locator1 : args
LogicBit LogicBit1 : args
ElemAndTrp ElemAndTrp1 : args
ElemAndTrp ElemAndTrp2 : args
ElemAndTrp ElemAndTrp3 : args
ElemAndTrp ElemAndTrp4 : args
Rbcsg Rbcsg1 : args
Or2 Or218 : args
Or2 Or281 : args
Not Not241 : args
Not Not242 : args
And2 And241 : args
Not Not243 : args
And2 And242 : args
And2 And243 : args
Not Not244 : args
ADDR=36 TYPE=NR1161
ADDR=5 TYPE=@#NR1213A
ADDR=6 TYPE=@NR1161 COMP_NUM=32
Out Out : args
DigitalOrder yk01 : args
OutObj OutObj01 : args
DigitalOrder yk02 : args
OutObj OutObj02 : args
DigitalOrder yk03 : args
OutObj OutObj03 : args
DigitalOrder yk04 : args
OutObj OutObj04 : args
DigitalOrder yk05 : args
OutObj OutObj05 : args
DigitalOrder yk06 : args
OutObj OutObj06 : args
DigitalOrder yk07 : args
OutObj OutObj07 : args
DigitalOrder yk08 : args
OutObj OutObj08 : args
DigitalOrder yk09 : args
OutObj OutObj09 : args
DigitalOrder yk10 : args
OutObj OutObj10 : args
Adc Adc : args
MC_Vol1P MC_Vol1P : args
RSYN RSYN : args
MC_Cur3P MC_Cur3P : args
BayMMXU BayMMXU : args
MC_Vol3P MC_Vol3P : args
MC_Cur1P MC_Cur1P : args
XCBR_XSWI DPOS : args
BayMHAN BayMHAN : args
BIinput BIinput : args
Energy Energy : args
ADDR=38 TYPE=@NR1161
ADDR=8 TYPE=@NR1504
ADDR=9 TYPE=@NR1504
ADDR=10 TYPE=@NR1504
ADDR=11 TYPE=@NR1521A
ADDR=12 TYPE=@NR1521A
ADDR=13 TYPE=@NR1521C
ADDR=14 TYPE=@NR1521C
ADDR=15 TYPE=@NR1521C
B01.Event.selfsuperv_refer_table B01.Lcd.selfsuperv_refer_table
B01.Iec103.selfsuperv_refer_table B01.Print.selfsuperv_refer_table
B01.Iec61850.selfsuperv_refer_table B01.Dnp30.selfsuperv_refer_table =
B01.slave_system_bs:51:1;\
B01.slave_system_bj:51:2;\
B01.master.board_config_error:51:3;\
B04.EquipSelfcheck1.cfgerr:51:4;\
B04.EquipSelfcheck1.seterr:51:5;\
B01.Event.setting_out_of_range:51:6;\
B01.master.setting_need_confirm:51:7;\
B04.EquipSelfcheck1.runing_chkerr:51:8;\
B04.EquipSelfcheck1.memerr:51:9;\
B04.EquipSelfcheck1.adcerr:51:10;\
B04.EquipSelfcheck1.alm_smpl:51:11;\
B04.DSPComu1.rx_err_dly:51:12;\
B04.DSPComu1.rx_err:51:13;\
B04.FreqCal1.alm_freq:51:14;\
B01.master.setting_error:51:15;\
B01.master.version_error:51:16;\
B01.Lcd.section_error:51:17;\
B01.Lcd.comm_test_enter:51:18;\
B08.NR1504_Din.Din3_X4:51:19;\
B01.SyncTime.pps_error:51:20;\
B04.TASuperv1.Alm_CTS:51:21;\
B04.TVSuperv1.chk_TV_Fail:51:22;\
B04.TVNSuperv1.chk_TV_Fail:51:23;\
B04.BkrStatus1.chk_Bkr_abn:51:24;\
B04.DSPComu1.rx_flg04:51:25;\
B04.DSPComu1.rx_flg05:51:26;\
B04.DTT1.Alm_TT:51:27;\
B04.UnderVoltage1.alm_uv:51:28;\
B04.UnderVoltage2.alm_uv:51:29;\
B04.OverVoltage1.alm_ov:51:30;\
B04.OverVoltage2.alm_ov:51:31;\
B04.OverLoad1.Alm_OvLd1:51:32;\
B04.OverLoad1.Alm_OvLd2:51:33;\
B04.SynChkFunc1.Alm_VTS_UB:51:34;\
B04.SynChkFunc1.Alm_VTS_UL:51:35;\
B04.ARLogicFunc1.Fail_AR:51:36;\
B04.ARLogicFunc1.Fail_SYN:51:37;\
B04.PSD1.PSStart:51:38;\
B04.RX_HDLC1.Com_Fail:51:39;\
B04.RX_HDLC1.GP_Code_Abn:51:40;\
B08.NR1504_Din.opt_err_flag:51:41;\
B09.NR1504_Din.opt_err_flag:51:42;\
B10.NR1504_Din.opt_err_flag:51:43;\
B04.EquipSelfcheck1.alarm0:51:44;\
B04.EquipSelfcheck1.alarm1:51:45;\
B04.EquipSelfcheck1.alarm2:51:46;\
B04.EquipSelfcheck1.alarm3:51:47;\
B04.EquipSelfcheck1.alarm4:51:48;\
B04.EquipSelfcheck1.alarm5:51:49;\
B04.EquipSelfcheck1.alarm6:51:50;\
B04.EquipSelfcheck1.alarm7:51:51;\
B01.goose.netstorm_warning_1:51:52;\
B01.goose.netstorm_warning_2:51:53;\
B01.goose.strap_cfg_err:51:54;\
B01.goose.link_down_a_0:51:55;\
B01.goose.link_down_b_0:51:56;\
B01.goose.goose_cfg_err_0:51:57;\
B01.goose.link_down_a_1:51:58;\
B01.goose.link_down_b_1:51:59;\
B01.goose.goose_cfg_err_1:51:60;\
B01.goose.link_down_a_2:51:61;\
B01.goose.link_down_b_2:51:62;\
B01.goose.goose_cfg_err_2:51:63;\
B01.goose.link_down_a_3:51:64;\
B01.goose.link_down_b_3:51:65;\
B01.goose.goose_cfg_err_3:51:66;\
B01.goose.link_down_a_4:51:69;\
B01.goose.link_down_b_4:51:70;\
B01.goose.goose_cfg_err_4:51:71;\
B01.goose.link_down_a_5:51:72;\
B01.goose.link_down_b_5:51:73;\
B01.goose.goose_cfg_err_5:51:74;\
B01.goose.link_down_a_6:51:75;\
B01.goose.link_down_b_6:51:76;\
B01.goose.goose_cfg_err_6:51:77;\
B01.goose.link_down_a_7:51:78;\
B01.goose.link_down_b_7:51:79;\
B01.goose.goose_cfg_err_7:51:80;\
B01.goose.link_down_a_8:51:81;\
B01.goose.link_down_b_8:51:82;\
B01.goose.goose_cfg_err_8:51:83;\
B01.goose.link_down_a_9:51:84;\
B01.goose.link_down_b_9:51:85;\
B01.goose.goose_cfg_err_9:51:86;\
B01.goose.link_down_a_10:51:87;\
B01.goose.link_down_b_10:51:88;\
B01.goose.goose_cfg_err_10:51:89;\
B01.goose.link_down_a_11:51:90;\
B01.goose.link_down_b_11:51:91;\
B01.goose.goose_cfg_err_11:51:92;\
B01.goose.link_down_a_12:51:93;\
B01.goose.link_down_b_12:51:94;\
B01.goose.goose_cfg_err_12:51:95;\
B01.goose.link_down_a_13:51:96;\
B01.goose.link_down_b_13:51:97;\
B01.goose.goose_cfg_err_13:51:98;\
B01.goose.link_down_a_14:51:99;\
B01.goose.link_down_b_14:51:100;\
B01.goose.goose_cfg_err_14:51:101;\
B01.goose.link_down_a_15:51:102;\
B01.goose.link_down_b_15:51:103;\
B01.goose.goose_cfg_err_15:51:104;\
B01.goose.link_down_a_16:51:105;\
B01.goose.link_down_b_16:51:106;\
B01.goose.goose_cfg_err_16:51:107;\
B01.goose.link_down_a_17:51:108;\
B01.goose.link_down_b_17:51:109;\
B01.goose.goose_cfg_err_17:51:110;\
B01.goose.link_down_a_18:51:111;\
B01.goose.link_down_b_18:51:112;\
B01.goose.goose_cfg_err_18:51:113;\
B01.goose.link_down_a_19:51:114;\
B01.goose.link_down_b_19:51:115;\
B01.goose.goose_cfg_err_19:51:116;\
B01.goose.link_down_a_20:51:117;\
B01.goose.link_down_b_20:51:118;\
B01.goose.goose_cfg_err_20:51:119;\
B01.goose.link_down_a_21:51:120;\
B01.goose.link_down_b_21:51:121;\
B01.goose.goose_cfg_err_21:51:122;\
B01.goose.link_down_a_22:51:123;\
B01.goose.link_down_b_22:51:124;\
B01.goose.goose_cfg_err_22:51:125;\
B01.goose.link_down_a_23:51:126;\
B01.goose.link_down_b_23:51:127;\
B01.goose.goose_cfg_err_23:51:128;\
B01.goose.link_down_a_24:51:129;\
B01.goose.link_down_b_24:51:130;\
B01.goose.goose_cfg_err_24:51:131;\
B01.goose.link_down_a_25:51:132;\
B01.goose.link_down_b_25:51:133;\
B01.goose.goose_cfg_err_25:51:134;\
B01.goose.link_down_a_26:51:135;\
B01.goose.link_down_b_26:51:136;\
B01.goose.goose_cfg_err_26:51:137;\
B01.goose.link_down_a_27:51:138;\
B01.goose.link_down_b_27:51:139;\
B01.goose.goose_cfg_err_27:51:140;\
B01.goose.link_down_a_28:51:141;\
B01.goose.link_down_b_28:51:142;\
B01.goose.goose_cfg_err_28:51:143;\
B01.goose.link_down_a_29:51:144;\
B01.goose.link_down_b_29:51:145;\
B01.goose.goose_cfg_err_29:51:146;\
B01.goose.link_down_a_30:51:147;\
B01.goose.link_down_b_30:51:148;\
B01.goose.goose_cfg_err_30:51:149;\
B01.goose.link_down_a_31:51:150;\
B01.goose.link_down_b_31:51:151;\
B01.goose.goose_cfg_err_31:51:152;\
B01.goose.link_down_a_32:51:153;\
B01.goose.link_down_b_32:51:154;\
B01.goose.goose_cfg_err_32:51:155;\
B01.goose.link_down_a_33:51:156;\
B01.goose.link_down_b_33:51:157;\
B01.goose.goose_cfg_err_33:51:158;\
B01.goose.link_down_a_34:51:159;\
B01.goose.link_down_b_34:51:160;\
B01.goose.goose_cfg_err_34:51:161;\
B01.goose.link_down_a_35:51:162;\
B01.goose.link_down_b_35:51:163;\
B01.goose.goose_cfg_err_35:51:164;\
B01.goose.link_down_a_36:51:165;\
B01.goose.link_down_b_36:51:166;\
B01.goose.goose_cfg_err_36:51:167;\
B01.goose.link_down_a_37:51:168;\
B01.goose.link_down_b_37:51:169;\
B01.goose.goose_cfg_err_37:51:170;\
B01.goose.link_down_a_38:51:171;\
B01.goose.link_down_b_38:51:172;\
B01.goose.goose_cfg_err_38:51:173;\
B01.goose.link_down_a_39:51:174;\
B01.goose.link_down_b_39:51:175;\
B01.goose.goose_cfg_err_39:51:176;\
B01.goose.link_down_a_40:51:177;\
B01.goose.link_down_b_40:51:178;\
B01.goose.goose_cfg_err_40:51:179;\
B01.goose.link_down_a_41:51:180;\
B01.goose.link_down_b_41:51:181;\
B01.goose.goose_cfg_err_41:51:182;\
B01.goose.link_down_a_42:51:183;\
B01.goose.link_down_b_42:51:184;\
B01.goose.goose_cfg_err_42:51:185;\
B01.goose.link_down_a_43:51:186;\
B01.goose.link_down_b_43:51:187;\
B01.goose.goose_cfg_err_43:51:188;\
B01.goose.link_down_a_44:51:189;\
B01.goose.link_down_b_44:51:190;\
B01.goose.goose_cfg_err_44:51:191;\
B01.goose.link_down_a_45:51:192;\
B01.goose.link_down_b_45:51:193;\
B01.goose.goose_cfg_err_45:51:194;\
B01.goose.link_down_a_46:51:195;\
B01.goose.link_down_b_46:51:196;\
B01.goose.goose_cfg_err_46:51:197;\
B01.goose.link_down_a_47:51:198;\
B01.goose.link_down_b_47:51:199;\
B01.goose.goose_cfg_err_47:51:200;\
B01.goose.link_down_a_48:51:201;\
B01.goose.link_down_b_48:51:202;\
B01.goose.goose_cfg_err_48:51:203;\
B01.goose.link_down_a_49:51:204;\
B01.goose.link_down_b_49:51:205;\
B01.goose.goose_cfg_err_49:51:206;\
B01.goose.link_down_a_50:51:207;\
B01.goose.link_down_b_50:51:208;\
B01.goose.goose_cfg_err_50:51:209;\
B01.goose.link_down_a_51:51:210;\
B01.goose.link_down_b_51:51:211;\
B01.goose.goose_cfg_err_51:51:212;\
B01.goose.link_down_a_52:51:213;\
B01.goose.link_down_b_52:51:214;\
B01.goose.goose_cfg_err_52:51:215;\
B01.goose.link_down_a_53:51:216;\
B01.goose.link_down_b_53:51:217;\
B01.goose.goose_cfg_err_53:51:218;\
B01.goose.link_down_a_54:51:219;\
B01.goose.link_down_b_54:51:220;\
B01.goose.goose_cfg_err_54:51:221;\
B01.goose.link_down_a_55:51:222;\
B01.goose.link_down_b_55:51:223;\
B01.goose.goose_cfg_err_55:51:224;\
B01.goose.link_down_a_56:51:225;\
B01.goose.link_down_b_56:51:226;\
B01.goose.goose_cfg_err_56:51:227;\
B01.goose.link_down_a_57:51:228;\
B01.goose.link_down_b_57:51:229;\
B01.goose.goose_cfg_err_57:51:230;\
B01.goose.link_down_a_58:51:231;\
B01.goose.link_down_b_58:51:232;\
B01.goose.goose_cfg_err_58:51:233;\
B01.goose.link_down_a_59:51:234;\
B01.goose.link_down_b_59:51:235;\
B01.goose.goose_cfg_err_59:51:236;\
B01.goose.link_down_a_60:51:237;\
B01.goose.link_down_b_60:51:238;\
B01.goose.goose_cfg_err_60:51:239;\
B01.goose.link_down_a_61:51:240;\
B01.goose.link_down_b_61:51:241;\
B01.goose.goose_cfg_err_61:51:242;\
B01.goose.link_down_a_62:51:243;\
B01.goose.link_down_b_62:51:244;\
B01.goose.goose_cfg_err_62:51:245;\
B01.goose.link_down_a_63:51:246;\
B01.goose.link_down_b_63:51:247;\
B01.goose.goose_cfg_err_63:51:248;\
B06.Common.alm_adc_err:51:67;\
B06.Common.alm_set_err:51:68
B01.Event.binchg_refer_table B01.Lcd.binchg_refer_table
B01.Iec103.binchg_refer_table B01.Print.binchg_refer_table
B01.Iec61850.binchg_refer_table B01.Dnp30.binchg_refer_table =
B08.NR1504_Din.Din4_X5:52:1:1;\
B08.NR1504_Din.Din5_X6:52:2:1;\
B08.NR1504_Din.Din6_X7:52:3:1;\
B08.NR1504_Din.Din7_X9:52:4:1;\
B08.NR1504_Din.Din8_X10:52:5:1;\
B08.NR1504_Din.Din9_X11:52:6:1;\
B08.NR1504_Din.Din10_X12:52:7:1;\
B08.NR1504_Din.Din11_X13:52:8:1;\
B08.NR1504_Din.Din12_X14:52:9:1;\
B08.NR1504_Din.Din13_X16:52:10:1;\
B08.NR1504_Din.Din14_X17:52:11:1;\
B08.NR1504_Din.Din15_X18:52:12:1;\
B08.NR1504_Din.Din16_X19:52:13:1;\
B08.NR1504_Din.Din17_X20:52:14:1;\
B08.NR1504_Din.Din18_X21:52:15:1;\
B09.NR1504_Din.Din1_X2:52:16:1;\
B09.NR1504_Din.Din2_X3:52:17:1;\
B09.NR1504_Din.Din3_X4:52:18:1;\
B09.NR1504_Din.Din4_X5:52:19:1;\
B09.NR1504_Din.Din5_X6:52:20:1;\
B09.NR1504_Din.Din6_X7:52:21:1;\
B09.NR1504_Din.Din7_X9:52:22:1;\
B09.NR1504_Din.Din8_X10:52:23:1;\
B09.NR1504_Din.Din9_X11:52:24:1;\
B09.NR1504_Din.Din10_X12:52:25:1;\
B09.NR1504_Din.Din11_X13:52:26:1;\
B09.NR1504_Din.Din12_X14:52:27:1;\
B09.NR1504_Din.Din13_X16:52:28:1;\
B09.NR1504_Din.Din14_X17:52:29:1;\
B09.NR1504_Din.Din15_X18:52:30:1;\
B09.NR1504_Din.Din16_X19:52:31:1;\
B09.NR1504_Din.Din17_X20:52:32:1;\
B09.NR1504_Din.Din18_X21:52:33:1;\
B10.NR1504_Din.Din1_X2:52:34:1;\
B10.NR1504_Din.Din2_X3:52:35:1;\
B10.NR1504_Din.Din3_X4:52:36:1;\
B10.NR1504_Din.Din4_X5:52:37:1;\
B10.NR1504_Din.Din5_X6:52:38:1;\
B10.NR1504_Din.Din6_X7:52:39:1;\
B10.NR1504_Din.Din7_X9:52:40:1;\
B10.NR1504_Din.Din8_X10:52:41:1;\
B10.NR1504_Din.Din9_X11:52:42:1;\
B10.NR1504_Din.Din10_X12:52:43:1;\
B10.NR1504_Din.Din11_X13:52:44:1;\
B10.NR1504_Din.Din12_X14:52:45:1;\
B10.NR1504_Din.Din13_X16:52:46:1;\
B10.NR1504_Din.Din14_X17:52:47:1;\
B10.NR1504_Din.Din15_X18:52:48:1;\
B10.NR1504_Din.Din16_X19:52:49:1;\
B10.NR1504_Din.Din17_X20:52:50:1;\
B10.NR1504_Din.Din18_X21:52:51:1;\
B04.RX_HDLC1.Rev_CMD8:52:79:1;\
B04.RX_HDLC1.Rev_CMD9:52:80:1;\
B04.RX_HDLC1.Rev_CMD10:52:81:1;\
B04.RX_HDLC1.Rev_CMD11:52:82:1;\
B04.RX_HDLC1.Rev_CMD0:52:83:1;\
B04.RX_HDLC1.Rev_CMD1:52:84:1;\
B04.RX_HDLC1.Rev_CMD2:52:85:1;\
B04.RX_HDLC1.Rev_CMD3:52:86:1;\
B04.RX_HDLC1.Rev_CMD4:52:87:1;\
B04.RX_HDLC1.Rev_CMD5:52:88:1;\
B04.RX_HDLC1.Rev_CMD6:52:89:1;\
B04.RX_HDLC1.Rev_CMD7:52:90:1;\
B04.LINK1.out_bit1:52:91:1;\
B04.LINK1.out_bit2:52:92:1;\
B04.LINK1.out_bit3:52:93:1;\
B04.LINK1.out_bit4:52:94:1;\
B04.LINK1.out_bit5:52:95:1;\
B04.LINK1.out_bit6:52:96:1;\
B04.LINK1.out_bit7:52:97:1;\
B04.LINK1.out_bit8:52:98:1;\
B04.UnderFreq1.Fd:52:99:0;\
B04.OverFreq1.Fd:52:100:0;\
B06.yk01.enaopn:52:101:1:0;\
B06.yk01.enacls:52:102:1:0;\
B06.yk02.enaopn:52:103:1:0;\
B06.yk02.enacls:52:104:1:0;\
B06.yk03.enaopn:52:105:1:0;\
B06.yk03.enacls:52:106:1:0;\
B06.yk04.enaopn:52:107:1:0;\
B06.yk04.enacls:52:108:1:0;\
B06.yk05.enaopn:52:109:1:0;\
B06.yk05.enacls:52:110:1:0;\
B06.yk06.enaopn:52:111:1:0;\
B06.yk06.enacls:52:112:1:0;\
B06.yk07.enaopn:52:113:1:0;\
B06.yk07.enacls:52:114:1:0;\
B06.yk08.enaopn:52:115:1:0;\
B06.yk08.enacls:52:116:1:0;\
B06.yk09.enaopn:52:117:1:0;\
B06.yk09.enacls:52:118:1:0;\
B06.yk10.enaopn:52:119:1:0;\
B06.yk10.enacls:52:120:1:0;\
B06.DPOS.DPOS1:52:121:1:0;\
B06.DPOS.DPOS2:52:122:1:0;\
B06.DPOS.DPOS3:52:123:1:0;\
B06.DPOS.DPOS4:52:124:1:0;\
B06.DPOS.DPOS5:52:125:1:0;\
B06.DPOS.DPOS6:52:126:1:0;\
B06.DPOS.DPOS7:52:127:1:0;\
B06.DPOS.DPOS8:52:128:1:0;\
B06.DPOS.DPOS9:52:129:1:0;\
B06.DPOS.DPOS10:52:130:1:0;\
B06.DPOS.DPOS1_TWJ:52:131:1:0;\
B06.DPOS.DPOS2_TWJ:52:132:1:0;\
B06.DPOS.DPOS3_TWJ:52:133:1:0;\
B06.DPOS.DPOS4_TWJ:52:134:1:0;\
B06.DPOS.DPOS5_TWJ:52:135:1:0;\
B06.DPOS.DPOS6_TWJ:52:136:1:0;\
B06.DPOS.DPOS7_TWJ:52:137:1:0;\
B06.DPOS.DPOS8_TWJ:52:138:1:0;\
B06.DPOS.DPOS9_TWJ:52:139:1:0;\
B06.DPOS.DPOS10_TWJ:52:140:1:0;\
B06.DPOS.DPOS1_HWJ:52:141:1:0;\
B06.DPOS.DPOS2_HWJ:52:142:1:0;\
B06.DPOS.DPOS3_HWJ:52:143:1:0;\
B06.DPOS.DPOS4_HWJ:52:144:1:0;\
B06.DPOS.DPOS5_HWJ:52:145:1:0;\
B06.DPOS.DPOS6_HWJ:52:146:1:0;\
B06.DPOS.DPOS7_HWJ:52:147:1:0;\
B06.DPOS.DPOS8_HWJ:52:148:1:0;\
B06.DPOS.DPOS9_HWJ:52:149:1:0;\
B06.DPOS.DPOS10_HWJ:52:150:1:0;\
B01.goose.rx_ena_0:52:151:0;\
B01.goose.rx_ena_1:52:152:0;\
B01.goose.rx_ena_2:52:153:0;\
B01.goose.rx_ena_3:52:154:0;\
B01.goose.rx_ena_4:52:155:0;\
B01.goose.rx_ena_5:52:156:0;\
B01.goose.rx_ena_6:52:157:0;\
B01.goose.rx_ena_7:52:158:0;\
B01.goose.rx_ena_8:52:159:0;\
B01.goose.rx_ena_9:52:160:0;\
B01.goose.rx_ena_10:52:161:0;\
B01.goose.rx_ena_11:52:162:0;\
B01.goose.rx_ena_12:52:163:0;\
B01.goose.rx_ena_13:52:164:0;\
B01.goose.rx_ena_14:52:165:0;\
B01.goose.rx_ena_15:52:166:0;\
B01.goose.rx_ena_16:52:167:0;\
B01.goose.rx_ena_17:52:168:0;\
B01.goose.rx_ena_18:52:169:0;\
B01.goose.rx_ena_19:52:170:0;\
B01.goose.rx_ena_20:52:171:0;\
B01.goose.rx_ena_21:52:172:0;\
B01.goose.rx_ena_22:52:173:0;\
B01.goose.rx_ena_23:52:174:0;\
B01.goose.rx_ena_24:52:175:0;\
B01.goose.rx_ena_25:52:176:0;\
B01.goose.rx_ena_26:52:177:0;\
B01.goose.rx_ena_27:52:178:0;\
B01.goose.rx_ena_28:52:179:0;\
B01.goose.rx_ena_29:52:180:0;\
B01.goose.rx_ena_30:52:181:0;\
B01.goose.rx_ena_31:52:182:0;\
B01.goose.rx_ena_32:52:183:0;\
B01.goose.rx_ena_33:52:184:0;\
B01.goose.rx_ena_34:52:185:0;\
B01.goose.rx_ena_35:52:186:0;\
B01.goose.rx_ena_36:52:187:0;\
B01.goose.rx_ena_37:52:188:0;\
B01.goose.rx_ena_38:52:189:0;\
B01.goose.rx_ena_39:52:190:0;\
B01.goose.rx_ena_40:52:191:0;\
B01.goose.rx_ena_41:52:192:0;\
B01.goose.rx_ena_42:52:193:0;\
B01.goose.rx_ena_43:52:194:0;\
B01.goose.rx_ena_44:52:195:0;\
B01.goose.rx_ena_45:52:196:0;\
B01.goose.rx_ena_46:52:197:0;\
B01.goose.rx_ena_47:52:198:0;\
B01.goose.rx_ena_48:52:199:0;\
B01.goose.rx_ena_49:52:200:0;\
B01.goose.rx_ena_50:52:201:0;\
B01.goose.rx_ena_51:52:202:0;\
B01.goose.rx_ena_52:52:203:0;\
B01.goose.rx_ena_53:52:204:0;\
B01.goose.rx_ena_54:52:205:0;\
B01.goose.rx_ena_55:52:206:0;\
B01.goose.rx_ena_56:52:207:0;\
B01.goose.rx_ena_57:52:208:0;\
B01.goose.rx_ena_58:52:209:0;\
B01.goose.rx_ena_59:52:210:0;\
B01.goose.rx_ena_60:52:211:0;\
B01.goose.rx_ena_61:52:212:0;\
B01.goose.rx_ena_62:52:213:0;\
B01.goose.rx_ena_63:52:214:0;\
B08.NR1504_Din.Din2_X3:52:230:1;\
B08.NR1504_Din.Din3_X4:52:231:1
B01.Lcd.GOOSE_Inputs_refer_table =
B01.GS_RECV_BOOL1.out1;\
B01.GS_RECV_BOOL1.out2;\
B01.GS_RECV_BOOL1.out1_ok;\
B01.GS_RECV_BOOL1.out2_ok;\
B01.GS_RECV_BOOL1.out3;\
B01.GS_RECV_BOOL1.out3_ok
B01.Lcd.Prot_Ch_Inputs_refer_table =
B04.RX_HDLC1.Rev_CMD8;\
B04.RX_HDLC1.Rev_CMD9;\
B04.RX_HDLC1.Rev_CMD10;\
B04.RX_HDLC1.Rev_CMD11;\
B04.RX_HDLC1.Rev_CMD0;\
B04.RX_HDLC1.Rev_CMD1;\
B04.RX_HDLC1.Rev_CMD2;\
B04.RX_HDLC1.Rev_CMD3;\
B04.RX_HDLC1.Rev_CMD4;\
B04.RX_HDLC1.Rev_CMD5;\
B04.RX_HDLC1.Rev_CMD6;\
B04.RX_HDLC1.Rev_CMD7
B01.Lcd.Interlock_Status_refer_table =
B06.yk01.enaopn;\
B06.yk01.enacls;\
B06.yk02.enaopn;\
B06.yk02.enacls;\
B06.yk03.enaopn;\
B06.yk03.enacls;\
B06.yk04.enaopn;\
B06.yk04.enacls;\
B06.yk05.enaopn;\
B06.yk05.enacls;\
B06.yk06.enaopn;\
B06.yk06.enacls;\
B06.yk07.enaopn;\
B06.yk07.enacls;\
B06.yk08.enaopn;\
B06.yk08.enacls;\
B06.yk09.enaopn;\
B06.yk09.enacls;\
B06.yk10.enaopn;\
B06.yk10.enacls
B01.Lcd.Contact_Outputs_refer_table = ;
B01.Lcd.GOOSE_Outputs_refer_table = ;
B01.Lcd.Prot_Ch_Outputs_refer_table =
B04.GPLogic1.FX;\
B04.GPLogic1.FXB;\
B04.GPLogic1.FXC;\
B04.GPLogic1.FX_DEF
B01.Lcd.Prot_Superv_refer_table =
B01.slave_system_bs;\
B01.slave_system_bj;\
B01.master.board_config_error;\
B04.EquipSelfcheck1.cfgerr;\
B04.EquipSelfcheck1.seterr;\
B01.Event.setting_out_of_range;\
B01.master.setting_need_confirm;\
B04.EquipSelfcheck1.runing_chkerr;\
B04.EquipSelfcheck1.memerr;\
B04.EquipSelfcheck1.adcerr;\
B04.DSPComu1.rx_err_dly;\
B04.DSPComu1.rx_err;\
B04.FreqCal1.alm_freq;\
B01.master.setting_error;\
B01.master.version_error;\
B01.Lcd.section_error;\
B01.Lcd.comm_test_enter;\
B08.NR1504_Din.Din3_X4;\
B01.SyncTime.pps_error;\
B04.TASuperv1.Alm_CTS;\
B04.TVSuperv1.chk_TV_Fail;\
B04.TVNSuperv1.chk_TV_Fail;\
B04.BkrStatus1.chk_Bkr_abn;\
B04.DSPComu1.rx_flg04;\
B04.DSPComu1.rx_flg05;\
B04.DTT1.Alm_TT;\
B04.UnderVoltage1.alm_uv;\
B04.UnderVoltage2.alm_uv;\
B04.OverVoltage1.alm_ov;\
B04.OverVoltage2.alm_ov;\
B04.OverLoad1.Alm_OvLd1;\
B04.OverLoad1.Alm_OvLd2;\
B04.SynChkFunc1.Alm_VTS_UB;\
B04.SynChkFunc1.Alm_VTS_UL;\
B04.ARLogicFunc1.Fail_AR;\
B04.ARLogicFunc1.Fail_SYN;\
B04.PSD1.PSStart;\
B04.RX_HDLC1.Com_Fail;\
B04.RX_HDLC1.GP_Code_Abn;\
B08.NR1504_Din.opt_err_flag;\
B09.NR1504_Din.opt_err_flag;\
B10.NR1504_Din.opt_err_flag;\
B04.EquipSelfcheck1.alarm0;\
B04.EquipSelfcheck1.alarm1;\
B04.EquipSelfcheck1.alarm2;\
B04.EquipSelfcheck1.alarm3;\
B04.EquipSelfcheck1.alarm4;\
B04.EquipSelfcheck1.alarm5;\
B04.EquipSelfcheck1.alarm6;\
B04.EquipSelfcheck1.alarm7
B01.Lcd.FD_Superv_refer_table = ;
B01.Lcd.GOOSE_Superv_refer_table =
B01.goose.netstorm_warning_1;\
B01.goose.netstorm_warning_2;\
B01.goose.strap_cfg_err;\
B01.goose.link_down_a_0;\
B01.goose.link_down_b_0;\
B01.goose.goose_cfg_err_0;\
B01.goose.link_down_a_1;\
B01.goose.link_down_b_1;\
B01.goose.goose_cfg_err_1;\
B01.goose.link_down_a_2;\
B01.goose.link_down_b_2;\
B01.goose.goose_cfg_err_2;\
B01.goose.link_down_a_3;\
B01.goose.link_down_b_3;\
B01.goose.goose_cfg_err_3;\
B01.goose.link_down_a_4;\
B01.goose.link_down_b_4;\
B01.goose.goose_cfg_err_4;\
B01.goose.link_down_a_5;\
B01.goose.link_down_b_5;\
B01.goose.goose_cfg_err_5;\
B01.goose.link_down_a_6;\
B01.goose.link_down_b_6;\
B01.goose.goose_cfg_err_6;\
B01.goose.link_down_a_7;\
B01.goose.link_down_b_7;\
B01.goose.goose_cfg_err_7;\
B01.goose.link_down_a_8;\
B01.goose.link_down_b_8;\
B01.goose.goose_cfg_err_8;\
B01.goose.link_down_a_9;\
B01.goose.link_down_b_9;\
B01.goose.goose_cfg_err_9;\
B01.goose.link_down_a_10;\
B01.goose.link_down_b_10;\
B01.goose.goose_cfg_err_10;\
B01.goose.link_down_a_11;\
B01.goose.link_down_b_11;\
B01.goose.goose_cfg_err_11;\
B01.goose.link_down_a_12;\
B01.goose.link_down_b_12;\
B01.goose.goose_cfg_err_12;\
B01.goose.link_down_a_13;\
B01.goose.link_down_b_13;\
B01.goose.goose_cfg_err_13;\
B01.goose.link_down_a_14;\
B01.goose.link_down_b_14;\
B01.goose.goose_cfg_err_14;\
B01.goose.link_down_a_15;\
B01.goose.link_down_b_15;\
B01.goose.goose_cfg_err_15;\
B01.goose.link_down_a_16;\
B01.goose.link_down_b_16;\
B01.goose.goose_cfg_err_16;\
B01.goose.link_down_a_17;\
B01.goose.link_down_b_17;\
B01.goose.goose_cfg_err_17;\
B01.goose.link_down_a_18;\
B01.goose.link_down_b_18;\
B01.goose.goose_cfg_err_18;\
B01.goose.link_down_a_19;\
B01.goose.link_down_b_19;\
B01.goose.goose_cfg_err_19;\
B01.goose.link_down_a_20;\
B01.goose.link_down_b_20;\
B01.goose.goose_cfg_err_20;\
B01.goose.link_down_a_21;\
B01.goose.link_down_b_21;\
B01.goose.goose_cfg_err_21;\
B01.goose.link_down_a_22;\
B01.goose.link_down_b_22;\
B01.goose.goose_cfg_err_22;\
B01.goose.link_down_a_23;\
B01.goose.link_down_b_23;\
B01.goose.goose_cfg_err_23;\
B01.goose.link_down_a_24;\
B01.goose.link_down_b_24;\
B01.goose.goose_cfg_err_24;\
B01.goose.link_down_a_25;\
B01.goose.link_down_b_25;\
B01.goose.goose_cfg_err_25;\
B01.goose.link_down_a_26;\
B01.goose.link_down_b_26;\
B01.goose.goose_cfg_err_26;\
B01.goose.link_down_a_27;\
B01.goose.link_down_b_27;\
B01.goose.goose_cfg_err_27;\
B01.goose.link_down_a_28;\
B01.goose.link_down_b_28;\
B01.goose.goose_cfg_err_28;\
B01.goose.link_down_a_29;\
B01.goose.link_down_b_29;\
B01.goose.goose_cfg_err_29;\
B01.goose.link_down_a_30;\
B01.goose.link_down_b_30;\
B01.goose.goose_cfg_err_30;\
B01.goose.link_down_a_31;\
B01.goose.link_down_b_31;\
B01.goose.goose_cfg_err_31;\
B01.goose.link_down_a_32;\
B01.goose.link_down_b_32;\
B01.goose.goose_cfg_err_32;\
B01.goose.link_down_a_33;\
B01.goose.link_down_b_33;\
B01.goose.goose_cfg_err_33;\
B01.goose.link_down_a_34;\
B01.goose.link_down_b_34;\
B01.goose.goose_cfg_err_34;\
B01.goose.link_down_a_35;\
B01.goose.link_down_b_35;\
B01.goose.goose_cfg_err_35;\
B01.goose.link_down_a_36;\
B01.goose.link_down_b_36;\
B01.goose.goose_cfg_err_36;\
B01.goose.link_down_a_37;\
B01.goose.link_down_b_37;\
B01.goose.goose_cfg_err_37;\
B01.goose.link_down_a_38;\
B01.goose.link_down_b_38;\
B01.goose.goose_cfg_err_38;\
B01.goose.link_down_a_39;\
B01.goose.link_down_b_39;\
B01.goose.goose_cfg_err_39;\
B01.goose.link_down_a_40;\
B01.goose.link_down_b_40;\
B01.goose.goose_cfg_err_40;\
B01.goose.link_down_a_41;\
B01.goose.link_down_b_41;\
B01.goose.goose_cfg_err_41;\
B01.goose.link_down_a_42;\
B01.goose.link_down_b_42;\
B01.goose.goose_cfg_err_42;\
B01.goose.link_down_a_43;\
B01.goose.link_down_b_43;\
B01.goose.goose_cfg_err_43;\
B01.goose.link_down_a_44;\
B01.goose.link_down_b_44;\
B01.goose.goose_cfg_err_44;\
B01.goose.link_down_a_45;\
B01.goose.link_down_b_45;\
B01.goose.goose_cfg_err_45;\
B01.goose.link_down_a_46;\
B01.goose.link_down_b_46;\
B01.goose.goose_cfg_err_46;\
B01.goose.link_down_a_47;\
B01.goose.link_down_b_47;\
B01.goose.goose_cfg_err_47;\
B01.goose.link_down_a_48;\
B01.goose.link_down_b_48;\
B01.goose.goose_cfg_err_48;\
B01.goose.link_down_a_49;\
B01.goose.link_down_b_49;\
B01.goose.goose_cfg_err_49;\
B01.goose.link_down_a_50;\
B01.goose.link_down_b_50;\
B01.goose.goose_cfg_err_50;\
B01.goose.link_down_a_51;\
B01.goose.link_down_b_51;\
B01.goose.goose_cfg_err_51;\
B01.goose.link_down_a_52;\
B01.goose.link_down_b_52;\
B01.goose.goose_cfg_err_52;\
B01.goose.link_down_a_53;\
B01.goose.link_down_b_53;\
B01.goose.goose_cfg_err_53;\
B01.goose.link_down_a_54;\
B01.goose.link_down_b_54;\
B01.goose.goose_cfg_err_54;\
B01.goose.link_down_a_55;\
B01.goose.link_down_b_55;\
B01.goose.goose_cfg_err_55;\
B01.goose.link_down_a_56;\
B01.goose.link_down_b_56;\
B01.goose.goose_cfg_err_56;\
B01.goose.link_down_a_57;\
B01.goose.link_down_b_57;\
B01.goose.goose_cfg_err_57;\
B01.goose.link_down_a_58;\
B01.goose.link_down_b_58;\
B01.goose.goose_cfg_err_58;\
B01.goose.link_down_a_59;\
B01.goose.link_down_b_59;\
B01.goose.goose_cfg_err_59;\
B01.goose.link_down_a_60;\
B01.goose.link_down_b_60;\
B01.goose.goose_cfg_err_60;\
B01.goose.link_down_a_61;\
B01.goose.link_down_b_61;\
B01.goose.goose_cfg_err_61;\
B01.goose.link_down_a_62;\
B01.goose.link_down_b_62;\
B01.goose.goose_cfg_err_62;\
B01.goose.link_down_a_63;\
B01.goose.link_down_b_63;\
B01.goose.goose_cfg_err_63
B01.Lcd.Mon/Ctrl_Superv_refer_table =
B06.Common.alm_adc_err;\
B06.Common.alm_set_err
B01.Lcd.Measurements1_refer_table =
B04.CurSum3P1.IA;\
B04.CurSum3P1.IB;\
B04.CurSum3P1.IC;\
B04.CurSum3P1.I1;\
B04.CurSum3P1.I2;\
B04.CurSum3P1.3I0;\
B04.Cur1P1.In;\
B04.Vol3P1.UA;\
B04.Vol3P1.UB;\
B04.Vol3P1.UC;\
B04.Vol3P1.UAB;\
B04.Vol3P1.UBC;\
B04.Vol3P1.UCA;\
B04.VolSyn1.USYN;\
B04.Vol3P1.U1;\
B04.Vol3P1.U2;\
B04.Vol3P1.3U0;\
B04.Vol3P1.phase_ab;\
B04.Vol3P1.phase_bc;\
B04.Vol3P1.phase_ca;\
B04.Calc1.phase_ua_ia;\
B04.Calc1.phase_ub_ib;\
B04.Calc1.phase_uc_ic;\
B04.SynChkFunc1.f_Line;\
B04.SynChkFunc1.f_Bus;\
B04.SynChkFunc1.f_Diff;\
B04.SynChkFunc1.phi_Diff;\
B04.SynChkFunc1.u_Diff
B01.Lcd.Measurements2_refer_table =
B04.DSPComu1.rx_data16;\
B04.DSPComu1.rx_data17;\
B04.DSPComu1.rx_data18
B01.Lcd.Measurements3_refer_table =
B06.BayMMXU.ia_mag_pri;\
B06.BayMMXU.ib_mag_pri;\
B06.BayMMXU.ic_mag_pri;\
B06.BayMMXU.i1_mag_pri;\
B06.BayMMXU.i2_mag_pri;\
B06.BayMMXU.i0_mag_pri;\
B06.BayMMXU.ua_mag_pri;\
B06.BayMMXU.ub_mag_pri;\
B06.BayMMXU.uc_mag_pri;\
B06.BayMMXU.uab_mag_pri;\
B06.BayMMXU.ubc_mag_pri;\
B06.BayMMXU.uca_mag_pri;\
B06.BayMMXU.u1_mag_pri;\
B06.BayMMXU.u2_mag_pri;\
B06.BayMMXU.u0_mag_pri;\
B06.BayMMXU.syn_mag_pri;\
B06.BayMMXU.freq;\
B06.BayMMXU.syn_freq;\
B06.BayMMXU.P_pri;\
B06.BayMMXU.Q_pri;\
B06.BayMMXU.S_pri;\
B06.BayMMXU.Cos;\
B06.BayMMXU.Pa_pri;\
B06.BayMMXU.Pb_pri;\
B06.BayMMXU.Pc_pri;\
B06.BayMMXU.Qa_pri;\
B06.BayMMXU.Qb_pri;\
B06.BayMMXU.Qc_pri;\
B06.BayMMXU.Cosa;\
B06.BayMMXU.Cosb;\
B06.BayMMXU.Cosc;\
B06.RSYN.dif;\
B06.RSYN.dfdt;\
B06.RSYN.phase_dif;\
B06.RSYN.delta_vol_pri;\
B06.Energy.fwd_kwh_Pri;\
B06.Energy.rev_kwh_Pri;\
B06.Energy.fwd_kvarh_Pri;\
B06.Energy.rev_kvarh_Pri
B01.Lcd.debug_data_refer_table = ;
B01.Lcd.Ch1_Counter_refer_table =
B01.Statistic.start_time;\
B04.RX_HDLC1.rcv_gp_code_r;\
B04.RX_HDLC1.Td_MONI;\
B04.RX_HDLC1.Valid_FrmRcv;\
B04.RX_HDLC1.Nofrm_Abn;\
B04.RX_HDLC1.Bit_err;\
B01.Statistic.B04_RX_HDLC1_CrcErr;\
B01.Statistic.B04_RX_HDLC1_Data_Abn;\
B01.Statistic.B04_RX_HDLC1_Remote_Abn;\
B01.Statistic.B04_RX_HDLC1_SESR;\
B01.Statistic.B04_RX_HDLC1_FrameLost
B01.Lcd.Ch2_Counter_refer_table = ;
B01.Lcd.GOOSE_Comm_Counter_refer_table =
B01.goose.netstorm_cnt;\
B01.goose.tx_encode_err_cnt;\
B01.goose.rx_decode_err_cnt
B01.Lcd.AR_Counter_refer_table =
B04.ARLogicFunc1.N_Total_AR;\
B04.ARLogicFunc1.N_1Ph-Shot1_AR;\
B04.ARLogicFunc1.N_3Ph-Shot1_AR;\
B04.ARLogicFunc1.N_3Ph-Shot2_AR;\
B04.ARLogicFunc1.N_3Ph-Shot3_AR;\
B04.ARLogicFunc1.N_3Ph_Shot4_AR
B01.Lcd.Internal_Signal_refer_table =
B04.LogicBit1.LogicBOBit_01;\
B04.LogicBit1.LogicBOBit_02;\
B04.LogicBit1.LogicBOBit_03;\
B04.LogicBit1.LogicBOBit_04;\
B04.LogicBit1.LogicBOBit_05;\
B04.LogicBit1.LogicBOBit_06;\
B04.LogicBit1.LogicBOBit_07;\
B04.LogicBit1.LogicBOBit_08;\
B04.LogicBit1.LogicBOBit_09;\
B04.LogicBit1.LogicBOBit_10;\
B04.LogicBit1.LogicBOBit_11;\
B04.LogicBit1.LogicBOBit_12;\
B04.LogicBit1.LogicBOBit_13;\
B04.LogicBit1.LogicBOBit_14;\
B04.LogicBit1.LogicBOBit_15;\
B04.LogicBit1.LogicBOBit_16;\
B04.LogicBit1.LogicBOBit_17;\
B04.LogicBit1.LogicBOBit_18;\
B04.LogicBit1.LogicBOBit_19;\
B04.LogicBit1.LogicBOBit_20;\
B04.LogicBit1.LogicBOBit_21;\
B04.LogicBit1.LogicBOBit_22;\
B04.LogicBit1.LogicBOBit_23;\
B04.LogicBit1.LogicBOBit_24;\
B04.LogicBit1.LogicBOBit_25;\
B04.LogicBit1.LogicBOBit_26;\
B04.LogicBit1.LogicBOBit_27;\
B04.LogicBit1.LogicBOBit_28;\
B04.LogicBit1.LogicBOBit_29;\
B04.LogicBit1.LogicBOBit_30;\
B04.LogicBit1.LogicBOBit_31;\
B04.LogicBit1.LogicBOBit_32;\
B04.LogicBit1.LogicBOBit_33;\
B04.LogicBit1.LogicBOBit_34;\
B04.LogicBit1.LogicBOBit_35;\
B04.LogicBit1.LogicBOBit_36;\
B04.LogicBit1.LogicBOBit_37;\
B04.LogicBit1.LogicBOBit_38;\
B04.LogicBit1.LogicBOBit_39;\
B04.LogicBit1.LogicBOBit_40;\
B04.LogicBit1.LogicBOBit_41;\
B04.LogicBit1.LogicBOBit_42;\
B04.LogicBit1.LogicBOBit_43;\
B04.LogicBit1.LogicBOBit_44;\
B04.LogicBit1.LogicBOBit_45;\
B04.LogicBit1.LogicBOBit_46;\
B04.LogicBit1.LogicBOBit_47;\
B04.LogicBit1.LogicBOBit_48;\
B04.LogicBit1.LogicBOBit_49;\
B04.LogicBit1.LogicBOBit_50;\
B04.LogicBit1.LogicBOBit_51;\
B04.LogicBit1.LogicBOBit_52;\
B04.LogicBit1.LogicBOBit_53;\
B04.LogicBit1.LogicBOBit_54;\
B04.LogicBit1.LogicBOBit_55;\
B04.LogicBit1.LogicBOBit_56;\
B04.LogicBit1.LogicBOBit_57;\
B04.LogicBit1.LogicBOBit_58;\
B04.LogicBit1.LogicBOBit_59;\
B04.LogicBit1.LogicBOBit_60;\
B04.LogicBit1.LogicBOBit_61;\
B04.LogicBit1.LogicBOBit_62;\
B04.LogicBit1.LogicBOBit_63;\
B04.LogicBit1.LogicBOBit_64;\
B04.LINK1.flg_seterr;\
B04.LINK1.flg_memerr;\
B04.Vol3P1.flg_seterr;\
B04.Vol3P1.flg_memerr;\
B04.Cur3P2.flg_seterr;\
B04.Cur3P2.flg_memerr;\
B04.CurSum3P1.flg_seterr;\
B04.CurSum3P1.flg_memerr;\
B04.Cur1P1.flg_seterr;\
B04.Cur1P1.flg_memerr;\
B04.Cur1P1.flg_smplerr;\
B04.VolSyn1.flg_seterr;\
B04.VolSyn1.flg_memerr;\
B04.FreqCal1.flg_seterr;\
B04.FreqCal1.flg_memerr;\
B04.UnderFreq1.flg_seterr;\
B04.UnderFreq1.flg_memerr;\
B04.OverFreq1.flg_seterr;\
B04.OverFreq1.flg_memerr;\
B06.DPOS.DPOS1_HWJ;\
B06.DPOS.DPOS1_TWJ;\
B06.DPOS.DPOS2_HWJ;\
B06.DPOS.DPOS2_TWJ;\
B06.DPOS.DPOS3_HWJ;\
B06.DPOS.DPOS3_TWJ;\
B06.DPOS.DPOS4_HWJ;\
B06.DPOS.DPOS4_TWJ;\
B06.DPOS.DPOS5_HWJ;\
B06.DPOS.DPOS5_TWJ;\
B06.DPOS.DPOS6_HWJ;\
B06.DPOS.DPOS6_TWJ;\
B06.DPOS.DPOS7_HWJ;\
B06.DPOS.DPOS7_TWJ;\
B06.DPOS.DPOS8_HWJ;\
B06.DPOS.DPOS8_TWJ;\
B06.DPOS.DPOS9_HWJ;\
B06.DPOS.DPOS9_TWJ;\
B06.DPOS.DPOS10_HWJ;\
B04.Rbcsg1.flg_seterr;\
B04.Rbcsg1.flg_memerr
B01.Iec103.telemeter_refer_table B01.Dnp30.telemeter_refer_table =
B06.BayMMXU.ia_mag_pri;\
B06.BayMMXU.ib_mag_pri;\
B06.BayMMXU.ic_mag_pri;\
B06.BayMMXU.i0_mag_pri;\
B06.BayMMXU.ua_mag_pri;\
B06.BayMMXU.ub_mag_pri;\
B06.BayMMXU.uc_mag_pri;\
B06.BayMMXU.u1_mag_pri;\
B06.BayMMXU.u2_mag_pri;\
B06.BayMMXU.u0_mag_pri;\
B06.BayMMXU.uab_mag_pri;\
B06.BayMMXU.ubc_mag_pri;\
B06.BayMMXU.uca_mag_pri;\
B06.BayMMXU.syn_mag_pri;\
B06.BayMMXU.freq;\
B06.BayMMXU.syn_freq;\
B06.BayMMXU.Pa_pri;\
B06.BayMMXU.Pb_pri;\
B06.BayMMXU.Pc_pri;\
B06.BayMMXU.Qa_pri;\
B06.BayMMXU.Qb_pri;\
B06.BayMMXU.Qc_pri;\
B06.BayMMXU.Sa_pri;\
B06.BayMMXU.Sb_pri;\
B06.BayMMXU.Sc_pri;\
B06.BayMMXU.P_pri;\
B06.BayMMXU.Q_pri;\
B06.BayMMXU.S_pri;\
B06.BayMMXU.Cos
B01.Lcd.yk_refer_table =
B06.yk01;\
B06.yk02;\
B06.yk03;\
B06.yk04;\
B06.yk05;\
B06.yk06;\
B06.yk07;\
B06.yk08;\
B06.yk09;\
B06.yk10
B01.Iec103.telectrl_refer_table =
B01.Iec103.telectrl_wave_trigger;\
B06.yk01;\
B06.yk02;\
B06.yk03;\
B06.yk04;\
B06.yk05;\
B06.yk06;\
B06.yk07;\
B06.yk08;\
B06.yk09;\
B06.yk10
B01.Iec61850.yk_refer_table B01.Dnp30.telectrl_refer_table =
B06.yk01;\
B06.yk02;\
B06.yk03;\
B06.yk04;\
B06.yk05;\
B06.yk06;\
B06.yk07;\
B06.yk08;\
B06.yk09;\
B06.yk10
B01.Lcd.auto_yk_refer_table =
B06.yk01;\
B06.BIinput.BI_ManOpn;\
B06.BIinput.BI_ManSynCls;\
xxxx;\
B06.RSYN.swi_syn_check;\
B06.RSYN.swi_vol_check;\
xxxx;\
xxxx
B01.Iec103.teleregulate_refer_table B01.Dnp30.teleregulate_refer_table = ;
B01.Wave.rec_frequency_table =
HTM1:0:6000;\
HTM1/24:1:0
B01.Wave.fault_info_refer_table B01.Iec103.fault_info_refer_table
B01.Iec61850.fault_info_refer_table B01.Print.fault_info_refer_table =
B04.Locator1.fault_locate;\
B04.Locator1.cj_sp_display;\
B04.Locator1.ua_cj;\
B04.Locator1.ub_cj;\
B04.Locator1.uc_cj;\
B04.Locator1.ia_cj;\
B04.Locator1.ib_cj;\
B04.Locator1.ic_cj;\
B04.Locator1.u0_cj;\
B04.Locator1.i0_for_cj
B01.Wave.wave_triger_var_table =
B04.PickUp1.flg_qd:1;\
B04.CBTrpOut1.TripA:3;\
B04.CBTrpOut1.TripB:3;\
B04.CBTrpOut1.TripC:3;\
B04.ARLogicFunc1.CloseCB:3;\
B01.Lcd.rec_manual_trig_flag:1;\
B01.Iec103.telectrl_wave_trigger:1;\
B04.EquipSelfcheck1.bsj_triger:1;\
B01.Wave.BI_trigger_DFR:1;\
B04.UnderFreq1.flg_op1:1;\
B04.UnderFreq1.flg_op2:1;\
B04.UnderFreq1.flg_op3:1;\
B04.UnderFreq1.flg_op4:1;\
B04.OverFreq1.flg_op1:1;\
B04.OverFreq1.flg_op2:1;\
B04.OverFreq1.flg_op3:1;\
B04.OverFreq1.flg_op4:1
B01.Wave.wave_inst_user_refer_table B01.Iec103.wave_inst_user_refer_table
B01.Print.wave_inst_user_refer_table =
B04.Vol3P1.smpl_ua:0.001:1;\
B04.Vol3P1.smpl_ub:0.001:1;\
B04.Vol3P1.smpl_uc:0.001:1;\
B04.VolSyn1.smpl_usyn:0.001:1;\
B04.Vol3P1.smpl_3u0:0.001:1;\
B04.CurSum3P1.smpl_ia:0.001:1;\
B04.CurSum3P1.smpl_ib:0.001:1;\
B04.CurSum3P1.smpl_ic:0.001:1;\
B04.CurSum3P1.smpl_3i0:0.001:1;\
B04.Cur1P1.smpl_in:0.001:1
B01.Wave.wave_amp_user_refer_table =
B04.Vol3P1.UA;\
B04.Vol3P1.UB;\
B04.Vol3P1.UC;\
B04.VolSyn1.USYN;\
B04.Vol3P1.3U0;\
B04.CurSum3P1.IA;\
B04.CurSum3P1.IB;\
B04.CurSum3P1.IC;\
B04.CurSum3P1.3I0;\
B04.Cur1P1.In
B01.Wave.wave_bin_user_refer_table B01.Iec103.wave_bin_user_refer_table
B01.Print.wave_bin_user_refer_table =
B04.GPLogic1.sxa:54:1;\
B04.GPLogic1.sxb:54:2;\
B04.GPLogic1.sxc:54:3;\
B04.GPLogic1.sx_Def:54:4;\
B04.GPLogic1.FX:54:5;\
B04.GPLogic1.FXB:54:6;\
B04.GPLogic1.FXC:54:7;\
B04.GPLogic1.FX_DEF:54:8+\
B01.Event.trip_refer_table+\
B01.Event.selfsuperv_refer_table+\
B01.Event.binchg_refer_table
B01.Wave.wave_inst_debug_refer_table B01.Iec103.wave_inst_debug_refer_table =
B04.DSPComu1.rx_data01;\
B04.DSPComu1.rx_data02;\
B04.DSPComu1.rx_data03;\
B04.DSPComu1.rx_data04;\
B04.DSPComu1.rx_data05;\
B04.DSPComu1.rx_data06;\
B04.DSPComu1.rx_data07;\
B04.DSPComu1.rx_data08;\
B04.DSPComu1.rx_data09;\
B04.PSD1.DU1Cos
B01.Wave.wave_amp_debug_refer_table =
B04.DSPComu1.rx_data10;\
B04.DSPComu1.rx_data11;\
B04.DSPComu1.rx_data12;\
B04.DSPComu1.rx_data13;\
B04.DSPComu1.rx_data14;\
B04.DSPComu1.rx_data15;\
B04.DSPComu1.rx_data16;\
B04.DSPComu1.rx_data17;\
B04.DSPComu1.rx_data18;\
B04.PSD1.DU1Cos
B01.Wave.wave_bin_debug_refer_table B01.Iec103.wave_bin_debug_refer_table =
B04.RX_HDLC1.Valid_FrmRcv;\
B04.RX_HDLC1.Nofrm_Abn;\
B04.PickUp1.flg_diqd;\
B04.PickUp1.flg_i0qd;\
B04.PickUp1.flg_i0qd_in;\
B04.PickUp1.flg_ipqd;\
B04.PickUp1.flg_kby;\
B04.PickUp1.flg_qdabc;\
B04.PickUp1.flg_tqt1_gt_12ms;\
B04.PickUp1.flg_qd_gt_30ms;\
B04.PickUp1.flg_qd_gt_40ms;\
B04.PickUp1.flg_diqdl_ext1s;\
B04.PickUp1.flg_qd_upgrade;\
B04.PickUp1.flg_ipqd_con;\
B04.DSPComu1.rx_flg01;\
B04.DSPComu1.rx_flg02;\
B04.DSPComu1.rx_flg03;\
B04.GPLogic1.GLDXa;\
B04.GPLogic1.GLDXb;\
B04.GPLogic1.GLDXc;\
B04.GPLogic1.GLDX2;\
B04.GPLogic1.BlkAR;\
B04.GPLogic1.Abnormal_TX;\
B04.GPLogic1.Normal_TX;\
B04.GPLogic1.gp_sa;\
B04.GPLogic1.gp_sb;\
B04.GPLogic1.gp_sc;\
B04.GPLogic1.s_rd_a;\
B04.GPLogic1.s_rd_b;\
B04.GPLogic1.s_rd_c;\
B04.GPLogic1.ul_rd;\
B04.GPLogic1.zrd_for_gp;\
B04.GPLogic1.posi_sat;\
B04.GPLogic1.posi_direct;\
B04.GPLogic1.posi_zcom;\
B04.GPLogic1.Unb_Valid_ZCom;\
B04.GPLogic1.Unb_Valid_DEF;\
B04.DZMRelay1.WholeZa;\
B04.DZMRelay1.WholeZb;\
B04.DZMRelay1.WholeZc;\
B04.DZMRelay1.WholeZab;\
B04.DZMRelay1.WholeZbc;\
B04.DZMRelay1.WholeZca;\
B04.DZMRelay1.DZa;\
B04.DZMRelay1.DZb;\
B04.DZMRelay1.DZc;\
B04.DZMRelay1.DZab;\
B04.DZMRelay1.DZbc;\
B04.DZMRelay1.DZca;\
B04.DZMRelay1.DZ_origa;\
B04.DZMRelay1.DZ_origb;\
B04.DZMRelay1.DZ_origc;\
B04.DZMRelay1.DZ_origab;\
B04.DZMRelay1.DZ_origbc;\
B04.DZMRelay1.DZ_origca;\
B04.DZMRelay1.DZSa;\
B04.DZMRelay1.DZSb;\
B04.DZMRelay1.DZSc;\
B04.DZMRelay1.DZSabc;\
B04.DZMRelay1.Ualt85U;\
B04.DZMRelay1.Ublt85U;\
B04.DZMRelay1.Uclt85U;\
B04.DZMRelay1.Uablt85U;\
B04.DZMRelay1.Ubclt85U;\
B04.DZMRelay1.Ucalt85U;\
B04.DZMRelay1.Ua_fbid;\
B04.DZMRelay1.Ub_fbid;\
B04.DZMRelay1.Uc_fbid;\
B04.DZMRelay1.Uab_fbid;\
B04.DZMRelay1.Ubc_fbid;\
B04.DZMRelay1.Uca_fbid;\
B04.DZMRelay1.UopgtUpa;\
B04.DZMRelay1.UopgtUpb;\
B04.DZMRelay1.UopgtUpc;\
B04.DZMRelay1.UopgtUpab;\
B04.DZMRelay1.UopgtUpbc;\
B04.DZMRelay1.UopgtUpca;\
B04.DZMRelay1.UpltUza;\
B04.DZMRelay1.UpltUzb;\
B04.DZMRelay1.UpltUzc;\
B04.DZMRelay1.UppltUzab;\
B04.DZMRelay1.UppltUzbc;\
B04.DZMRelay1.UppltUzca;\
B04.DZMRelay1.IgtMema;\
B04.DZMRelay1.IgtMemb;\
B04.DZMRelay1.IgtMemc;\
B04.DZMRelay1.IgtMemab;\
B04.DZMRelay1.IgtMembc;\
B04.DZMRelay1.IgtMemca;\
B04.PilotROC1.L0FP;\
B04.PilotROC1.L0FP_DLY10MS;\
B04.PilotROC1.I0FOC;\
B04.ZoneQuad1.flg_qd_kf;\
B04.ZoneQuad1.flg_i02_kf;\
B04.ZoneQuad1.I1_OCPSB;\
B04.ZoneQuad1.Ucos_rls;\
B04.ZoneQuad1.zos_fqx;\
B04.ZoneQuad1.flg_1zos;\
B04.ZoneQuad1.flg_2zos;\
B04.ZoneQuad1.flg_3zos;\
B04.ZoneQuad1.flg_4zos;\
B04.ZoneQuad1.flg_fzos;\
B04.ZoneQuad1.flg_2zos_fx;\
B04.ZoneQuad1.z1_a;\
B04.ZoneQuad1.z1_b;\
B04.ZoneQuad1.z1_c;\
B04.ZoneQuad1.z1_a_s;\
B04.ZoneQuad1.z1_b_s;\
B04.ZoneQuad1.z1_c_s;\
B04.ZoneQuad1.z1_ab;\
B04.ZoneQuad1.z1_bc;\
B04.ZoneQuad1.z1_ca;\
B04.ZoneQuad1.z1_ab_s;\
B04.ZoneQuad1.z1_bc_s;\
B04.ZoneQuad1.z1_ca_s;\
B04.ZoneQuad1.z2_a;\
B04.ZoneQuad1.z2_b;\
B04.ZoneQuad1.z2_c;\
B04.ZoneQuad1.z2_ab;\
B04.ZoneQuad1.z2_bc;\
B04.ZoneQuad1.z2_ca;\
B04.ZoneQuad1.z3_a;\
B04.ZoneQuad1.z3_b;\
B04.ZoneQuad1.z3_c;\
B04.ZoneQuad1.z3_ab;\
B04.ZoneQuad1.z3_bc;\
B04.ZoneQuad1.z3_ca;\
B04.ZoneQuad1.z4_a;\
B04.ZoneQuad1.z4_b;\
B04.ZoneQuad1.z4_c;\
B04.ZoneQuad1.z4_ab;\
B04.ZoneQuad1.z4_bc;\
B04.ZoneQuad1.z4_ca;\
B04.ZoneQuad1.z1_noi0_a;\
B04.ZoneQuad1.z1_noi0_b;\
B04.ZoneQuad1.z1_noi0_c;\
B04.ZoneQuad1.z_fwd_a;\
B04.ZoneQuad1.z_fwd_b;\
B04.ZoneQuad1.z_fwd_c;\
B04.ZoneQuad1.z_fwd_ab;\
B04.ZoneQuad1.z_fwd_bc;\
B04.ZoneQuad1.z_fwd_ca;\
B04.ZoneQuad1.z_rev_a;\
B04.ZoneQuad1.z_rev_b;\
B04.ZoneQuad1.z_rev_c;\
B04.ZoneQuad1.z_rev_ab;\
B04.ZoneQuad1.z_rev_bc;\
B04.ZoneQuad1.z_rev_ca;\
B04.ZoneQuad1.z_fwd_noi0_a;\
B04.ZoneQuad1.z_fwd_noi0_b;\
B04.ZoneQuad1.z_fwd_noi0_c;\
B04.ZoneQuad1.z1_x_a;\
B04.ZoneQuad1.z1_x_b;\
B04.ZoneQuad1.z1_x_c;\
B04.ZoneQuad1.z1_x0_a;\
B04.ZoneQuad1.z1_x0_b;\
B04.ZoneQuad1.z1_x0_c;\
B04.ZoneQuad1.z1_r_a;\
B04.ZoneQuad1.z1_r_b;\
B04.ZoneQuad1.z1_r_c;\
B04.ZoneQuad1.z1_x_s_a;\
B04.ZoneQuad1.z1_x_s_b;\
B04.ZoneQuad1.z1_x_s_c;\
B04.ZoneQuad1.z1_x0_s_a;\
B04.ZoneQuad1.z1_x0_s_b;\
B04.ZoneQuad1.z1_x0_s_c;\
B04.ZoneQuad1.z1_r_s_a;\
B04.ZoneQuad1.z1_r_s_b;\
B04.ZoneQuad1.z1_r_s_c;\
B04.ZoneQuad1.z1_x_ab;\
B04.ZoneQuad1.z1_x_bc;\
B04.ZoneQuad1.z1_x_ca;\
B04.ZoneQuad1.z1_x2_ab;\
B04.ZoneQuad1.z1_x2_bc;\
B04.ZoneQuad1.z1_x2_ca;\
B04.ZoneQuad1.z1_r_ab;\
B04.ZoneQuad1.z1_r_bc;\
B04.ZoneQuad1.z1_r_ca;\
B04.ZoneQuad1.z1_x_s_ab;\
B04.ZoneQuad1.z1_x_s_bc;\
B04.ZoneQuad1.z1_x_s_ca;\
B04.ZoneQuad1.z1_x2_s_ab;\
B04.ZoneQuad1.z1_x2_s_bc;\
B04.ZoneQuad1.z1_x2_s_ca;\
B04.ZoneQuad1.z1_r_s_ab;\
B04.ZoneQuad1.z1_r_s_bc;\
B04.ZoneQuad1.z1_r_s_ca;\
B04.ZoneQuad1.z2_x_a;\
B04.ZoneQuad1.z2_x_b;\
B04.ZoneQuad1.z2_x_c;\
B04.ZoneQuad1.z2_x0_a;\
B04.ZoneQuad1.z2_x0_b;\
B04.ZoneQuad1.z2_x0_c;\
B04.ZoneQuad1.z2_r_a;\
B04.ZoneQuad1.z2_r_b;\
B04.ZoneQuad1.z2_r_c;\
B04.ZoneQuad1.z2_x_ab;\
B04.ZoneQuad1.z2_x_bc;\
B04.ZoneQuad1.z2_x_ca;\
B04.ZoneQuad1.z2_x2_ab;\
B04.ZoneQuad1.z2_x2_bc;\
B04.ZoneQuad1.z2_x2_ca;\
B04.ZoneQuad1.z2_r_ab;\
B04.ZoneQuad1.z2_r_bc;\
B04.ZoneQuad1.z2_r_ca;\
B04.ZoneQuad1.z3_x_a;\
B04.ZoneQuad1.z3_x_b;\
B04.ZoneQuad1.z3_x_c;\
B04.ZoneQuad1.z3_r_a;\
B04.ZoneQuad1.z3_r_b;\
B04.ZoneQuad1.z3_r_c;\
B04.ZoneQuad1.z3_x_ab;\
B04.ZoneQuad1.z3_x_bc;\
B04.ZoneQuad1.z3_x_ca;\
B04.ZoneQuad1.z3_r_ab;\
B04.ZoneQuad1.z3_r_bc;\
B04.ZoneQuad1.z3_r_ca;\
B04.ZoneQuad1.z4_x_a;\
B04.ZoneQuad1.z4_x_b;\
B04.ZoneQuad1.z4_x_c;\
B04.ZoneQuad1.z4_r_a;\
B04.ZoneQuad1.z4_r_b;\
B04.ZoneQuad1.z4_r_c;\
B04.ZoneQuad1.z4_x_ab;\
B04.ZoneQuad1.z4_x_bc;\
B04.ZoneQuad1.z4_x_ca;\
B04.ZoneQuad1.z4_r_ab;\
B04.ZoneQuad1.z4_r_bc;\
B04.ZoneQuad1.z4_r_ca;\
B04.ZoneQuad1.1zs_a;\
B04.ZoneQuad1.1zs_b;\
B04.ZoneQuad1.1zs_c;\
B04.ZoneQuad1.2zs_a;\
B04.ZoneQuad1.2zs_b;\
B04.ZoneQuad1.2zs_c;\
B04.ZoneQuad1.3zs_a;\
B04.ZoneQuad1.3zs_b;\
B04.ZoneQuad1.3zs_c;\
B04.ZoneQuad1.4zs_a;\
B04.ZoneQuad1.4zs_b;\
B04.ZoneQuad1.4zs_c;\
B04.ZoneQuad1.fzs_a;\
B04.ZoneQuad1.fzs_b;\
B04.ZoneQuad1.fzs_c;\
B04.ZoneQuad1.ul;\
B04.ZoneQuad1.zf_a;\
B04.ZoneQuad1.zf_b;\
B04.ZoneQuad1.zf_c;\
B04.ZoneQuad1.zf_ab;\
B04.ZoneQuad1.zf_bc;\
B04.ZoneQuad1.zf_ca;\
B04.ZoneQuad1.zf_rev_a;\
B04.ZoneQuad1.zf_rev_b;\
B04.ZoneQuad1.zf_rev_c;\
B04.ZoneQuad1.zf_rev_ab;\
B04.ZoneQuad1.zf_rev_bc;\
B04.ZoneQuad1.zf_rev_ca;\
B04.ZoneQuad1.zf_x_a;\
B04.ZoneQuad1.zf_x_b;\
B04.ZoneQuad1.zf_x_c;\
B04.ZoneQuad1.zf_x_ab;\
B04.ZoneQuad1.zf_x_bc;\
B04.ZoneQuad1.zf_x_ca;\
B04.ZoneQuad1.zf_r_a;\
B04.ZoneQuad1.zf_r_b;\
B04.ZoneQuad1.zf_r_c;\
B04.ZoneQuad1.zf_r_ab;\
B04.ZoneQuad1.zf_r_bc;\
B04.ZoneQuad1.zf_r_ca;\
B04.ZoneQuad1.U1os_quick1_z1;\
B04.ZoneQuad1.U1os_quick1_z2;\
B04.ZoneQuad1.U1os_quick1_z3;\
B04.ZoneQuad1.U1os_quick1_z4;\
B04.ZoneQuad1.U1os_quick1_zf;\
B04.ZoneQuad1.U1os_quick2_z1;\
B04.ZoneQuad1.U1os_quick2_z2;\
B04.ZoneQuad1.U1os_quick2_z3;\
B04.ZoneQuad1.U1os_quick2_z4;\
B04.ZoneQuad1.U1os_quick2_zf;\
B04.ZoneQuad1.ucos1_z1;\
B04.ZoneQuad1.ucos1_z2;\
B04.ZoneQuad1.ucos1_z3;\
B04.ZoneQuad1.ucos1_z4;\
B04.ZoneQuad1.ucos1_zf;\
B04.ZoneQuad1.ucos2_z1;\
B04.ZoneQuad1.ucos2_z2;\
B04.ZoneQuad1.ucos2_z3;\
B04.ZoneQuad1.ucos2_z4;\
B04.ZoneQuad1.ucos2_zf;\
B04.ZoneQuad1.fqx_dlpp_open_z1;\
B04.ZoneQuad1.fqx_dlpp_open_z2;\
B04.ZoneQuad1.fqx_dlpp_open_z3;\
B04.ZoneQuad1.fqx_dlpp_open_z4;\
B04.ZoneQuad1.fqx_dlpp_open_zf;\
B04.ZoneQuad1.fqx_dlpp_open_z2fx;\
B04.ZoneQuad1.abs_U1os_gt_m1;\
B04.ZoneQuad1.abs_U1os_lt_m2;\
B04.ZoneQuad1.abs_U1os_bt_m1m2;\
B04.TVSuperv1.flg_vts_con;\
B04.TVSuperv1.flg_vts_con_dz;\
B04.TVSuperv1.swi_tv_off;\
B04.TVNSuperv1.swi_tv_off;\
B04.TVNSuperv1.flg_vts_con;\
B04.PSD1.PSStart;\
B04.PSD1.U1os_quick1;\
B04.PSD1.U1os_quick2;\
B04.PSD1.U1os_slow1;\
B04.PSD1.U1os_slow2;\
B04.PSD1.ucos_rls;\
B04.PSD1.psb_con_dly;\
B04.PSD1.bsb_rls;\
B04.PSD1.i02_gt_mi1;\
B04.PSD1.DU1Cos_PSD;\
B04.OCSRelay1.St;\
B04.OCSRelay1.oc_a;\
B04.OCSRelay1.oc_b;\
B04.OCSRelay1.oc_c;\
B04.ROCSRelay1.St;\
B04.ROCSRelay1.oc;\
B04.StbOC1.St_a;\
B04.StbOC1.St_b;\
B04.StbOC1.St_c;\
B04.StbOC1.oc_a;\
B04.StbOC1.oc_b;\
B04.StbOC1.oc_c;\
B04.PDRelay1.flg_pdp_qd;\
B04.PDRelay1.PD_STR;\
B04.PDRelay1.PD_ROC;\
B04.PDRelay1.PD_NOC;\
B04.ROCSOTF1.flg_i0js_str;\
B04.ROCSOTF1.i0js_roc;\
B04.DIROCCalc1.flg_f0p;\
B04.DIROCCalc1.flg_f0m;\
B04.DIROCCalc1.flg_f2p;\
B04.DIROCCalc1.flg_f2m;\
B04.DIROCCalc1.flg_f0mz;\
B04.DIROCCalc1.flg_f0m_th;\
B04.DIROCCalc1.flg_f2m_th;\
B04.DIROCCalc1.Forward_DIR_A;\
B04.DIROCCalc1.Forward_DIR_B;\
B04.DIROCCalc1.Forward_DIR_C;\
B04.DIROCCalc1.Forward_DIR_AB;\
B04.DIROCCalc1.Forward_DIR_BC;\
B04.DIROCCalc1.Forward_DIR_CA;\
B04.Calc1.flg_area_valid;\
B04.Calc1.area_i0i2_a;\
B04.Calc1.area_i0i2_b;\
B04.Calc1.area_i0i2_c;\
B04.Calc1.area1_a;\
B04.Calc1.area1_b;\
B04.Calc1.area1_c;\
B04.Calc1.area1_ag;\
B04.Calc1.area1_bg;\
B04.Calc1.area1_cg;\
B04.Calc1.area_valid;\
B04.Calc1.cap_a;\
B04.Calc1.cap_b;\
B04.Calc1.cap_c;\
B04.Calc1.uabcos_lt_d1unn;\
B04.Calc1.ubccos_lt_d1unn;\
B04.Calc1.ucacos_lt_d1unn;\
B04.CurSum3P1.flg_la;\
B04.CurSum3P1.flg_lb;\
B04.CurSum3P1.flg_lc;\
B04.CurSum3P1.flg_ia_harm;\
B04.CurSum3P1.flg_ib_harm;\
B04.CurSum3P1.flg_ic_harm;\
B04.CurSum3P1.flg_iab_harm;\
B04.CurSum3P1.flg_ibc_harm;\
B04.CurSum3P1.flg_ica_harm;\
B04.CurSum3P1.3i0_GtIppmaxD16;\
B04.CurSum3P1.3i2_GtIppmaxD16;\
B04.CurSum3P1.flg_uxx;\
B04.OverLoad1.OvLd_St_a;\
B04.OverLoad1.OvLd_St_b;\
B04.OverLoad1.OvLd_St_c;\
B04.OverLoad1.Trp_Ovld1_a;\
B04.OverLoad1.Trp_Ovld1_b;\
B04.OverLoad1.Trp_Ovld1_c;\
B04.OverLoad1.Trp_Ovld2_a;\
B04.OverLoad1.Trp_Ovld2_b;\
B04.OverLoad1.Trp_Ovld2_c;\
B04.HarmBlk1P1.Op;\
B04.OverCurrent1P1.Str;\
B04.OverCurrent1P1.tmp_flg_fd;\
B04.OverCurrent1P1.flg_amp_str;\
B04.OverCurrent1P1.flg_simu_str;\
B04.OverCurrent1P1.flg_q_blk;\
B04.OverCurrent1P1.op_blkar;\
B04.OverCurrent1P2.Str;\
B04.OverCurrent1P2.tmp_flg_fd;\
B04.OverCurrent1P2.flg_amp_str;\
B04.OverCurrent1P2.flg_simu_str;\
B04.OverCurrent1P2.flg_q_blk;\
B04.OverCurrent1P2.op_blkar;\
B04.OverCurrent1P3.Str;\
B04.OverCurrent1P3.tmp_flg_fd;\
B04.OverCurrent1P3.flg_amp_str;\
B04.OverCurrent1P3.flg_simu_str;\
B04.OverCurrent1P3.flg_q_blk;\
B04.OverCurrent1P3.op_blkar;\
B04.OverCurrent1P4.Str;\
B04.OverCurrent1P4.tmp_flg_fd;\
B04.OverCurrent1P4.flg_amp_str;\
B04.OverCurrent1P4.flg_simu_str;\
B04.OverCurrent1P4.flg_q_blk;\
B04.OverCurrent1P4.op_blkar;\
B04.HarmBlk3P1.Op;\
B04.OverCurrent3P1.tmp_flgs_fd.a;\
B04.OverCurrent3P1.tmp_flgs_fd.b;\
B04.OverCurrent3P1.tmp_flgs_fd.c;\
B04.OverCurrent3P1.flgs_amp_str.a;\
B04.OverCurrent3P1.flgs_amp_str.b;\
B04.OverCurrent3P1.flgs_amp_str.c;\
B04.OverCurrent3P1.flgs_simu_str.a;\
B04.OverCurrent3P1.flgs_simu_str.b;\
B04.OverCurrent3P1.flgs_simu_str.c;\
B04.OverCurrent3P1.flgs_q_blk.a;\
B04.OverCurrent3P1.flgs_q_blk.b;\
B04.OverCurrent3P1.flgs_q_blk.c;\
B04.OverCurrent3P1.StrA;\
B04.OverCurrent3P1.StrB;\
B04.OverCurrent3P1.StrC;\
B04.OverCurrent3P2.tmp_flgs_fd.a;\
B04.OverCurrent3P2.tmp_flgs_fd.b;\
B04.OverCurrent3P2.tmp_flgs_fd.c;\
B04.OverCurrent3P2.flgs_amp_str.a;\
B04.OverCurrent3P2.flgs_amp_str.b;\
B04.OverCurrent3P2.flgs_amp_str.c;\
B04.OverCurrent3P2.flgs_simu_str.a;\
B04.OverCurrent3P2.flgs_simu_str.b;\
B04.OverCurrent3P2.flgs_simu_str.c;\
B04.OverCurrent3P2.flgs_q_blk.a;\
B04.OverCurrent3P2.flgs_q_blk.b;\
B04.OverCurrent3P2.flgs_q_blk.c;\
B04.OverCurrent3P2.StrA;\
B04.OverCurrent3P2.StrB;\
B04.OverCurrent3P2.StrC;\
B04.OverCurrent3P3.tmp_flgs_fd.a;\
B04.OverCurrent3P3.tmp_flgs_fd.b;\
B04.OverCurrent3P3.tmp_flgs_fd.c;\
B04.OverCurrent3P3.flgs_amp_str.a;\
B04.OverCurrent3P3.flgs_amp_str.b;\
B04.OverCurrent3P3.flgs_amp_str.c;\
B04.OverCurrent3P3.flgs_simu_str.a;\
B04.OverCurrent3P3.flgs_simu_str.b;\
B04.OverCurrent3P3.flgs_simu_str.c;\
B04.OverCurrent3P3.flgs_q_blk.a;\
B04.OverCurrent3P3.flgs_q_blk.b;\
B04.OverCurrent3P3.flgs_q_blk.c;\
B04.OverCurrent3P3.StrA;\
B04.OverCurrent3P3.StrB;\
B04.OverCurrent3P3.StrC;\
B04.OverCurrent3P4.tmp_flgs_fd.a;\
B04.OverCurrent3P4.tmp_flgs_fd.b;\
B04.OverCurrent3P4.tmp_flgs_fd.c;\
B04.OverCurrent3P4.flgs_amp_str.a;\
B04.OverCurrent3P4.flgs_amp_str.b;\
B04.OverCurrent3P4.flgs_amp_str.c;\
B04.OverCurrent3P4.flgs_simu_str.a;\
B04.OverCurrent3P4.flgs_simu_str.b;\
B04.OverCurrent3P4.flgs_simu_str.c;\
B04.OverCurrent3P4.flgs_q_blk.a;\
B04.OverCurrent3P4.flgs_q_blk.b;\
B04.OverCurrent3P4.flgs_q_blk.c;\
B04.OverCurrent3P4.StrA;\
B04.OverCurrent3P4.StrB;\
B04.OverCurrent3P4.StrC;\
B04.UnderVoltage1.uv_ext_rly.a;\
B04.UnderVoltage1.uv_ext_rly.b;\
B04.UnderVoltage1.uv_ext_rly.c;\
B04.UnderVoltage1.tmin_uv_inv.a;\
B04.UnderVoltage1.tmin_uv_inv.b;\
B04.UnderVoltage1.tmin_uv_inv.c;\
B04.UnderVoltage1.tr_uv_inv.a;\
B04.UnderVoltage1.tr_uv_inv.b;\
B04.UnderVoltage1.tr_uv_inv.c;\
B04.UnderVoltage1.tr_uv.a;\
B04.UnderVoltage1.tr_uv.b;\
B04.UnderVoltage1.tr_uv.c;\
B04.UnderVoltage1.St_a;\
B04.UnderVoltage1.St_b;\
B04.UnderVoltage1.St_c;\
B04.UnderVoltage2.uv_ext_rly.a;\
B04.UnderVoltage2.uv_ext_rly.b;\
B04.UnderVoltage2.uv_ext_rly.c;\
B04.UnderVoltage2.tmin_uv_inv.a;\
B04.UnderVoltage2.tmin_uv_inv.b;\
B04.UnderVoltage2.tmin_uv_inv.c;\
B04.UnderVoltage2.tr_uv_inv.a;\
B04.UnderVoltage2.tr_uv_inv.b;\
B04.UnderVoltage2.tr_uv_inv.c;\
B04.UnderVoltage2.tr_uv.a;\
B04.UnderVoltage2.tr_uv.b;\
B04.UnderVoltage2.tr_uv.c;\
B04.UnderVoltage2.St_a;\
B04.UnderVoltage2.St_b;\
B04.UnderVoltage2.St_c;\
B04.OverVoltage1.ov_ext_rly.a;\
B04.OverVoltage1.ov_ext_rly.b;\
B04.OverVoltage1.ov_ext_rly.c;\
B04.OverVoltage1.tmin_ov_inv.a;\
B04.OverVoltage1.tmin_ov_inv.b;\
B04.OverVoltage1.tmin_ov_inv.c;\
B04.OverVoltage1.tr_ov_inv.a;\
B04.OverVoltage1.tr_ov_inv.b;\
B04.OverVoltage1.tr_ov_inv.c;\
B04.OverVoltage1.tr_ov.a;\
B04.OverVoltage1.tr_ov.b;\
B04.OverVoltage1.tr_ov.c;\
B04.OverVoltage1.St_a;\
B04.OverVoltage1.St_b;\
B04.OverVoltage1.St_c;\
B04.OverVoltage2.ov_ext_rly.a;\
B04.OverVoltage2.ov_ext_rly.b;\
B04.OverVoltage2.ov_ext_rly.c;\
B04.OverVoltage2.tmin_ov_inv.a;\
B04.OverVoltage2.tmin_ov_inv.b;\
B04.OverVoltage2.tmin_ov_inv.c;\
B04.OverVoltage2.tr_ov_inv.a;\
B04.OverVoltage2.tr_ov_inv.b;\
B04.OverVoltage2.tr_ov_inv.c;\
B04.OverVoltage2.tr_ov.a;\
B04.OverVoltage2.tr_ov.b;\
B04.OverVoltage2.tr_ov.c;\
B04.OverVoltage2.St_a;\
B04.OverVoltage2.St_b;\
B04.OverVoltage2.St_c;\
B04.PhSel1.sp_ia;\
B04.PhSel1.sp_ib;\
B04.PhSel1.sp_ic;\
B04.PhSel1.sp_trpa;\
B04.PhSel1.sp_trpb;\
B04.PhSel1.sp_trpc;\
B04.PhSel1.sp_faulta;\
B04.PhSel1.sp_faultb;\
B04.PhSel1.sp_faultc;\
B04.PhSel1.neut;\
B04.PhSel1.sp_loca;\
B04.PhSel1.sp_locb;\
B04.PhSel1.sp_locc;\
B04.PhSel1.flg_chfd_sp;\
B04.BkrStatus1.bi_BkrA;\
B04.BkrStatus1.bi_BkrB;\
B04.BkrStatus1.bi_BkrC;\
B04.BkrStatus1.bi_BkrS;\
B04.BkrStatus1.flg_twj1_or;\
B04.BkrStatus1.flg_twj1_and;\
B04.BkrStatus1.flg_twj1_23;\
B04.BkrStatus1.flg_ttwj_or;\
B04.BkrStatus1.flg_ttwj_and;\
B04.BkrStatus1.flg_ttwj_one;\
B04.BkrStatus1.use_hwja;\
B04.BkrStatus1.use_hwjb;\
B04.BkrStatus1.use_hwjc;\
B04.BkrStatus1.bi_Bkr_or;\
B04.BkrStatus1.bi_Bkr_and;\
B04.OpenPole1.flg_openpole;\
B04.OpenPole1.flg_cfp;\
B04.OpenPole1.flg_cfp1;\
B04.OpenPole1.flg_cfp2;\
B04.OpenPole1.flg_l0f_off;\
B04.OpenPole1.flg_stabc;\
B04.OpenPole1.fqxa;\
B04.OpenPole1.fqxb;\
B04.OpenPole1.fqxc;\
B04.OpenPole1.flg_clrcfp;\
B04.OpenPole1.flg_hwjandlp;\
B04.OpenPole1.flg_cfp_keep_con;\
B04.OpenPole1.flg_cfp12_keep_con;\
B04.TrpLogic1.TL_TGA;\
B04.TrpLogic1.TL_TGB;\
B04.TrpLogic1.TL_TGC;\
B04.TrpLogic1.TL_TA;\
B04.TrpLogic1.TL_TB;\
B04.TrpLogic1.TL_TC;\
B04.TrpLogic1.flg_tgp_ne_0;\
B04.TrpLogic1.flg_tgabc;\
B04.TrpLogic1.flg_trip_ne_0;\
B04.TrpLogic1.flg_trip_and;\
B04.TrpLogic1.Trp3P_PSFail;\
B04.TrpLogic1.PSFail_blkar;\
B04.Or81.f_func_out;\
B04.CBTrpOut1.Trip1P;\
B04.CBTrpOut1.Trip3P;\
B04.CBTrpOut1.InitBFP_A;\
B04.CBTrpOut1.InitBFP_B;\
B04.CBTrpOut1.InitBFP_C;\
B04.CBTrpOut1.InitBFP_ABC;\
B04.SynChkFunc1.SYNOk;\
B04.SynChkFunc1.SynChkOk;\
B04.SynChkFunc1.DeadChkOk;\
B04.SynChkFunc1.DeadChkOkNoDly;\
B04.SynChkFunc1.SynChkOkNoDly;\
B04.SynChkFunc1.uDiffOk;\
B04.SynChkFunc1.fDiffOk;\
B04.SynChkFunc1.phiDiffOk;\
B04.SynChkFunc1.ULLive;\
B04.SynChkFunc1.ULDead;\
B04.SynChkFunc1.UBLive;\
B04.SynChkFunc1.UBDead;\
B04.SynChkFunc1.DLDBOk;\
B04.SynChkFunc1.DLLBOk;\
B04.SynChkFunc1.LLDBOk;\
B04.SynChkFunc1.Alm_VTS_UB;\
B04.SynChkFunc1.Alm_VTS_UL;\
B04.ARLogicFunc1.AR_On;\
B04.ARLogicFunc1.AR_Off;\
B04.ARLogicFunc1.Ready_AR;\
B04.ARLogicFunc1.ARLocked;\
B04.ARLogicFunc1.Active_AR;\
B04.ARLogicFunc1.Inprog_AR;\
B04.ARLogicFunc1.Inprog_1Ph-Shot1_AR;\
B04.ARLogicFunc1.Inprog_3Ph-Shot1_AR;\
B04.ARLogicFunc1.Inprog_3Ph-Shot2_AR;\
B04.ARLogicFunc1.Inprog_3Ph-Shot3_AR;\
B04.ARLogicFunc1.Inprog_3Ph-Shot4_AR;\
B04.ARLogicFunc1.WaitToSlave;\
B04.ARLogicFunc1.CloseCB;\
B04.ARLogicFunc1.Prep_Trp1P;\
B04.ARLogicFunc1.Prep_Trp3P;\
B04.ARLogicFunc1.Fail_AR;\
B04.ARLogicFunc1.PFR_AR;\
B04.ARLogicFunc1.Fail_SYN;\
B04.ARLogicFunc1.Mode_1PAR;\
B04.ARLogicFunc1.Mode_3PAR;\
B04.ARLogicFunc1.Mode_1/3PAR;\
B04.ARLogicFunc1.BI_ManCls;\
B04.ARLogicFunc1.Inprog_3PAR;\
B04.ARLogicFunc1.TGT;\
B04.ARLogicFunc1.TGS;\
B04.Locator1.fast_elem_20ms;\
B04.Locator1.TR_NoDZ10MS;\
B04.Locator1.ST_SelP_Con;\
B04.Locator1.CJ_Neg;\
B04.Locator1.CJ_Pack;\
B04.Locator1.CJP1_Bias_GT_D1;\
B04.Locator1.CJP1_Bias_GT_5KM;\
B04.Locator1.CJN1_Bias_GT_D1;\
B04.Locator1.SCJ_A;\
B04.Locator1.SCJ_B;\
B04.Locator1.SCJ_C;\
B04.Locator1.SelP1_Result_A;\
B04.Locator1.SelP1_Result_B;\
B04.Locator1.SelP1_Result_C;\
B04.Locator1.CJ_SP_DisplayA;\
B04.Locator1.CJ_SP_DisplayB;\
B04.Locator1.CJ_SP_DisplayC;\
B04.Locator1.CJ_Permit;\
B04.Locator1.CJ_Begin;\
B04.Locator1.CJ_Over;\
B04.DSPComu1.dsp_comu_abn;\
B04.DSPComu1.dsp_frame_err;\
B04.DSPComu1.fifo_overflow;\
B04.DSPComu1.frame_lost;\
B04.DSPComu1.frame_crc_err;\
B04.DSPComu1.frame_sn_err;\
B04.DSPComu1.receive_busy;\
B04.DSPComu1.rx_err;\
B04.DSPComu1.rx_err_dly;\
B04.UnderFreq1.Str;\
B04.UnderFreq1.flg_q_blk;\
B04.UnderFreq1.flg_u1;\
B04.UnderFreq1.flg_blk;\
B04.UnderFreq1.flg_abn;\
B04.UnderFreq1.flg_fdown;\
B04.UnderFreq1.flg_f_short;\
B04.UnderFreq1.flg_fchg;\
B04.OverFreq1.Str;\
B04.OverFreq1.flg_q_blk;\
B04.OverFreq1.flg_u1;\
B04.OverFreq1.flg_blk;\
B04.OverFreq1.flg_abn;\
B04.ElemAndTrp1.Op_Elem_M_01;\
B04.ElemAndTrp1.Op_Elem_M_02;\
B04.ElemAndTrp1.Op_Elem_M_03;\
B04.ElemAndTrp1.Op_Elem_M_04;\
B04.ElemAndTrp1.Op_Elem_M_05;\
B04.ElemAndTrp1.Op_Elem_M_06;\
B04.ElemAndTrp1.Op_Elem_M_07;\
B04.ElemAndTrp1.Op_Elem_M_08;\
B04.ElemAndTrp2.Op_Elem_M_01;\
B04.ElemAndTrp2.Op_Elem_M_02;\
B04.ElemAndTrp2.Op_Elem_M_03;\
B04.ElemAndTrp2.Op_Elem_M_04;\
B04.ElemAndTrp2.Op_Elem_M_05;\
B04.ElemAndTrp2.Op_Elem_M_06;\
B04.ElemAndTrp2.Op_Elem_M_07;\
B04.ElemAndTrp2.Op_Elem_M_08;\
B04.ElemAndTrp3.Op_Elem_M_01;\
B04.ElemAndTrp3.Op_Elem_M_02;\
B04.ElemAndTrp3.Op_Elem_M_03;\
B04.ElemAndTrp3.Op_Elem_M_04;\
B04.ElemAndTrp3.Op_Elem_M_05;\
B04.ElemAndTrp3.Op_Elem_M_06;\
B04.ElemAndTrp3.Op_Elem_M_07;\
B04.ElemAndTrp3.Op_Elem_M_08;\
B04.ElemAndTrp4.Op_Elem_M_01;\
B04.ElemAndTrp4.Op_Elem_M_02;\
B04.ElemAndTrp4.Op_Elem_M_03;\
B04.ElemAndTrp4.Op_Elem_M_04;\
B04.ElemAndTrp4.Op_Elem_M_05;\
B04.ElemAndTrp4.Op_Elem_M_06;\
B04.ElemAndTrp4.Op_Elem_M_07;\
B04.ElemAndTrp4.Op_Elem_M_08;\
B04.BrkCond1.St;\
B04.BrkCond1.i2gt;\
B04.BrkCond1.oc;\
B04.BrkCond1.En;\
B04.AuxPickUp1.AuxFD_St;\
B04.AuxPickUp1.OCD_St_Ext;\
B04.AuxPickUp1.OCD_En;\
B04.AuxPickUp1.ROC1_St;\
B04.AuxPickUp1.ROC1_En;\
B04.AuxPickUp1.ROC2_St;\
B04.AuxPickUp1.ROC2_En;\
B04.AuxPickUp1.ROC3_St;\
B04.AuxPickUp1.ROC3_En;\
B04.AuxPickUp1.OC1_St;\
B04.AuxPickUp1.OC1_En;\
B04.AuxPickUp1.OC2_St;\
B04.AuxPickUp1.OC2_En;\
B04.AuxPickUp1.OC3_St;\
B04.AuxPickUp1.OC3_En;\
B04.AuxPickUp1.UVD_St;\
B04.AuxPickUp1.UVD_St_Ext;\
B04.AuxPickUp1.UVD_En;\
B04.AuxPickUp1.UVG_St;\
B04.AuxPickUp1.UVG_En;\
B04.AuxPickUp1.UVS_St;\
B04.AuxPickUp1.UVS_En;\
B04.AuxPickUp1.ROV_St;\
B04.AuxPickUp1.ROV_En;\
B04.LoadEnch1.ZLoad_a;\
B04.LoadEnch1.ZLoad_b;\
B04.LoadEnch1.ZLoad_c;\
B04.LoadEnch1.ZLoad_ab;\
B04.LoadEnch1.ZLoad_bc;\
B04.LoadEnch1.ZLoad_ca
B01.Print.wave_title_refer_table = �����ѹ����:Smpl_Wave
B01.ChanSuperv.refer_table B01.Print.chan_superv_refer_table =
B01.Event.setting_modified
B01.ChanSupervB.refer_table B01.Print.chan_supervB_refer_table =
B01.Event.setting_modified
B01.ChanStatistic.refer_table B01.Print.chan_statistic_refer_table =
B04.RX_HDLC1.Valid_FrmRcv;\
B04.RX_HDLC1.Nofrm_Abn;\
B04.RX_HDLC1.Bit_err;\
B01.Statistic.B04_RX_HDLC1_CrcErr;\
B01.Statistic.B04_RX_HDLC1_Data_Abn;\
B01.Statistic.B04_RX_HDLC1_Remote_Abn;\
B01.Statistic.B04_RX_HDLC1_SESR;\
B01.Statistic.B04_RX_HDLC1_FrameLost
B01.ChanStatisticB.refer_table B01.Print.chan_statisticB_refer_table =
B01.Event.setting_modified
B01.Print.matrix_name_refer_table = B01.Event.setting_modified
B01.Event.pulse_refer_table B01.Print.wave_pulse_refer_table = ;
B01.Lcd.main_disp_refer_table =
B04.Vol3P1.UA;\
B04.Vol3P1.UB;\
B04.Vol3P1.UC;\
B04.CurSum3P1.IA;\
B04.CurSum3P1.IB;\
B04.CurSum3P1.IC;\
B04.CurSum3P1.3I0;\
B04.SynChkFunc1.f_Line;\
B04.SynChkFunc1.f_Bus
B01.Lcd.vlink_refer_table = B04.Rbcsg1.result:B01.MACRO_SECTION
B01.Wave.wave_inst_user_primary_refer_table =
B04.Vol3P1.set_un1;\
B04.Vol3P1.set_un1;\
B04.Vol3P1.set_un1;\
B04.Vol3P1.set_un1;\
B04.Vol3P1.set_un1;\
B04.CurSum3P1.set_in1;\
B04.CurSum3P1.set_in1;\
B04.CurSum3P1.set_in1;\
B04.CurSum3P1.set_in1;\
B04.CurSum3P1.set_in1
B01.Wave.wave_inst_user_secondary_refer_table =
B04.Vol3P1.set_un2;\
B04.Vol3P1.set_un2;\
B04.Vol3P1.set_un2;\
B04.Vol3P1.set_un2;\
B04.Vol3P1.set_un2;\
B04.CurSum3P1.set_in2;\
B04.CurSum3P1.set_in2;\
B04.CurSum3P1.set_in2;\
B04.CurSum3P1.set_in2;\
B04.CurSum3P1.set_in2
B01.Iec103.analog_title_refer_table B01.Print.analog_title_refer_table
B01.Dnp30.analog_title_refer_table =
�������:Measurements1:28;\
����:Measurements2:3;\
ң���:Measurements3:39
B01.Iec103.analog_refer_table B01.Print.analog_refer_table
B01.Dnp30.analog_refer_table =
B01.Lcd.Measurements1_refer_table+\
B01.Lcd.Measurements2_refer_table+\
B01.Lcd.Measurements3_refer_table
B01.LedSignal.led_refer_table B01.Lcd.led_refer_table =
B04.TVSuperv1.chk_TV_Fail:0:2;\
B04.TASuperv1.Alm_CTS:0:2;\
B04.ARLogicFunc1.Ready_AR:0:2;\
B04.ARLogicFunc1.Inprog_AR:0:2;\
B04.CBTrpOut1.TripA:1:3;\
B04.CBTrpOut1.TripB:1:3;\
B04.CBTrpOut1.TripC:1:3;\
B04.ARLogicFunc1.CloseCB:1:3