Transistor Biasing

Paper No and Name: PH 301 Physics of Materials and Electronics

Unit No and Name: Electronics
Chapter No and Name: 5. Transistor Biasing

Fellow: Dr. Amit Sehgal, Assistant Professor

College/Department: Hans Raj College, University of Delhi

Author:- Dr. Amit Kumar,Assistant Professor

College/Department :-Bhaskaracharya College of Applied Sciences

Reviewer: P. Arun, Associate Professor

Collge/Department: Khalsa College, University of Delhi

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Introduction

In the previous chapter we studied about bipolar junction transistors (BJTs) and the
transistor action, which can be achieved when it is biased properly. Biasing the transistor
is very important process in designing a transistor circuit and therefore it need special
attention. Transistors are used in many different circuits but most basic ones are those
in which power level or voltage level of a given electrical signal is increased. Such
circuits are called amplifiers. Another class of circuits is oscillators, which is used to
generate either sine or square waves. In this chapter we will study various biasing
schemes and their basic characteristics but before that we will discuss the amplifying
action of BJT and concept of DC load line.

5.1 Amplifying action

The most important application of BJT is in amplifier circuits. Figure 5.1 shows the basic
CB n-p-n transistor amplifier circuit. The input sinusoidal signal (Vin) is applied to
emitter-base (input port) while output (Vout) is taken from collector-base output port
(load resistance of10kΩ).

At input port the sinusoidal input signal (Vin) is superimposed on the DC voltage VEE.
This causes emitter-base voltage (VEB) to vary with time and hence the emitter current
(iE) also varies with time sinusoidally. The collector current (ic) being a function of
emitter current also varies with time sinusoidally. This varying current passes to load
resistance and resulting the output voltage (Vout) to be varying with time sinusoidally.
Practically, it is observed that the output voltage (Vout) is many times greater than input
voltage (Vin) .Let us now discuss how the input signal gets amplified. In CB mode, the
input resistance (Rin) is very low typically 20Ω and output resistance is very high
typically 500kΩ. Let us assume a sinusoidal input of rms 10mV is applied, using the
typical value of input residence we get the emitter current (ie) as

The collector current (ic) is almost equal to emitter current so

In the output side of the transistor amplifier circuit, output resistance is very high (about
500kΩ) in comparison to load resistance (RL=10kΩ) Therefore, output side of the
transistor acts as a constant current source and almost all collector current passes to
load resistance. Therefore the output voltage is

V out=i c*R L=0.5mAx10kΩ=5V

The ratio of output voltage to input voltage is known as voltage amplification factor or
voltage gain (AV) of the amplifier. For the amplifier shown in figure 5.1, voltage gain is

Important Fact: Emitter currents in the amplifier circuit

The net emitter current (iE) is produced due to two sources, one the DC biasing power
supply (VEE) and other input AC signal (Vin). The DC power supply VEE produces a DC
emitter current (iE) and AC input voltage Vin causes an AC emitter current component
(ie). The typical time behavior of these components is drawn in figure below:

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When AC component ie is superimposed with DC component IE, the resulting current is

iE=IE+ie is clamped by DC component IE as shown in the figure.

Important Fact: Transistor’s nomenclature

Transistor amplifies the signal due to its ability to transfer signal current from low
resistance circuit to high resistance circuit. Transistor also gets its name by virtue of this
property i.e. TRANsfer + reSISTOR = TRANSISTOR.

Adaptations : Notations as per IEEE standards

For denoting various variables, we have used following standards as per Institution of
Electrical and Electronics Engineers (IEEE). These are summarized below:

1. The instantaneous value of variables which vary with time are represented by
lower case letters e.g. “i” used for current, “v” for voltage and “p” for power.
2. The DC variables or RMS values of AC are represented by upper case letters e.g.
“I” is used for DC current, “V” for DC voltage and “P” for DC power.
3. The time varying components are indicated by small letter subscripts with proper
electrode symbols e.g. emitter AC current component is represented by “ie”.
4. The instantaneous total values or average DC values are indicated by capital
subscripts e.g. total emitter containing both DC and AC current components is
represented by “iE”.
5. The magnitude of DC supply is indicated by double subscripts of corresponding
electrode symbol.

5.2 CE amplifier

In the last section we studied basic CB amplifier circuit but CE configuration is most
widely used configuration in amplifier circuits. In actual practice, single transistor stage
is not sufficient to achieve the required amplification therefore in almost all applications
we use a number of amplifier stages connected one after the other. Such connection of
amplifier stages is known as cascaded amplifier.

In a cascaded amplifier, the input signal is fed to the input of first stage and output is
taken from output of last stage. Figure 5.2 shows a two stage cascaded amplifier. The
input Vin is applied to first stage of the amplifier at A1B1 port and output is taken from
output of second stage at A3B3 port In a properly designed amplifier circuit it is desirable
that maximum of the input signal be supplied to input of first stage. It will be possible
only when input resistance of first stage is very high than the source resistance (Rin). It
is also needed that first stage should not be disturbed when it is connected to second
stage at terminal A2B2 i.e. no loading effect is desirable. This can be achieved when
input resistance of second stage is higher as compared to output resistance of first
stage. Thus it is required for an amplifier stage to have higher input resistance and
lower output resistance. We know that:

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Figure:5.2:Two stage cascaded amplifier

1. CB configuration results in low input (~20Ω) and high output resistance

(~500kΩ). This is reverse of what we desire.
2. CC configuration, in fact offers, very high input resistance (~100kΩ) and very low
output resistance (~500Ω) but it has less than unity voltage gain. Hence it is also
not suitable for amplifier design.

Therefore, CE configuration is better choice for amplifier than other two configurations.
It has higher input (~1kΩ) and lower output resistances (~10kΩ).

Interesting Facts: Voltage source

An ideal voltage source has zero internal resistance (Rin =0), however practically
useful voltage source are selected to have very lower internal resistance than the load
so that little power is lost in the source itself (Rin<<RL).

Note that the loss due to voltage drop across internal resistance is

Ideally is should be zero (i.e. Rin = 0) and practically it will be lower when

5.2.1 Basic CE amplifier

Figure 5.3 shows the basic CE amplifier circuit, which uses two batteries VBB, and
Vcc bias n-p-n transistor.

The output is taken across collector resistance RC, which acts as load resistance. The
amplified AC appears across this resistance. On the input circuit side, DC base current
only flows through base resistance RB. Capacitor C1 is coupling-capacitor, which block DC
voltage, if any, from going into base terminal while capacitor C2 is coupling-capacitor,

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which block DC component from flowing to output terminal so that vout has only AC
component.

Figure:5.2:Basic CE amplifier

Basic Concept: Capacitor reactance (XC)

The capacitive reactance is given by

For DC signals,

Hence, capacitor offers ideally infinite impedance to DC current. Therefore we can say it
blocks the flow of DC from itself. Comparatively, for AC signals where the frequency is
finite so that much lower impedance is offered by capacitor so we can say that
capacitor passes AC currents more readily as compared to DC.
Basic Concept: DC load line
Consider a simple Ge diode circuit as shown in the figure below. Let us
determine the current, which will flow through this circuit and the output
voltage Vout without using any diode model.

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If we apply Kirchhoff’s voltage law, we get:

V=VD+IRL

This equation relates the current I with diode voltage VD for a given pair of V and RL.
• If I = 0, V = VD = 1V. Let us fix this point on the graph VD versus I at point A.
• If VD = 0 => I = V/RL = 1/50 = 20mA. Fix this point on the graph VD versus I at point
B.

Draw a line to connect point A and B. This represents all possible combinations of I and
VD, which satisfy the initial equation,

Now, where does this circuit is operating at over the line AB? Answer to this question,
can be given by plotting static I-V characteristics of diode. The operating point will be
the one, which not only satisfy the initial line equation (V=VD+IRL) but also the I-V
characteristics of the diode. So point of intersection between the characteristic curve and
line AB is the operating point (Q) of the given circuit. So current in the circuit is 12mA
and voltage drop across Ge diode is 0.4V, therefore output voltage is (VOUT) = 1 – 0.4 =
0.6V. The static resistance of the diode is

Consider the initial AB line equation, again

Comparing with standard line equation y = m x + c, we realize that slope of the line is -
1/RL and y-intercept is V/RL.

In last value-addition column, line AB represents the DC conditions present due to linear
elements and its slope depends on the value of load RL, therefore it is known as DC load
line. It provides the easiest (graphical) method of circuit analysis when both linear and
nonlinear elements are present.

5.2.2 DC load line and quiescent point

Let us analyze the basic CE amplifier using the concept of DC load line. Suppose the
circuit shown in figure 5.3 to be in quiescent condition i.e. no input AC signal applied.
Under these conditions the circuit reduces to the one shown in figure 5.4. We will first

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determine the DC load line and then find out the operating point graphically by
overlapping DC load line and output characteristics of the transistor, as we have done in
the previous value-addition. (You are advised to first read the previous value-addition
column i.e. DC load line first.)

Figure:5.4:Basic CE amplifier in quiescent condition

Applying Kirchhoff’s voltage law to the output collector circuit, we get

Rearrangement of this equation, provides us

This is the equation of DC load line. The operating point can be determined by
overlapping the output characteristics with this load line as shown in figure 5.5. From
the figure 5.5, it is clear that for locating operating point of transistor we need to know
the value of IB. To determine IB, apply Kirchhoff’s voltage law to input base circuit

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Figure:5.5:Overlap of DC load line on output characteristics of transistor

Corresponding to this base current, there will be a collector characteristic curve on

output characteristics. (If this curve is not present than we have to plot it) The operating
point will be at the point of intersection of DC load line and collector characteristic curve.
This point is also known as quiescent point or simply referred as Q-point. So the Q-point
can be found by value of IC for given VCE but there are other factors too, which decides
these values like VCC, RB ,RC ,VBE and VBB. All these value together decides the position of
Q-point.

Graphical Method: Quiescent point

Let us determine Q-point for circuit shown in figure 5.4, with RC = 1kΩ,
RB = 200kΩ, VCC = 12V and VBB = 9V. The output collector
characteristics of transistor are shown in figure below. DC load line can
be plotted by joining the points (VCE, 0) and (0, VCC/RC) i.e. by joining
(12, 0) and (0, 12mA) points.

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To find the Q-point we need to know the base current which is given by

We can see, however that there is no curve in the collector characteristics for
IB=45µA. Therefore we draw a curve between IB = 30 µA and IB = 60 µA as
shown in figure above by dotted line. The point of intersection between this
curve and dotted line shows the Q-point. At this point VCE = 7V and IC =
5.1mA

5.2.3 Amplifier analysis

The proper amplification by a transistor can be achieved only when its quiescent point is
properly fixed. In fact it should be preferably lie in the middle portion of the active
region. This ensures that the transistor amplify input signal faithfully i.e. without
distortion. When no input signal is applied i.e. under quiescent conditions, the base
current has a constant DC value as determined by the Q-point. When an AC input is
applied to amplifier circuit (figure 5.3) it get superimposed with DC base values so that
base current varies as per input AC value (Vin). The instantaneous value of base current
vary according to input AC signal so that instantaneous operating point of transistor also
moves along the DC load line. This causes instantaneous value of collector current and
voltage to vary according to input signal. The variation in collector voltage is many times
greater than that in the input AC signal. These collector-voltage variation reaches output
terminal through capacitor C2.Therefore, the output is many times to that of input and
hence amplification achieved.

Consider the example considered in the above value-addition column i.e. basic amplifier
with RC= 1kΩ, RB = 200kΩ, VCC = 12V and VBB = 9V. For this circuit DC base current,
IB=45µA. Let a input AC signal of 20mV peak to peak is applied to this amplifier. If the
input dynamic resistance of transistor is 1kΩ, then input voltage will produce a peak-to-
peak variation in the base current as

This variation in the base current will take place around its quiescent value of 45µA,
therefore base current varies in between 65µA (point A) to 25µA (point B) sinusoidally.
Since the base current varies so the instantaneous operating point will move between
point A and point B corresponding to base currents 65µA and 25µA respectively. This

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variation is shown in figure 5.6 by drawing a line perpendicular to the DC load line and
passing through the Q-point (This line is time axis).

As the input voltage varies, the instantaneous operating point moves along the DC line
between point A and B around Q-point. Due to this variation, the collector current (iC)
and collector voltage (VCE) also varies. The variation for iC is shown between points A1
(6.1 mA) and B1 (3.1 mA) on the left hand side of characteristics. The variation for VCE
is between points A2 (5.6V) and B2 (8.4V) as shown in the bottom of the characteristics

Figure:5.6:Graphical analyses for basic CE amplifier

5.3 Need for biasing

All electronic devices require proper DC biasing mechanism depending on its application.
The main purpose of biasing is to obtain idle or quiescent conditions for the electronic
device so that it can perform the required function. For example, when transistor is used
in the amplifier circuit, it should work so that transistor remains in the active region i.e.
its emitter junction forward biased and collector junction remains in reverse bias always.
This can be achieved by transistor biasing with the use of DC batteries and different
resistances, which are together, referred as biasing circuit. Proper DC biasing fixes the
Q-point on the DC load line such that transistor remains in the active region while the
process of amplification. The various parameter of the transistor are considered while
designing a biasing circuit.

5.3.1 Q-point for faithful amplification

Once the proper DC biasing conditions are established in an amplifier circuit, then the AC
signal is applied to the input terminal. Because of input AC signal, the base current
varies and results in the similar variations in the collector and emitter currents. This
process is explained in the previous section. Now let us discuss how these variations
change on the position of Q-point. In figure 5.7, 5.8 and 5.9 shows the Q-points for
positions Q1, Q2, and Q3 i.e. near the saturation region, cut-off region and at the middle
of active region.

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Figure 5.7 shows graphical amplification pattern for basic CE amplifier when Q-point lie
close to the saturation region at position Q1. As the base current varies sinusoidally, the
output collector current iC and output voltage vCE get clipped at positive peaks. This
results in distortion of the signal. Under these situation, when the base current reaches
to its positive peak value collector current remains constant to its saturation values. This
clearly indicates position Q1 is not appropriate for suitable quiescent point in case of CE
amplifier circuit. In figure 5.8, the quiescent point is taken to be near the cut-off region.
In this case the signal is clipped at negative peaks. Therefore, this is also not the
suitable position for the Q-point if one requires faithful amplification.

Figure 5.8 Graphical analyses for basic CE amplifier when Q-point lie close to
the cut -off region

However, it becomes clear from the figure 5.9, that output is not distorted at all when
the quiescent point is fixed at the middle of the active region at position Q3. Hence, for a
faithful amplifier (amplifier for which output waveform is just amplified repica of input
waveform without distortion) the quiescent point has to be placed at the middle of the
active region.

Fugure 5.9 Graphical analyses for basic CE amplifier when Q- point lie at the
center of active region

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Interesting fact: Variations in transistor parameter

Some transistor parameters like b and VBE changes with the transistors of even same
type e.g. for BC147 variations in b are in the range 100-600. So if a BC147 is needed to
replace in a circuit by another BC147, then the design parameters have to be rethink.
This is due to non-sophisticated manufacturing variations for example in base width etc.
A slight variation in base width in one transistor to other even of same type, causes
large variations in its b, VBE etc. These variations therefore can result in a shift of Q-
point, hence lead to unfaithful amplification.

Interesting fact: Effect of temperature on position of Q-point

5.3.2 Stabilization of Q-point

Only fixing the Q-point to middle of the active region does not ensure the faithful
amplification. Designer must also ensure that it remains fixed where it was fixed
because in transistor circuits Q-point get shifted with the use of the circuit due to change
in the collector current caused by:

1. Temperature changes
2. Transistor replacement

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As the temperature changes or in case of transistor replacement, the position of Q-point

(i.e. the point (VCE, IC) at zero AC signal value) also changes. But we have learnt in the
previous section (5.3.1) that for faithful amplification, it is essential that Q-point to be
fixed at the middle of the active region. So any variation in the position of Q-point can
lead to distortion in the output waveform. Therefore it is essential for a circuit designer
to stabilize the position of Q-point. This stabilization should be such that it ensures the
value of IC and VCE to become independent of temperature and transistor parameter
variations.

As the temperature increases, the leakage current, which is caused by minority carrier,
ICBO increases. This causes ICEO to get increased which in turn increases the collector
current IC as per following equations:

Increase in IC again cases an increase in temperature of collector base junction. This

whole cycle repeats itself and the cumulative effect is higher increase in IC which causes
shift in the position of Q-point into saturation. In fact, this process when continues can
even burn the transistor. This situation is known as thermal runaway. The sequence of
events involved in producing thermal runaway is described by following chain:

Thermal runaway must be avoided because of consequent transistor destruction. It is

therefore essential that IC must be kept constant. Hence Q-point must be stabilized. In
general this is done by, causing IB to decrease by itself with increase by circuitry. The
good biasing circuit should be such that it not only fix the Q-point but also ensure the
stabilization of this point. Once the stabilization is achieved, the Q-point becomes
independent of temperature changes and transistor parameters.

5.3.3 Stability factors

The main sources of instability in the value of IC (hence in Q-point position) are:

1. Reverse saturation current, Iwhich doubles for every 10°C increase in the
temperatureCO
2. Base-emitter voltage, VBE which decreases at the rate 2.5mV/°C for both Ge and
Si transistors
3. DC current gain, b which increases with temperature

Typical values: Ge transistor parameters

Source: table 9-2, Integrated Electronics by Millman and Halkias, Tata McGraw Hill

Collector current is thus function of three parameters i.e. Ic = f(Ico, VBE, ). As discussed
in last section that it is necessary to keep DC collector current (Ic) constant which is
achieved by biasing circuit. The extent to which biasing circuit proves to be successful in
achieving this goal is defined by stability factor. Depending on three physical parameters
Ico, VBE and we can define, three stability (or stabilization) factor. These are:

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a. It is rate of change of collector current with respect to reverse saturation current

keeping VBE and constant i.e.

b. It is rate of change of collector current wwith respect DC base-emitter voltage

keeping Ico and constant i.e

c . It is rate of change of collector current wwith respect DC base-emitter voltage

keeping Ico and VBE constant i.e

Stability factor S = 20, implies Ico. So higher the stability factor lower will be the
stability. In order to achieve greater stability, these stability factors should ne lowest.
The ideal value of stability factors is unity, which is not chievable parctically.

The total change in the collector current over a specified temperatur range can be
expressed as:

Consider the expression for DC collector current for CE configuration as under

Let us differentiate above expression w. r. t. Ic

5.4 Transistor biasing methods

The simplest biasing circuit possible for a transistor to be used in amplifier circuit is
shown in the figure 5.10. This circuit uses VBB battery to forward bias emitter junction

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and VCC battery to reverse bias the collector junction. Since base to emitter voltage VBE
is very low (i.e. 0.3V in case of Ge-transistor and 0.7V for Si-transistor), therefore VBB
should also be of that order. On the contrary, VCC should be of much larger magnitude
than VBB since it is used to reverse bias the collector junction.

Figure:5.10:Simplest biasing circuit

Even though this circuit will work satisfactory but it is impractical since it is difficult to
have stable, long lasting batteries of the order of 0.3-0.7V. Therefore we need to design
some other biasing methods. Let us discuss some of these circuits.

5.4.1 Fixed biasing

The main drawback of basic biasing circuit, shown in figure 5.10, is that it requires
unpractical low values of battery VBB. This requirement can be overcome putting a series
high valued resistance RB in the base-emitter circuit as shown in figure 5.11. The base
current IB flows through base resistance RB so that a major portion of voltage is dropped
across it. This scheme allows VBB to be of the order of 1.5V.

Figure:5.11:Simplest fixed bias circuit

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Single battery fixed bias

Practically it is always suitable to use the biasing scheme that uses single battery. Fixed
bias circuit can be redrawn as shown in figure 5.12 (a).

Figure:5.12:Fixed bias circuit (a) showing two batteries (c) using single battery

The positive terminals of both batteries can be connected together as shown in figure
5.12 (b). This scheme allow us to use only single battery i.e. VCC, however for this
scheme we have to adjust the value of base resistance RB.

Let us find the required value of RB for circuit shown in figure 5.12 (b). The zero signal
base current IB is provided by VCC and it flows through RB. The required value of IB (and
IC = βIB) can be obtained by suitably selecting the value of RB. Applying Kirchhoff’s
voltage law (KVL) in the closed circuit a-b-e, we get:

For fixed value of VCC and choosing the value of IB (for desired Q-point) we can find the
value of RB. (typically RB.~ several hundreds of kΩ). For this reason this biasing scheme
is known as fixed bias.

The Q-point (VCE, IC) for the fixed biased network can be found by applying KVL to
output closed circuit d-c-e, which gives

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The value of zero signal collector current IC can be obtained from above equation by
considering the value of VCE, which in turn decided by position of operating point.

• If operating point lie in the active region of the transistor then V will be
comparable to VCECC

• If operating point lie in the saturation region of the transistor then V is very low
so thatCE

So if transistor has to be used in amplifier circuit then should be set as

so that transistor remains in active region To set the operating point in fixed bias circuit,
one should perform following three steps:

#1. Set zero signal base current using

by choosing the proper value of RB.

#2. Set zero signal collector current using Choose RC so that

#3. Calculate collector-emitter voltage by VCE=VCC-IC-RC The main advantage of fixed

biased circuit is its simplicity. It is easier to design with simple calculations and has the
most flexible designing steps. It requires only one resistance i.e. RB. along with load
resistance RC. There is no loading effect of the source, since no resistor is placed in
between base and emitter terminal. However this scheme has a very crucial
disadvantage i.e. it provides a very poor thermal stability. In the section 5.3.3 we
defined the stability factor as

In fixed biased circuit IB is independent of IC (since, IC = β IB) so that

substituting this into above expression we get the stability factor as

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This clearly indicates that if ICO changes (due to temperature change) by one factor IC
get changed by (β+1) factor. For example if β = 99, so that S = 100 then IC changes
100 times faster than ICO. The higher value of stability factor makes the fixed biased
circuit thermally unstable. By no mean we can check the increase in the ICcaused by
changes in temperature variations. There is strong possibility of thermal runaway in this
biasing scheme as illustrated in section 5.3.2. Not only this, if the transistor has to be
replaced with different β, then also IC changes by the same factor for given IB (since, IC
= β IB). All these factors make the Q-point of fixed biased circuit very unstable and that
is the reason why this biasing scheme is seldom used. There are two methods to
overcome the stability problem in fixed biasing circuit. These methods provide the
feedback from output to input through resistances to achieve the stability. These are:
(i) Biasing with base resistance feedback (Collector-to-base biasing)
(ii) Biasing with emitter resistance feedback (Emitter biasing)
Let us discuss these methods in detail.

Numerical Problems: DC load line for fixed biased circuit

Consider fixed biased circuit made by a Si n-p-n transistor shown in figure below:

Let us first determine its DC load line and the Q-point. Applying the KVL rule to the
closed loop d-c-e, we get

V CE=VCC-ICRC

Putting V CE = 0, we get IC = VCC/RC = 6/2k =3mA. This locates the point A of DC load
line on IC – axis.

Putting IC = 0, we getV CE =VCC = 6. This locates the point B of DC load line on V CE -

axis.

By joining the point A and B we get the DC load line. Now let us locate the position of
Q-point over it. Apply KVL rule to closed loop a-b-e, we get

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(As this is a Si transistor, so VBE = 0.7V.)

Applying KVL rule to closed loop d-c-e, we get

Hence the Q-point is located at (4.32V, 0.84mA). This position is illustrated below on
the DC load line. As it is evident that Q-point lie close to cut-off region of transistor so
this is not the correct biasing scheme for a faithful amplifier.

Numerical Problems: Designing fixed biased circuit

Let us design a fixed biased circuit with a transistor β = 95 and output characteristics
of transistor as shown in figure below:

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Let us fix the Q-point at the middle of the active region as shown in figure. It is
evident that for fixing Q-point we need to set IB = 40µA, so the value of RC is
calculated as:

Given collector power supply, V CE = 9V and base to emitter voltage drop VBE =
0.7V. The collector current.

Now, we have to take the collector resistance value RC so that transistor does not go
into saturation i.e.

Above inequality suggest that we can take RC to be 2kΩ. Hence knowing the values
of RB and RC we can make the fixed biased circuit as shown by circuit below:

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Let us now find the exact location of Q-point for this circuit and the position of DC
load line.

Let us now find the exact location of Q-point for this circuit and the position of DC
load line.

The collector to emitter voltage

Now let us redesign the circuit by changing the collector power supply to VCC = 5V,
then base resistance changes to

And collector resistance can be chosen from the inequality

So we can chooseRC = 1kΩ.

With RB = 100kΩ, RC = 1kΩ, and VCC = 5V does not effect the position of Q-point
much. It shows that the resistances used in biasing circuit simply strongly depend on
the power supply.

Numerical Problem: Designing fixed biased circuit

Let us design a fixed biased circuit for CE amplifier so that it has Q-point at (8V, 2mA).
Suppose we have been supplied with

(i) Fixed 12V DC power supply

(ii) Si-transistor with β = 98, VBE = 0.6V

Let us first find the load resistance RC, for this consider the equation

Base current IB = IC/β = 2/98 = 0.0204 mA = 20.4 µA.

Now we will find the base resistance RB. Consider the equation

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This completes the designing procedure.

5.4.2 Collector-to-base biasing

One way to increase the thermal stability of fixed biasing circuit is to use the scheme
shown in the figure 5.13. In this circuit, base resistor RB is connected to collector rather
than to battery VCC. Therefore, this biasing scheme is known as collector-to-base biasing

Figure:5.13:Collector-to-base biasing circuit

Let us first determine Q-point for this apply KVL rule to closed loop a-c-b-e, we get

VCC=(IB+IC)RC+IBRB+VBE

Substituting IC = β IB, we get

VCC=(IB+IC)RC+IBRB+VBE

Since IC = β IB, so

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Applying KVL rule to closed loop a-c-e, we get

Hence, by calculating (VCE, IC) the Q-point can be defined.

Thermal stability

Let us now discuss the thermal stability of this circuit. For this consider the KVL equation
to input circuit a-c-b-e

VCC=(IB+IC)RC+IBRB+VBE

Applying KVL rule to closed loop a-c-e, we get

By substituting (VCC – IC RC) from above equation to earlier equation we get

As the temperature increases, the leakage current ICO and current gain β increases. This
increases the collector current, IC = β IB + ICEO. This increase in the collector current
causes collector-to-emitter VCE voltage to decrease as VCE =VCC – IC RC. The reduce
VCE causes decrease in the base current since IB = (VCE – VBE)/(RC – RB). This lowering
of base current results in the lowering of collector current, which was originally
increasing due to temperature rise. This mechanism is illustrated below by series chain:

Due to this mechanism, collector current is not allowed to increase (or decrease) rapidly
and hence this circuit has the tendency to stabilize the Q-point.

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Numerical Problem: Q-point in collector-to-base biasing

Consider a collector-to-base biased circuit as shown in figure. Let us find its Q-point.
The base current, is

Collector current, is

Collector-to-emitter voltage, is

So the Q-point is (8.21V, 1.58mA).

Note that V CE is very close to V CC so Q-point is near to the cut-off region.

Intersting Point: Feedback in collector-to-base biasing

In the collector-to-base biasing circuit, base resistance RB connects collector (the output
terminal) to the base (input terminal). This cases feedback in the circuit, which make
base current dependent on collector voltage, as

Therefore, this scheme of biasing is also known as voltage feedback biasing. The
feedback by RB resistance also causes feedback for the AC signals, which are to be

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amplified. This reduces the overall voltage gain of the amplifier circuit. Due to this
drawback collector-to-base biasing is avoided in making an amplifier circuit.

Numerical Problems: Stability against β in collector-to-base biasing

Consider a collector-to-base biased circuit as shown in figure. Let us find how the
collector current changes when β changes from 25 to 100.

First let us find IC for β = 25:

The base current, is

Collector current, is

Now if β = 100, then The base current, is

Collector current, is

Note when β changes from 25 to 100 (i.e. 4 times), the base current changes from
17.6µA to 16.4µA and collector current changes from 0.44mA to 1.6mA (i.e. change by a
factor of 3.7). In fixed bias, a change of β by four times would have change IC by same
factor but here this change is about 3.7 times. Still it is poor stabilization. Now let us
consider another circuit where base resistance is reduced to 100kΩ, as shown in figure.
Now repeat the calculation for β =25 and 100.

For β = 25: The base current, is

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Collector current, is

Now if β = 100, then the base current, is

Collector current, is

So for this circuit, a change in β by four times (25 to 100) causes change in IC by three
times (2mA to 6mA). This indicates the better stabilization but at the cost of voltage
gain. Since resistance RB is reduced from 500kΩ to 100kΩ, the feedback factor increases
hence voltage gain get reduced. So one needs to make a balance between the two
stability and voltage gain while designing this type of biasing circuits. It is a difficult
process so generally designer avoids using collector-to-base biasing while designing
amplifiers.

5.4.4 Voltage divider biasing

The voltage divider biasing method is most commonly used biasing method. In this
method a voltage divider network made by two resistances R1 and R2 is used to bias the
base-emitter junction as shown in figure 5.15. The voltage drop R2, forward biases the
base-emitter junction. This causes the base current and hence the collector current in
the circuit under quiescent (zero signal) conditions. The use of voltage divider network
gives the name voltage divider method of biasing.

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Figure:5.15:Voltage divider biasing circuit

Let us now find out its Q-point by approximate method. Since base current is very lower
so we can write, I1=I2+IB=I2and

Voltage acrossR2,

Applying KVL rule to closed loop b-e-g-b, we get

From the above equation it is clear that collector current is

• Not dependent on current gain β
• Dependent on base-emitter voltage drop VBE, but

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Hence, collector current is almost independent of transistor parameters therefore it

offers good stabilization. For this reason voltage divider biasing scheme has became the
universal choice for providing transistor biasing.

To determine VCE, let us apply KVL rule to collector side in the loop d-c-e-g

Accurate analysis

The accurate analysis of voltage divider biasing network can be performed with the help
of Thevenin’s theorem. Let us thevenize the voltage divider biasing network across the
terminals A-B. This procedure is illustrated in figure 5.16. The voltage divider biasing
network can be, first, divided into two arms as shown in the figure 5.16 (a). Let us now
consider the arm containing R1 and R2. This arm can be represented by Thevenin’s
equivalent as shown in figure 5.16 (b). The Thevenin’s voltage VTH is open circuited
voltage across the terminals AB as shown in figure 5.16 (c), which can be calculated as:

The Thevenin’s resistance RTH can be evaluated by replacing the voltage source by short
circuit as shown in figure 5.16 (d). So the RTH is parallel combination of R1 and R2, so
that

Replacing the terminal AB, from the circuit shown in figure 15.6 (a), by the Thevenin’s
equivalent shown in figure 15.6 (b). Now we can use the circuit shown in figure 5.16 (e)
to locate the exact Q-point.

Applying KVL rule to the input closed loop a-b-e-g-f, we get

Once the collector current IC is defined, we can find V CEby previous equation

V CE=VCC-IC(RC+RE)

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Figure:5.16(a):Thevenizing the voltage divider biasing circuit

Figure:5.16(b):Thevenizing the voltage divider biasing circuit

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Figure:5.16(c):Thevenizing the voltage divider biasing circuit

Figure:5.16(d):Thevenizing the voltage divider biasing circuit

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Figure:5.16(e):Thevenizing the voltage divider biasing circuit

Numerical Problems: Q-point for voltage divider biasing

Let us determine the Q-point for a voltage divider biasing circuit as shown in figure,
when it is known that transistor is of Ge type and have β=50.

(i) Approximate analysis:

Since base current is negligibly small so the base voltage,

The emitter voltage,

V E=VB-V BE=0.91-0.3=0.61

The emitter current,

The collector current,

The collector voltage,

Therefore, collector-to-emitter voltage,

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The Q-point is therefore (6.52V, 0.61mA).

(ii) Exact analysis:

Let us now calculate the exact position of Q-point by using Thevenin’s equivalent

The base current is

The collector current is

The collector-to-emitter voltage

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The Q-point as determined by exact analysis is therefore (6.87V, 0.55mA) which is

different than (6.52V, 0.61mA) determined by approximate analysis. But the difference
is less than 10% so for simplicity of calculation, one can use approximate method of
analysis with moderate errors.

Importment Fact: p-n-p transistor biasing

The biasing for p-n-p transistor is exactly similar to that for the n-p-n transistor. In fact
p-n-p transistor is just a complement of n-p-n so that all voltages and currents are
opposite to that for the n-p-n.
Therefore in order to obtain a complementary p-n-p circuit of given n-p-n circuit we just
have to

1. Replace n-p-n transistor by p-n-p transistor

2. Reverse all voltages and currents

Statement: Thevenin’s theorem

Thevenin’s theorem can be used to solve a complicated linear network. It states that the
output terminals of a circuit containing linear elements and power supplies can be
represented by a voltage source VTH in series with Thevenin’s resister RTH. The VTH is
open circuit voltage across the output terminals and RTH is resistance across the output
terminals when all sources are reduced to zero (voltage sources shortcircuited and
current sources open sources).

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Animation-Emitter currents in the amplifier circuit

http://www.illldu.edu.in/mod/resource/view.php?id=5390

Animation-Quiescent point

http://www.illldu.edu.in/mod/resource/view.php?id=5390

Animation-Graphical analysis for CE amplifier

http://www.illldu.edu.in/mod/resource/view.php?id=5390

Animation-Position of Q-point and faithful amplification

http://www.illldu.edu.in/mod/resource/view.php?id=5390

Animation- Effect of temperature on position of Q-point

http://www.illldu.edu.in/mod/resource/view.php?id=5390

Summary

• Main utility of transistor is its ability to amplify weak signals by using it in the
amplifier circuits.
• Transistor achieves its amplifying action by virtue of its ability to transfer
electrical signal from lower resistance port (emitter-base) to higher resistance
port (collector-base).
• Best choice of the configuration for a voltage amplifier is common emitter (CE)
configuration. This is due to the fact that in CE configuration input dynamic
resistance is high (~1kW) and output dynamic resistance is low (~10kW) as
compared to CB configuration.
• CC configuration input dynamic resistance is highest (~100kW) and output
dynamic resistance is lowest (~500W) as compared to other two configurations
but it is not the suited one for voltage amplifiers since it has voltage gain less
than unity.
• DC load line is used to represent DC load conditions. When it is superimposed
over I-V characteristics of non-linear electronic device, we can get all possible
operating points.
• One has to design an electronic circuit by taking care of quiescent conditions.
This is accomplished by fixing the Q-point.
• Biasing of an electronic circuit is required to make its Q-point. That is quiescent
conditions are set by the process of biasing.
• For a faithful amplification process, designer has to fix Q-point at the middle of
the active region so that operating point does not fall into saturation and cut-off
regions since this will reflect as clipping of the output waveforms.
• Another important requirement is that the Q-point should not be volatile i.e. it
should not change.
• One has to ensure the stabilization of Q-point against the atmospheric as well as
circuit component changes and voltage variations. A floating Q-point can never
result in faithful amplification.
• In order to measure stability of a circuit three stability factors are defined viz. S,
S¢, and S¢¢. These are defined as rate of change of collector current with respect
to leakage current (ICO), DC current gain (b) of transistor and base-emitter
voltage (VBE) respectively. Lower the values of these stability factors more stable
the circuit is.
• Requirements of biasing circuits are
o To establish Q-point at the center of active region where transistor works
most linearly hence allow the faithful amplification.
o To fix the Q-point at the designed point so that it cannot move into
saturation or cut-off regions and make distortions in the output waveform.
o To ensure IC does not change against the temperature variations.

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o To make Q-point to be independent of transistor parameters so that when

transistor get replaced Q-point does not shift.
• In fixed biased circuit a high valued base resistance RBis connected in the input
circuit to provide single battery use in biasing. However it suffers from high
instabilities. Remedy to fixed biased biasing circuitry is provided by
o Connecting base resistance to Collector terminal directly (Collector-to-
base biasing), or
o Placing an emitter resistance between emitter terminal and ground. This
causes negative feedback to achieve the stability of Q-point.
• In voltage divider and emitter biasing circuits, the direction of current flow
through emitter resistance RE i.e. IE is such that it causes a voltage drop across
RE which reverse biases the emitter-base junction. However this fact is utilized to
achieve the stability in voltage divider and emitter biasing.
• If collector current IC increased either due to temperature increase or transistor
replacement, then this increase causes emitter current IE to increase. The
increases in IE increases the voltage drop across RE, which in turn tend to reverse
bias emitter junction. This decreases the base current value and hence the
collector current. This sequence of events ensures the stability of the circuit.

Exercises

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5.25 Make a list of different biasing schemes that are used for an amplifier then
compare their advantages and disadvantage. Explain when potential divider method is
best-suited one for faithful amplifiers.

Glossary

Amplifier: Transistor circuits used to increase the voltage or power levels of an

electrical signal.

AV: Voltage gain of the amplifier i.e. ratio of output to input AC voltage.

Biasing circuit: Circuit made by DC batteries and resistances, which ensure the Q-point
to, desired position on DC load line.

Cascaded amplifier: Amplifier in which various amplifier stages are connected one
after the other.

DC load line: DC conditions present due to linear elements and power supply is
represented on the I-V characteristics of non-linear element, by a straight-line with
slope equal to reciprocal of load resistance.

Faithful amplification: Process of amplification of input signal just by raising the

strength of the weak signal without any change in its general shape.

Oscillator: Transistor circuits used to generate either sine or square wave electrical
signals.

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Q-point: Quiescent point: Point on the DC load line, which represents the quiescent
conditions.

Quiescent condition: Idle condition: Conditions of the circuit without any external
signal applied.

Stabilization of Q-point: Fixing the Q-point such that it becomes independent of

temperature changes and transistor parameters.

References

Works Cited

Transistor biasing issues for linear amplification of complex signals by Gary A. Breed,
High frequency Electronics, Summit Technical Media, LLC (March, 2003)

Suggested Readings

Basic electronics and linear circuits by N. N. Bhargava, D. C. Kulshreshtha, S. C. Gupta,

Tata McGraw-Hill Publishing Company Limited, ISBN 0074519654 (1997)

Electronic devices and circuits by Allen Mottershead, 17th Indian reprint, Prentice Hall of
India publisher, ISBN 8120301242 (1998)

Integrated Electronics: Analog and Digital Circuits and Systems by Jacob Millman and
Christos C. Halkias, Tata McGraw Hill Edition 1991, Eleventh reprint, Tata McGraw-Hill
Publication, ISBN 0074622455 (1997)

Microelectronic circuits by Sedra And Smith, Fifth edition, Oxford university press, ISBN
0195142527 (2004)

Principles of electronics by V. K. Mehta and Rohit Mehta, Tenth Edition, S Chand

publication, ISBN 8121924502 (2006)

Web Links

http://www.hardwareanalysis.com/content/article/1624/

http://www.tpub.com/neets/book7/24e.htm

http://www.electronics-tutorials.ws/

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