Syllabus for Bachelor of Technology

Computer Engineering

Subject Code: 01CE1402

Subject Name: Computer Organization and Architecture
B.Tech. Year – II

Objective: To study the basic structure of a computer organization and

architectural of the Arithmetic and Logical unit, the Memory unit, Control unit
and I/O unit.

Credits Earned: 4 Credits

Course Outcomes: After completion of this course, student will be able to

 To study basic structures of arithmetic and logical unit and control unit in a
computer.
 To understand the representations of arithmetic algorithms.
 To learn the concepts of design of instruction sets of basic computer using
various addressing modes.
 To be able to identify and differentiate various types of memory and memory
mapping techniques.

Pre-requisite of course: Fundamentals of Computer, Digital Logic Circuits.

Teaching and Examination Scheme

Tutorial/
Teaching Scheme (Hours) Theory Marks Practical
Marks Total
Credits
Mid Term Marks
ESE Internal Viva
Theory Tutorial Practical Sem work
(E) (I) (V)
(M) (TW)
3 1 0 4 50 30 20 - - 100

Contents:
Contact
Unit Topics
Hours
1 Register Transfer and Micro- operations: 4
Register Transfer language, Register Transfer, Bus and Memory
Transfers, Arithmetic Micro-Operations, Logic Micro-Operations,
Shift Micro-Operations, Arithmetic logical shift unit.
2 Basic Computer Organization and Design: 7
Instruction codes, Computer registers, Computer instructions,
Timing and Control, Instruction cycle, Memory-Reference
Instructions, Input- output and interrupt, Complete computer
 Syllabus for Bachelor of Technology

Computer Engineering

description, Design of Basic Computer, Design of Accumulator Logic.

3 Programming The Basic Computer: 5
Introduction, Machine Language, Assembly Language, assembler,
Program loops, Programming Arithmetic and logic operations,
subroutines, I-O Programming.
4 Central Processing Unit: 8
Introduction, General Register Organization, Stack Organization,
Instruction format, Addressing Modes, data transfer and
manipulation, Program Control, Reduced Instruction Set Computer
(RISC)
5 Pipeline: 4
Flynn's taxonomy, Parallel Processing, Pipelining, Arithmetic
Pipeline, Instruction, Pipeline, RISC Pipeline.
6 Computer Arithmetic: 6
Introduction, Addition and subtraction, Multiplication Algorithms
(Booth Multiplication Algorithm), Division Algorithms, Floating
Point Arithmetic operations, Decimal Arithmetic Unit.
7 Input-Output Organization: 4
Input-Output Interface, Asynchronous Data Transfer, Modes of
Transfer, Priority Interrupt, DMA, Input-Output Processor (IOP),
CPUIOP Communication.
8 Memory Organization: 4
Memory Hierarchy, Main Memory, Auxiliary Memory, Associative
Memory, Cache Memory, Virtual Memory.
Total Hours 42

References:
1. M. Morris Mano, 3rd edition, 2007, Computer System Architecture, Pearson.
2. Andrew S. Tanenbaum and Todd Austin, 6th edition 2013, Structured Computer
Organization, Sixth Edition, PHI.
3. M. Murdocca & V. Heuring, 2007, Computer Architecture & Organization, WILEY.
4. John Hayes, 3rd edition, 2007, Computer Architecture and Organization, McGrawHill.

Suggested Theory distribution:

Distribution of Theory for course delivery and evaluation
Remember Understand Apply Analyse Evaluate Create
25 % 30 % 30 % 15 % 0% 0%

Tutorial work:
 Syllabus for Bachelor of Technology

Computer Engineering

Tutorial work will be based on binary adder, subtract circuit, instruction set, Booth
Multiplication algorithm with 14 tutorials to be incorporated that will be considered for
evaluation.

Instructional Method:
a) The course delivery method will depend upon the requirement of content and
need of students. The teacher in addition to conventional teaching method by
black board, may also use any of tools such as demonstration, role play, Quiz,
brainstorming, MOOCs etc.
b) The internal evaluation will be done on the basis of continuous evaluation of
students in the laboratory and class-room.
c) Practical examination will be conducted at the end of semester for evaluation
of performance of students in laboratory.
d) Students will use supplementary resources such as online videos, NPTEL
videos, e-courses, Virtual Laboratory.

Supplementary Resources:
a) https://nptel.ac.in/courses/106106166
b) http://www.intel.com/pressroom/kits/quickreffam.htm
c) web.stanford.edu/class/ee282