17EC2504A: COMPUTER ARCHITECTURE AND ORGANIZATION

Course Category: Open Elective Credits: 3

Course Type: Theory Lecture - Tutorial -Practice: 3-0-0
Prerequisites: 14CS1103:Introduction to Continuous Evaluation: 30
Computing, 14EC3304: Semester end Evaluation: 70
Digital Circuits and Total Marks: 100
Systems

Course Upon successful completion of the course, the student will be able to:
outcomes
CO Demonstrate computer functional units, its operation and also interpret
1 machine coding of functional units.
CO Evaluate the performance of CPU, Memory and I/O operations
2

CO Appreciate the computer arithmetic and pipelined architecture of

3 processors.
Contributio P P P P P P P P P P P P PSP PSPO
n of Course O O O O O O O O O Oj O Ol O1 2
a b c d e f g h i k
Outcomes
towards CO
H L
achievement 1
of Program CO L
Outcomes 2
L
(L – Low, M
- Medium, H CO M
3 M
– High)
Course UNIT I:
Content Register Transfer and Microoperations: Register Transfer Language,
Register Transfer, Bus and Memory Transfers, Arithmetic Microoperations,
Logic Microoperations, Shift Microoperations, Arithmetic Logic Shift unit.
Basic Computer Organization and Design: Instruction Codes, Computer
Registers, Computer Instructions, Timing and Control, Instruction cycle.
Memory Reference Instructions. Input-Output and Interrupt, Complete
Computer Description, Design of Basic Computer, Design of Accumulator
Logic. (12hrs)

UNIT II:
Microprogrammed Control: Control Memory, Address Sequencing,
Microprogram Example, Design of control unit.
Central Processing Unit: Introduction, General Register Organization, Stack
Organization, Instruction Formats, Addressing Modes, Data Transfer and
Manipulation Program control, Reduced Instruction Set Computer (RISC),
Overlapped Register Windows. (12hrs)
UNIT III:
 Input-Output Organization: Peripheral Devices, Input-Output Interface,
Asynchronous Data Transfer, Modes of Transfer, Priority Interrupt, Direct
Memory Access(DMA), Input-Output Processor(IOP), Serial Communication.
Memory Organization: Memory Hierarchy, Main Memory, Auxiliary
Memory, Associative Memory, Cache Memory, Virtual Memory, Memory
Management Hardware. (12hrs)

UNIT – IV:
Computer Arithmetic: Introduction, Addition and Subtraction,
Multiplication Algorithms, Division Algorithms, Floating-Point Arithmetic
Operations, Decimal Arithmetic Unit, Decimal Arithmetic Operations.
Pipeline and Vector Processing: Parallel Processing, Pipelining, Arithmetic
Pipeline, Instruction Pipeline, RISC Pipeline, Vector Processing, Array
Processors. (12hrs)
Text books Text Books:
and 1. M. Moris Mano. (2007), “Computer System Architecture” 3rd edition,
Reference Pearson/ PHI.(Unit – I to IV).
books Reference Books:
1. William Stallings, “Computer Organization and Architecture Designing
for Performance”, 9th Edition, Pearson Education, 2013.(Refer for Internal
Memory Technology)
2. Carl Hamacher, ZvonkoVranesic and SafwatZaky, “Computer
Organization”, 5th Edition, Tata McGraw Hill, 2002.
3. Hayes, J.P., “Computer Architecture and Organization”, 3 Edition, Tata
rd

McGraw Hill, 1998.(Refer for Design of Arithmetic Logic for Computers)

E-resources 1. http://nptel.iitk.ac.in/courses/Webcourse-contents
and other /IITKANPUR/CompArchitecture/page2.htm
digital 2. http://nptel.ac.in/courses/Webcourse-contents/IIT-
material %20Guwahati/comp_org_arc/web/
3. http://williamstallings.com/ComputerOrganization/styled-7/