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WD-2 Logic Schematics


1.TITLE PAGE 36.USB TYPE-C CONNECTOR 71.DC/DC VCC5M/VCC3M (TPS71285B-1)
2.EC HISTORY 37.HDMI CONNECTOR 72.DC/DC IMVP8 (NCP81218)
D
3.CPU(1/16) : DDI/EDP 38.STORAGE I/F REDRIVER 73.DC/DC CPUCORE(NCP302035) D

4.CPU(2/16) : DDR CHANNEL-A 39.SATA EXPRESS CONNECTOR 74.DC/DC VCCGFXCORE_I(NCP302035)


5.CPU(3/16) : DDR CHANNEL-B 40.USB POWER/CONN 75.DC/DC VCCSA(NCP302035)
6.CPU(4/16) : MISC/JTAG 41.GBE JACKSONVILLE 76.BLANK
7.CPU(5/16) : LPC/SPI/SMBUS/C-LINK 42.GBE LAN SWITCH 77.BLANK
8.CPU(6/16) : LPSS/ISH 43.GBE MAGNETICS 78.DC/DC VCC1R0_SUS(TPS51367RV)
9.CPU(7/16) : AUDIO/SDXC 44.RJ45 CONNECTOR 79.LOAD SW VCCST & VCCSTG
10.CPU(8/16) : PCIE/USB/SATA 45.M.2 SOCKET 1 MODULE I/F 80.DC/DC VCC1R2A/0R6B/2R5A(NB687)
11.CPU(9/16) : CSI-2/EMMC 46.M.2 SOCKET 2 MODULE I/F 81.BLANK
12.CPU(10/16) : CLOCK SIGNALS 47.MEDIA CARD CONTROLLER 82.BLANK
C
13.CPU(11/16) : SYSTEM PM 48.MEDIA CARD INTERFACE 83.DC/DC VCC1R8_SUS(BU90104GWZ) C

14.CPU(12/16) : CPU POWER (1/2) 49.AUDIO ALC3287-CG 84.BLANK


15.CPU(13/16) : CPU POWER (2/2) 50.AUDIO CONNECTOR 85.BLANK
16.CPU(14/16) : PCH POWER 51.BLANK 86.BLANK
17.CPU(15/16) : GND 52.AUDIO EXT MIC I/F 87.LOAD SW PCH SUS/TRACK POINT
18.CPU(16/16) : CFG/RESERVED 53.AUDIO SPEAKER 88.LOAD SW LAN
19.XDP CONNECTOR 54.AUDIO BEEP 89.LOAD SW B
20.RTC BATTERY 55.MEC1653(1/3) 90.LOAD SW WWAN & WLAN
21.SPI FLASH 56.MEC1653(2/3) 91.SCREW
22.DDR4 SO DIMM CHANNEL-A (1/2) 57.MEC1653(3/3) 92.N17S-G1 (1/6) : PEG I/F
23.DDR4 SO DIMM CHANNEL-A (2/2) 58.KEYBOARD/TRACK POINT 93.N17S-G1 (2/6) : VRAM I/F
B
24.DDR4 SO DIMM CHANNEL-B (1/2) 59.TOUCH PAD/NFC/FPR/SCR 94.N17S-G1 (3/6) : POWER 1 B

25.DDR4 SO DIMM CHANNEL-B (2/2) 60.BLANK 95.N17S-G1 (4/6) : POWER 2


26.LCD/LID/MIC/CAMERA/PWR SW 61.FAN CONNECTOR 96.N17S-G1 (5/6) : GND
27.BLANK 62.APS G-SENSOR 97.N17S-G1 (6/6) : GPIO / XTAL
28.DDI DEMULTIPLEXER 63.DISCRETE TPM 2.0 98.VRAM CHANNEL-A
29.USB TYPE-C SWITCH 64.SMBUS SWITCH/LPC DEBUG PORT 99.MEMORY TERMINATION
30.BLANK 65.THINK ENGINE-2(1/2) 100.DC/DC VCC1R0VIDEO(BD9B304QWZ)
31.ALPINE RIDGE (1/2) 66.THINK ENGINE-2(2/2) 101.DC/DC VCCGFXCORE_D(NCP81278T)
32.ALPINE RIDGE (2/2) 67.DC-IN 102.DC/DC VCC1R35VIDEO(NB693)
33.USB PD CONTROLLER(1/2) 68.BATTERY INPUT 103.DC/DC VCC1R8VIDEO_AON(BD9B304QWZ)
A
34.USB PD CONTROLLER(1/2) 69.BATTERY CHARGER(BQ25700A) 104.LOAD SW VIDEO A

35.DOCKING CONNECTOR 70.CHARGER SELECTOR

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 TITLE PAGE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 1 of 104


5 4 3 2 1
5 4 3 2 1

DDR4 / 1.2V Windu Block Diagram


NVIDIA PCIE x 4 CPU Project Code: ET480
VRAM Channel A DDR4
GDDR5
GDDR5 N17S-G1
Port 1,2,3,4 DDR4 SO-DIMMA 2017 Feb ' 20
32 bit
98,99
92,93,94,95,96,97
Intel 22,23

D Kaby Lake Channel B DDR4 Antenna Antenna D

Kaby Lake-R DDR4 SO-DIMMB

LCD CONN 24,25


eDP 14" eDPx4
Platform
HD/FHD BGA1440 (M.2 WLAN Card) (M.2 WWAN Card)
26 PCIE MUX
CBTL02043ABQ
15W Bluetooth
HDMI Conn CPU XDP 45 10 46
DP 19 TABLE: Chip Capacitor Thermal Characteristics
37
Mux
PS8349BQFN66GTR-A0 Type-A M.2 Card Type-B M.2 Card Code
USB
TYPE-C 36
NFC 59 -55 to 150degC +/-30ppm/degC NPO
Micro SIM -55 to 125degC +/-30ppm/degC C0G
USB Card Slot USB
WiGig DDI x4 SM Bus 49
Port 7 Port 6 -55 to 125degC +/-15% X7R
(M.2 WLAN Card) 45 28 -55 to 105degC +/-22% X6S
C-Link -55 to 85degC +/-15% X5R
USB3.0 USB3.0 CH1
Port 6 Port 11 Port 12
USB x 10 ports 10
CONN (USB1) 40 USB2.0 CH1 (X1) (X1) (X1)

USB3.0 USB3.0 CH2


Port 7,8
AOU (USB2) 40 USB2.0 CH2 (X2)
10 PCI Express x 8 ports
Re-Driver HDD CONN
C
USB2.0 SSD 39 C
USB2.0 CH3 38
Smart Cart 59 Port 5 Port 9,10
HDA (X1) (X2)
USB USB2.0 CH4
TYPE-C 36
SPI Flash Side Dock
USB2.0 USB2.0 CH5 64Mbits ALC3287-CG DP x4
Alpine Ridge-LP PD Conntroller SBU SW (CS18)
IR Camera 26 HDA CODEC Intel GbE PHY TI TPS65988 TS3DS10224
RTC Battery 20 (SPI1) 21 JACKSONVILLE 31,32 35
3,4,5,6,7,8,9,10,11,12 W25Q128FVSIQ 49 34
WGI219LM-SLKJ2-A0
USB2.0 USB2.0 CH6
13,14,15,16,17,18
41
M.2 WWAN Slot 46
Stereo
USB2.0 Speaker SM Bus
M.2 WLAN Slot (BT) 45 USB2.0 CH7 SPI Flash TBT
53
LPC Bus 33MHz 4M 33
Internal LAN
USB2.0 USB2.0 CH8
TPM 2.0 Mic SWITCH
2D Camera 26
FAN 64 63 PI3L720ZHE+CX USB
Microphone 26 42 SM Bus x2 TYPE-C
USB2.0 Headphone 36
USB2.0 CH9 G-Sensor
Fingerprint 59 KX022-1020
65 49,50
DDI CH02
TYPE-C SW
USB2.0 USB2.0 CH10 USB3.0 CH04 PS8743
Touch Panel 26 MAGNETICS
Side Dock 29
B RJ45 (CS18) B
Thermal Sensor Embedded Lenovo 43,44 35
PECI 3.0 Controller ASIC
SMB-MB/SB MEC1653 ThinkEngine
BD4178GSW-ZE2
LED for ThinkPad Logos Audio 50
55,56,57 65,66 Combo Jack Multi-Media
USB3.0 Controller SD
USB2.0 Card Slot
Port 9 SM Bus CH03 Realtek
RTS5344-GR 48 TABLE: Chip Part Dimension
47

Size [mm] mm Size Code Inch Size Code


Different with Windu-1
Fingerprint Keyboard Power Button
Reader ClickPad TABLE: Chip Capacitor Tolerance 0.40 x 0.20 0402 01005
59 59 58 26 External Connector/Socket 0.60 x 0.30 0603 0201
1.00 x 0.50 1005 0402
Internal Connector/Socket Tolerance Code 1.60 x 0.80 1608 0603
2.00 x 1.25 2125 0805
+/-0.25pF C 2.00 x 1.60 2016 0806
Internal Switch 2520 1008
+/-0.5pF D 2.50 x 2.00
3.20 x 1.60 3216 1206
3.20 x 2.50 3225 1210
+/-5% J 4.50 x 1.60 4516 1806
+/-10% K 4.50 x 2.50 4525 1810
+/-20% M 4.50 x 3.20 4532 1812
+80/-20% Z 5025 2010
5.00 x 2.50
6432 2512
A
6.40 x 3.20 A

LOGIC

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 BLOCK DIAGRAM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 2 of 104


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5 4 3 2 1

D D

VCC3_SUS VCCCPUIO

1
R10131 R5
2.2K_0201_5% 24.9_0201_1%

2
SKL_ULT
U58A

DDIP1_0N E55 C47 EDP_TXN0


<31> DDIP1_0N DDIP1_0P DDI1_TXN[0] EDP_TXN[0] EDP_TXP0 EDP_TXN0 <26>
F55 C46
<31> DDIP1_0P DDIP1_1N DDI1_TXP[0] EDP_TXP[0] EDP_TXN1 EDP_TXP0 <26>
E58 D46
<31> DDIP1_1N DDIP1_1P DDI1_TXN[1] EDP_TXN[1] EDP_TXP1 EDP_TXN1 <26>
F58 C45
<31> DDIP1_1P DDIP1_2N DDI1_TXP[1] EDP_TXP[1] EDP_TXN2 EDP_TXP1 <26>
F53 A45
<31> DDIP1_2N DDIP1_2P DDI1_TXN[2] EDP_TXN[2] EDP_TXP2 EDP_TXN2 <26>
G53 B45
<31> DDIP1_2P DDIP1_3N DDI1_TXP[2] EDP_TXP[2] EDP_TXN3 EDP_TXP2 <26>
F56 A47
<31> DDIP1_3N DDIP1_3P DDI1_TXN[3] EDP_TXN[3] EDP_TXP3 EDP_TXN3 <26>
G56 B47
<31> DDIP1_3P DDI1_TXP[3] EDP_TXP[3] EDP_TXP3 <26>
DDIP2_0N C50 E45 EDP_AUXN
<28> DDIP2_0N DDIP2_0P DDI2_TXN[0] DDI EDP EDP_AUXN EDP_AUXP EDP_AUXN <26>
D50 F45
<28> DDIP2_0P DDIP2_1N DDI2_TXP[0] EDP_AUXP EDP_AUXP <26>
C52
<28> DDIP2_1N DDIP2_1P DDI2_TXN[1]
C D52 B52 C
<28> DDIP2_1P DDIP2_2N DDI2_TXP[1] EDP_DISP_UTIL
A50
<28> DDIP2_2N DDIP2_2P DDI2_TXN[2] DDIP1_AUXN
B50 G50
<28> DDIP2_2P DDIP2_3N DDI2_TXP[2] DDI1_AUXN DDIP1_AUXP DDIP1_AUXN <31>
D51 F50
<28> DDIP2_3N DDIP2_3P DDI2_TXN[3] DDI1_AUXP DDIP2_AUXN DDIP1_AUXP <31>
C51 E48
<28> DDIP2_3P DDI2_TXP[3] DDI2_AUXN DDIP2_AUXP DDIP2_AUXN <28>
F48
DDI2_AUXP DDIP2_AUXP <28>
G46
DISPLAY SIDEBANDS DDI3_AUXN F46
L13 DDI3_AUXP
L12 GPP_E18/DDPB_CTRLCLK L9 DDIP1_HPD
GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 DDIP2_HPD DDIP1_HPD <31>
L7
DDIP2_CTRLCLK GPP_E14/DDPC_HPD1 DDIP2_HPD <28>
N7 L6
<28> DDIP2_CTRLCLK DDIP2_CTRLDATA GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2
N8 N9
<28> DDIP2_CTRLDATA GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10
-GPU_RST GPP_E17/EDP_HPD EDP_HPD <26>
N11
<92> -GPU_RST 1R8VIDEO_AON_ON GPP_E22/DDPD_CTRLCLK
N12 R12
<97,103> 1R8VIDEO_AON_ON GPP_E23/DDPD_CTRLDATA EDP_BKLTEN VGA_BLON <55>
TABLE : Functional Strap R11
EDP_COMP EDP_BKLTCTL PANEL_BKLT_CTRL <26>
E52 U13
EDP_RCOMP EDP_VDDEN PANEL_POWER_ON <66>
KBL_R_U42_BGA1356 1 OF 20
@
1

1
DDPB_CTRLDATA
SWG@ SWG@
R10252 R10469 R433 R138 R8 R10228 R10229
HIGH Port B is detected. 1M_0201_5% 1M_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5% 100K_0201_5%
2

2
LOW Port B is not detected.

DDPC_CTRLDATA

HIGH Port C is detected.

B LOW Port C is not detected. B

PCB KabyLake (MP) KabyLake-R (MP)

ZZZ2 U58 U58 U58 U58 U58 U58 U58

A A

NM-B501 REV1 i3-7130U non-vPro i5-7300U vPro i5-7200U non-vPro I5-8350U vPRO I7-8650U vPRO I5-8250U non-vPRO I7-8550U non-vPRO
DAZ16900100 SA00008LM20 SA000086M10 SA000080320 SA00008JB10 SA00008JC10 SA00008J520 SA00008J620
SVT@ I3NV@ I5V@ I5NV@ RI5V@ RI7V@ R5NV@ R7NV@

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(1/16) : DDI/EDP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 3 of 104


5 4 3 2 1
5 4 3 2 1

<22> M_A_DQ[63:0]

TABLE
D D
Pin Interleave Non-Interleave TABLE
SKL_ULT
AL71 U58B
DDR0_DQ[0] DDR0_DQ[0] Pin DDR3L LPDDR3 DDR4
AL68 DDR0_DQ[1] DDR0_DQ[1] AU53 -M_A_DDRCLK0_1066M
-M_A_DDRCLK0_1066M <22>
DDR0_CKN[0]
AN68 DDR0_DQ[2] DDR0_DQ[2] M_A_DQ0
M_A_DQ1
AL71
AL68 DDR0_DQ[0] DDR0_CKP[0]
AT53
AU55
M_A_DDRCLK0_1066M
-M_A_DDRCLK1_1066M M_A_DDRCLK0_1066M <22> BA51 DDR0_MA[5] DDR0_CAA[0] DDR0_MA[5]
AN69 DDR0_DQ[3] DDR0_DQ[3] M_A_DQ2 AN68 DDR0_DQ[1] DDR0_CKN[1] AT55 M_A_DDRCLK1_1066M -M_A_DDRCLK1_1066M <22> BB54 DDR0_MA[9] DDR0_CAA[1] DDR0_MA[9]
DDR0_DQ[2] DDR0_CKP[1] M_A_DDRCLK1_1066M <22>
AL70 DDR0_DQ[4] DDR0_DQ[4]
M_A_DQ3 AN69
DDR0_DQ[3] BA52 DDR0_MA[6] DDR0_CAA[2] DDR0_MA[6]
M_A_DQ4 AL70 BA56 M_A_CKE0
AL69 DDR0_DQ[5] DDR0_DQ[5] M_A_DQ5 AL69 DDR0_DQ[4] DDR0_CKE[0] BB56 M_A_CKE1 M_A_CKE0 <22> AY52 DDR0_MA[8] DDR0_CAA[3] DDR0_MA[8]
DDR0_DQ[5] DDR0_CKE[1] M_A_CKE1 <22>
AN70 M_A_DQ6 AN70 AW56 AW52 DDR0_MA[7] DDR0_CAA[4] DDR0_MA[7]
AN71 DDR0_DQ[6] DDR0_DQ[6] M_A_DQ7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56
DDR0_DQ[7] DDR0_CKE[3] AY55 DDR0_BA[2] DDR0_CAA[5] DDR0_BG[0]
AR70 DDR0_DQ[7] DDR0_DQ[7] M_A_DQ8
M_A_DQ9
AR70
DDR0_DQ[8] -M_A_CS0 AW54
DDR0_DQ[8] DDR0_DQ[8] M_A_DQ10
AR68
DDR0_DQ[9] DDR0_CS#[0]
AU45
-M_A_CS1 -M_A_CS0 <22> DDR0_MA[12] DDR0_CAA[6] DDR0_MA[12]
Block 0 AR68 AU71
DDR0_DQ[10] DDR0_CS#[1]
AU43
-M_A_CS1 <22> BA54 DDR0_CAA[7]
AU71 DDR0_DQ[9] DDR0_DQ[9] M_A_DQ11 AU68
DDR0_DQ[11] DDR0_ODT[0]
AT45 M_A_ODT0
M_A_ODT0 <22> DDR0_MA[11] DDR0_MA[11]
M_A_DQ12 AR71 AT43 M_A_ODT1
M_A_ODT1 <22>
BA55 DDR0_MA[15] DDR0_CAA[8] DDR0_ACT#
AU68 DDR0_DQ[10] DDR0_DQ[10] M_A_DQ13 AR69 DDR0_DQ[12] DDR0_ODT[1]
AY54
DDR0_DQ[11] DDR0_DQ[11] M_A_DQ14 AU70 DDR0_DQ[13] BA51 M_A_A5 DDR0_MA[14] DDR0_CAA[9] DDR0_BG[1]
AR71 M_A_DQ15 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_A9
DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
AR69 DDR0_DQ[12] DDR0_DQ[12] M_A_DQ16 BB65
DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
BA52 M_A_A6
M_A_DQ17 AW65 AY52 M_A_A8
AU70 DDR0_DQ[13] DDR0_DQ[13] M_A_DQ18 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52 M_A_A7
AU69 DDR0_DQ[14] DDR0_DQ[14] M_A_DQ19 AY63 DDR0_DQ[18]/DDR0_DQ[34]
DDR0_DQ[19]/DDR0_DQ[35]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
AY55 M_A_BG0
M_A_BG0 <22>
M_A_DQ20 BA65 AW54 M_A_A12
DDR0_DQ[15] DDR0_DQ[15] M_A_DQ21 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_A11
AU46 DDR0_MA[13] DDR0_CAB[0] DDR0_MA[13]
M_A_DQ22 BA63 DDR0_DQ[21]/DDR0_DQ[37]
DDR0_DQ[22]/DDR0_DQ[38]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
BA55 -M_A_ACT
-M_A_ACT <22>
AU48 DDR0_CAS# DDR0_CAB[1] DDR0_MA[15]
M_A_DQ23 BB63 AY54 M_A_BG1 AT46
M_A_DQ24 BA61 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 <22> DDR0_WE# DDR0_CAB[2] DDR0_MA[14]
M_A_DQ25 AW61 DDR0_DQ[24]/DDR0_DQ[40] AU46 M_A_A13 AU50 DDR0_RAS# DDR0_CAB[3] DDR0_MA[16]
DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
M_A_DQ26
M_A_DQ27
BB59
DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
AU48 M_A_A15
M_A_A14
AU52 DDR0_BA[0] DDR0_CAB[4] DDR0_BA[0]
AW59 AT46
BB65 DDR0_DQ[16] DDR0_DQ[32] M_A_DQ28 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 M_A_A16 AY51 DDR0_MA[2] DDR0_CAB[5] DDR0_MA[2]
AW65 DDR0_DQ[17] DDR0_DQ[33] M_A_DQ29 AY61 DDR0_DQ[28]/DDR0_DQ[44]
DDR0_DQ[29]/DDR0_DQ[45]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
AU52 M_A_BS0
M_A_BS0 <22> AT48 DDR0_BA[1] DDR0_CAB[6] DDR0_BA[1]
M_A_DQ30 BA59 AY51 M_A_A2
AW63 DDR0_DQ[18] DDR0_DQ[34] DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT50 DDR0_MA[10] DDR0_MA[10]
AY63
M_A_DQ31 AY59
DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
AT48 M_A_BS1
M_A_BS1 <22> DDR0_CAB[7]
C DDR0_DQ[19] DDR0_DQ[35] M_A_DQ32 AY39
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
AT50 M_A_A10 BB50 DDR0_MA[1] DDR0_CAB[8] DDR0_MA[1] C
BA65 DDR0_DQ[20] DDR0_DQ[36]
M_A_DQ33 AW39
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
BB50 M_A_A1
AY50
AY65
M_A_DQ34 AY37 AY50 M_A_A0 DDR0_MA[0] DDR0_CAB[9] DDR0_MA[0]
DDR0_DQ[21] DDR0_DQ[37] M_A_DQ35 AW37 DDR0_DQ[34]/DDR1_DQ[2]
DDR0_DQ[35]/DDR1_DQ[3]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[3]
BA50 M_A_A3 BA50 DDR0_MA[3] Not Used DDR0_MA[3]
BA63 DDR0_DQ[22] DDR0_DQ[38]
M_A_DQ36 BB39
DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4]
BB52 M_A_A4
BB52
BB63 M_A_DQ37 BA39
DDR0_DQ[37]/DDR1_DQ[5]
DDR0_MA[4] Not Used DDR0_MA[4]
BA61
DDR0_DQ[23] DDR0_DQ[39] M_A_DQ38
M_A_DQ39
BA37
BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0]
AM70
AM69
-M_A_DQS0
M_A_DQS0 M_A_A[16:0] <22>

Block 2 AW61 DDR0_DQ[24] DDR0_DQ[40] M_A_DQ40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] AT69 -M_A_DQS1
-M_A_DQS[7:0] <22>
DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1]
BB59 DDR0_DQ[25] DDR0_DQ[41] M_A_DQ41
M_A_DQ42
AW35
AY33 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1]
AT70
BA64
M_A_DQS1
-M_A_DQS2
AW59 DDR0_DQ[26] DDR0_DQ[42] M_A_DQ43 AW33 DDR0_DQ[42]/DDR1_DQ[10]
DDR0_DQ[43]/DDR1_DQ[11]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
AY64 M_A_DQS2 M_A_DQS[7:0] <22>
M_A_DQ44 BB35 AY60 -M_A_DQS3
BB61 DDR0_DQ[27] DDR0_DQ[43] M_A_DQ45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 M_A_DQS3
AY61 DDR0_DQ[28] DDR0_DQ[44] M_A_DQ46 BA33 DDR0_DQ[45]/DDR1_DQ[13]
DDR0_DQ[46]/DDR1_DQ[14]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
BA38 -M_A_DQS4
M_A_DQ47 BB33 AY38 M_A_DQS4
BA59 DDR0_DQ[29] DDR0_DQ[45] M_A_DQ48 AY31 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 -M_A_DQS5
AY59 DDR0_DQ[30] DDR0_DQ[46] M_A_DQ49 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_A_DQS5 LOGIC
M_A_DQ50 AY29 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] BA30 -M_A_DQS6
DDR0_DQ[31] DDR0_DQ[47] M_A_DQ51 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_A_DQS6
M_A_DQ52 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 -M_A_DQS7
M_A_DQ53 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_A_DQS7
M_A_DQ54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5]
M_A_DQ55 BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50
M_A_DQ56 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# -M_A_ALERT <22>
AY27 AT52
M_A_DQ57 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR M_A_PARITY <22>
AW27
AY39 DDR0_DQ[32] DDR1_DQ[0] M_A_DQ58 AY25 DDR0_DQ[57]/DDR1_DQ[41] AY67
AW39 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA M_A_VREF_CA_CPU <22>
DDR0_DQ[33] DDR1_DQ[1] M_A_DQ59 AW25
DDR0_DQ[59]/DDR1_DQ[43] DDR0_VREF_DQ
AY68
AY37 M_A_DQ60 BB27 BA67
DDR0_DQ[34] DDR1_DQ[2] M_A_DQ61 BA27 DDR0_DQ[60]/DDR1_DQ[44]
DDR CH - A
DDR1_VREF_DQ M_B_VREF_CA_CPU <24>
AW37 DDR0_DQ[35] DDR1_DQ[3] M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_PG_CTRL
DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL
BB39 DDR0_DQ[36] DDR1_DQ[4]
M_A_DQ63 BB25
DDR0_DQ[63]/DDR1_DQ[47]
BA39 DDR0_DQ[37] DDR1_DQ[5]
BA37 DDR0_DQ[38]
KBL_R_U42_BGA1356 2 OF 20 VCC3M
BB37
DDR1_DQ[6] @
AY35 DDR0_DQ[39] DDR1_DQ[7]
Block 4 AW35 DDR0_DQ[40] DDR1_DQ[8]

1
B B
AY33 DDR0_DQ[41] DDR1_DQ[9]
AW33 DDR0_DQ[42] DDR1_DQ[10] R1838
BB35 DDR0_DQ[43] DDR1_DQ[11] TABLE 100K_0201_5%

DDR0_DQ[44]

2
BA35 DDR1_DQ[12]
BA33 DDR0_DQ[45] DDR1_DQ[13] Pin Interleave Non-Interleave VCC1R2A DDR_VTT_PG_CTRL
DDR_VTT_PG_CTRL <80>
BB33 DDR0_DQ[46] DDR1_DQ[14]
DDR0_DQ[47] DDR1_DQ[15] AM70 DDR0_DQSN[0] DDR0_DQSN[0]

1
AM69 DDR0_DQSP[0] DDR0_DQSP[0]
Block 0 AT69 DDR0_DQSN[1] DDR0_DQSN[1] 2 Q170
DTC015TMT2L_VMT3
AT70 DDR0_DQSP[1] DDR0_DQSP[1]

3
AY31 DDR0_DQ[48] DDR1_DQ[32]
AW31 DDR0_DQ[49] DDR1_DQ[33] BA64 DDR0_DQSN[2] DDR0_DQSN[4]
AY29 DDR0_DQ[50] DDR1_DQ[34] AY64 DDR0_DQSP[2] DDR0_DQSP[4]

1
AW29 DDR0_DQ[51] DDR1_DQ[35] Block 2 AY60 @
BB31 DDR0_DQSN[3] DDR0_DQSN[5] R1858
DDR0_DQ[52] DDR1_DQ[36] BA60 DDR0_DQSP[3] DDR0_DQSP[5] 10K_0201_5%
BA31 DDR0_DQ[53] DDR1_DQ[37]

2
BA29 DDR0_DQ[54] DDR1_DQ[38]
BB29
AY27 DDR0_DQ[55] DDR1_DQ[39] BA38 DDR0_DQSN[4] DDR1_DQSN[0]
Block 6 AW27 DDR0_DQ[56] DDR1_DQ[40] AY38 DDR0_DQSP[4] DDR1_DQSP[0]
AY25 DDR0_DQ[57] DDR1_DQ[41] Block 4 AY34 DDR0_DQSN[5] DDR1_DQSN[1]
AW25 DDR0_DQ[58] DDR1_DQ[42] BA34 DDR0_DQSP[5] DDR1_DQSP[1]
BB27 DDR0_DQ[59] DDR1_DQ[43]
BA27 DDR0_DQ[60] DDR1_DQ[44]
BA25 DDR0_DQ[61] DDR1_DQ[45] BA30 DDR0_DQSN[6] DDR1_DQSN[4]
A
BB25 DDR0_DQ[62] DDR1_DQ[46] AY30 DDR0_DQSP[6] DDR1_DQSP[4] A
DDR0_DQ[63] DDR1_DQ[47] Block 6 AY26 DDR0_DQSN[7] DDR1_DQSN[5]
BA26 DDR0_DQSP[7] DDR1_DQSP[5]

Security Classification LC Future Center Secret Data Title


LOGIC
LOGIC Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(2/16) : DDR CHANNEL-A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 4 of 104


5 4 3 2 1
5 4 3 2 1

TABLE
Pin Interleave Non-Interleave
<24> M_B_DQ[63:0]

AF65 DDR1_DQ[0] DDR0_DQ[16]


D D
AF64 DDR1_DQ[1] DDR0_DQ[17]
AK65 DDR1_DQ[2] DDR0_DQ[18]
AK64 DDR1_DQ[3] DDR0_DQ[19] U58C
SKL_ULT

AF66 DDR1_DQ[4] DDR0_DQ[20]


AF67 DDR1_DQ[5] DDR0_DQ[21] M_B_DQ0 AF65 AN45 -M_B_DDRCLK0_1066M
DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] -M_B_DDRCLK0_1066M <24>
AK67 M_B_DQ1 AF64 AN46 -M_B_DDRCLK1_1066M
AK66 DDR1_DQ[6] DDR0_DQ[22] M_B_DQ2 AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] AP45 M_B_DDRCLK0_1066M -M_B_DDRCLK1_1066M
M_B_DDRCLK0_1066M
<24>
<24>
DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0]
AF70 DDR1_DQ[7] DDR0_DQ[23] M_B_DQ3
M_B_DQ4
AK64
AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1]
AP46 M_B_DDRCLK1_1066M
M_B_DDRCLK1_1066M <24>
DDR1_DQ[8] DDR0_DQ[24] M_B_DQ5 DDR1_DQ[4]/DDR0_DQ[20] M_B_CKE0 TABLE
Block 1 AF68 AF67
DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0]
AN56
M_B_CKE0 <24>
AH71 DDR1_DQ[9] DDR0_DQ[25] M_B_DQ6
M_B_DQ7
AK67
AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1]
AP55
AN55
M_B_CKE1
M_B_CKE1 <24>
AH68 DDR1_DQ[10] DDR0_DQ[26] M_B_DQ8 AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] AP53
Pin DDR3L LPDDR3 DDR4
M_B_DQ9 AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3]
AF71 DDR1_DQ[11] DDR0_DQ[27] M_B_DQ10 AH71 DDR1_DQ[9]/DDR0_DQ[25] BB42 -M_B_CS0
AF69 DDR1_DQ[12] DDR0_DQ[28] M_B_DQ11 AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] AY42 -M_B_CS1 -M_B_CS0 <24> AY48 DDR1_MA[5] DDR1_CAA[0] DDR1_MA[5]
-M_B_CS1 <24>
AH70 DDR1_DQ[13] DDR0_DQ[29] M_B_DQ12 AF71 DDR1_DQ[11]/DDR0_DQ[27]
DDR1_DQ[12]/DDR0_DQ[28]
DDR1_CS#[1]
DDR1_ODT[0]
BA42 M_B_ODT0
M_B_ODT0 <24>
AP50 DDR1_MA[9] DDR1_CAA[1] DDR1_MA[9]
M_B_DQ13 AF69 AW42 M_B_ODT1
AH69 DDR0_DQ[30] DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] M_B_ODT1 <24> BA48 DDR1_MA[6] DDR1_CAA[2] DDR1_MA[6]
DDR1_DQ[14] M_B_DQ14 AH70
BB48
DDR0_DQ[31] M_B_DQ15 AH69 DDR1_DQ[14]/DDR0_DQ[30] AY48 M_B_A5 DDR1_MA[8] DDR1_CAA[3] DDR1_MA[8]
DDR1_DQ[15] M_B_DQ16 AT66 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50 M_B_A9 AP48 DDR1_CAA[4]
M_B_DQ17 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_A6 DDR1_MA[7] DDR1_MA[7]
M_B_DQ18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 M_B_A8 AP52 DDR1_BA[2] DDR1_CAA[5] DDR1_BG[0]
DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
M_B_DQ19 AN65
DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
AP48 M_B_A7 AN50 DDR1_MA[12] DDR1_CAA[6] DDR1_MA[12]
M_B_DQ20 AN66 AP52 M_B_BG0
M_B_DQ21 AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50 M_B_A12 M_B_BG0 <24> AN48 DDR1_MA[11] DDR1_CAA[7] DDR1_MA[11]
M_B_DQ22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A11 AN53
AT66 DDR1_DQ[16] DDR0_DQ[48] M_B_DQ23
AT65
AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
AN48
AN53 -M_B_ACT DDR1_MA[15] DDR1_CAA[8] DDR1_ACT#
AU66 DDR1_DQ[17] DDR0_DQ[49] M_B_DQ24 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52 M_B_BG1 -M_B_ACT <24> AN52 DDR1_MA[14] DDR1_CAA[9] DDR1_BG[1]
M_B_DQ25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 <24>
AP65 AU61
DDR1_DQ[18] DDR0_DQ[50] M_B_DQ26 AP60 DDR1_DQ[25]/DDR0_DQ[57] BA43 M_B_A13
AN65 DDR1_DQ[19] DDR0_DQ[51] M_B_DQ27 AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43 M_B_A15
DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
AN66 DDR1_DQ[20] DDR0_DQ[52]
M_B_DQ28
M_B_DQ29
AN61
AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
AY44
AW44
M_B_A14
M_B_A16
AP66 DDR1_DQ[21] DDR0_DQ[53] M_B_DQ30 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 M_B_BS0
DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BS0 <24> BA43 DDR1_MA[13] DDR1_CAB[0] DDR1_MA[13]
AT65 DDR1_DQ[22] DDR0_DQ[54]
M_B_DQ31 AU60 AY47 M_B_A2
C M_B_DQ32 AU40 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44 M_B_BS1 AY43 DDR1_CAS# DDR1_CAB[1] DDR1_MA[15] C
AU65 DDR1_DQ[23] DDR0_DQ[55] M_B_DQ33 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_A10 M_B_BS1 <24>
AT40
DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
AW46 AY44 DDR1_WE# DDR1_CAB[2] DDR1_MA[14]
AT61 M_B_DQ34 AT37 AY46 M_B_A1
Block 3 AU61 DDR1_DQ[24] DDR0_DQ[56] M_B_DQ35 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 M_B_A0
M_B_A[16:0] <24>
AW44 DDR1_RAS# DDR1_CAB[3] DDR1_MA[16]
DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQ[25] DDR0_DQ[57] M_B_DQ36 AR40 BB46 M_B_A3 BB44 DDR1_BA[0] DDR1_CAB[4] DDR1_BA[0]
AP60 M_B_DQ37 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] BA47 M_B_A4
DDR1_DQ[26] DDR0_DQ[58] M_B_DQ38 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] -M_B_DQS[7:0] <24> AY47 DDR1_MA[2] DDR1_CAB[5] DDR1_MA[2]
AN60 DDR1_DQ[38]/DDR1_DQ[22]
DDR1_DQ[27] DDR0_DQ[59] M_B_DQ39 AR37 AH66 -M_B_DQS0 BA44 DDR1_BA[1] DDR1_CAB[6] DDR1_BA[1]
AN61 M_B_DQ40 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 M_B_DQS0 M_B_DQS[7:0] <24>
DDR1_DQ[28] DDR0_DQ[60] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] AW46 DDR1_MA[10] DDR1_CAB[7] DDR1_MA[10]
AP61 M_B_DQ41 AU33 AG69 -M_B_DQS1
DDR1_DQ[29] DDR0_DQ[61] M_B_DQ42 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 M_B_DQS1 AY46 DDR1_MA[1] DDR1_CAB[8] DDR1_MA[1]
AT60 M_B_DQ43 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 -M_B_DQS2
BA46
DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6]
AU60 DDR1_DQ[30] DDR0_DQ[62] M_B_DQ44 AR33 AR65 M_B_DQS2 DDR1_MA[0] DDR1_CAB[9] DDR1_MA[0]
M_B_DQ45 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 -M_B_DQS3 BB46
DDR1_DQ[31] DDR0_DQ[63] M_B_DQ46 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 M_B_DQS3 VCC1R2A BA47 DDR1_MA[3] Not Used DDR1_MA[3]
DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7]
M_B_DQ47 AP30
DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2]
AT38 -M_B_DQS4 DDR1_MA[4] Not Used DDR1_MA[4]
M_B_DQ48 AU27 AR38 M_B_DQS4
M_B_DQ49 AT27 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 -M_B_DQS5
DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3]

1
M_B_DQ50 AT25 AR32 M_B_DQS5
M_B_DQ51 AU25 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] AR25 -M_B_DQS6
M_B_DQ52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 M_B_DQS6 R1726
AU40 DDR1_DQ[32] DDR1_DQ[16] M_B_DQ53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 -M_B_DQS7 470_0201_5%
AT40 DDR1_DQ[33] DDR1_DQ[17] M_B_DQ54 AN25 DDR1_DQ[53]
DDR1_DQ[54]
DDR1_DQSN[7]
DDR1_DQSP[7]
AR21 M_B_DQS7

2
AT37 M_B_DQ55 AP25
DDR1_DQ[34] DDR1_DQ[18] M_B_DQ56 AT22 DDR1_DQ[55] AN43 -M_B_ALERT
AU37 DDR1_DQ[35] DDR1_DQ[19] M_B_DQ57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 M_B_PARITY -M_B_ALERT
M_B_PARITY
<24>
<24>
DDR1_DQ[57] DDR1_PAR
AR40 DDR1_DQ[36] DDR1_DQ[20]
M_B_DQ58
M_B_DQ59
AU21
DDR1_DQ[58] DRAM_RESET#
AT13
DDR_RCOMP0
-DRAMRST
-DRAMRST <22,24> LOGIC
AT21 AR18 R7 1 2 121_0201_1%
AP40 DDR1_DQ[37] DDR1_DQ[21] M_B_DQ60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 DDR_RCOMP1 R84 1 2 80.6_0201_1%
DDR1_DQ[60] DDR_RCOMP[1]
AP37 DDR1_DQ[38] DDR1_DQ[22]
M_B_DQ61 AP22
DDR1_DQ[61] DDR_RCOMP[2]
AU18 DDR_RCOMP2 R576 1 2 100_0201_1%
M_B_DQ62 AP21
AR37 DDR1_DQ[62]
AT33
DDR1_DQ[39] DDR1_DQ[23] M_B_DQ63 AN21
DDR1_DQ[63]
DDR CH - B

Block 5 AU33 DDR1_DQ[40] DDR1_DQ[24]


AU30 DDR1_DQ[41] DDR1_DQ[25] KBL_R_U42_BGA1356 3 OF 20
@
AT30 DDR1_DQ[42] DDR1_DQ[26]
AR33 DDR1_DQ[43] DDR1_DQ[27] TABLE
B
AP33 DDR1_DQ[44] DDR1_DQ[28] B

AR30 DDR1_DQ[45] DDR1_DQ[29] Pin Interleave Non-Interleave


AP30 DDR1_DQ[46] DDR1_DQ[30]
DDR1_DQ[47] DDR1_DQ[31] AH66 DDR1_DQSN[0] DDR0_DQSN[2]
AH65 DDR1_DQSP[0] DDR0_DQSP[2]
Block 1 AG69 DDR1_DQSN[1] DDR0_DQSN[3]
AG70 DDR1_DQSP[1] DDR0_DQSP[3]
AU27 DDR1_DQ[48] DDR1_DQ[48]
AT27 DDR1_DQ[49] DDR1_DQ[49] AR66 DDR1_DQSN[2] DDR0_DQSN[6]
AT25 DDR1_DQ[50] DDR1_DQ[50] AR65
AU25
DDR1_DQSP[2] DDR0_DQSP[6]
DDR1_DQ[51] DDR1_DQ[51] Block 3 AR61 DDR1_DQSN[3] DDR0_DQSN[7]
AP27 DDR1_DQ[52] DDR1_DQ[52] AR60
AN27 DDR1_DQSP[3] DDR0_DQSP[7]
DDR1_DQ[53] DDR1_DQ[53]
AN25 DDR1_DQ[54] DDR1_DQ[54]
AP25
AT22
DDR1_DQ[55] DDR1_DQ[55] AT38 DDR1_DQSN[4] DDR1_DQSN[2]
Block 7 AU22 DDR1_DQ[56] DDR1_DQ[56] AR38 DDR1_DQSP[4] DDR1_DQSP[2]
AU21 DDR1_DQ[57] DDR1_DQ[57] Block 5 AT32 DDR1_DQSN[5] DDR1_DQSN[3]
AT21 DDR1_DQ[58] DDR1_DQ[58] AR32 DDR1_DQSP[5] DDR1_DQSP[3]
AN22 DDR1_DQ[59] DDR1_DQ[59]
AP22 DDR1_DQ[60] DDR1_DQ[60]
AP21 DDR1_DQ[61] DDR1_DQ[61] AR25 DDR1_DQSN[6] DDR1_DQSN[6]
AN21 DDR1_DQ[62] DDR1_DQ[62] AR27 DDR1_DQSP[6] DDR1_DQSP[6]
DDR1_DQ[63] DDR1_DQ[63] Block 7 AR22 DDR1_DQSN[7] DDR1_DQSN[7]
AR21 DDR1_DQSP[7] DDR1_DQSP[7]
A A

LOGIC
LOGIC

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(3/16) : DDR CHANNEL-B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 5 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCCSTG VCCST VCCST

1
R64 R9055 R10334
1K_0201_5% 1K_0201_5% 1K_0201_5%

2
U58D SKL_ULT

C D63 C
PECI A54 CATERR#
<56> PECI PECI
-PROCHOT R85 1 2 499_0201_1% C65 JTAG
<55,56,69,72> -PROCHOT PROCHOT#
C63
A65 THERMTRIP# B61 XDP_TCK0
SKTOCC# PROC_TCK XDP_TDI XDP_TCK0 <19>
CPU MISC D60
PROC_TDI XDP_TDO XDP_TDI <19>
C55 A61
BPM#[0] PROC_TDO XDP_TMS XDP_TDO <19>
D55 C60
BPM#[1] PROC_TMS -XDP_TRST XDP_TMS <19>
B54 B59
BPM#[2] PROC_TRST# -XDP_TRST <19>
C56
BPM#[3] B56
PCH_JTAG_TCK PCH_TCK <19>
A6 D59
@ R10623 1 2 0_0201_5% A7 GPP_E3/CPU_GP0 PCH_JTAG_TDI A56
<46,55,57> -WWAN_DISABLE GPP_E7/CPU_GP1 PCH_JTAG_TDO
BA5 C59
AY5 GPP_B3/CPU_GP2 PCH_JTAG_TMS C61
<31> -TBT_PLUG_EVENT GPP_B4/CPU_GP3 PCH_TRST# A59
R2126 1 2 49.9_0201_1% PROC_POPIRCOMP AT16 JTAGX
R2127 1 2 49.9_0201_1% PCH_OPIRCOMP AU16 PROC_POPIRCOMP
R2128 1 2 49.9_0201_1% OPCE_RCOMP H66 PCH_OPIRCOMP
R2129 1 2 49.9_0201_1% OPC_RCOMP H65 OPCE_RCOMP
OPC_RCOMP

2
R2
KBL_R_U42_BGA1356 4 OF 20 51_0201_5%
@

1
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(4/16) : MISC/JTAG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 6 of 104


5 4 3 2 1
5 4 3 2 1

TABLE : Functional Strap


TABLE : Functional Strap
GPP_C5/SML0ALERT # (LPC or eSPI)
SPI0_MOSI (Boot Halt)
D HIGH eSPI is selected D
HIGH Disabled (Default)
LOW LPC is selected (Default) LOGIC
LOW Enabled

TABLE : Functional Strap


TABLE : Functional Strap
GPP_C2/SMBALERT# (TLS Confidentiality)
SPI0_MISO (JTAG ODT Disable)
HIGH Enable ME Crypto TLS with Confidentiality LOGIC
HIGH Enabled (Default)
LOW Disable ME Crypto TLS (Default)
LOW Disabled

TABLE : Functional Strap


SPI0_IO2 (Consent Strap)
HIGH Enabled (Default)
LOW Disabled VCC3B VCC3_SUS

VCC3_SUS VCC3B

TABLE : Functional Strap


SPI0_IO3 (A0 Personality Strap)
HIGH Disabled (Default)

1
1
@
LOW Enabled R860 R272
8.2K_0201_5% 10K_0201_5% R226 R106 R107 R394 R397 R28
1K_0201_5% 499_0201_1% 499_0201_1% 4.7K_0201_5% 4.7K_0201_5% 8.2K_0201_5%

2
C C

2
2

2
SKL_ULT
U58E
SPI - FLASH
SMBUS, SMLINK
AV2 R7 SMB_CLK
<21,63> SPI_CLK SPI0_CLK GPP_C0/SMBCLK SMB_DATA SMB_CLK <64>
AW3 R8
<21,63> SPI_MISO_IO1 SPI0_MISO GPP_C1/SMBDATA SMB_DATA <64>
AV3 R10
<21,63> SPI_MOSI_IO0 SPI0_MOSI GPP_C2/SMBALERT#
AW2
<21> SPI_IO2 SPI0_IO2 SML0_CLK
AU4 R9
<21> SPI_IO3 SPI0_IO3 GPP_C3/SML0CLK SML0_DATA SML0_CLK <41>
AU3 W2
<21> -SPI_CS0 SPI0_CS0# GPP_C4/SML0DATA SML0_DATA <41>
AU2 W1
AU1 SPI0_CS1# GPP_C5/SML0ALERT#
<63> -SPI_CS2 SPI0_CS2# EC_SCL2
W3
GPP_C6/SML1CLK EC_SDA2 EC_SCL2 <56>
V3
SPI - TOUCH GPP_C7/SML1DATA EC_SDA2 <56>
AM7
M2 GPP_B23/SML1ALERT#/PCHHOT#
M3 GPP_D1/SPI1_CLK
J4 GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI LPC_AD[3:0] <55,64>
V1
V2 GPP_D21/SPI1_IO2
<59> -NFC_DTCT GPP_D22/SPI1_IO3 LPC_AD0
M1 LPC AY13
GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 BA13 LPC_AD1
GPP_A2/LAD1/ESPI_IO1 BB13 LPC_AD2
C LINK GPP_A3/LAD2/ESPI_IO2 AY12 LPC_AD3
CL_CLK_WLAN G3 GPP_A4/LAD3/ESPI_IO3 BA12
<45> CL_CLK_WLAN CL_DATA_WLAN CL_CLK GPP_A5/LFRAME#/ESPI_CS# -LPC_FRAME <55,64>
G2 BA11
<45> CL_DATA_WLAN -CL_RST_WLAN CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET# -SUS_STAT <55,64>
<45> -CL_RST_WLAN G1
CL_RST#
AW9 LPCCLK_0 EMC@ R193 1 2 33_0201_5%
GPP_A9/CLKOUT_LPC0/ESPI_CLK LPCCLK_1 LPCCLK_EC_24M <55>
AW13 AY9 @ R220 1 2 0_0201_5%
<55> -KBRC GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 LPCCLK_DEBUG_24M <64>
AW11
GPP_A8/CLKRUN# -CLKRUN <55,64>
AY11
<55,64> IRQSER GPP_A6/SERIRQ

KBL_R_U42_BGA1356 5 OF 20
@
B B
1

@
R2559
1K_0201_5%
2

LPCCLK_EC_24M LPCCLK_DEBUG_24M

1 1
RF@ @
C9091 C9092
22P_0201_25V8-J 22P_0201_25V8-J
2 2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(5/16) : LPC/SPI/SMBUS/C-LINK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 7 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3_SUS
TABLE : Functional Strap
GPP_B22/GSPI1_MOSI (Boot BIOS Destination)
HIGH Boot BIOS from LPC
LOW Boot BIOS from SPI (Default) LOGIC

1 10K_0201_5%

1 10K_0201_5%

1K_0201_5%
TABLE : Functional Strap
GPP_B18/GSPI0_MOSI (No Reboot)

1
HIGH Enable "No Reboot" Mode
LOW Disable "No Reboot" Mode (Default)

R884 2

R2340 2

R65 2
@

SKL_ULT
U58F
LPSS ISH

AN8 P2 -DISCRETE_PRESENCE
<59> NFC_DLREQ GPP_B15/GSPI0_CS# GPP_D9
AP7 P3
AP8 GPP_B16/GSPI0_CLK GPP_D10 P4 DGFX_VRAM_ID0
AR7 GPP_B17/GSPI0_MISO GPP_D11 P1 DGFX_VRAM_ID1
GPP_B18/GSPI0_MOSI GPP_D12
AM5 M4
C AN7 GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA N3 C
AP5 GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL
AN5 GPP_B21/GSPI1_MISO N1
GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA N2
AB1 GPP_D8/ISH_I2C1_SCL
AB2 GPP_C8/UART0_RXD AD11
GPP_C9/UART0_TXD GPP_F10/I2C5_SDA/ISH_I2C2_SDA WWAN_CFG2 <46>
W4 AD12
GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL WWAN_CFG3 <46>
AB3
GPP_C11/UART0_CTS#
AD1 U1
<26> EPRIVACY_ON GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
AD2 U2
<31> TBT_FORCE_PWR GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
AD3 U3
<55> -EC_SCI GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS#
AD4 U4
<55> -EC_WAKE GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT#
AC1
U7 GPP_C12/UART1_RXD/ISH_UART1_RXD AC2
<59> I2C0_DATA GPP_C16/I2C0_SDA GPP_C13/UART1_TXD/ISH_UART1_TXD -DISCRETE_PRESENCE
U6 AC3 SWG@ R10126 1 2 0_0201_5%
<59> I2C0_CLK GPP_C17/I2C0_SCL GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB4
U8 GPP_C15/UART1_CTS#/ISH_UART1_CTS# DGFX_VRAM_ID0 @ R10127 1 2 0_0201_5%
U9 GPP_C18/I2C1_SDA AY8
GPP_C19/I2C1_SCL GPP_A18/ISH_GP0 BA8 DGFX_VRAM_ID1 SWG@ R10128 1 2 0_0201_5%
AH9 GPP_A19/ISH_GP1 BB7
<46> -WWAN_RESET GPP_F4/I2C2_SDA GPP_A20/ISH_GP2
AH10 BA7
GPP_F5/I2C2_SCL GPP_A21/ISH_GP3 AY7
-MIC_HW_EN AH11 GPP_A22/ISH_GP4 AW7
AH12 GPP_F6/I2C3_SDA GPP_A23/ISH_GP5 AP13
<26> -INT_MIC_DTCT GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6 TABLE : -DISCRETE_PRESENCE TABLE : DGFX_VRAM_ID
AF11
<46> WWAN_CFG0
AF12 GPP_F8/I2C4_SDA DFX_VRAM_ID[1..0]
<46> WWAN_CFG1 GPP_F9/I2C4_SCL Model R10126
KBL_R_U42_BGA1356 6 OF 20
00B 1GB
@
SWG ASM
01B 2GB LOGIC
1

UMA NO ASM
1

R10676 R961
0_0201_5%
10B 4GB
100K_0201_5%
2

B B
11B N/A
2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(6/16) : LPSS/ISH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 8 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3_SUS

PLACE ON TOP SIDE

R846 1 2 1K_0201_5% R566 1 @ 2 0_0603_5%


TABLE : Functional Strap
HDA_SDO/I2S0_TXD

VCC3_SUS VCC3_SUS
Flash Descriptor Security Override
TP901 TP900 HIGH Disable Flash Descriptor Security (Override)
Test_Point_20MIL Test_Point_20MIL
1 1 LOW Enable Flash Descriptor Security (Default)
@ @

1
@
TEST PAD
R1009 BOTTOM SIDE
1K_0201_5% DO NOT MOVE AFTER FIX
U58G SKL_ULT

2
AUDIO
C C
R423 1 2 33_0201_5% HDA_SYNC_CPU BA22
<49> HDA_SYNC HDA_BCLK_CPU HDA_SYNC/I2S0_SFRM
EMC@ R60 1 2 33_0201_5% AY22
<49> HDA_BCLK HDA_SDO_CPU HDA_BLK/I2S0_SCLK
R74 1 2 33_0201_5% BB22 SDIO/SDXC
<49> HDA_SDO HDA_SDO/I2S0_TXD
BA21
<49> HDA_SDIN0 HDA_SDI0/I2S0_RXD
AY21 AB11
AW22 HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD AB13
1 HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0
EMC@ J5 AB12
C38 AY20 GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 W12
22P_0201_25V8-J AW20 I2S1_SFRM GPP_G3/SD_DATA2 W11
2 I2S1_TXD GPP_G4/SD_DATA3 TBT_RTD3_PWR_EN <31>
W10
GC6_FB_EN GPP_G5/SD_CD# TBT_FORCE_USB_PWR <31>
AK7 W8
<97,102> GC6_FB_EN NFC_ACTIVE_R GPP_F1/I2S2_SFRM GPP_G6/SD_CLK -TBT_PERST <31>
@ R9133 1 2 0_0201_5% AK6 W7
<59> NFC_ACTIVE -GPU_EVENT GPP_F0/I2S2_SCLK GPP_G7/SD_WP -TBT_PCIE_WAKE <31>
AK9
<97> -GPU_EVENT DGFX_PWRGD GPP_F2/I2S2_TXD
AK10 BA9
<92> DGFX_PWRGD GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9
GPP_A16/SD_1P8_SEL
H5 AB7 SD_RCOMP R2131 1 2 200_0201_1%
D7 GPP_D19/DMIC_CLK0 SD_RCOMP
GPP_D20/DMIC_DATA0
D8 AF13
<28> DDI_PRIORITY1 GPP_D17/DMIC_CLK1 GPP_F23 -SC_DTCT <59>
C8
GPP_D18/DMIC_DATA1
PCH_SPKR AW5
<54> PCH_SPKR GPP_B14/SPKR

KBL_R_U42_BGA1356 7 OF 20
@

TABLE : Functional Strap


GPP_B14/SPKR (Top Swap Override)
HIGH Enable "Top Swap" Mode
B B
LOW Disable "Top Swap" Mode (Default) LOGIC

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(7/16) : AUDIO/SDXC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 9 of 104


5 4 3 2 1
5 4 3 2 1

Flexible I/O Configuration SATA Port Assignment


PCIe Port Assignment
I/O High Speed Signals Configuration Net Name
0 (PCIE 7)
Port 1 USB3 1 USB3 1 USB3P0 0 (x4) Discrete GPU
1A SATA SSD on WWAN slot
Port 2 USB3 2/SSIC USB3 2 USB3P1 4 GbE PHY
1B (PCIE 11)
Port 3 USB3 3 USB3 3 USB3P2 5 M.2 WLAN Slot Port 0
2 SATA SSD Main Storage
Port 4 USB3 4 USB3 4 USB3P3 6 (x2) Optane x2
PCIE0 (M.2 WWAN Slot)
Port 5 USB3 5/PCIE 1 PCIE 1 (x4)
8 (x2) Alpine Ridge-LP
Port 6 USB3 6/PCIE 2 PCIE 2 (x4) PCIE0
10 (x2) Main Storage x 2
Port 7 PCIE 3 (GbE) PCIE 3 (x4) PCIE0
D Port 8 PCIE 4 (GbE) PCIE 4 (x4) PCIE0 D

Port 9 PCIE 5 (GbE) PCIE 5 (GbE) PCIE4


Port 10 PCIE 6 PCIE 6 PCIE5
Port 11 PCIE 7/SATA 0 PCIE 7 (x2) PCIE6_L1
Port 12 PCIE 8/SATA 1A GPIO STRAP PCIE6_L0_SATA1 VCC3_SUS

Port 13 PCIE 9 (GbE) PCIE 9 (x2) PCIE8_L0


Port 14 PCIE 10 (GbE) PCIE 9 (x2) PCIE8_L1

10K_0201_5%

10K_0201_5%
Port 15 PCIE 11/SATA 1B PCIE 11 (x2) PCIE10_L0 WWAN Slot

Port 16 PCIE 12/SATA 2 GPIO STRAP PCIE10_L1_SATA2 Optane SATA Cache WWAN Card None
WIGIG_DISABLE L H L H L H L H

-WWAN_SSD_DTCT L L L L H H H H

1
SEL(U189) L L L L H H H H

XSD(U189) L L L L L H L H

R648 2

R248 2
SKL_ULT
U58H To M.2 To M.2 To M.2 To M.2 To M.2 Disconnect To M.2 Disconnect
PCIE6_L0_SATA1 Socket2 Socket2 Socket2 Socket2 Socket1 Socket1
SSIC / USB3
PCIE/USB3/SATA
H8 USB3P0_RXN
Cap near U58 side USB3_1_RXN G8 USB3P0_RXP USB3P0_RXN <40>
H13 USB3_1_RXP C13 USB3P0_TXN USB3P0_RXP <40> USB 2.0 Port Assignment
<92> PCIE0_L0_RXN PCIE1_RXN/USB3_5_RXN USB3_1_TXN USB3P0_TXP USB3P0_TXN <40>
G13 D13 0 USB 3.0 System Port
<92> PCIE0_L0_RXP PCIE0_L0_TXN_C PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3P0_TXP <40>
C2472 1 2 0.22U_0201_6.3V6M SWG@ B17
<92> PCIE0_L0_TXN PCIE0_L0_TXP_C PCIE1_TXN/USB3_5_TXN
C2473 1 2 0.22U_0201_6.3V6M SWG@ A17 J6 1 USB 3.0 System Port (AOU)
<92> PCIE0_L0_TXP PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB3P1_RXN_AOU <40>
H6
USB3_2_RXP/SSIC_1_RXP USB3P1_RXP_AOU <40>
G11 B13 2 Smart Cart Slot
<92> PCIE0_L1_RXN PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN USB3P1_TXN_AOU <40>
F11 A13
<92> PCIE0_L1_RXP PCIE0_L1_TXN_C PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB3P1_TXP_AOU <40>
C C2474 1 2 0.22U_0201_6.3V6M SWG@ D16 3 USB Type-C Port C
<92> PCIE0_L1_TXN PCIE0_L1_TXP_C PCIE2_TXN/USB3_6_TXN
C2475 1 2 0.22U_0201_6.3V6M SWG@ C16 J10
<92> PCIE0_L1_TXP PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB3P2_RXN <47>
H10 4 IR Camera
USB3_3_RXP/SSIC_2_RXP USB3P2_TXN_C USB3P2_RXP <47>
H16 B15 C9424 1 2 0.1U_0201_6.3V6-K
<92> PCIE0_L2_RXN PCIE3_RXN USB3_3_TXN/SSIC_2_TXN USB3P2_TXP_C USB3P2_TXN <47>
G16 A15 C9425 1 2 0.1U_0201_6.3V6-K 5 M.2 WWAN Slot
<92> PCIE0_L2_RXP PCIE0_L2_TXN_C PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB3P2_TXP <47>
C2476 1 2 0.22U_0201_6.3V6M SWG@ D17
<92> PCIE0_L2_TXN PCIE0_L2_TXP_C PCIE3_TXN
C2477 1 2 0.22U_0201_6.3V6M SWG@ C17 E10 6 NGFF WLAN Slot
<92> PCIE0_L2_TXP PCIE3_TXP USB3_4_RXN USB3P3_RXN_XBAR <29>
F10
USB3_4_RXP USB3P3_RXP_XBAR <29>
G15 C15 7 USB Camera
<92> PCIE0_L3_RXN PCIE4_RXN USB3_4_TXN USB3P3_TXN_XBAR <29>
F15 D15
<92> PCIE0_L3_RXP PCIE0_L3_TXN_C PCIE4_RXP USB3_4_TXP USB3P3_TXP_XBAR <29>
C2478 1 2 0.22U_0201_6.3V6M SWG@ B19 8 Fingerprint Reader
<92> PCIE0_L3_TXN PCIE0_L3_TXP_C PCIE4_TXN
C2479 1 2 0.22U_0201_6.3V6M SWG@ A19 AB9 USBP0-
<92> PCIE0_L3_TXP PCIE4_TXP USB2N_1 USBP0- <40>
AB10 USBP0+ 9 Touch Panel
USB2P_1 USBP0+ <40>
F16
<41> PCIE4_RXN PCIE5_RXN
E16 AD6 USB 3.0 Port Assignment
<41> PCIE4_RXP PCIE5_RXP USB2N_2 USBP1-_AOU <40>
C19 AD7
<41> PCIE4_TXN PCIE5_TXN USB2P_2 USBP1+_AOU <40>
D19 0 USB 3.0 System Port
<41> PCIE4_TXP PCIE5_TXP AH3
USB2N_3 USBP2- <59>
G18 AJ3 1 USB 3.0 System Port (AOU)
<45> PCIE5_RXN PCIE6_RXN USB2P_3 USBP2+ <59>
F18
<45> PCIE5_RXP PCIE6_RXP
D20 AD9 2 Media Card Controller
<45> PCIE5_TXN PCIE6_TXN USB2N_4 USBP3- <36>
C20 AD10
<45> PCIE5_TXP PCIE6_TXP USB2P_4 USBP3+ <36>
3 USB Type-C Port
F20 AJ1
<46> PCIE6_L1_RXN PCIE7_RXN/SATA0_RXN USB2N_5 USBP4- <26>
E20 AJ2 4 (PCIE 1)
<46> PCIE6_L1_RXP PCIE7_RXP/SATA0_RXP USB2P_5 USBP4+ <26>
B21 USB2
<46> PCIE6_L1_TXN PCIE7_TXN/SATA0_TXN
A21 AF6 5 (PCIE 2)
<46> PCIE6_L1_TXP PCIE7_TXP/SATA0_TXP USB2N_6 USBP5- <46>
AF7
PCIE6_L0_SATA1_RXN USB2P_6 USBP5+ <46>
G21
<46> PCIE6_L0_SATA1_RXN PCIE6_L0_SATA1_RXP PCIE8_RXN/SATA1A_RXN
F21 AH1
<46> PCIE6_L0_SATA1_RXP PCIE6_L0_SATA1_TXN PCIE8_RXP/SATA1A_RXP USB2N_7 USBP6- <45>
D21 AH2
<46> PCIE6_L0_SATA1_TXN PCIE6_L0_SATA1_TXP PCIE8_TXN/SATA1A_TXN USB2P_7 USBP6+ <45>
C21
<46> PCIE6_L0_SATA1_TXP PCIE8_TXP/SATA1A_TXP AF8
USB2N_8 USBP7- <26>
E22 AF9
<31> PCIE8_L0_RXN PCIE9_RXN USB2P_8 USBP7+ <26>
E23
<31> PCIE8_L0_RXP PCIE9_RXP
B23 AG1
<31> PCIE8_L0_TXN PCIE9_TXN USB2N_9 USBP8- <59>
A23 AG2
<31> PCIE8_L0_TXP PCIE9_TXP USB2P_9 USBP8+ <59>
F25 AH7
B <31> PCIE8_L1_RXN PCIE10_RXN USB2N_10 USBP9- <26> B
E25 AH8 VCC3_SUS
<31> PCIE8_L1_RXP PCIE10_RXP USB2P_10 USBP9+ <26>
D23
<31> PCIE8_L1_TXN PCIE10_TXN
VCC3_SUS C23 AB6 USBCOMP R564 1 2 113_0201_1%
<31> PCIE8_L1_TXP PCIE10_TXP USB2_COMP AG3 R2573 1 2 0_0201_5%
R8964 1 2 100_0201_1% PCIE_RCOMPN F5 USB2_ID AG4 R2580 1 2 1K_0201_5%
PCIE_RCOMPN USB2_VBUSSENSE

1
2

1
PCIE_RCOMPP E5
R2341 PCIE_RCOMPP A9
-XDP_PRDY GPP_E9/USB2_OC0# -USB_PORT0_OC0 <40>
10K_0201_5% R529 1 20_0201_5%_SM D56 C9 R44 R2745
<19> -XDP_PRDY -XDP_PREQ PROC_PRDY# GPP_E10/USB2_OC1# -USB_PORT1_OC1 <40>
R530 1 20_0201_5%_SM D61 D9 10K_0201_5% 10K_0201_5%
<19> -XDP_PREQ -TPM_IRQ PROC_PREQ# GPP_E11/USB2_OC2#
BB11 B9
<63> -TPM_IRQ GPP_A7/PIRQA# GPP_E12/USB2_OC3# NFC_INT <59>

2
1

2
-TPM_IRQ
E28 J1
<38> PCIE10_L0_RXN PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 NFC_ON <59>
E27 J2
<38> PCIE10_L0_RXP PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1
D24 J3
<38> PCIE10_L0_TXN PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SATA2_DEVSLP <39>
C24
<38> PCIE10_L0_TXP PCIE11_TXP/SATA1B_TXP
E30 H2 TP938 1 Test_Point_12MIL
<38> PCIE10_L1_SATA2_RXN PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 -WWAN_SATA_DTCT
F30 H3
<38> PCIE10_L1_SATA2_RXP PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 -PE_DTCT
A25 G4
<38> PCIE10_L1_SATA2_TXN PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 -PE_DTCT <39>
B25
<38> PCIE10_L1_SATA2_TXP PCIE12_TXP/SATA2_TXP H1
GPP_E8/SATALED#

KBL_R_U42_BGA1356 8 OF 20

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(8/16) : PCIE/USB/SATA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 10 of 104


5 4 3 2 1
5 4 3 2 1

D D

SKL_ULT
U58I

CSI-2

A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3
C31 E13
D31 CSI2_DN4 CSI2_COMP B7
C33 CSI2_DP4 GPP_D4/FLASHTRIG
D33 CSI2_DN5
A31 CSI2_DP5 EMMC

B31 CSI2_DN6 AP2 PLANARID1


A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1 PLANARID2
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3 PLANARID3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
CSI2_DN11 GPP_F22/EMMC_CLK -INTRUDER_PCH <13>
D27 AP4 PLANARID0
CSI2_DP11 GPP_F12/EMMC_CMD
AT1
9 OF 20 EMMC_RCOMP
KBL_R_U42_BGA1356
@
C C

TABLE
PLANAR ID
LEVEL
3 2 1 0
R43 R47 R113 R48
1 NA NA NA NA
0 ASM ASM ASM ASM

PLANARID3 TABLE
PLANARID2
PLANARID1
PLANARID0 LEVEL PLANARID[3..0]

SDV 0000B

1
@
B FVT 0001B B
R43 R47 R113 R48
0_0201_5% 0_0201_5% 0_0201_5% 0_0201_5%
SIT 0010B

2
SIT 1010B(For RTD3 rework)

SIT-R 0011B

SVT 0100B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(9/16) : CSI-2/EMMC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 11 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3B

VCC1R0_SUS
1

R10615
10K_0201_5% U58J SKL_ULT
2

CLOCK SIGNALS

1
D42
<92> -PCIE0_CLK_100M CLKOUT_PCIE_N0
C42 R609
<92> PCIE0_CLK_100M CLKOUT_PCIE_P0
AR10 2.71K_0402_0.5%
<92> -CLKREQ_PCIE0 GPP_B5/SRCCLKREQ0# XTAL24_OUT_R U22@

1
C B42 Y5 C
<41> -PCIE4_CLK_100M CLKOUT_PCIE_N1
A42 F43 U22@ 24MHZ_8PF_8Y24080002
<41> PCIE4_CLK_100M CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N
AT7 E43 R308
<41> -CLKREQ_PCIE4 GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P 1M_0201_5% 1 3
D41 BA17 1 3
<45> -PCIE5_CLK_100M CLKOUT_PCIE_N2 GPD8/SUSCLK SUSCLK_32K <45,55> 1 1

2
C41 U22@ GND1 GND2 U22@
<45> PCIE5_CLK_100M CLKOUT_PCIE_P2 XTAL24_IN XTAL24_IN_U22
AT8 E37 U22@ R10626 1 2 0_0201_5% U22@ C205 C206
<45> -CLKREQ_PCIE5 GPP_B7/SRCCLKREQ2# XTAL24_IN XTAL24_OUT XTAL24_OUT_U22 2 4
E35 U22@ R10627 1 2 0_0201_5% R133 1 2 0_0201_5% 8.2P_0402_50V8-C 8.2P_0402_50V8-C
-PCIE6_CLK_100M D40 XTAL24_OUT 2 2
<46> -PCIE6_CLK_100M PCIE6_CLK_100M CLKOUT_PCIE_N3 XCLK_BIASREF
C40 E42 Follow Design Guide Routing
<46> PCIE6_CLK_100M -CLKREQ_PCIE6 CLKOUT_PCIE_P3 XCLK_BIASREF
AT10
<46> -CLKREQ_PCIE6 GPP_B8/SRCCLKREQ3# AM18 RTCX1 C348 1 2 6.8P_0201_25V8-C
B40 RTCX1 AM20 RTCX2
<31> -PCIE8_CLK_100M CLKOUT_PCIE_N4 RTCX2
A40
<31> PCIE8_CLK_100M CLKOUT_PCIE_P4
AU8 AN18
<31> -CLKREQ_PCIE8 GPP_B9/SRCCLKREQ4# SRTCRST# -SRTCRST <20>

2
1
AM16 Y6
RTCRST# -RTCRST <17,20>
E40
<39> -PCIE10_CLK_100M CLKOUT_PCIE_N5
E38 R351 32.768KHZ 9PF 20PPM 9H03280012
<39> PCIE10_CLK_100M CLKOUT_PCIE_P5
AU7 10M_0201_5% Y5 CRYSTAL - 24MHZ 8PF +-30PPM
<39> -CLKREQ_PCIE10 GPP_B10/SRCCLKREQ5#

1
2
Vendor P/N LCFC P/N
C326 1 2 6.8P_0201_25V8-C TXC 8Y24080002 SJ10000HI00
KBL_R_U42_BGA1356 10 OF 20
-CLKREQ_PCIE8 @ KDS 1ZZHAE24000CC0D SJ10000P200
1

@
R10146 Y6 CRYSTAL 32.768KHZ 9PF 20PPM
100K_0201_5%
Vendor P/N LCFC P/N
2

TXC 9H03280012 SJ10000J900


KDS 1TJF090DJ1A000B SJ100069400

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(10/16) : CLOCK SIGNALS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 12 of 104


5 4 3 2 1
5 4 3 2 1

VCC3M

R991 1 2 33_0201_5% U73


<31> -PLTRST_NEAR
5 1
VCC NC
2 -PLTRST
IN_A
R993 1 2 33_0201_5% 4 3
<39,41,45,46,55,63,64,65,92> -PLTRST_FAR OUT_Y GND

TC7SG17FE_SON5
D D

1 1
C460 C46
100P_0201_25V8-J 100P_0201_25V8-J
2 2

TABLE of U73
Vendor P/N LCFC P/N
TOSHIBA TC7SG17FE SA00005T00J
ON NL17SZ17XV5T2G SA00005OU00
TI SN74LVC1G17DRLR SA00005MG00

RTCVCC VCC3M
VCC3M VCC3M

1
C C
@
R646 R614
1M_0201_5% 10K_0201_5%

2
1

1
SKL_ULT
U58K
R19 R612
4.7K_0201_5% 1K_0201_5% SYSTEM POWER MANAGEMENT
AT11
GPP_B12/SLP_S0# -PCH_SLP_S0 <17,79>
2

2 AP15
GPD4/SLP_S3# -PCH_SLP_S3 <17,31,56,65,89>
AN10 BA16
GPP_B13/PLTRST# GPD5/SLP_S4# -PCH_SLP_S4 <17,56,65,80>
B5 AY16
<17,19> -XDP_DBR SYS_RESET# GPD10/SLP_S5# -PCH_SLP_S5 <17,65>
AY17
<19,56> -RSMRST RSMRST# AN15
CPU_PWRGD SLP_SUS# -PCH_SLP_SUS <56>
TP160 Test_Point_20MIL 1 A68 AW15
VCCST_PWRGD PROCPWRGD SLP_LAN# -PCH_SLP_LAN <57>
B65 BB17
VCCST_PWRGD GPD9/SLP_WLAN# -PCH_SLP_WLAN <56>
AN16
GPD6/SLP_A# -PCH_SLP_M <17,65>
R21 1 2 0_0201_5%_SM B6
<49,56,59,64,66> BPWRG SYS_PWROK
R617 1 2 0_0201_5%_SM BA20 BA15 -PWRSW_EC <56>
<72> CPUCORE_PWRGD PCH_PWROK GPD3/PWRBTN#
MPWRG R203 1 2 0_0201_5%_SM BB20 AY15 AC_PRESENT <56>
<56,66> MPWRG DSW_PWROK GPD1/ACPRESENT AU13 -BATLOW <31,57>
-SUSWARN AR13 GPD0/BATLOW#
R1884 1 2 0_0201_5%_SM AP11 GPP_A13/SUSWARN#/SUSPWRDNACK
GPP_A15/SUSACK# AU11
BB15 GPP_A11/PME# AP16 -INTRUDER
<31,45,65> -PCIE_WAKE WAKE# INTRUDER#
AM15
<41> -LANWAKE GPD2/LAN_WAKE#
AW17 AM10
<41> LANPHYPC GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE#
AT15 AM11
GPD7/RSVD GPP_B2/VRALERT#
1
@
KBL_R_U42_BGA1356 11 OF 20 C7
@ 1000P_0201_25V7-K
2

S3
R10314 1 20_0201_5%_SM 1 4
<11> -INTRUDER_PCH
B B

D5
2 3 R10 1 2 0_0201_5%_SM 1 2 -INTRUDER_EC
-INTRUDER_EC <57>
SPVR310100_4P RB520CM-30T2R_VMN2M2

D5:SCS00007M00(RB520CM)

VCC3_SUS VCC1R0_SUS
1

R2324 R2325
10K_0201_5% 10K_0201_5%
2

VCCST_PWRGD
1

D
2 Q195
1

D G LSK3541G1ET2L_VMT3
CPUCORE_ON 2 Q194
<65,72> CPUCORE_ON G LSK3541G1ET2L_VMT3 S
3

S
3

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(11/16) : SYSTEM PM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 13 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCCSTG VCCSTG_CPU

R769
1 2

0.01_0603_LE_1%

VCCCPUCORE VCCCPUCORE
VCCST
SKL_ULT
U58L
CPU POWER 1 OF 4

A30 G32
A34 VCC_A30 VCC_G32 G33
A39 VCC_A34 VCC_G33 G35
A44 VCC_A39 VCC_G35 G37
AK33 VCC_A44 VCC_G37 G38 VCCCPUCORE
AK35 VCC_AK33 VCC_G38 G40
VCC_AK35 VCC_G40

1
AK37 G42
AK38 VCC_AK37 VCC_G42 J30 @
AK40 VCC_AK38 VCC_J30 J33 R374 R782 R2576
AL33 VCC_AK40 VCC_J33 J37
AL37 VCC_AL33 VCC_J37 J40
VCC_AL37 VCC_J40

56_0201_5% 2

100_0201_5% 2

100_0201_5% 2
1
AL40 K33
AM32 VCC_AL40 VCC_K33 K35 VCCSTG_CPU
AM33 VCC_AM32 VCC_K35 K37 R9
C AM35 VCC_AM33 VCC_K37 K38 100_0201_1% C
AM37 VCC_AM35 VCC_K38 K40
VCC_AM37 VCC_K40

2
AM38 K42
G30 VCC_AM38 VCC_K42 K43
VCC_G30 VCC_K43
K32 E32 VCC_SENSE
RSVD_K32 VCC_SENSE VSS_SENSE VCC_SENSE <72>
E33
VSS_SENSE VSS_SENSE <72>
AK32
RSVD_AK32 B63 R781 1 2 220_0201_5% -SVID_ALERT
VIDALERT# SVID_CLK -SVID_ALERT <72>
AB62 A63
VCCOPC_AB62 VIDSCK SVID_DATA SVID_CLK <72>
P62 D64
VCCOPC_P62 VIDSOUT SVID_DATA <72>
V62
VCCOPC_V62 G20
VCCSTG_G20

1
H63
VCC_OPC_1P8_H63
G61 R70
VCC_OPC_1P8_G61 100_0201_1%
AC63
VCCOPC_SENSE

2
AE63
VSSOPC_SENSE
AE62
AG62 VCCEOPIO_AE62
VCCEOPIO_AG62
AL63
AJ62 VCCEOPIO_SENSE
VSSEOPIO_SENSE

KBL_R_U42_BGA1356 12 OF 20
@

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(12/16) : CPU POWER (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 14 of 104


5 4 3 2 1
5 4 3 2 1

VCCPLL VDDQ VDDQC VCCPLL_OC


VCCST VCCST_CPU VCCSTG_CPU VCCST_CPU VCC1R2A VCC1R2A VCC1R2A VCC1R2A

R10186
1 2
VCCCPUCORE_GT
0.01_0603_LE_1%

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
2 2 2

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

10U_0402_6.3V6-M
C2424
C2423

C2422
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0402_6.3V6-K
2 2 2 2 2 1 1 1 2 2 2 2 2 2 2 2 2 2 2
C9572

C9574

C9576
C9573

C9575

C1184

C1829

C1830

C1831

C9493

C2426

C2427
C9492

C840

C842

C844
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D D

VCCCPUIO

VCCCPUCORE VCCCPUCORE_GT

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
VCCGFXCORE_I 2 2 2 2

C504

C505

C506

C507
VCCGFXCORE_I

U42@ R10335 1 2 0_0805_0.2mMax_31.6A


1 1 1 1

VCCGFXCORE_I

SKL_ULT
U58M
U22@ R10336 1 2 0_0805_0.2mMax_31.6A
CPU POWER 2 OF 4
N70
A48 VCCGT_N70 N71
A53 VCCGT_A48 VCCGT_N71 R63 VCC1R2A VCCCPUIO
C TABLE R10335,R10336 VCCGT_A53 VCCGT_R63
C
A58 R64
KOA : TLRZ2ATTD A62 VCCGT_A58 VCCGT_R64 R65
VISHAY : WSL080500000ZEA9 A66 VCCGT_A62 VCCGT_R65 R66
VCCGT_A66 VCCGT_R66
TA-I : RLM10JTSR000L AA63
VCCGT_AA63 VCCGT_R67
R67
AA64 R68
YAGEO : PA0805-R-470RL AA66 VCCGT_AA64 VCCGT_R68 R69 U58N SKL_ULT
AA67 VCCGT_AA66 VCCGT_R69 R70
VCCGT_AA67 VCCGT_R70 CPU POWER 3 OF 4
AA69 R71
AA70 VCCGT_AA69 VCCGT_R71 T62 AU23 AK28
AA71 VCCGT_AA70 VCCGT_T62 U65 AU28 VDDQ_AU23 VCCIO_AK28 AK30
AC64 VCCGT_AA71 VCCGT_U65 U68 AU35 VDDQ_AU28 VCCIO_AK30 AL30
AC65 VCCGT_AC64 VCCGT_U68 U71 AU42 VDDQ_AU35 VCCIO_AL30 AL42 VCCSA
AC66 VCCGT_AC65 VCCGT_U71 W63 BB23 VDDQ_AU42 VCCIO_AL42 AM28
AC67 VCCGT_AC66 VCCGT_W63 W64 BB32 VDDQ_BB23 VCCIO_AM28 AM30
AC68 VCCGT_AC67 VCCGT_W64 W65 BB41 VDDQ_BB32 VCCIO_AM30 AM42
AC69 VCCGT_AC68 VCCGT_W65 W66 VCCSTG_CPU VCCST_CPU BB47 VDDQ_BB41 VCCIO_AM42
AC70 VCCGT_AC69 VCCGT_W66 W67 BB51 VDDQ_BB47 AK23
AC71 VCCGT_AC70 VCCGT_W67 W68 VDDQ_BB51 VCCSA_AK23 AK25
J43 VCCGT_AC71 VCCGT_W68 W69 VCCSA_AK25 G23
J45 VCCGT_J43 VCCGT_W69 W70 AM40 VCCSA_G23 G25 VCCCPUIO VCCSA
J46 VCCGT_J45 VCCGT_W70 W71 VDDQC VCCSA_G25 G27
J48 VCCGT_J46 VCCGT_W71 Y62 VCCCPUCORE A18 VCCSA_G27 G28
J50 VCCGT_J48 VCCGT_Y62 VCCST VCCSA_G28 J22
J52 VCCGT_J50 A22 VCCSA_J22 J23
J53 VCCGT_J52 AK42 VCCSTG_A22 VCCSA_J23 J27
VCCGT_J53 VCCGTX_AK42 VCCSA_J27

2
J55 AK43 AL23 K23
J56 VCCGT_J55 VCCGTX_AK43 AK45 VCCPLL_OC VCCSA_K23 K25
J58 VCCGT_J56 VCCGTX_AK45 AK46 K20 VCCSA_K25 K27 R2290 R2154
VCCGFXCORE_I J60 VCCGT_J58 VCCGTX_AK46 AK48 K21 VCCPLL_K20 VCCSA_K27 K28 100_0201_1% 100_0201_1%
K48 VCCGT_J60 VCCGTX_AK48 AK50 VCCPLL_K21 VCCSA_K28 K30
VCCSA_K30

1
VCCGT_K48 VCCGTX_AK50

1
K50 AK52 1 TP953
U22@ R10337 1 2 0_0402_5% K52 VCCGT_K50 VCCGTX_AK52 AK53 Test_Point_20MIL AM23
K53 VCCGT_K52 VCCGTX_AK53 AK55 VCCIO_SENSE AM22
K55 VCCGT_K53 VCCGTX_AK55 AK56 VSSIO_SENSE
K56 VCCGT_K55 VCCGTX_AK56 AK58 H21 VSSSA_SENSE
VCCGT_K56 VCCGTX_AK58 VSSSA_SENSE VCCSA_SENSE VSSSA_SENSE <72>
K58 AK60 H20
VCCGT_K58 VCCGTX_AK60 VCCSA_SENSE VCCSA_SENSE <72>
K60 AK70
L62 VCCGT_K60 VCCGTX_AK70 AL43
B L63 VCCGT_L62 VCCGTX_AL43 AL46 KBL_R_U42_BGA1356 14 OF 20 B
VCCGT_L63 VCCGTX_AL46

2
VCCGFXCORE_I L64 AL50 @
L65 VCCGT_L64 VCCGTX_AL50 AL53
L66 VCCGT_L65 VCCGTX_AL53 AL56 R2291 R2155
L67 VCCGT_L66 VCCGTX_AL56 AL60 100_0201_1% 100_0201_1%
L68 VCCGT_L67 VCCGTX_AL60 AM48
VCCGT_L68 VCCGTX_AM48

1
L69 AM50
L70 VCCGT_L69 VCCGTX_AM50 AM52
VCCGT_L70 VCCGTX_AM52
2

L71 AM53
M62 VCCGT_L71 VCCGTX_AM53 AM56
R2152 N63 VCCGT_M62 VCCGTX_AM56 AM58
100_0201_1% N64 VCCGT_N63 VCCGTX_AM58 AU58
N66 VCCGT_N64 VCCGTX_AU58 AU63
1

N67 VCCGT_N66 VCCGTX_AU63 BB57


N69 VCCGT_N67 VCCGTX_BB57 BB66
VCCGT_N69 VCCGTX_BB66
VCCGT_SENSE J70 AK62
<72> VCCGT_SENSE VSSGT_SENSE VCCGT_SENSE VCCGTX_SENSE
J69 AL61 Logic Ref Des KBL-R U42 KBL-R U22
<72> VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
VCCSA VCCSA Y5 NO_ASM ASM
KBL_R_U42_BGA1356 13 OF 20
R133 NO_ASM ASM
@
R308 NO_ASM ASM
2

10U_0402_6.3V6-M Page 12
10U_0402_6.3V6-M

10U_0402_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
10U_0402_6.3V6-M

10U_0402_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M

1U_0201_6.3V6-M
C205 NO_ASM ASM
R2153
100_0201_1%
C206 NO_ASM ASM
2 2 2 2 2 2 2 2 2 2 Y8 ASM NO_ASM
1

R10339 ASM NO_ASM


Page 18 R10340 ASM NO_ASM
1 1 1 1 1 1 1 1 1 1
C9498 ASM NO_ASM
C9499 ASM NO_ASM
C9605

C9606

C9607
C9494

C9495

C9608
C9603

C9604

C9609

C9610
R10335 ASM NO ASM
Page 15 R10336 NO ASM ASM
R10337 NO ASM ASM
A A

Logic

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(13/16) : CPU POWER (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 15 of 104


5 4 3 2 1
5 4 3 2 1

VCC1R0_SUS VCCMPHY_GATE
VCC1R0_SUS VCCMPHY_GATE VCCMPHY_GATE VCC1R8_SUS VCC3_SUS VCC1R8_SUS VCC1R0_SUS VCC1R0_SUS

R10187 1 2 0.01_0603_LE_1%

VCC1R0_SUS VCC1R0_SUS_PRIM 1 1 1 1 1 1 1 1
C2433 C2435 C2439 C2444 C2428 C2429 C2430 C2431
R10221 1 2 0.01_0603_LE_1% 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 47U_0805_6.3V6-M 47U_0805_6.3V6-M 47U_0805_6.3V6-M 47U_0805_6.3V6-M
2 2 2 2 2 2 2 2

VCC1R0_SUS VCCPCHCORE NEAR K17 NEAR N15 NEAR N18 NEAR AA1

R10222 1 2 0.01_0603_LE_1%
D D
VCC3M VCC3M_PCH

R10220 1 2 0.01_0603_LE_1%

VCC1R0_SUS_PRIM VCC3_SUS

VCCPCHCORE SKL_ULT
U58O
VCC1R8_SUS
CPU POWER 4 OF 4

AB19
AB20 VCCPRIM_1P0_AB19 AK15 VCC3_SUS
P18 VCCPRIM_1P0_AB20 VCCPGPPA AG15 VCC1R0_SUS
C VCCPRIM_1P0_P18 VCCPGPPB C
Y16
AF18 VCCPGPPC Y15
VCCPRIM_CORE_AF18 VCCPGPPD R10190
AF19 T16
V20 VCCPRIM_CORE_AF19 VCCPGPPE AF16 VCC1R0_SUS_CLK2 1 2
VCCPRIM_CORE_V20 VCCPGPPF 1 1
VCCMPHY_GATE V21 AD15 VCC1R0_SUS_PRIM
VCCPRIM_CORE_V21 VCCPGPPG C763 C380
AL1 V19 0.1U_0201_6.3V6-K 1U_0402_6.3V6-K 0.01_0603_LE_1%
R10188 DCPDSW_1P0 VCCPRIM_3P3_V19 2 2 1 1
@ @
1 2 VCCMPHY_GATE_PLL VCCMPHY_GATE K17 T1 C2450 C2451
L1 VCCMPHYAON_1P0_K17 VCCPRIM_1P0_T1 22U_0603_6.3V6-M 22U_0603_6.3V6-M
1 VCCMPHYAON_1P0_L1 2 2
AA1 VCC1R0_SUS
0.01_0603_LE_1% C620 N15 VCCATS_1P8 RTCVCC VCC1R0_SUS
1 1 VCCMPHYGT_1P0_N15
@ @ 1U_0402_6.3V6-K N16 AK17
C2447 C2446 2 N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3
VCCMPHYGT_1P0_N17 R10191
22U_0603_6.3V6-M 22U_0603_6.3V6-M P15 AK19
2 2 P16 VCCMPHYGT_1P0_P15 VCCRTC_AK19 BB14 VCC1R0_SUS_CLK4 1 2
VCCMPHYGT_1P0_P16 VCCRTC_BB14 1 1
VCC1R0_SUS C795
K15 BB10 1 2 C731 C503
@ L15 VCCAMPHYPLL_1P0_K15 DCPRTC 1U_0402_6.3V6-K 0.1U_0201_6.3V6-K 0.01_0603_LE_1%
R10189 VCCAMPHYPLL_1P0_L15 2 2 1 1
A14 0.1U_0201_6.3V6-K @ @
1 2 VCC1R0_SUS_PLL V15 VCCCLK1 C2452 C2453
VCCAPLL_1P0 K19 22U_0603_6.3V6-M 22U_0603_6.3V6-M
0.01_0603_LE_1% VCC3M_PCH AB17 VCCCLK2 2 2
VCC3_SUS Y18 VCCPRIM_1P0_AB17 L21 VCC1R0_SUS
1 1 VCCPRIM_1P0_Y18 VCCCLK3
FL77
C9879 1 2 C2655 NEAR AJ19 AD17 N20
VCCDSW_3P3_AD17 VCCCLK4 R10192
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K AD18
2 MMZ0603AFY560VT_2P 2 FL75 1 2 MMZ0603AFY560VT_2P AJ17 VCCDSW_3P3_AD18 L19 VCC1R0_SUS_CLK5 1 2
NEAR V15 VCCDSW_3P3_AJ17 VCCCLK5
NEAR V15 R10338 1 @ 2 0_0201_5% AJ19 A10
VCCHDA VCCCLK6 0.01_0603_LE_1%
1 1
AJ16 AN11 @ @
VCCSPI GPP_B0/CORE_VID0 AN13 C2454 C2455
AF20 GPP_B1/CORE_VID1 22U_0603_6.3V6-M 22U_0603_6.3V6-M
AF21 VCCSRAM_1P0_AF20 2 2
T19 VCCSRAM_1P0_AF21
T20 VCCSRAM_1P0_T19
B VCCSRAM_1P0_T20 B

AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
1 1
N18
C9496 C9497 VCCAPLLEBB
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
2 2 KBL_R_U42_BGA1356 15 OF 20
NEAR AJ19 NEAR AJ19
@

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(14/16) : PCH POWER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 16 of 104


5 4 3 2 1
5 4 3 2 1

D D

APS/PETS Interface
J41
VCC3_SUS VCC3M FCI_10051922-1810ELF

18 20
17 NC1 PEG2 19
16 NC2 PEG1
15 NC3
<13,79> -PCH_SLP_S0 SLP_S0#
14
13 GND1
<13,19> -XDP_DBR SYS_RESET#
12
11 GND2
<26,35,64,65> -PWRSWITCH PWRBTN#
10
9 GND3
<12,20> -RTCRST RTCRST#
8
7 GND4
6 +V3.3DS
<13,65> -PCH_SLP_M SLP_A#
5
<13,56,65,80> -PCH_SLP_S4 SLP_S4#
4
<13,65> -PCH_SLP_S5 SLP_S5#
3
2 VccDSW3_3
<13,31,56,65,89> -PCH_SLP_S3 SLP_S3#
1
VccSus3_3
@

SKL_ULT U58P SKL_ULT U58Q

GND 1 OF 3 GND 2 OF 3

C Test_Point_16MIL 1 TP931 A5 AL65 AT63 BA49 C


Test_Point_16MIL 1 TP932 A67 VSS_A5 VSS_AL65 AL66 AT68 VSS_AT63 VSS_BA49 BA53
Test_Point_16MIL 1 TP933 A70 VSS_A67 VSS_AL66 AM13 AT71 VSS_AT68 VSS_BA53 BA57
AA2 VSS_A70 VSS_AM13 AM21 AU10 VSS_AT71 VSS_BA57 BA6
AA4 VSS_AA2 VSS_AM21 AM25 AU15 VSS_AU10 VSS_BA6 BA62
AA65 VSS_AA4 VSS_AM25 AM27 AU20 VSS_AU15 VSS_BA62 BA66
AA68 VSS_AA65 VSS_AM27 AM43 AU32 VSS_AU20 VSS_BA66 BA71 TP925 1 Test_Point_16MIL SKL_ULT
U58R
AB15 VSS_AA68 VSS_AM43 AM45 AU38 VSS_AU32 VSS_BA71 BB18
AB16 VSS_AB15 VSS_AM45 AM46 Test_Point_16MIL 1 TP929 AV1 VSS_AU38 VSS_BB18 BB26 GND 3 OF 3
AB18 VSS_AB16 VSS_AM46 AM55 AV68 VSS_AV1 VSS_BB26 BB30 F8 L18
AB21 VSS_AB18 VSS_AM55 AM60 AV69 VSS_AV68 VSS_BB30 BB34 G10 VSS_F8 VSS_L18 L2
AB8 VSS_AB21 VSS_AM60 AM61 AV70 VSS_AV69 VSS_BB34 BB38 G22 VSS_G10 VSS_L2 L20
AD13 VSS_AB8 VSS_AM61 AM68 Test_Point_16MIL 1 TP926 AV71 VSS_AV70 VSS_BB38 BB43 G43 VSS_G22 VSS_L20 L4
AD16 VSS_AD13 VSS_AM68 AM71 AW10 VSS_AV71 VSS_BB43 BB55 G45 VSS_G43 VSS_L4 L8
AD19 VSS_AD16 VSS_AM71 AM8 AW12 VSS_AW10 VSS_BB55 BB6 G48 VSS_G45 VSS_L8 N10
AD20 VSS_AD19 VSS_AM8 AN20 AW14 VSS_AW12 VSS_BB6 BB60 G5 VSS_G48 VSS_N10 N13
AD21 VSS_AD20 VSS_AN20 AN23 AW16 VSS_AW14 VSS_BB60 BB64 G52 VSS_G5 VSS_N13 N19
AD62 VSS_AD21 VSS_AN23 AN28 AW18 VSS_AW16 VSS_BB64 BB67 TP924 1 Test_Point_16MIL G55 VSS_G52 VSS_N19 N21
AD8 VSS_AD62 VSS_AN28 AN30 AW21 VSS_AW18 VSS_BB67 BB70 TP923 1 Test_Point_16MIL G58 VSS_G55 VSS_N21 N6
AE64 VSS_AD8 VSS_AN30 AN32 AW23 VSS_AW21 VSS_BB70 C1 TP930 1 Test_Point_16MIL G6 VSS_G58 VSS_N6 N65
AE65 VSS_AE64 VSS_AN32 AN33 AW26 VSS_AW23 VSS_C1 C25 G60 VSS_G6 VSS_N65 N68
AE66 VSS_AE65 VSS_AN33 AN35 AW28 VSS_AW26 VSS_C25 C5 G63 VSS_G60 VSS_N68 P17
AE67 VSS_AE66 VSS_AN35 AN37 AW30 VSS_AW28 VSS_C5 D10 G66 VSS_G63 VSS_P17 P19
AE68 VSS_AE67 VSS_AN37 AN38 AW32 VSS_AW30 VSS_D10 D11 H15 VSS_G66 VSS_P19 P20
AE69 VSS_AE68 VSS_AN38 AN40 AW34 VSS_AW32 VSS_D11 D14 H18 VSS_H15 VSS_P20 P21
AF1 VSS_AE69 VSS_AN40 AN42 AW36 VSS_AW34 VSS_D14 D18 H71 VSS_H18 VSS_P21 R13
AF10 VSS_AF1 VSS_AN42 AN58 AW38 VSS_AW36 VSS_D18 D22 J11 VSS_H71 VSS_R13 R6
AF15 VSS_AF10 VSS_AN58 AN63 AW41 VSS_AW38 VSS_D22 D25 J13 VSS_J11 VSS_R6 T15
AF17 VSS_AF15 VSS_AN63 AP10 AW43 VSS_AW41 VSS_D25 D26 J25 VSS_J13 VSS_T15 T17
AF2 VSS_AF17 VSS_AP10 AP18 AW45 VSS_AW43 VSS_D26 D30 J28 VSS_J25 VSS_T17 T18
AF4 VSS_AF2 VSS_AP18 AP20 AW47 VSS_AW45 VSS_D30 D34 J32 VSS_J28 VSS_T18 T2
AF63 VSS_AF4 VSS_AP20 AP23 AW49 VSS_AW47 VSS_D34 D39 J35 VSS_J32 VSS_T2 T21
AG16 VSS_AF63 VSS_AP23 AP28 AW51 VSS_AW49 VSS_D39 D44 J38 VSS_J35 VSS_T21 T4
AG17 VSS_AG16 VSS_AP28 AP32 AW53 VSS_AW51 VSS_D44 D45 J42 VSS_J38 VSS_T4 U10
AG18 VSS_AG17 VSS_AP32 AP35 AW55 VSS_AW53 VSS_D45 D47 J8 VSS_J42 VSS_U10 U63
AG19 VSS_AG18 VSS_AP35 AP38 AW57 VSS_AW55 VSS_D47 D48 K16 VSS_J8 VSS_U63 U64
AG20 VSS_AG19 VSS_AP38 AP42 AW6 VSS_AW57 VSS_D48 D53 K18 VSS_K16 VSS_U64 U66
AG21 VSS_AG20 VSS_AP42 AP58 AW60 VSS_AW6 VSS_D53 D58 K22 VSS_K18 VSS_U66 U67
AG71 VSS_AG21 VSS_AP58 AP63 AW62 VSS_AW60 VSS_D58 D6 K61 VSS_K22 VSS_U67 U69
B AH13 VSS_AG71 VSS_AP63 AP68 AW64 VSS_AW62 VSS_D6 D62 K63 VSS_K61 VSS_U69 U70 B
AH6 VSS_AH13 VSS_AP68 AP70 AW66 VSS_AW64 VSS_D62 D66 K64 VSS_K63 VSS_U70 V16
AH63 VSS_AH6 VSS_AP70 AR11 AW8 VSS_AW66 VSS_D66 D69 K65 VSS_K64 VSS_V16 V17
AH64 VSS_AH63 VSS_AR11 AR15 AY66 VSS_AW8 VSS_D69 E11 K66 VSS_K65 VSS_V17 V18
AH67 VSS_AH64 VSS_AR15 AR16 B10 VSS_AY66 VSS_E11 E15 K67 VSS_K66 VSS_V18 W13
AJ15 VSS_AH67 VSS_AR16 AR20 B14 VSS_B10 VSS_E15 E18 K68 VSS_K67 VSS_W13 W6
AJ18 VSS_AJ15 VSS_AR20 AR23 B18 VSS_B14 VSS_E18 E21 K70 VSS_K68 VSS_W6 W9
AJ20 VSS_AJ18 VSS_AR23 AR28 B22 VSS_B18 VSS_E21 E46 K71 VSS_K70 VSS_W9 Y17
AJ4 VSS_AJ20 VSS_AR28 AR35 B30 VSS_B22 VSS_E46 E50 L11 VSS_K71 VSS_Y17 Y19
AK11 VSS_AJ4 VSS_AR35 AR42 B34 VSS_B30 VSS_E50 E53 L16 VSS_L11 VSS_Y19 Y20
AK16 VSS_AK11 VSS_AR42 AR43 B39 VSS_B34 VSS_E53 E56 L17 VSS_L16 VSS_Y20 Y21
AK18 VSS_AK16 VSS_AR43 AR45 B44 VSS_B39 VSS_E56 E6 VSS_L17 VSS_Y21
AK21 VSS_AK18 VSS_AR45 AR46 B48 VSS_B44 VSS_E6 E65
AK22 VSS_AK21 VSS_AR46 AR48 B53 VSS_B48 VSS_E65 E71 TP935 1 Test_Point_16MIL
AK27 VSS_AK22 VSS_AR48 AR5 B58 VSS_B53 VSS_E71 F1 18 OF 20
AK63 VSS_AK27 VSS_AR5 AR50 B62 VSS_B58 VSS_F1 F13 KBL_R_U42_BGA1356
AK68 VSS_AK63 VSS_AR50 AR52 B66 VSS_B62 VSS_F13 F2
VSS_AK68 VSS_AR52 VSS_B66 VSS_F2 @
AK69 AR53 Test_Point_16MIL 1 TP934 B71 F22
AK8 VSS_AK69 VSS_AR53 AR55 Test_Point_16MIL 1 TP927 BA1 VSS_B71 VSS_F22 F23
AL2 VSS_AK8 VSS_AR55 AR58 BA10 VSS_BA1 VSS_F23 F27
AL28 VSS_AL2 VSS_AR58 AR63 BA14 VSS_BA10 VSS_F27 F28
AL32 VSS_AL28 VSS_AR63 AR8 BA18 VSS_BA14 VSS_F28 F32
AL35 VSS_AL32 VSS_AR8 AT2 Test_Point_16MIL 1 TP928 BA2 VSS_BA18 VSS_F32 F33
AL38 VSS_AL35 VSS_AT2 AT20 BA23 VSS_BA2 VSS_F33 F35
AL4 VSS_AL38 VSS_AT20 AT23 BA28 VSS_BA23 VSS_F35 F37
AL45 VSS_AL4 VSS_AT23 AT28 BA32 VSS_BA28 VSS_F37 F38
AL48 VSS_AL45 VSS_AT28 AT35 BA36 VSS_BA32 VSS_F38 F4
AL52 VSS_AL48 VSS_AT35 AT4 F68 VSS_BA36 VSS_F4 F40
AL55 VSS_AL52 VSS_AT4 AT42 BA45 VSS_F68 VSS_F40 F42
AL58 VSS_AL55 VSS_AT42 AT56 VSS_BA45 VSS_F42 BA41
AL64 VSS_AL58 VSS_AT56 AT58 VSS_BA41
VSS_AL64 VSS_AT58
16 OF 20 17 OF 20
KBL_R_U42_BGA1356 KBL_R_U42_BGA1356
@ @

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(15/16) : GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 17 of 104


5 4 3 2 1
5 4 3 2 1

TABLE

CFG0 : Stall Reset Sequence


after PCU PLL Lock until de-asserted
1 : No Stall
0 : Stall
D D

CFG3 : MSR Privacy Bit Feature


1 : MSR (C80h) bit[0] setting
0 : MSR (C80h) bit[0] overridden

CFG4 : eDP Enable


1 : Disabled
0 : Enabled

CFG9 : SVID Bus Communication


1 : Enabled
0 : Disabled

SKL_ULT
U58S

RESERVED SIGNALS-1
C C
E68 BB68
B67 CFG[0] RSVD_TP_BB68 BB69
D65 CFG[1] RSVD_TP_BB69
R527 1 2 0_0201_5%_SM D67 CFG[2] AK13
<19> CFG3 CFG[3] RSVD_TP_AK13
E70 AK12
C68 CFG[4] RSVD_TP_AK12
D68 CFG[5] BB2
C67 CFG[6] RSVD_BB2 BA3
F71 CFG[7] RSVD_BA3 U58T SKL_ULT
G69 CFG[8]
F70 CFG[9] AU5 SPARE
CFG[10] TP5
1
1

1 G68 AT5
@ @ H70 CFG[11] TP6 AW69 F6
R1892 R8965 R1891 G71 CFG[12] AW68 RSVD_AW69 RSVD_F6 E3
1K_0201_5% 1K_0201_5% 1K_0201_5% H69 CFG[13] D5 AU56 RSVD_AW68 RSVD_E3 C11
G70 CFG[14] RSVD_D5 D4 AW48 RSVD_AU56 RSVD_C11 B11
2

CFG[15] RSVD_D4 RSVD_AW48 RSVD_B11


2

B2 C7 A11
E63 RSVD_B2 C2 U12 RSVD_C7 RSVD_A11 D12
F63 CFG[16] RSVD_C2 U11 RSVD_U12 RSVD_D12 C12
CFG[17] B3 H11 RSVD_U11 RSVD_C12 F52
E66 RSVD_B3 A3 RSVD_H11 RSVD_F52
F66 CFG[18] RSVD_A3
CFG[19] AW1 20 OF 20
R8898 1 2 49.9_0201_1% E60 RSVD_AW1
CFG_RCOMP KBL_R_U42_BGA1356
E1
E8 RSVD_E1 E2 @
ITP_PMODE RSVD_E2
AY2 BA4 U42@
AY1 RSVD_AY2 RSVD_BA4 BB4 XTAL24_OUT_U42 R10339 1 2 1M_0201_5% XTAL24_IN_U42
R528 1 2 0_0201_5%_SM RSVD_AY1 RSVD_BB4
<19> ITP_PMODE
D1 A4
D3 RSVD_D1 RSVD_A4 C4
RSVD_D3 RSVD_C4

1
K46 BB5 U42@
K45 RSVD_K46 TP4 R10340
RSVD_K45 A69 0_0201_5% U42@
AL25 RSVD_A69 B69 Y8
RSVD_AL25 RSVD_B69

2
AL27 24MHZ_8PF_8Y24080002
B RSVD_AL27 AY3 R2287 1 2 0_0201_5% B
C71 RSVD_AY3 XTAL24_OUT_U42_R 1 3
B70 RSVD_C71 D71 1 3
RSVD_B70 RSVD_D71 C70 GND1 GND2
RSVD_C70 1 1
F60 U42@ U42@
RSVD_F60 C54 C9498 2 4 C9499
A52 RSVD_C54 D54 6P_0201_25V8-D 6P_0201_25V8-D
RSVD_A52 RSVD_D54 2 2
BA70 AY4 VCCST
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2
J71 AY71 R2288 1 2 0_0201_5%
J68 RSVD_J71 VSS_AY71 AR56
RSVD_J68 ZVM#
F65 AW71
G65 VSS_F65 RSVD_TP_AW71 AW70
VSS_G65 RSVD_TP_AW70
F61 AP56 Y5 CRYSTAL - 24MHZ 8PF +-30PPM
E61 RSVD_F61 MSM# C64 R2289 1 2 100K_0201_5%
RSVD_E61 PROC_SELECT#
Vendor P/N LCFC P/N
19 OF 20
TXC 8Y24080002 SJ10000HI00
KBL_R_U42_BGA1356
@ KDS 1ZZHAE24000CC0D SJ10000P200

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 CPU(16/16) : CFG/RESERVED
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 18 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC1R0_SUS VCC3B VCCSTG VCC1R0_SUS

1
1
@ @
R588 R491 R475 C8320
1.5K_0201_1% 1K_0201_5% 51_0201_5% 0.1U_0201_6.3V6-K
2

2
@
JXDP1
C XDP_TCK0 26 TABLE C
<6> XDP_TCK0 26
25 28
PCH_TCK @ R2494 1 2 0_0201_5% XDP_TCK1 24 25 GND2 27
<6> PCH_TCK XDP_TMS 24 GND1
23 Logic Ref Des Merged DCI 2.0
<6> XDP_TMS XDP_TDI 23
22
<6> XDP_TDI -XDP_TRST 22
21 Page 6 R2 ASM ASM
<6> -XDP_TRST XDP_TDO 21
20
<6> XDP_TDO 20
19 Page 7 R2559 ASM NO_ASM
-XDP_DBR R531 1 20_0201_5%_SM 18 19
<13,17> -XDP_DBR ITP_PMODE 18
17 Page 18 R1892 ASM NO_ASM
<18> ITP_PMODE 17
16
15 16
14 15 JXDP1 ASM NO_ASM
13 14
13 C8320 ASM NO_ASM
12
11 12
11 R475 ASM ASM
-RSMRST @ R594 1 2 1K_0201_5% 10
<13,56> -RSMRST 10
9 R491 ASM ASM
8 9
<18> CFG3
7 8 Page 19
7 R588 ASM NO_ASM
6
5 6
5 R594 ASM NO_ASM
4
3 4
-XDP_PRDY 3 R2494 ASM NO_ASM
2
<10> -XDP_PRDY -XDP_PREQ 2
1
<10> -XDP_PREQ 1
MOLEX_52435-2671

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 XDP CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 19 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3SW VCC3SW

2
D290

2
RB520CM-30T2R_VMN2M2

1
@
R2577
1.5K_0201_1%
RTCVCC

1
2
2
@ C287

2
R2578 1U_0402_6.3V6-K
47K_0201_5% D6 @
RB520CM-30T2R_VMN2M2 1

1
D3
2 1

C RB520CM-30T2R_VMN2M2 C

2
R4
1K_0201_5%

@ JRTC1 1
1 R620
1 2 1 2 -RTCRST
2 -RTCRST <12,17>
3
GND1 4 20K_0201_5%
GND2
2
HIGHS_WS33020-S0351-HF
C459
1U_0402_6.3V6-K
1

R250
1 2 -SRTCRST
-SRTCRST <12>
B 20K_0201_5% B

2
C285
1U_0402_6.3V6-K
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 RTC BATTERY
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 20 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3_SUS

2
D12
RB520CM-30T2R_VMN2M2

1
VCC3_SUS_SPI

1 1
C429 C629
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
2 2
TABLE of SPI ROM (U49)
Vendor P/N LCFC P/N
WINBOND W25Q128JVSIQ SA00008A300
MXIC MX25L12873FM2I-10 SA00005VM00

U49
C 8 1 -SPI_CS0_R 33_0201_5% 1 2 R322 -SPI_CS0 C
VCC /CS -SPI_CS0 <7>
SPI_IO3 R8981 1 2 33_0201_5% SPI_IO3_0_R 7 2 SPI_MISO_IO1_0_R 33_0201_5% 1 2 R694 SPI_MISO_IO1
<7> SPI_IO3 /HOLD/RESET(IO3) DO(IO1) SPI_MISO_IO1 <7,63>
SPI_CLK EMC@ R681 1 2 33_0201_5% SPI_CLK_0_R 6 3 SPI_IO2_0_R 33_0201_5% 1 2 R8980 SPI_IO2
<7,63> SPI_CLK CLK /WP(IO2) SPI_IO2 <7>
SPI_MOSI_IO0 R674 1 2 33_0201_5% SPI_MOSI_IO0_0_R 5 4
<7,63> SPI_MOSI_IO0 DI(IO0) GND

W25Q128JVSIQ_SO8

1 1 1
EMC@ EMC@ EMC@
C575 C576 C577
33P_0201_25V8-J 33P_0201_25V8-J 33P_0201_25V8-J
2 2 2

TABLE

SF100 PIN HEADER INTERFACE (TOP VIEW)

1 VCC D12.1 GND GND 2


3 CS# R322.2 R681.2 CLK 4
5 MISO R694.2 R674.2 MOSI 6
7 (KEY) N/A N/A (RESET) 8

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 SPI FLASH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 21 of 104


5 4 3 2 1
5 4 3 2 1

VCC1R2A
<4> M_A_DQ[63:0]

<4> -M_A_DQS[7:0]

<4> M_A_DQS[7:0]

<4> M_A_A[16:0] 2 2
C9093 C9104
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

D D

VCC2R5A
VCC1R2A VCC1R2A

VCC1R2A VCC1R2A
JDDR1A
JDDR1B
2 2
1 2 C9094 C9105
M_A_DQ5 3 VSS_1 VSS_2 4 M_A_DQ0 M_A_A3 131 132 M_A_A2 47P_0201_25V8-J 100P_0201_50V8-J
5 DQ5 DQ4 6 M_A_A1 133 A3 A2 134 RF@ RF@
M_A_DQ1 7 VSS_3 VSS_4 8 M_A_DQ4 135 A1 EVENT_n/NF 136 1 1
9 DQ1 DQ0 10 M_A_DDRCLK0_1066M 137 VDD_9 VDD_10 138 M_A_DDRCLK1_1066M
-M_A_DQS0 VSS_5 VSS_6 <4> M_A_DDRCLK0_1066M -M_A_DDRCLK0_1066M CK0_t CK1_t/NF -M_A_DDRCLK1_1066M M_A_DDRCLK1_1066M <4>
11 12 139 140
M_A_DQS0 DQS0_C DM0_n/DBl0_n <4> -M_A_DDRCLK0_1066M CK0_c CK1_c/NF -M_A_DDRCLK1_1066M <4>
13 14 141 142
15 DQS0_t VSS_7 16 M_A_DQ6 M_A_PARITY 143 VDD_11 VDD_12 144 M_A_A0
M_A_DQ2 VSS_8 DQ6 <4> M_A_PARITY Parity A0
17 18
19 DQ7 VSS_9 20 M_A_DQ3
M_A_DQ7 21 VSS_10 DQ2 22 M_A_BS1 145 146 M_A_A10
DQ3 VSS_11 M_A_DQ8 <4> M_A_BS1 BA1 A10/AP
23 24 147 148 VCC3B
M_A_DQ9 25 VSS_12 DQ12 26 -M_A_CS0 149 VDD_13 VDD_14 150 M_A_BS0
DQ13 VSS_13 M_A_DQ13 <4> -M_A_CS0 M_A_A14 CS0_n BA0 M_A_A16 M_A_BS0 <4>
27 28 151 152
M_A_DQ12 29 VSS_14 DQ8 30 153 A14/WE_n A16/RAS_n 154
31 DQ9 VSS_15 32 -M_A_DQS1 M_A_ODT0 155 VDD_15 VDD_16 156 M_A_A15
VSS_16 DQS1_c M_A_DQS1 <4> M_A_ODT0 -M_A_CS1 ODT0 A15/CAS_n M_A_A13
33 34 157 158 M_A_VREF_CA
DM1_n/DBl1_n DQS1_t <4> -M_A_CS1 CS1_n A13
35 36 159 160 2 2
M_A_DQ10 37 VSS_17 VSS_18 38 M_A_DQ11 M_A_ODT1 161 VDD_17 VDD_18 162 C9095 C9106
DQ15 DQ14 <4> M_A_ODT1 ODT1 C0/CS2_n/NC
39 40 163 164 47P_0201_25V8-J 100P_0201_50V8-J
M_A_DQ15 41 VSS_19 VSS_20 42 M_A_DQ14 165 VDD_19 VREFCA 166 RF@ RF@
43 DQ10 DQ11 44 167 C1/CS3_n/NC SA2 168 1 1
M_A_DQ16 45 VSS_21 VSS_22 46 M_A_DQ17 M_A_DQ37 169 VSS_53 VSS_54 170 M_A_DQ33
47 DQ21 DQ20 48 171 DQ37 DQ36 172
M_A_DQ20 49 VSS_23 VSS_24 50 M_A_DQ21 M_A_DQ32 173 VSS_55 VSS_56 174 M_A_DQ36
51 DQ17 DQ16 52 175 DQ33 DQ32 176
-M_A_DQS2 53 VSS_25 VSS_26 54 -M_A_DQS4 177 VSS_57 VSS_58 178
M_A_DQS2 55 DQS2_c DM2_n/DBl2_n 56 M_A_DQS4 179 DQS4_c DM4_n/DBl4_n 180
C 57 DQS2_t VSS_27 58 M_A_DQ22 181 DQS4_t VSS_59 182 M_A_DQ35 C
M_A_DQ23 59 VSS_28 DQ22 60 M_A_DQ38 183 VSS_60 DQ39 184
61 DQ23 VSS_29 62 M_A_DQ19 185 DQ38 VSS_61 186 M_A_DQ34
M_A_DQ18 63 VSS_30 DQ18 64 M_A_DQ39 187 VSS_62 DQ35 188
65 DQ19 VSS_31 66 M_A_DQ29 189 DQ34 VSS_63 190 M_A_DQ41
M_A_DQ25 67 VSS_32 DQ28 68 M_A_DQ40 191 VSS_64 DQ45 192
69 DQ29 VSS_33 70 M_A_DQ28 193 DQ44 VSS_65 194 M_A_DQ45
M_A_DQ24 71 VSS_34 DQ24 72 M_A_DQ44 195 VSS_66 DQ41 196
73 DQ25 VSS_35 74 -M_A_DQS3 197 DQ40 VSS_67 198 -M_A_DQS5
75 VSS_36 DQS3_c 76 M_A_DQS3 199 VSS_68 DQS5_c 200 M_A_DQS5
77 DM3_n/DBl3_n DQS3_t 78 201 DM5_n/DBl5_n DQS5_t 202
M_A_DQ30 79 VSS_37 VSS_38 80 M_A_DQ31 M_A_DQ43 203 VSS_69 VSS_70 204 M_A_DQ42
81 DQ30 DQ31 82 205 DQ46 DQ47 206
M_A_DQ26 83 VSS_39 VSS_40 84 M_A_DQ27 M_A_DQ46 207 VSS_71 VSS_72 208 M_A_DQ47
85 DQ26 DQ27 86 209 DQ42 DQ43 210
87 VSS_41 VSS_42 88 M_A_DQ49 211 VSS_73 VSS_74 212 M_A_DQ48
89 CB5/NC CB4/NC 90 213 DQ52 DQ53 214
91 VSS_43 VSS_44 92 M_A_DQ52 215 VSS_75 VSS_76 216 M_A_DQ53
93 CB1/NC CB0/NC 94 217 DQ49 DQ48 218
95 VSS_45 VSS_46 96 -M_A_DQS6 219 VSS_77 VSS_78 220
97 DQS8_c DM8_n/DBl8_n/NC 98 M_A_DQS6 221 DQS6_c DM6_n/DBl6_n 222
99 DQS8_t VSS_47 100 223 DQS6_t VSS_79 224 M_A_DQ54
101 VSS_48 CB6/NC 102 M_A_DQ50 225 VSS_80 DQ54 226
103 CB2/NC VSS_49 104 227 DQS5 VSS_81 228 M_A_DQ51
105 VSS_50 CB7/NC 106 M_A_DQ55 229 VSS_82 DQ50 230
107 CB3/NC VSS_51 108 -DRAMRST 231 DQ51 VSS_83 232 M_A_DQ57
M_A_CKE0 VSS_52 RESET_n M_A_CKE1 -DRAMRST <5,24> M_A_DQ56 VSS_84 DQ60
109 110 233 234
<4> M_A_CKE0 CKE0 CKE1 M_A_CKE1 <4> DQ61 VSS_85 M_A_DQ61

C2703
111 112 235 236
M_A_BG1 113 VDD_1 VDD_2 114 -M_A_ACT M_A_DQ60 237 VSS_86 DQ57 238
<4> M_A_BG1 M_A_BG0 BG1 ACT_n -M_A_ALERT -M_A_ACT <4> DQ56 VSS_87 -M_A_DQS7
115 116 239 240
<4> M_A_BG0 BG0 ALERT_n -M_A_ALERT <4> VSS_88 DQS7_c M_A_DQS7
117 118 2 241 242
M_A_A12 119 VDD_3 VDD_4 120 M_A_A11 @ 243 DM7_n/DBl7_n DQS7_t 244
M_A_A9 121 A12 A11 122 M_A_A7 M_A_DQ59 245 VSS_89 VSS_90 246 M_A_DQ63
123 A9 A7 124 VCC2R5A VCC3B 247 DQ62 DQ63 248 VCC0R6B
M_A_A8 125 VDD_5 VDD_6 126 M_A_A5 1 M_A_DQ58 249 VSS_91 VSS_92 250 M_A_DQ62
M_A_A6 127 A8 A5 128 M_A_A4 251 DQ58 DQ59 252
0.1U_0201_6.3V6-K

129 A6 A4 130 SMB_CLK_3B 253 VSS_93 VSS_94 254 SMB_DATA_3B


VDD_7 VDD_8 <24,59,64> SMB_CLK_3B SCL SDA SMB_DATA_3B <24,59,64>
255 256
257 VDDSPD SA0 258
B 259 VPP_1 VTT 260 B
FOX_AS0A826-H4RB-7H VPP_2 SA1
261 262
@ GND_1 GND_2 SPD ADDRESS: 50H
FOX_AS0A826-H4RB-7H
@

VCC3B M_A_VREF_CA VCC2R5A

VCC1R2A
2

R2583 2 2 2 2 2 2
1K_0201_1% C2660 C2661 C2662 C2663 C2664 C2665
2.2U_0402_6.3V6-K 0.1U_0201_6.3V6-K 2.2U_0402_6.3V6-K 0.1U_0201_6.3V6-K 10U_0402_6.3V6-M 1U_0402_6.3V6-K
M_A_VREF_CA @
1

1 1 1 1 1 1
R2582
1 2
<4> M_A_VREF_CA_CPU
2_0201_1%
2
2

C2659 R2584
A
0.022U_0402_25V7-K 1K_0201_1% A
1
1
2

R2581
24.9_0201_1%
1

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-A (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 22 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC1R2A

2 2 2 2 2 2 2 2
C2671 C2672 C2673 C2674 C2675 C2676 C2677 C2678
1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K
1 1 1 1 1 1 1 1

C C

VCC1R2A

2 2 2 2 2 2 2 2
C2684 C2685 C2686 C2687 C2688 C2689 C2690 C2691
10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M
1 1 1 1 1 1 1 1

VCC0R6B

2 2
C2697 C2698
1U_0402_6.3V6-K 1U_0402_6.3V6-K
1 1

B VCC0R6B B

2 2
C2701 C2702
10U_0402_6.3V6-M 10U_0402_6.3V6-M
1 1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-A (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 23 of 104


5 4 3 2 1
5 4 3 2 1

<5> M_B_DQ[63:0]
VCC1R2A
<5> -M_B_DQS[7:0]

<5> M_B_DQS[7:0]

<5> M_B_A[16:0]
2 2
C9096 C9107
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

D D

VCC2R5A

VCC1R2A VCC1R2A
VCC1R2A VCC1R2A 2 2
JDDR2A C9097 C9108
47P_0201_25V8-J 100P_0201_50V8-J
JDDR2B RF@ RF@
1 2 1 1
M_B_DQ13 3 VSS_1 VSS_2 4 M_B_DQ8
5 DQ5 DQ4 6 M_B_A3 131 132 M_B_A2
M_B_DQ12 7 VSS_3 VSS_4 8 M_B_DQ9 M_B_A1 133 A3 A2 134
9 DQ1 DQ0 10 135 A1 EVENT_n 136
-M_B_DQS1 11 VSS_5 VSS_6 12 M_B_DDRCLK0_1066M 137 VDD_9 VDD_10 138 M_B_DDRCLK1_1066M
M_B_DQS1 DQS0_C DM0_n/DBIO_n <5> M_B_DDRCLK0_1066M -M_B_DDRCLK0_1066M CK0_t CK1_t -M_B_DDRCLK1_1066M M_B_DDRCLK1_1066M <5>
13 14 139 140
DQS0_t VSS_7 M_B_DQ15 <5> -M_B_DDRCLK0_1066M CK0_c CK1_c -M_B_DDRCLK1_1066M <5>
15 16 141 142
M_B_DQ10 17 VSS_8 DQ6 18 M_B_PARITY 143 VDD_11 VDD_12 144 M_B_A0 VCC3B
DQ7 VSS_9 M_B_DQ11 <5> M_B_PARITY Parity A0
19 20
M_B_DQ14 21 VSS_10 DQ2 22
23 DQ3 VSS_11 24 M_B_DQ1 M_B_BS1 145 146 M_B_A10
M_B_DQ4 VSS_12 DQ12 <5> M_B_BS1 BA1 A10/AP
25 26 147 148
27 DQ13 VSS_13 28 M_B_DQ5 -M_B_CS0 149 VDD_13 VDD_14 150 M_B_BS0
M_B_DQ0 VSS_14 DQ8 <5> -M_B_CS0 M_B_A14 CS0_n BA0 M_B_A16 M_B_BS0 <5>
29 30 151 152 2 2
31 DQ9 VSS_15 32 -M_B_DQS0 153 WE_n/A14 RAS_n/A16 154 C9098 C9109
33 VSS_16 DQS1_c 34 M_B_DQS0 M_B_ODT0 155 VDD_15 VDD_16 156 M_B_A15 47P_0201_25V8-J 100P_0201_50V8-J
DM1_n/DBl1_n DQS1_t <5> M_B_ODT0 -M_B_CS1 ODT0 CAS_n/A15 M_B_A13
35 36 157 158 M_B_VREF_CA RF@ RF@
M_B_DQ6 VSS_17 VSS_18 M_B_DQ3 <5> -M_B_CS1 CS1_n A13 1 1
37 38 159 160
39 DQ15 DQ14 40 M_B_ODT1 161 VDD_17 VDD_18 162
M_B_DQ2 VSS_19 VSS_20 M_B_DQ7 <5> M_B_ODT1 ODT1 C0/CS2_n/NC
41 42 163 164
43 DQ10 DQ11 44 165 VDD_19 VREFCA 166
M_B_DQ21 45 VSS_21 VSS_22 46 M_B_DQ20 167 C1/CS3_n/NC RFU 168
C 47 DQ21 DQ20 48 M_B_DQ37 169 VSS_53 VSS_54 170 M_B_DQ36 C
M_B_DQ16 49 VSS_23 VSS_24 50 M_B_DQ17 171 DQ37 DQ36 172
51 DQ17 DQ16 52 M_B_DQ33 173 VSS_55 VSS_56 174 M_B_DQ32
-M_B_DQS2 53 VSS_25 VSS_26 54 175 DQ33 DQ32 176
M_B_DQS2 55 DQS2_c DM2_n/DBl2_n 56 -M_B_DQS4 177 VSS_57 VSS_58 178
57 DQS2_t VSS_27 58 M_B_DQ23 M_B_DQS4 179 DQS4_c DM4_n/DBl4_n 180
M_B_DQ18 59 VSS_28 DQ22 60 181 DQS4_t VSS_59 182 M_B_DQ35
61 DQ23 VSS_29 62 M_B_DQ19 M_B_DQ34 183 VSS_60 DQ39 184
M_B_DQ22 63 VSS_30 DQ18 64 185 DQ38 VSS_61 186 M_B_DQ39
65 DQ19 VSS_31 66 M_B_DQ28 M_B_DQ38 187 VSS_62 DQ35 188
M_B_DQ29 67 VSS_32 DQ28 68 189 DQ34 VSS_63 190 M_B_DQ45
69 DQ29 VSS_33 70 M_B_DQ24 M_B_DQ41 191 VSS_64 DQ45 192
M_B_DQ25 71 VSS_34 DQ24 72 193 DQ44 VSS_65 194 M_B_DQ44
73 DQ25 VSS_35 74 -M_B_DQS3 M_B_DQ40 195 VSS_66 DQ41 196
75 VSS_36 DQS3_c 76 M_B_DQS3 197 DQ40 VSS_67 198 -M_B_DQS5
77 DM3_n/DBl3_n DQS3_t 78 199 VSS_68 DQS5_c 200 M_B_DQS5
M_B_DQ30 79 VSS_37 VSS_38 80 M_B_DQ31 201 DM5_n/DBl5_n DQS5_t 202
81 DQ30 DQ31 82 M_B_DQ43 203 VSS_69 VSS_70 204 M_B_DQ42
M_B_DQ26 83 VSS_39 VSS_40 84 M_B_DQ27 205 DQ46 DQ47 206
85 DQ26 DQ27 86 M_B_DQ47 207 VSS_71 VSS_72 208 M_B_DQ46
87 VSS_41 VSS_42 88 209 DQ42 DQ43 210
89 CB5/NC CB4/NC 90 M_B_DQ53 211 VSS_73 VSS_74 212 M_B_DQ52
91 VSS_43 VSS_44 92 213 DQ52 DQ53 214
93 CB1/NC CB0/NC 94 M_B_DQ48 215 VSS_75 VSS_76 216 M_B_DQ49
95 VSS_45 VSS_46 96 217 DQ49 DQ48 218
97 DQS8_c DBI8_n 98 -M_B_DQS6 219 VSS_77 VSS_78 220
99 DQS8_t VSS_47 100 M_B_DQS6 221 DQS6_c DM6_n/DBl6_n 222
101 VSS_48 CB6/NC 102 223 DQS6_t VSS_79 224 M_B_DQ51
103 CB2/NC VSS_49 104 M_B_DQ50 225 VSS_80 DQ54 226
105 VSS_50 CB7/NC 106 227 DQ55 VSS_81 228 M_B_DQ54
107 CB3/NC VSS_51 108 -DRAMRST M_B_DQ55 229 VSS_82 DQ50 230
M_B_CKE0 VSS_52 RESET_n M_B_CKE1 -DRAMRST <5,22> DQ51 VSS_83 M_B_DQ56
109 110 231 232
<5> M_B_CKE0 CKE0 CKE1 M_B_CKE1 <5> M_B_DQ60 VSS_84 DQ60
111 112 233 234
M_B_BG1 113 VDD_1 VDD_2 114 -M_B_ACT 235 DQ61 VSS_85 236 M_B_DQ57
<5> M_B_BG1 M_B_BG0 BG1 ACT_n -M_B_ALERT -M_B_ACT <5> M_B_DQ61 VSS_86 DQ57
115 116 237 238 VCC3B
<5> M_B_BG0 BG0 ALERT_n -M_B_ALERT <5> DQ56 VSS_87 -M_B_DQS7
117 118 239 240
M_B_A12 119 VDD_3 VDD_4 120 M_B_A11 241 VSS_88 DQS7_c 242 M_B_DQS7
M_B_A9 121 A12 A11 122 M_B_A7 243 DM7_n/DBl7_n DQS7_t 244
A9 A7 VSS_89 VSS_90

2
123 124 M_B_DQ59 245 246 M_B_DQ62
B M_B_A8 125 VDD_5 VDD_6 126 M_B_A5 VCC2R5A VCC3B 247 DQ62 DQ63 248 R2066 VCC0R6B B
M_B_A6 127 A8 A5 128 M_B_A4 M_B_DQ58 249 VSS_91 VSS_92 250 M_B_DQ63 10K_0201_5%
129 A6 A4 130 251 DQ58 DQ59 252
VDD_7 VDD_8 SMB_CLK_3B 253 VSS_93 VSS_94 254 SMB_DATA_3B
<22,59,64> SMB_CLK_3B SCL SDA SMB_DATA_3B <22,59,64>

1
255 256
257 VDDSPD SA0 258
FOX_AS0A826-H4SB-7H 259 VPP_1 Vtt 260
VPP_2 SA1
@
261 262
GND_1 GND_2 SPD ADDRESS: 51H
FOX_AS0A826-H4SB-7H
@

VCC3B M_B_VREF_CA VCC2R5A

VCC1R2A
2

R2069 2 2 2 2 2 2
1K_0201_1% C2117 C2118 C2120 C2121 C2122 C2123
2.2U_0402_6.3V6-K 0.1U_0201_6.3V6-K 2.2U_0402_6.3V6-K 0.1U_0201_6.3V6-K 10U_0402_6.3V6-M 1U_0402_6.3V6-K
M_B_VREF_CA @
1

1 1 1 1 1 1
R2073
1 2
<4> M_B_VREF_CA_CPU
2_0201_1%
2
2

0.022U_0402_25V7-K
A A
C2119 R2070
1K_0201_1%
1
1
2

R2074
24.9_0201_1%
1

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-B (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 24 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC1R2A

2 2 2 2 2 2 2 2
C2124 C2125 C2126 C2127 C2128 C2129 C2130 C2131
1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K
1 1 1 1 1 1 1 1

VCC1R2A

2 2 2 2 2 2 2 2
C2132 C2133 C2134 C2135 C2136 C2137 C2138 C2139
C 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M C

1 1 1 1 1 1 1 1

VCC0R6B

2 2
C2140 C2141
1U_0402_6.3V6-K 1U_0402_6.3V6-K
1 1

VCC0R6B

2 2
C2144 C2145
10U_0402_6.3V6-M 10U_0402_6.3V6-M
B 1 1 B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDR4 SO DIMM CHANNEL-B (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 25 of 104


5 4 3 2 1
5 4 3 2 1

VCC3M VCC3P

5
Q22
TPCF8004_2-3U1S

1
R361
47_0201_5%

2
1

4
D D

2
D63
RB521CM-30T2R_VMN2M
R76

1
100_0201_5%

VCC3P_DRV 2
<66> VCC3P_DRV

1
1
C603 R714
0.1U_0402_25V6-K 47K_0201_5%
2

2 VCC3B

VSYS VBL20

VCC3LCD VCC3P F7
F39 1 2
0.5A_32V_ERBRD0R50X 0.9A

1
3A_32V_ERBRD3R00X 2 2
F3 1 C9102 C9118
VCC3B VCC3LCD 1 2 C724 47P_0201_25V8-J 100P_0201_50V8-J
0.01U_0402_25V7-K RF@ RF@
3A_32V_ERBRD3R00X 1 1
2
2
1 1 1 1 1
RF
RF@ RF@
100K_0201_5%

C315 C311 C308 C9101 C9117


10K_0201_5%

1U_0402_6.3V6-K 0.1U_0201_6.3V6-K 0.01U_0201_6.3V7-K 47P_0201_25V8-J 100P_0201_50V8-J


2 2 2 2 2
C 1 RF@ C
C9887
47P_0402_50V8-J
VBL20
2
1

1.2A For IR_LED


1

VCC3SW VCC3SW VCC3SW VCC3B VCC3M VCC3B


1
R38 2

C9886
R668 2

1 1 1
33P_0402_50V8-J
2
LCD CONNECTOR C307 C310 C313

100K_0201_5%
RF@

0.01U_0402_25V7-K 0.1U_0402_25V6-K 1U_0603_25V6-K 1 1


2 2

2
2

2
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
@ RF@ RF@ F16 F26 F24
JLCD1 C9103 C9119

0.5A_32V_ERBRD0R50X
@ D743 1 2 RB521CM-30T2R_VMN2M 50 54 47P_0201_25V8-J 100P_0201_50V8-J

1A_32V_ERBRD1R00X
0.5A_32V_ERBRD0R50X
<57> TOUCH_EN 50 GND4 2 2 2 2
49 53
-LID_CLOSE D742 1 2 RB521CM-30T2R_VMN2M TOUCH_EN_R 48 49 GND3 52
USBP9- R2078 1 2 0_0201_5%_SM USBP9-_CONN 47 48 GND2 51
<10> USBP9- 47 GND1

1
USBP9+ R2079 1 2 0_0201_5%_SM USBP9+_CONN 46 1 1
<10> USBP9+ 46

C2578

C2579
45
44 45
43 44 JCAM1
42 43 30 41
41 42 29 30 GND11 40
41

1
40 28 29 GND10 39
39 40 27 28 GND9 38
39 27 GND8

R8954
38 26 37
37 38 25 26 GND7 36
36 37 24 25 GND6 35
35 36 23 24 GND5 34
PANEL_BKLT_CTRL 34 35 22 23 GND4 33
<3> PANEL_BKLT_CTRL BACKLIGHT_ON 34 22 GND3
33 21 32
<55> BACKLIGHT_ON 33 21 GND2
32 20 31
31 32 19 20 GND1
30 31 18 19
29 30 -LED_LOGO R102 1 2 3.9K_0402_5% 17 18
29 <55> -LED_LOGO 17
28 16
27 28 15 16
26 27 USBP4-_CONN 14 15
25 26 USBP4+_CONN 13 14
24 25 12 13
23 24 11 12
B B
22 23 10 11
21 22 USBP7-_CONN 9 10
C8289 1 2 0.1U_0201_6.3V6-K EDP_AUXN_CONN 20 21 USBP7+_CONN 8 9
<3> EDP_AUXN EDP_AUXP_CONN 20 8
C8290 1 2 0.1U_0201_6.3V6-K 19 7
<3> EDP_AUXP 19 -INT_MIC_DTCT 7
18 6
EDP_TXP0_CONN 18 <8> -INT_MIC_DTCT MIC_DATA 6
C8299 1 2 0.1U_0201_6.3V6-K 17 EMC@ R513 1 2 33_0402_5% 5
<3> EDP_TXP0 EDP_TXN0_CONN 17 <49> MIC_DATA MIC_CLK 5
C8298 1 2 0.1U_0201_6.3V6-K 16 EMC@ R514 1 2 33_0402_5% 4
<3> EDP_TXN0 16 <49> MIC_CLK 4
15 3
C8296 1 2 0.1U_0201_6.3V6-K EDP_TXP1_CONN 14 15 -LID_CLOSE 2 3
<3> EDP_TXP1 EDP_TXN1_CONN 14 <56> -LID_CLOSE 2
C8295 1 2 0.1U_0201_6.3V6-K 13 1
<3> EDP_TXN1 13 1
12
C9507 1 2 0.1U_0201_6.3V6-K EDP_TXP2_CONN 11 12 I-PEX_20525-030E-02
<3> EDP_TXP2 EDP_TXN2_CONN 11
C9506 1 2 0.1U_0201_6.3V6-K 10 @
<3> EDP_TXN2 10
9
C9504 1 2 0.1U_0201_6.3V6-K EDP_TXP3_CONN 8 9
<3> EDP_TXP3 8 1 1 1
C9505 1 2 0.1U_0201_6.3V6-K EDP_TXN3_CONN 7 EMC_NS@ EMC@ EMC@
<3> EDP_TXN3 7
6 C33 C815 C817
5 6 0.1U_0402_25V6-K 33P_0201_25V8-J 33P_0201_25V8-J
4 5 2 2 2
3 4
<8> EPRIVACY_ON 3
2
1 2
<3> EDP_HPD 1
EMC_NS@ C9472
EMC_NS@ C9473

EMC_NS@ C2610

I-PEX_20455-050E-02
R786 1 20_0402_5%_SM

Power LED Board VCC3M


L10 EMC_NS@
USBP7- 1 2 USBP7-_CONN
<10> USBP7- 1 2
D311 D312

1
1

1 1 1 EMC@ EMC@ USBP7+ 4 3 USBP7+_CONN F31


<10> USBP7+ 4 3 0.5A_32V_ERBRD0R50X
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
1

DLW21SN900HQ2L_4P
SM070003100
2 2 2 -LID_CLOSE USBP7-_CONN USBP7+_CONN
1000P_0201_25V7-K
1000P_0201_25V7-K

1000P_0201_25V7-K

R785 1 20_0402_5%_SM

2
D91 D92 JPWR1
1

1
2

1 EMC@ EMC@ R9119 1 2 0_0402_5%_SM -PWRSWITCH 1


<17,35,64,65> -PWRSWITCH -LED_PWR 1
EMC@ R13 1 2 2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
1

<55> -LED_PWR 2
2

C9127 3
10P_0201_25V8-J L15 EMC_NS@ 680_0402_1% 4 3
2 USBP4- 1 2 USBP4-_CONN 5 4
A <10> USBP4- 1 2 5 A

3
6
6
USBP4+ 4 3 USBP4+_CONN EMC@ 7
<10> USBP4+ 4 3 GND1
2

D93 8
DLW21SN900HQ2L_4P AZ5125-02S.R7G_SOT23-3 GND2
2

SM070003100 HIGHS_FC1AF061-2201H

R9120 1 2 0_0402_5%_SM

1
Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/02 Deciphered Date 2012/06/21 LCD/LID/MIC/CAMERA/PWR SW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 26 of 104


5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 27 of 104
5 4 3 2 1
5 4 3 2 1

VCC3B

@
DDIP2_HPD 1 Test_Point_20MIL TP949
VCC3B USBC_HPD 1 Test_Point_20MIL TP950
2 2 2 2 2 @
C2576 C2543 C2545 C2546 C2544
D D
0.1U_0402_10V6-K 0.1U_0402_10V6-K .01U_0402_25V7-K 0.1U_0402_10V6-K 0.01U_0201_6.3V7-K
1 1 1 1 1

R10590
U147

R2378

R2379
PS8337B_PEQ

R10688
14 8
28 VDD33_1 PEQ
VDD33_2

1
41 5
VDD33_3 IN_HPD DDIP2_HPD <3>

1
56 11 VCC3B
@ VDD33_4 IN_CA_DET
@ C2522 1 2 0.1U_0201_6.3V6-K DDIP2_0P_C 3 40 XBAR_DDIP2_0P
<3> DDIP2_0P DDIP2_0N_C IN_D0p DP_D0p XBAR_DDIP2_0N XBAR_DDIP2_0P <29>
C2523 1 2 0.1U_0201_6.3V6-K 4 39
<3> DDIP2_0N IN_D0n DP_D0n XBAR_DDIP2_0N <29>
10K_0201_5% 2

10K_0201_5% 2

4.7K_0402_5% 2

2
C2524 1 2 0.1U_0201_6.3V6-K DDIP2_1P_C 6 37 XBAR_DDIP2_1P
<3> DDIP2_1P IN_D1p DP_D1p XBAR_DDIP2_1P <29>

2
DDIP2_1N_C XBAR_DDIP2_1N

4.7K_0201_5%
C2525 1 2 0.1U_0201_6.3V6-K 7 36 @
<3> DDIP2_1N DDIP2_2P_C IN_D1n DP_D1n XBAR_DDIP2_2P XBAR_DDIP2_1N <29>
C2526 1 2 0.1U_0201_6.3V6-K 9 34 R10440
<3> DDIP2_2P DDIP2_2N_C IN_D2P DP_D2p XBAR_DDIP2_2N XBAR_DDIP2_2P <29>
C2527 1 2 0.1U_0201_6.3V6-K 10 33 100K_0201_5%
<3> DDIP2_2N DDIP2_3P_C IN_D2n DP_D2n XBAR_DDIP2_3P XBAR_DDIP2_2N <29>
C2528 1 2 0.1U_0201_6.3V6-K 12 31
<3> DDIP2_3P IN_D3p DP_D3p XBAR_DDIP2_3P <29>

1
C2529 1 2 0.1U_0201_6.3V6-K DDIP2_3N_C 13 30 XBAR_DDIP2_3N
<3> DDIP2_3N IN_D3n DP_D3n XBAR_DDIP2_3N <29>
50 55 XBAR_DDIP2_AUXP
<3> DDIP2_CTRLCLK IN_DDC_SCL DP_AUXp_SCL XBAR_DDIP2_AUXN XBAR_DDIP2_AUXP <29>
49 54
<3> DDIP2_CTRLDATA IN_DDC_SDA DP_AUXn_SDA XBAR_DDIP2_AUXN <29>
45 16 HDMI_CLKP
<9> DDI_PRIORITY1 SW/SDA_CTL TMDS_CLKp HDMI_CLKP <37>

2
46 15 HDMI_CLKN
PD TMDS_CLKn HDMI_CLKN <37>
@
DDIP2_AUXP C2530 1 2 0.1U_0201_6.3V6-K DDIP2_AUXP_C 52 19 HDMI_DATA0P R10441
<3> DDIP2_AUXP IN_AUXp TMDS_CH0p HDMI_DATA0P <37>
DDIP2_AUXN C2531 1 2 0.1U_0201_6.3V6-K DDIP2_AUXN_C 51 18 HDMI_DATA0N 100K_0201_5%
<3> DDIP2_AUXN IN_AUXn TMDS_CH0n HDMI_DATA0N <37>
I2C_DATA_PD1 @ 2 22 HDMI_DATA1P
<29,33,57> I2C_DATA_PD TMDS_CH1p HDMI_DATA1P <37>

1
38 21 HDMI_DATA1N
I2C_CTL_EN TMDS_CH1n HDMI_DATA1N <37>
R10686 0_0201_5% 25 HDMI_DATA2P
TMDS_CH2p HDMI_DATA2P <37>
PS8337B_MODE 53 24 HDMI_DATA2N
MODE TMDS_CH2n HDMI_DATA2N <37>
VCC3B 1 48 HDMI_DDC_CLK
CEXT TMDS_SCL HDMI_DDC_CLK <37>
27 47 HDMI_DDC_DATA
REXT TMDS_SDA HDMI_DDC_DATA <37>
R10593
1 2 DDIP2_AUXN_C USBC_HPD 32 20 PS8337B_TMDS_PRE
<29,33> USBC_HPD DP_HPD TMDS_PRE
42
1M_0201_5% DP_CA_DET 23 PS8337B_TMDS_RT
PS8337B_TMDS_DDCBUF 2 TMDS_RT
HDMI_HPD_CONN 17 TMDS_DDCBUF 26
C C
<37> HDMI_HPD_CONN TMDS_HPD GND1 35
I2C_CLK_PD 1 @ 2 PS8337B_DP_CFG0 44 GND2 43
<29,33,57> I2C_CLK_PD PS8337B_DP_CFG1 DP_CFG0/SCL_CTL GND3
29 57
R10687 0_0201_5% DP_CFG1 EPAD

C2587

R2515

1 R10591

1 R10592
HDMI_DDC_DATA
PS8337BQFN56GTR2-A2_QFN56_7X7 HDMI_DDC_CLK

1
1

2 EMC_NS@ EMC_NS@

2.2U_0402_6.3V6-K
2 2

5.6K_0201_1% 2

1M_0201_5% 2

27K_0201_5% 2
C2729 C2730
47P_0201_25V8-J 47P_0201_25V8-J
1 1

TABLE: Automat i c S witc hi ng Mode ( MODE= H, M


)
SW(DDI_PRIORITY1)

L DP Port has higher priority when both ports are plugged DEFAULT
H TMDS Port has higher priority when both ports are pulgged

B B
MODE =
H
:
A
u
t
o
m
a
t
i
c
S
w
i
t
c
h
i
n
g
m
o
d
e
,
H
D
M
I
I
D
D
i
s
a
b
l
e
d

VCC3B
M
:
A
u
t
o
m
a
t
i
c
S
w
i
t
c
h
i
n
g
m
o
d
e
,
H
D
M
I
I
D
E
n
a
b
l
e
d

DEFAULT PS8337B_DP_CFG0
L
:
C
o
n
t
r
o
l
S
w
i
t
c
h
i
n
g
m
o
d
e
,
H
D
M
I
I
D
D
i
s
a
b
l
e
d

R2531 1 2 4.7K_0402_5% R10610 1 2 4.7K_0402_5%

@ @
R2523 1 2 4.7K_0402_5% PS8337B_DP_CFG1 R2524 1 2 4.7K_0402_5%

R2527 1 2 4.7K_0402_5% PS8337B_MODE R2528 1 2 4.7K_0402_5%

R2529 1 2 4.7K_0402_5% PS8337B_TMDS_RT

R146 1 2 4.7K_0402_5% PS8337B_PEQ R147 1 2 4.7K_0402_5%

@
R2561 1 2 4.7K_0402_5% PS8337B_TMDS_PRE R2562 1 2 4.7K_0402_5%

@
R1877 1 @ 2 4.7K_0402_5% PS8337B_TMDS_DDCBUF R1899 1 2 4.7K_0402_5%

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 DDI DEMUX/HDMI LEVEL SHIFTE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 28 of 104


5 4 3 2 1
5 4 3 2 1

VCC3_SUS VCC3_PS8747

VCC3_PS8747
R10349
1 2

0.01_0603_LE_1%

2 2 2 2 2
D C9527 C9526 C9525 C9524 C9523 D
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 2 2 2
1 1 1 1 1 C9528 C9529 C9530
0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K
1 1 1

20
28

17
6
U197
C9508 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_0P_C 9

VDD33_1
VDD33_2
VDD33_3

VDD_DCI
<28> XBAR_DDIP2_0P ML0P
C9509 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_0N_C 10
<28> XBAR_DDIP2_0N ML0N
C9510 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_3P_C 18
<28> XBAR_DDIP2_3P ML3P
C9511 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_3N_C 19
<28> XBAR_DDIP2_3N ML3N
PS8747_SSDE 11 30
SSDE/DCI_DATA RX1P USBC_RX1P <36>
PS8747_CDE 14 31
CDE/DCI_CLK RX1N USBC_RX1N <36>
40
RX2P USBC_RX2P <36>
C9512 1 2 0.1U_0201_6.3V6-K USB3P3_RXP_XBAR_C 5 39
<10> USB3P3_RXP_XBAR SSRXP RX2N USBC_RX2N <36>
C9513 1 2 0.1U_0201_6.3V6-K USB3P3_RXN_XBAR_C 4
<10> USB3P3_RXN_XBAR SSRXN
C9515 1 2 0.1U_0201_6.3V6-K USB3P3_TXP_XBAR_C 8
<10> USB3P3_TXP_XBAR SSTXP
C C9514 1 2 0.1U_0201_6.3V6-K USB3P3_TXN_XBAR_C 7 C
<10> USB3P3_TXN_XBAR SSTXN 33 USBC_TX1P <36>
TX1P 34
TX1N USBC_TX1N <36>
C9516 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_2P_C 15 37 USBC_TX2P <36>
<28> XBAR_DDIP2_2P ML2P TX2P
C9517 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_2N_C 16 36 USBC_TX2N <36>
<28> XBAR_DDIP2_2N ML2N TX2N
C9519 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_1P_C 12
<28> XBAR_DDIP2_1P ML1P
C9518 1 2 0.1U_0201_6.3V6-K XBAR_DDIP2_1N_C 13
<28> XBAR_DDIP2_1N ML1N
R10611 1 20_0201_5%_SM XBAR_DDIP2_AUXP_C 24
<28> XBAR_DDIP2_AUXP AUXP
R10612 1 20_0201_5%_SM XBAR_DDIP2_AUXN_C 25 1
<28> XBAR_DDIP2_AUXN AUXN CEXT 23
CE_DP USBC_DP_MODE <33>
PS8747_I2C_CTL 29 35
I2C_EN CE_USB USBC_USB_MODE <33>
PS8747_DCICFG_ADDR 3 38
DCICFG/ADDR FLIP USBC_POL <33>
27
SBU1 USBC_SBU1 <36>
R10448 1 @ 2 0_0201_5% PS8747_DPEQ_SCL 21 26
<28,33,57> I2C_CLK_PD DPEQ/CSCL SBU2 USBC_SBU2 <36>
R10449 1 @ 2 0_0201_5% PS8747_CEQ_SDA 22 32
<28,33,57> I2C_DATA_PD CEQ/CSDA IN_HPD USBC_HPD <28,33>

EPAD
@ R10446 1 2 0_0201_5% 2
<31,33> I2C_CLK_TBT REXT
@ R10447 1 2 0_0201_5% 2
<31,33> I2C_DATA_TBT
PS8747BQFN40GTR-B1_QFN40_6X4 C9522

41
2

2.2U_0402_6.3V6-K
R10348
4.99K_0201_1% 1
1

B VCC3_SUS B
VCC3_SUS

R10613 1 2 100K_0201_1% XBAR_DDIP2_AUXN_C

R10363 1 2 4.7K_0402_5% PS8747_DPEQ_SCL R10362 1 @ 2 4.7K_0402_5%


R10614 1 2 100K_0201_1% XBAR_DDIP2_AUXP_C

@
R10354 1 2 4.7K_0402_5% PS8747_CEQ_SDA R10353 1 @ 2 4.7K_0402_5%

R10356 1 @ 2 4.7K_0402_5% PS8747_I2C_CTL R10359 1 2 4.7K_0402_5%

@
R10355 1 2 4.7K_0402_5% PS8747_DCICFG_ADDR R10442 1 @ 2 4.7K_0402_5%

@
R10357 1 2 4.7K_0402_5% PS8747_SSDE

@
R10364 1 2 4.7K_0402_5% PS8747_CDE

@
R10443 1 2 20K_0201_5% USBC_USB_MODE
A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date USB TYPE-C SWITCH

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 29 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 30 of 104
5 4 3 2 1
5 4 3 2 1

VCC3_SUS

2
R10223
10K_0201_5%

1
U186A
C9364 1 2 0.22U_0201_6.3V6-K PCIE8_L0_TXP_C Y23 V23 PCIE8_L0_RXP_C C312 1 2 0.22U_0201_6.3V6-K
<10> PCIE8_L0_TXP PCIE_RX0_P PCIE_TX0_P PCIE8_L0_RXP <10>
C9365 1 2 0.22U_0201_6.3V6-K PCIE8_L0_TXN_C Y22 V22 PCIE8_L0_RXN_C C9361 1 2 0.22U_0201_6.3V6-K
<10> PCIE8_L0_TXN PCIE_RX0_N PCIE_TX0_N PCIE8_L0_RXN <10>
C9366 1 2 0.22U_0201_6.3V6-K PCIE8_L1_TXP_C T23 P23 PCIE8_L1_RXP_C C9362 1 2 0.22U_0201_6.3V6-K PCIE8_L1_RXP <10>

PCIe GEN3
<10> PCIE8_L1_TXP PCIE8_L1_TXN_C PCIE_RX1_P PCIE_TX1_P PCIE8_L1_RXN_C
C9363 1 2 0.22U_0201_6.3V6-K T22 P22 C9360 1 2 0.22U_0201_6.3V6-K
<10> PCIE8_L1_TXN PCIE_RX1_N PCIE_TX1_N PCIE8_L1_RXN <10>
M23 K23
M22 NC_M23 NC_K23 K22
D D
NC_M22 NC_K22
H23 F23
H22 NC_H23 NC_F23 F22 R10652 1 2 0_0402_5%
NC_H22 NC_F22 -TBT_PERST <9>
V19 L4 -TBT_PERST_R D773 2 1 RB521CM-30T2R_VMN2M
<12> PCIE8_CLK_100M PCIE_REFCLK_100_IN_P PERST_N -PLTRST_NEAR <13>
T19
<12> -PCIE8_CLK_100M PCIE_REFCLK_100_IN_N PCIE_RBIAS
R10175 1 20_0201_5%_SM AC5 N16 R190 1 2 3.01K_0402_1%
<12> -CLKREQ_PCIE8 PCIE_CLKREQ_N PCIE_RBIAS
C9369 1 2 0.1U_0201_6.3V6-K DDIP1_0P_C AB7 R2
<3> DDIP1_0P DDIP1_0N_C DPSNK0_ML0_P NC_R2
C9370 1 2 0.1U_0201_6.3V6-K AC7 R1
<3> DDIP1_0N DPSNK0_ML0_N NC_R1
C9371 1 2 0.1U_0201_6.3V6-K DDIP1_1P_C AB9 N2
<3> DDIP1_1P DDIP1_1N_C DPSNK0_ML1_P NC_N2
C9372 1 2 0.1U_0201_6.3V6-K AC9 N1
<3> DDIP1_1N DPSNK0_ML1_N NC_N1
C9373 1 2 0.1U_0201_6.3V6-K DDIP1_2P_C AB11 L2
<3> DDIP1_2P DDIP1_2N_C DPSNK0_ML2_P NC_L2
C9374 1 2 0.1U_0201_6.3V6-K AC11 L1
<3> DDIP1_2N DPSNK0_ML2_N NC_L1

SOURCE PORT 0
C9375 1 2 0.1U_0201_6.3V6-K DDIP1_3P_C AB13 J2
<3> DDIP1_3P DPSNK0_ML3_P NC_J2

SINK PORT 0
C9376 1 2 0.1U_0201_6.3V6-K DDIP1_3N_C AC13 J1
<3> DDIP1_3N DPSNK0_ML3_N NC_J1
C9377 1 2 0.1U_0201_6.3V6-K DDIP1_AUXP_C Y11 W19
<3> DDIP1_AUXP DDIP1_AUXN_C DPSNK0_AUX_P NC_W19
C9378 1 2 0.1U_0201_6.3V6-K W11 Y19
<3> DDIP1_AUXN DPSNK0_AUX_N NC_Y19
AA2 G1
<3> DDIP1_HPD DPSNK0_HPD NC_G1
Y5 N6
TP920 Test_Point_20MIL 1 R4 NC_Y5 NC_N6
NC_R4 U1 I2C_DATA_TBT
GPIO_0 I2C_DATA_TBT <29,33>
AB15 U2 I2C_CLK_TBT
NC_AB15 GPIO_1 -TBT_EE_WP I2C_CLK_TBT <29,33>
AC15 V1

LC GPIO
NC_AC15 GPIO_2 V2 TBT_TMU_CLK_OUT R10654 1 2 0_0201_5%
GPIO_3 -PCIE_WAKE_R -TBT_PCIE_WAKE <9>
AB17 W1 R10653 1 @ 2 0_0201_5%
NC_AB17 GPIO_4 -TBT_PLUG_EVENT -PCIE_WAKE <13,45,65>
AC17 W2

SINK PORT 1
NC_AC17 GPIO_5 DPSRC_CTRLDATA -TBT_PLUG_EVENT <6>
Y1
AB19 GPIO_6 Y2 DPSRC_CTRLCLK
AC19 NC_AB19 GPIO_7 AA1 TBT_SRC0_CFG1
NC_AC19 GPIO_8 J4 -TBT_I2C_INT
POC_GPIO_0 AR_POC_GPIO1 -TBT_I2C_INT <33>
AB21 E2

POC GPIO
C AC21 NC_AB21 POC_GPIO_1 D4 TBT_RTD3_USB_PWR_EN R10650 1 2 0_0201_5% C
NC_AC21 POC_GPIO_2 TBT_FORCE_PWR TBT_FORCE_USB_PWR <9>
H4
POC_GPIO_3 -BATLOW_TBT TBT_FORCE_PWR <8>
Y12 F2 D715 1 2 RB521CM-30T2R_VMN2M
NC_Y12 POC_GPIO_4 -PCH_SLP_S3_TBT -BATLOW <13,57>
W12 D2 D716 1 2 RB521CM-30T2R_VMN2M
NC_W12 POC_GPIO_5 TBT_RTD3_CIO_PWR_EN R10649 1 -PCH_SLP_S3 <13,17,56,65,89>
F1 2 0_0201_5%
POC_GPIO_6 TBT_RTD3_PWR_EN <9>
Y6
RSV_Y6 E1 R10152 1 2 100_0201_5%
Y8 TEST_EN

Misc
N4 NC_Y8 AB5 R10153 1 2 100_0201_5%
VCC3_TBT_LC NC_N4 TEST_PWR_GOOD
R201 1 2 14K_0402_1% DPSINK_RBIAS Y18 F4 -TBT_RESET_R RB521CM-30T2R_VMN2M2 1 D774
DPSNK_RBIAS RESET_N -TBT_RESET_EC <57>
RB521CM-30T2R_VMN2M2 1 D775
TBT_XTAL_25_IN -TBT_RESET_PD <33>
R10154 1 2 10K_0402_5% Y4 D22
R10155 1 2 10K_0402_5% V4 TDI XTAL_25_IN D23 TBT_XTAL_25_OUT
R10156 1 2 10K_0402_5% T4 TMS XTAL_25_OUT
R10157 1 2 10K_0402_5% W4 TCK AB3 TBT_EE_DI
TDO MISC EE_DI TBT_EE_DI <33>
AC4 TBT_EE_DO
EE_DO -TBT_EE_CS TBT_EE_DO <33>
R10158 1 2 4.75K_0402_0.5% H6 AC3
RBIAS EE_CS_N TBT_EE_CLK -TBT_EE_CS <33>
J6 AB4
RSENSE EE_CLK TBT_EE_CLK <33>
A15 B7
<35> TBT_RX2P PA_RX1_P PB_RX0_P
B15 A7
<35> TBT_RX2N PA_RX1_N PB_RX0_N
A17 A9 VCC3_LDO_TBT
<35> TBT_TX2P PA_TX1_P PB_TX0_P
B17 B9
<35> TBT_TX2N PA_TX1_N PB_TX0_N
A19 A11
<35> TBT_TX1P PA_TX0_P NC_A11
B19 B11
<35> TBT_TX1N PA_TX0_N NC_B11

2
B21 A13 D714

Port A

PORT B
<35> TBT_RX1P PA_RX0_P NC_A13
A21 B13 RB520CM-30T2R_VMN2M2
<35> TBT_RX1N PA_RX0_N NC_B13

1
Y15 Y16 VCC3_LDO_TBT_SPI
<34> TBT_AUXP PA_DPSRC_AUX_P NC_Y16
W15 W16

TBT PORTS
<34> TBT_AUXN PA_DPSRC_AUX_N NC_W16

1 R10149

1 R10150
1 R10148

R10151
<35> TBT_USB2P E20 E19
D20 PA_USB2_D_P NC_E19 D19

0.1U_0201_6.3V6-K
<35> TBT_USB2N PA_USB2_D_N NC_D19

C9468
1
A5 B4
<34> TBT_LSTX PA_LSTX NC_B4

1
B A4 B5 B

POC
<34> TBT_LSRX PA_LSRX NC_B5
M4 G2
<33> TBT_HPD PA_DPSRC_HPD NC_G2 2
POC
100K_0201_5%

R10159 1 2 499_0201_1% H19 F19


PA_USB2_RBIAS NC_F19

3.3K_0201_5% 2

3.3K_0201_5% 2
3.3K_0201_5% 2
1M_0201_5%

1M_0201_5%

3.3K_0201_5% 2
AC23 D6
AB23 THERMDA_1 MONDC_SVR
THERMDA_2

8
A23 U15
V18 ATEST_P B23

VCC
PCIE_ATEST ATEST_N
VCC3M VCC3_LDO_TBT AC1 E18
TEST_EDM USB2_ATEST
2

-TBT_EE_CS 1 5 TBT_EE_DI
L15 W13 /CS DI(IO0)
N15 FUSE_VQPS MONDC_DPSNK_0
NC_N15
1

DEBUG
1

@ W18 TBT_EE_DO 2 6 TBT_EE_CLK


R10671 R10670 C23 NC_W18 DO(IO1) CLK
MONDC_CIO_0
R10162 1

R10161 1

R10160 1

0_0201_5% 0_0201_5% C22 AB2


NC_C22 NC_AB2 3 7
/WP(IO2) /HOLD(IO3)
2

I2C_DATA_TBT R10168 1 2 2.2K_0201_5%

GND
JHL6240_BGA337
I2C_CLK_TBT R10167 1 2 2.2K_0201_5%
W25Q80JVSSIQ_SO8

4
R187 1 2 0_0402_5% TBT_XTAL_25_OUT

VCC3_SUS TBT_XTAL_25_IN
DPSRC_CTRLDATA R10224 1 2 100K_0201_5% Y3 25MHZ_18PF_8Y25000004
Vendor P/N LCFC P/N
-TBT_PERST_R R10681 1 2 10K_0201_5% DPSRC_CTRLCLK R10225 1 2 100K_0201_5% 1 3
1 3
GND1 GND2 W25Q80DVSSIG SA000078K00
AR_POC_GPIO1 R10163 1 2 10K_0201_5% TBT_TMU_CLK_OUT R10174 1 2 100K_0201_5%
2 4
MX25L8006EM2I-12G SA000086B00
TBT_RTD3_CIO_PWR_EN R10169 1 2 10K_0201_5% TBT_FORCE_PWR R10173 1 2 10K_0402_5% 1 1
TBT_RTD3_USB_PWR_EN R10651 1 @ 2 10K_0201_5%
A A
TBT_RTD3_USB_PWR_EN R10172 1 2 10K_0201_5% C327 C329
-TBT_PLUG_EVENT R10165 1 2 10K_0201_5% 27P_0402_50V8-J 27P_0402_50V8-J
-BATLOW_TBT R10171 1 2 10K_0201_5% 2 2
-TBT_RESET_R R10657 1 2 10K_0201_5%
-PCH_SLP_S3_TBT R10170 1 2 10K_0201_5%
-TBT_PCIE_WAKE R10669 1 2 10K_0201_5%
-TBT_EE_WP R10445 1 2 10K_0201_5%
TBT_SRC0_CFG1 R10166 1 2 1M_0201_5%
TBT_RTD3_CIO_PWR_EN R10607 1 @ 2 10K_0201_5%

Y3 CRYSTAL 25MHZ 18PF 30PPM Security Classification LC Future Center Secret Data Title
Vendor P/N LCFC P/N Issued Date 2015/11/02 Deciphered Date 2015/08/10 ALPINE RIDGE (1/2)
TXC 8Y25000004 SJ10000H00J THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
KDS 1ZZHAE25000CC0F SJ10000P300 DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 31 of 104


5 4 3 2 1
5 4 3 2 1

IN from outside of Alpine Ridge

VCC3_TBT_LC

MAX MAX
VCC3_TBT_S0 VCC3_SUS
0.1A 0.9A
Internal Use (TBD) (TBD)
L51 OUT
1 2
D
VCC3_SUS D
1UH_PCFE20161T-1R0MDR_2.1A_20% VCC0R9_TBT_CIO VCC0R9_TBT_USB VCC0R9_TBT_PCIE VCC0R9_TBT_DP VCC3_SUS VCC3_TBT_S0 VCC0R9_TBT_SVR

47U_0603_6.3V6-M

1U_0402_6.3V6-K

0.1U_0402_16V7-K

1U_0402_6.3V6-K
C368

C9355

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
10U_0402_6.3V6-M
1 1 1 1 IN

C370

C372

C373
C371
C366

C367
2 2 2 2

VCC0R9_TBT_DP

R13
R6

H9
F8
U186B
L8 A2

VCC3P3_LC

VCC3P3_SX

VCC3P3_S0

VCC3P3A
VCC0P9_DP_1 VCC3P3_SVR_1
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
L11 A3
L12 NC_L11 VCC3P3_SVR_2 B3 VCC 0.9V from SVR (Step Voltage Regulator)
M8 NC_L12 VCC3P3_SVR_3
VCC0P9_DP_2

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
C356

C357

C358

C359

C361
C355

C360
T11
T12 VCC0P9_DP_3 L9
L6 VCC0P9_DP_4 VCC0P9_SVR_1 M9
NC_L6 VCC0P9_SVR_2

C9353

C9354

C385

C386

C387
C383

C384
M6 E12
V11 NC_M6 VCC0P9_SVR_ANA_1 E13
V12 VCC0P9_ANA_DPSNK_1 VCC0P9_SVR_ANA_2 F11
V13 VCC0P9_ANA_DPSNK_2 VCC0P9_SVR_ANA_3 F12
VCC0P9_ANA_DPSNK_3 VCC0P9_SVR_ANA_4 VCC0R9_TBT_SVR
F13
M13 VCC0P9_SVR_ANA_5 F15
M15 VCC0P9_PCIE_1 VCC0P9_SVR_ANA_6 J9
VCC0R9_TBT_USB M16 VCC0P9_PCIE_2 VCC0P9_SVR_SENSE
L19 VCC0P9_PCIE_3
N19 NC_L19 C1 TBT_SVR_IND 1 2 L6 OUT
VCC0P9_ANA_PCIE_1 SVR_IND_1

47U_0603_6.3V6-M

47U_0603_6.3V6-M

47U_0603_6.3V6-M
L18 C2
VCC0P9_ANA_PCIE_2_1 SVR_IND_2
1U_0402_6.3V6-K

1U_0402_6.3V6-K

M18 D1 0.6UH_CMME051B-R60MS_7A_20%
N18 VCC0P9_ANA_PCIE_2_2 SVR_IND_3
VCC0P9_ANA_PCIE_2_3 1 1 1

C389

C390

C391
XFL4012-601MEC
C374

C377

R15 A1

VCC
R16 VCC0P9_USB_1 SVR_VSS_1 B1
C VCC0P9_USB_2 SVR_VSS_2 B2 2 2 2 C
R8 SVR_VSS_3
R9 VCC0P9_CIO_1
R11 VCC0P9_CIO_2
R12 VCC0P9_CIO_3 F18 VCC0R9_TBT_LVR
VCC0P9_CIO_4 VCC0P9_LVR_1 H18
VCC0R9_TBT_PCIE VCC3_TBT_ANA_PCIE L16 VCC0P9_LVR_2 J11 VCC 0.9V from LVR (Linear Voltage Regulator)
VCC3_TBT_ANA_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR_3 H11 Internal Use
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE

1U_0402_6.3V6-K

1U_0402_6.3V6-K
A6 V5
VSS_ANA_1 VSS_ANA_81

1
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

10K_0201_5%

10U_0402_6.3V6-M

10U_0402_6.3V6-M
A8 V6

1U_0402_6.3V6-K

1U_0402_6.3V6-K
VSS_ANA_2 VSS_ANA_82

R10677
A10 V8 1 1
VSS_ANA_3 VSS_ANA_83

C399

C400

C401

C403
C402

C404
A12 V9
VSS_ANA_4 VSS_ANA_84
C392

C393

C394

C395

A14 V15
A16 VSS_ANA_5 VSS_ANA_85 V16

2
A18 VSS_ANA_6 VSS_ANA_86 V20 2 2
A20 VSS_ANA_7 VSS_ANA_87 W5
A22 VSS_ANA_8 VSS_ANA_88 W6
B6 VSS_ANA_9 VSS_ANA_89 W8
B8 VSS_ANA_10 VSS_ANA_90 W9
B10 VSS_ANA_11 VSS_ANA_91 W20
B12 VSS_ANA_12 VSS_ANA_92 W22
VCC0R9_TBT_CIO B14 VSS_ANA_13 VSS_ANA_93 W23
B16 VSS_ANA_14 VSS_ANA_94 Y9
B18 VSS_ANA_15 VSS_ANA_95 Y13
B20 VSS_ANA_16 VSS_ANA_96 Y20
VSS_ANA_17 VSS_ANA_97
1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

B22 AA22
D8 VSS_ANA_18 VSS_ANA_98 AA23
D9 VSS_ANA_19 VSS_ANA_99 AB6
VSS_ANA_20 VSS_ANA_100
C405

C407
C406

D11 AB8
D12 VSS_ANA_21 VSS_ANA_101 AB10
D13 VSS_ANA_22 VSS_ANA_102 AB12
D15 VSS_ANA_23 VSS_ANA_103 AB14
D16 VSS_ANA_24 VSS_ANA_104 AB16
D18 VSS_ANA_25 VSS_ANA_105 AB18
E8 VSS_ANA_26 VSS_ANA_106 AB20

GND
E9 VSS_ANA_27 VSS_ANA_107 AB22
E11 VSS_ANA_28 VSS_ANA_108 AC6
E15 VSS_ANA_29 VSS_ANA_109 AC8
B E16 VSS_ANA_30 VSS_ANA_110 AC10 B
E22 VSS_ANA_31 VSS_ANA_111 AC12
E23 VSS_ANA_32 VSS_ANA_112 AC14
F9 VSS_ANA_33 VSS_ANA_113 AC16
F16 VSS_ANA_34 VSS_ANA_114 AC18
F20 VSS_ANA_35 VSS_ANA_115 AC20
G22 VSS_ANA_36 VSS_ANA_116 AC22
G23 VSS_ANA_37 VSS_ANA_117 D5
H1 VSS_ANA_38 VSS_1 E4
H2 VSS_ANA_39 VSS_2 E5
H12 VSS_ANA_40 VSS_3 E6
H13 VSS_ANA_41 VSS_4 F5
H15 VSS_ANA_42 VSS_5 F6
H16 VSS_ANA_43 VSS_6 H5
H20 VSS_ANA_44 VSS_7 H8
J5 VSS_ANA_45 VSS_8 J8
J18 VSS_ANA_46 VSS_9 J12
J19 VSS_ANA_47 VSS_10 J13
J20 VSS_ANA_48 VSS_11 J15
J22 VSS_ANA_49 VSS_12 L13
J23 VSS_ANA_50 VSS_13 M11
K1 VSS_ANA_51 VSS_14 M12
K2 VSS_ANA_52 VSS_15 N8
L5 VSS_ANA_53 VSS_16 N9
L20 VSS_ANA_54 VSS_17 N11
L22 VSS_ANA_55 VSS_18 N12
L23 VSS_ANA_56 VSS_19 N13
M1 VSS_ANA_57 VSS_20 T6
M2 VSS_ANA_58 VSS_21 T8
M5 VSS_ANA_59 VSS_22 T9
M19 VSS_ANA_60 VSS_23 T13
VSS_ANA_61 VSS_24
VSS_ANA_67
VSS_ANA_68
VSS_ANA_69
VSS_ANA_70
VSS_ANA_71
VSS_ANA_72
VSS_ANA_73
VSS_ANA_74
VSS_ANA_75
VSS_ANA_76
VSS_ANA_77
VSS_ANA_78
VSS_ANA_79
VSS_ANA_80
M20 T15
N5 VSS_ANA_62 VSS_25 T16
N20 VSS_ANA_63 VSS_26 T18
N22 VSS_ANA_64 VSS_27 AB1
N23 VSS_ANA_65 VSS_28 AC2
VSS_ANA_66 VSS_29
JHL6240_BGA337
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 ALPINE RIDGE (2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 32 of 104


5 4 3 2 1
5 4 3 2 1

VCC3_LDO_TBT

VCC3M VCC3_LDO_TBT VCC5M VCC3M VCC3_LDO_TBT_R TBT_VBUS20 TBT_VBUS20 USBC_VBUS20 R10429 1 2 100K_0201_1% ADCIN2 R10427 1 2 10K_0201_1%

I2C Addressing

NSR20F30NXT5G_DSN2-2

NSR20F30NXT5G_DSN2-2
10U_0402_6.3V6-M
USBC_VBUS20
I2C1(to EC)

1
@

4.7U_0402_6.3V6-M
2

1U_0402_25V6-K

1U_0402_25V6-K
C9549
R10675 R10674 2 2 2 -TBT Port : 0x23

1
0_0201_5% 0_0201_5%

C9551
-USBC Port : 0x27

D752

C9553

D753

C9554
D 1 I3C2(to AR) D

2
1 1 1 -TBT Port : 0x38

2
-USC Port : 0x3f
TABLE I2C Address Selection

2
DIV = R2 / (R1+R2) I2C Unique Address [3:1]
R10427

10

30

11
12
9

1
2

3
4
U207 DIV_Min DIV_Max I2C_ADDR_DECODE_C1 I2C_ADDR_DECODE_C2

2
PLACE NEAR U207 Pin11.12 PLACE NEAR U207 Pin3,4

PP_HV1_1
PP_HV1_2

PP_HV2_1
PP_HV2_2

VIN_3V3

LDO_3V3

LDO_1V8

VBUS1_1
VBUS1_2

VBUS2_1
VBUS2_2
R10431 R10430
10K_0201_1% 10K_0201_1% VCC5M NA 0.00 0.18 000b 100b
191K 0.20 0.38 001b 101b

1
EMC@ 100K 0.40 0.58 010b 110b
R10628 10K 0.60 1.00 011b 111b
1 2 0_0201_5% 33
<31> TBT_EE_CLK SPI_CLK/GPIO10
31
<31> TBT_EE_DO SPI_MISO/GPIO8
32 6 ADCIN1
<31> TBT_EE_DI SPI_MOSI/GPIO9 ADCIN1
34
<31> -TBT_EE_CS SPI_SS#/GPIO11 20 VCC3_LDO_TBT
PP1_CABLE

1 R10682 2 1M_0201_5% 45
PD CONTROLLER C1_CC1
19
21
TBT_CC1
TBT_CC2
<35>
<35>
R10428 1 2 100K_0201_1% ADCIN1 R10426 1 2 10K_0201_1%
1 R10683 2 1M_0201_5% 46 C1_USB_P/GPIO18 C1_CC2
C1_USB_N/GPIO19 25
HPD1/GPIO3 TBT_HPD <31> BUSPOWER Config.
24
<56> -PD_I2C_INT I2C1_IRQ# 43 BP_NoWait
PP_EXT1/GPIO16 TBT_HV_GATE <67> TABLE BUS POWER Configuration
C 23 C
<28,29,57> I2C_DATA_PD I2C1_SDA
22 Configuration
<28,29,57> I2C_CLK_PD I2C1_SCL
DIV=R2/ (R1+R2)
1
EMC_NS@ DIV MIN DIV MAX
C9878
22P_0201_25V8-J 0.00 0.18 BP_NoRespones
2 39
HRESET 0.20 0.38 BP_WaitFor3V3_Internal
0.40 0.58 BP_WaitFor3V3_External
0.60 1.00 BP_NoWait
8 ADCIN2
ADCIN2
1 R10684 2 1M_0201_5% 47 41
1 R10685 2 1M_0201_5% 48 C2_USB_P/GPIO20 PP2_CABLE
C2_USB_N/GPIO21
29 40 USBC_CC1 <36>
<31> -TBT_I2C_INT I2C2_IRQ# C2_CC1 42 USBC_CC2 <36>
28 C2_CC2
<29,31>
<29,31>
I2C_DATA_TBT
I2C_CLK_TBT
27 I2C2_SDA
I2C2_SCL SN1701012RJTR HPD2/GPIO4
26
USBC_HPD <28,29>
44
PP_EXT2/GPIO17 USBC_HV_GATE <67>

15
<35> TBT_DISCHARGE GPIO2
14 38
GPIO1 GPIO15/PWM2 USBC_USB_MODE <29>
R10656 1 2 0_0402_5% 13 37
<31> -TBT_RESET_PD GPIO0 GPIO14/PWM1 USBC_POL <29>
B B
16 Workaround for PD burn-out issue
<34> TBT_DP_MODE GPIO5

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K

220P_0201_25V7-K
17 49
<34> TBT_POL GPIO6 NC1

EMC@ C9559

EMC@ C9560

EMC@ C9557

EMC@ C9558
18 50 2 2 2 2 VCC3_LDO_TBT_R VCC3_LDO_TBT
<34> TBT_TBT_MODE GPIO7 NC2
R10647
35
<36> USBC_DISCHARGE GPIO12 1 2
1 1 1 1

10U_0402_6.3V6-M
36
<29> USBC_DP_MODE GPIO13 51
GND 0_0603_5%
AP1

AP2

AP3

AP4
1

1
1M_0201_5%

1M_0201_5%

1M_0201_5%

2
R10425

R10655

R10424

SN1701012RJTR_QFN48_6X6 @ U234
A1

A2

A3

A4

6 1 1
2

C9890
1 TP937 Test_Point_20MIL
5 2
1
TP952 Test_Point_20MIL
Vendor P/N LCFC P/N 4 3
VCC5M
PTPS65988CERJTR SA00008SY00
PLACE NEAR U207 Pin9 PLACE NEAR U207 Pin1 PLACE NEAR U207 Pin20 PLACE NEAR U207 Pin41 FDG316P_SC70-6
SN1701012RJTR SA00008TC00
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M
22U_0603_6.3V6-M

2 2 2 2 2 2 2 2
A A
C9618
C9613

C9612

C9611

C9616

C9615

C9617
C9614

1 1 1 1 1 1 1 1

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date USB PD CONTROLLER(1/2)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 33 of 104
5 4 3 2 1
5 4 3 2 1

D D

VCC3_LDO_TBT

VCC3M

100K_0201_5%

2
R10458
2 2
C9627 C9628

1
0.1U_0201_6.3V6-K 1U_0201_6.3V6-K
1 1 U198
TS3DS10224RUKR_WQFN20_3X3

13 18 C9665 1 2 0.1U_0603_6.3V7-K
VCC OUTA0+ TBT_AUXP <31>
17 C9666 1 2 0.1U_0603_6.3V7-K
OUTA0- TBT_AUXN <31>
16
<33> TBT_DP_MODE ENA 20
1 OUTA1+ 19
<35> TBT_SBU1 INA+ OUTA1-
2
C <35> TBT_SBU2 INA- C
15
SAO TBT_POL <33>
R10367 1 2 0_0201_5%_SM 14
VCC3M SAI MUX 8
TBT_LSTX <31>
10 OUTB0+ 9
<33> TBT_TBT_MODE ENB OUTB0- TBT_LSRX <31>
3 6
4 INB+ OUTB1+ 7
INB- OUTB1-

100K_0201_5%
E-PAD

2
R10366 1 2 0_0201_5% 12 11

GND
SBI SBO

R10459
5

21

1
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date USB PD CONNTROLLER (2/2)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 34 of 104
5 4 3 2 1
5 4 3 2 1

VCC3_LDO_TBT VCC3M

0.1U_0402_10V6-K
1

C9888
R10664 VCC3M
0_0201_5%_SM

2
2
R10421

1
U202 TBT_VBUS20_CONN 10K_0201_5% TBT_VBUS20 2 2
TBT_VBUS20_CONN R10608
10 C9629 C9630 10K_0201_5%
VPWR

1
U201 0.1U_0201_6.3V6-K 1U_0201_6.3V6-K U205
TBT_SBU1 15 1 TBT_SBU1_CONN 1 1
<34> TBT_SBU1 SBU1 C_SBU1

2
TBT_SBU2 TBT_SBU2_CONN

1U_0402_25V6-K

1U_0402_25V6-K
14 2 VCC3_LDO_TBT B3 A2 8 7

0.47U_0402_25V6-K

0.47U_0402_25V6-K
<34> TBT_SBU2 SBU2 C_SBU2 IN1 OUT1 VCC NC
2 2 2 2 C2 A3
TBT_CC1 TBT_CC1_CONN IN2 OUT2

C9442

C9441

C9440

C9439
<33> TBT_CC1 12 4 C3 B2
CC1 C_CC1 IN3 OUT3

1
TBT_CC2 11 5 TBT_CC2_CONN TBT_USB2P_CONN 2 3
<33> TBT_CC2 CC2 C_CC2 HSD+ D+ TBT_USB2P <31>
D R10423 A1 B1 D
20 7 1 @1 @1 1 R10422 EN# ACOK# TBT_USB2N_CONN 6 5
D1 RPD_G1 100K_0201_5% 2 1 HSD- D- TBT_USB2N <31>
19 C9541 1 2 C1 C9542

GND_1
GND_2
GND_3
17 D2 6 0.1U_0402_25V6-K OVLO 1U_0603_25V6-K
D3 RPD_G2

2
16 1M_0201_5% -TBT_USB2_BUS_EN 1 4
D4 <57> -TBT_USB2_BUS_EN OE# GND

2
9 -FLT_REPORT 1 2
C9544 1 2 3 FLT R10420 FPF2281BUCX-F130_WLCSP12
VBIAS

A4
B4
C4
8 51.1K_0201_1% TS3USB31ERSER_UQFN8_1P5X1P5
0.1U_0603_50V7-K GND1 13 R10668 1 2 0_0402_5%
GND2 18
GND3

1
2
21
THERMAL_PAD R10645
TPD8S300_QFN20_3X3 @ 100_0603_5%
U205

1
Vendor P/N LCFC P/N
R10647
TI TS3USB31ERSER SA000086000
Vendor P/N LCFC P/N

1
Q269 D
ONSemi NLAS7213MUTBG SA00008GR00
2 KOA 100 +-5% 0603 SD000022U0T
<33> TBT_DISCHARGE G

S 2N7002KW_SOT323-3
Rohm 100 +-5% 0603 SD000022V0T

3
@ Q269
Vendor P/N LCFC P/N
ON-semi 2N7002KW SB00001JY00
NXP NX7002BKW SB00001GU00

VCC3LAN TBT_VBUS20_CONN @
JDOCK1

F60 GND1 GND2 TBT_VBUS20_CONN


GND5 GND6

1
Vendor P/N LCFC P/N F60
LIITELFUSE 0603L035YR SP040007900 0.35A_6V_0603L035YR
C C
BOURNS MF-FSMF035X-2 SP040007700 GND3 GND4

2
GND5 GND7 GND8
GND9
AEM PMS0603-035 SP040007B00

A1 B12
TBT_TX2P C9619 1 2 0.22U_0201_6.3V6-K TBT_TX2P_C A2 GND1 GND4 B11 TBT_RX2P
<31> TBT_TX2P TBT_TX2N TBT_TX2N_C TX1+ RX1+ TBT_RX2N TBT_RX2P <31>
C9620 1 2 0.22U_0201_6.3V6-K A3 B10
<31> TBT_TX2N TX1- RX1- TBT_RX2N <31>
A4 B9
TBT_CC2_CONN A5 VBUS1 VBUS4 B8 TBT_SBU1_CONN
TBT_USB2P_CONN A6 CC1 SBU2 B7 TBT_USB2N_CONN
TBT_USB2N_CONN A7 D1+ D2- B6 TBT_USB2P_CONN
TBT_SBU2_CONN A8 D1- D2+ B5 TBT_CC1_CONN
A9 SBU1 CC2 B4
TBT_RX1N A10 VBUS2 VBUS3 B3 TBT_TX1N_C C9622 1 2 0.22U_0201_6.3V6-K TBT_TX1N
<31> TBT_RX1N TBT_RX1P RX2- TX2- TBT_TX1P_C TBT_TX1P TBT_TX1N <31>
A11 B2 C9621 1 2 0.22U_0201_6.3V6-K
<31> TBT_RX1P RX2+ TX2+ TBT_TX1P <31>
A12 B1
GND2 GND3

GND6
GND7 GND10 GND8
GND11 GND12

GND9 GND10
GND13 GND14

MDI_2N_CONN 1 8 MDI_3N_CONN
MDI_2P_CONN 2 MDI_2N MDI_3N 9 MDI_3P_CONN
-DOCK_LINKUP_SYS R10436 1 20_0402_5%_SM 3 MDI_2P MDI_3P 10
<42> -DOCK_LINKUP_SYS -LINK_LED GND
4 11 -PWRSWITCH
-DOCK_ACTIVITY_SYS -ACT_LED -PWRSWITCH -DOCK_RJ45_DET -PWRSWITCH <17,26,64,65>
R10437 1 20_0402_5%_SM 5 12
<42> -DOCK_ACTIVITY_SYS MDI_1N_CONN LED_PWR -DOCK_RJ45_DET MDI_0N_CONN -DOCK_RJ45_DET <42>
6 13
MDI_1P_CONN 7 MDI_1N MDI_0N 14 MDI_0P_CONN
MDI_1P MDI_0P
B B
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

HIGHS_DK11197-D20A1-1H
1

1
1

1
1

1
1

1
1

1
1

1
1

1
1

1
1

EMC@
C9877
0.1U_0201_6.3V6-K
2
2

2
2

2
2

2
2

2
2

2
2

2
2

2
2

2
2

2
2

2
2

2
2

2
EMC@

EMC@

EMC@
EMC@

EMC@
EMC@

EMC@

EMC@
EMC@

EMC@
EMC@

EMC@
EMC@

EMC@
D795

D801

D800
D793

D792
D791

D790

D798
D796

D799
D802

D797
D803

D794

L59 EMC@
4 3 MDI_0P_CONN
<42> DOCK_MDI_0+

1 2 MDI_0N_CONN
<42> DOCK_MDI_0-
DLP11SN900HL2L_4P

L58 EMC@
4 3 MDI_1P_CONN
<42> DOCK_MDI_1+

1 2 MDI_1N_CONN
<42> DOCK_MDI_1-
DLP11SN900HL2L_4P

L57 EMC@ EMC@


4 3 MDI_2P_CONN D760
<42> DOCK_MDI_2+
MDI_0P_CONN 1
MDI_0N_CONN 2 D1+ 10 MDI_0P_CONN
1 2 MDI_2N_CONN 3 D1- NC4 9 MDI_0N_CONN
<42> DOCK_MDI_2- GND1 NC3
8 7 MDI_1P_CONN
DLP11SN900HL2L_4P MDI_1P_CONN 4 GND2 NC2 6 MDI_1N_CONN
MDI_1N_CONN 5 D2+ NC1
L56 EMC@ D2-
4 3 MDI_3P_CONN TPD4EUSB30DQAR_SON10
<42> DOCK_MDI_3+
EMC@
A A
1 2 MDI_3N_CONN D761
<42> DOCK_MDI_3-
MDI_2P_CONN 1
DLP11SN900HL2L_4P MDI_2N_CONN 2 D1+ 10 MDI_2P_CONN
3 D1- NC4 9 MDI_2N_CONN
8 GND1 NC3 7 MDI_3P_CONN
MDI_3P_CONN 4 GND2 NC2 6 MDI_3N_CONN
L56 - L59 MDI_3N_CONN 5 D2+ NC1
D2-
Vendor P/N LCFC P/N TPD4EUSB30DQAR_SON10
1st: Murata DLP11SN900HL2 SM070002Y00

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DOCKING CONNECTOR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 35 of 104
5 4 3 2 1
5 4 3 2 1

VCC3_LDO_TBT

0.1U_0402_10V6-K
1

C9889
R10666
0_0201_5%_SM
2 VCC3M

1
U199

2
10
VPWR
USBC_SBU1 15 1 USBC_SBU1_CONN USBC_VBUS20_CONN R10372 USBC_VBUS20 USBC_VBUS20_CONN
<29> USBC_SBU1 USBC_SBU2 SBU1 C_SBU1 USBC_SBU2_CONN
14 2 VCC3_LDO_TBT 10K_0201_5%
<29> USBC_SBU2 SBU2 C_SBU2
D D

1
USBC_CC1 12 4 USBC_CC1_CONN U200
<33> USBC_CC1 CC1 C_CC1

1
USBC_CC2 11 5 USBC_CC2_CONN
<33> USBC_CC2 CC2 C_CC2 R10370 B3 A2
IN1 OUT1

1U_0402_25V6-K

1U_0402_25V6-K
20 7 C2 A3

0.47U_0402_25V6-K

0.47U_0402_25V6-K
D1 RPD_G1 100K_0201_5% IN2 OUT2
19 C3 B2 2 2 2 2
D2 IN3 OUT3

C9623

C9624

C9625

C9626
17 6
D3 RPD_G2

2
C9538 16 A1 B1
D4 9 R10373 EN# ACOK#
FLT 2 1 1
1 2 3 C9539 1 2 C1 C9540 @1 1 @1

GND_1
GND_2
GND_3
VBIAS 8 0.1U_0402_25V6-K OVLO 1U_0603_25V6-K
0.1U_0603_50V7-K GND1 13 R10667 1 2 0_0402_5% 1M_0201_5%
GND2

2
18 1 2
GND3 21 R10371 FPF2281BUCX-F130_WLCSP12
THERMAL_PAD

A4
B4
C4
51.1K_0201_1%
TPD8S300_QFN20_3X3

1
2
R10663
@ 100_0603_5%
USBC_SBU1_CONN R10639 1 2 2M_0201_5%
USBC_SBU2_CONN R10640 1 2 2M_0201_5% Over Voltage Lock Out Trip Threshold = 1.20 * ( 1 + R10373 / R10371 )

1
2N7002KW_SOT323-3

1
Q270 D
2 USBC_VBUS20_CONN
<33> USBC_DISCHARGE
VCC3M G

@ S

3
R10647
1
2 2
C
C9631 C9632 R10609
Vendor P/N LCFC P/N C

GND3

GND2

GND1
0.1U_0201_6.3V6-K 1U_0201_6.3V6-K 10K_0201_5% U204 KOA 100 +-5% 0603 SD000022U0T
1 1
2

8 7 JUSBC1 @
VCC NC Rohm 100 +-5% 0603 SD000022V0T

GND7

GND6

GND5
USBP3+_CONN USBP3+_R
Q269
2 3
HSD+ D+
USBP3-_CONN 6 5 USBP3-_R
Vendor P/N LCFC P/N
HSD- D-
ON-semi 2N7002KW SB00001JY00
-USBC_USB2_BUS_EN 1 4 NX7002BKW SB00001GU00 B12 A1
<57> -USBC_USB2_BUS_EN OE# GND NXP GND4 GND1
USBC_RX1P_CONN B11 A2 USBC_TX1P_CONN
TS3USB31ERSER_UQFN8_1P5X1P5 SSRXP1 SSTXP1
USBC_RX1N_CONN B10 A3 USBC_TX1N_CONN
SSRXN1 SSTXN1
B9 A4
VBUS1 VBUS2
U204 USBC_SBU2_CONN B8 A5 USBC_CC1_CONN
SBU2 CC1
USBP3-_CONN B7 A6 USBP3+_CONN
Vendor P/N LCFC P/N DN2 DP1
TS3USB31ERSER SA000086000 USBP3+_CONN B6 A7 USBP3-_CONN
TI DP2 DN1
NLAS7213MUTBG SA00008GR00 USBC_CC2_CONN B5 A8 USBC_SBU1_CONN
ONSemi CC2 SBU1
B4 A9
VBUS3 VBUS4
USBC_TX2N_CONN B3 A10 USBC_RX2N_CONN
SSTXN2 SSRXN2_1
USBC_TX2P_CONN B2 A11 USBC_RX2P_CONN
L52 SSTXP2 SSRXN2_2
C9531 1 2 0.22U_0201_6.3V6-K USBC_TX1N_C 1 2 USBC_TX1N_CONN B1 A12
<29> USBC_TX1N 1 2 GND3 GND2
B B

C9532 1 2 0.22U_0201_6.3V6-K USBC_TX1P_C 4 3 USBC_TX1P_CONN


<29> USBC_TX1P 4 3 HIGHS_UB11247-0500C-1H
EXC24CH900U_4P

GND10

GND9

GND8
L53
1 2 USBC_RX1P_CONN

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
<29> USBC_RX1P 1 2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

1
1

1
GND6

GND5

GND4
1

1
1

1
1
4 3 USBC_RX1N_CONN

1
1

1
<29> USBC_RX1N 4 3

1
1

1
1
EXC24CH900U_4P

2
2

2
L54

2
2

2
2
C9535 1 2 0.22U_0201_6.3V6-K USBC_TX2N_C 1 2 USBC_TX2N_CONN
<29> USBC_TX2N

2
1 2

2
2

2
2

2
2

2
2

EMC@

EMC@

EMC@

EMC@

EMC@

EMC@
EMC@

EMC@

D785

D784

D786

D787

D789

D788
D805

D804
EMC@

EMC@
EMC@

EMC@

EMC@
EMC@
2 0.22U_0201_6.3V6-K USBC_TX2P_C USBC_TX2P_CONN

D781

D780
D746

D748

D782
D783
C9536 1 4 3
<29> USBC_TX2P 4 3
EXC24CH900U_4P

L55
4 3 USBC_RX2N_CONN
<29> USBC_RX2N 4 3

1 2 USBC_RX2P_CONN
<29> USBC_RX2P 1 2
EXC24CH900U_4P

EMC_NS@
R10629
A A
1 2

0_0201_5%
L60 EMC@
USBP3+_R 4 3
USBP3+ <10>

USBP3-_R 1 2
USBP3- <10>
Security Classification LC Future Center Secret Data Title
DLP11SN900HL2L_4P
Issued Date Deciphered Date USB_TYPE-C CONNECTOR
EMC_NS@
R10630
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
1 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
0_0201_5%
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 36 of 104
5 4 3 2 1
5 4 3 2 1

FL74
D HDMI_DATA0N 4 3 HDMI_DATA0N_CONN VCC5B_HDMI No need diode here because D
<28> HDMI_DATA0N 4 3 TPS2553 has reverse voltage
protection function.
HDMI_DATA0P 1 2 HDMI_DATA0P_CONN
<28> HDMI_DATA0P 1 2
EXC24CH900U_4P 2
C2731
1000P_0201_25V7-K

2
FL73 EMC@
HDMI_CLKN 4 3 HDMI_CLKN_CONN R1030 R1029 1
<28> HDMI_CLKN 4 3 2.2K_0201_5% 2.2K_0201_5%

<28> HDMI_CLKP
HDMI_CLKP 1
1 2
2 HDMI_CLKP_CONN HDMI CONN

1
EXC24CH900U_4P JHDMI1
HDMI_HPD_CONN 19
<28> HDMI_HPD_CONN HP_DET
VCC5B_HDMI 18
FL71 17 +5V
HDMI_DATA1N 4 3 HDMI_DATA1N_CONN HDMI_DDC_DATA 16 DDC/CEC_GND
<28> HDMI_DATA1N 4 3 <28> HDMI_DDC_DATA SDA
HDMI_DDC_CLK 15
<28> HDMI_DDC_CLK SCL
14
HDMI_DATA1P 1 2 HDMI_DATA1P_CONN 13 Reserved
<28> HDMI_DATA1P 1 2 CEC
HDMI_CLKN_CONN 12 20
EXC24CH900U_4P 11 CK- GND1 21
HDMI_CLKP_CONN 10 CK_shield GND2 22
HDMI_DATA0N_CONN 9 CK+ GND3 23
FL72 8 D0- GND4
HDMI_DATA2N 4 3 HDMI_DATA2N_CONN HDMI_DATA0P_CONN 7 D0_shield
<28> HDMI_DATA2N 4 3 D0+
HDMI_DATA1N_CONN 6
5 D1-
HDMI_DATA2P 1 2 HDMI_DATA2P_CONN HDMI_DATA1P_CONN 4 D1_shield
<28> HDMI_DATA2P 1 2 D1+
HDMI_DATA2N_CONN 3
EXC24CH900U_4P 2 D2-
HDMI_DATA2P_CONN 1 D2_shield
D2+
C C
ALLTO_C128P3-K1925-L
D227 D228 D232 @

1
1
EMC@ EMC@ EMC@ EMC_NS@ EMC_NS@
C2733 C2732

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2
1

1
1
NEAR HDMI CONN
2 2

1 1

2
2

680P_0201_25V7-K

680P_0201_25V7-K
2

2
2
D283 D284

HDMI_DATA1N_CONN 1 9 HDMI_DATA1N_CONN HDMI_DATA0N_CONN 1 9 HDMI_DATA0N_CONN


HDMI_DATA1P_CONN 2 8 HDMI_DATA1P_CONN HDMI_DATA0P_CONN 2 8 HDMI_DATA0P_CONN
HDMI_DATA2N_CONN 4 7 HDMI_DATA2N_CONN HDMI_CLKN_CONN 4 7 HDMI_CLKN_CONN
HDMI_DATA2P_CONN 5 6 HDMI_DATA2P_CONN HDMI_CLKP_CONN 5 6 HDMI_CLKP_CONN

ESD7004MUTAG ESD7004MUTAG
3

EMC@ EMC@ VCC5B_HDMI

1
VCC5B R10193
0.01_0603_LE_1%

B B

2
U110
6 1
IN OUT
2
3 ILIM
FAULT

2
4 5 2
EN GND R1119 C994
2
C1426 7 61.9K_0201_1% 4.7U_0402_6.3V6-M
0.1U_0201_6.3V6-K GND_PAD
TPS2553DRVR_SON6_2X2 1

1
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2013/08/05 HDMI CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 37 of 104


5 4 3 2 1
5 4 3 2 1

TABLE: PI3EQX862 Input Equalization Setting (EQ_A & EQ_B) TABLE: PI3EQX862 Output De-emphasis Setting (DE_A & DE_B) TABLE: Mode Configuration Table

GND -2.5 dB
@3GHz @4GHz EN# MODE Mode

Open 0 dB (Default) LOGIC


GND 7 dB 8 dB Low Low SATA Application

VDD -4 dB
Open 4 dB (Default) 5 dB (Default) LOGIC Low High PCIe Application

VDD 10 dB 11 dB High X Disable


D D

VCC1R2_REDR
VCC1R2_REDR

PCIE10_L1_SATA2_TXP NRE@ R10327 2 1 0_0201_5% PCIE10_L1_SATA2_TXP_R PCIE10_L1_SATA2_TXP_R NRE@ R2698 1 2 0_0201_5% PCIE10_L1_SATA2_TXP_CONN

PCIE10_L1_SATA2_TXN NRE@ R10328 2 1 0_0201_5% PCIE10_L1_SATA2_TXN_R PCIE10_L1_SATA2_TXN_R NRE@ R2699 1 2 0_0201_5% PCIE10_L1_SATA2_TXN_CONN 2 2 2
REDR@ REDR@ REDR@
C2719 C2720 C2721
PCIE10_L1_SATA2_RXP_CONN NRE@ R2701 2 1 0_0201_5% PCIE10_L1_SATA2_RXP_R PCIE10_L1_SATA2_RXP_R NRE@ R10326 1 2 0_0201_5% PCIE10_L1_SATA2_RXP 0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K 1U_0402_6.3V6-K
1 1 1
PCIE10_L1_SATA2_RXN_CONN NRE@ R2700 2 1 0_0201_5% PCIE10_L1_SATA2_RXN_R PCIE10_L1_SATA2_RXN_R NRE@ R10325 1 2 0_0201_5% PCIE10_L1_SATA2_RXN

REDR@

15
6
U157

VDD1

VDD2
PCIE10_L1_SATA2_TXP REDR@ C2715 1 2 0.22U_0201_6.3V6-K PCIE10_L1_SATA2_TXP_C 1 14 PCIE10_L1_SATA2_TXP_CONN_C REDR@ R10279 2 1 0_0201_5% PCIE10_L1_SATA2_TXP_CONN
<10> PCIE10_L1_SATA2_TXP AI+ AO+ PCIE10_L1_SATA2_TXP_CONN <39>
PCIE10_L1_SATA2_TXN REDR@ C2716 1 2 0.22U_0201_6.3V6-K PCIE10_L1_SATA2_TXN_C 2 13 PCIE10_L1_SATA2_TXN_CONN_C REDR@ R10280 2 1 0_0201_5% PCIE10_L1_SATA2_TXN_CONN
<10> PCIE10_L1_SATA2_TXN AI- AO- PCIE10_L1_SATA2_TXN_CONN <39>

PCIE10_L1_SATA2_RXP_CONN REDR@ R10277 2 1 0_0201_5% PCIE10_L1_SATA2_RXP_CONN_C 10 5 PCIE10_L1_SATA2_RXP_C REDR@ C2718 2 1 0.22U_0201_6.3V6-K PCIE10_L1_SATA2_RXP
<39> PCIE10_L1_SATA2_RXP_CONN BI+ BO+ PCIE10_L1_SATA2_RXP <10>
PCIE10_L1_SATA2_RXN_CONN REDR@ R10278 2 1 0_0201_5% PCIE10_L1_SATA2_RXN_CONN_C 11 4 PCIE10_L1_SATA2_RXN_C REDR@ C2717 2 1 0.22U_0201_6.3V6-K PCIE10_L1_SATA2_RXN
<39> PCIE10_L1_SATA2_RXN_CONN BI- BO- PCIE10_L1_SATA2_RXN <10>
VCC1R2_REDR
PI2EQX862XUAEX_TQFN18_2X2
17 @ R2694 1 2 10K_0201_5%
DE_A VCC1R2A VCC1R2_REDR
8 @ R2690 1 2 10K_0201_5%
7 DE_B
EN#

2
16 @ R2689 1 2 10K_0201_5%
EQ_A REDR@
REDR_MODE 18 9 @ R2695 1 2 10K_0201_5% R10194

GND_PAD
<39> REDR_MODE MODE EQ_B 0.01_0603_LE_1%

GND1

GND2

1
C C

12

19

2 10K_0201_5%
10K_0201_5%

2 10K_0201_5%

2 10K_0201_5%

2 10K_0201_5%
2

270_0201_5%

0.1U_0402_25V6-K
R2693
REDR@

5
REDR@
Q260
TPCF8004_2-3U1S
1

2
REDR@
@ @ @ @ 2

R2692 1
R2697 1

R2691 1

R2696 1

R91391
1

C9132
1

4
@

2 RB521CM_30
2
REDR@
VCC1R2_REDR R9138
100_0402_5%
PCIE10_L0_TXP NRE@ R10330 2 1 0_0201_5% PCIE10_L0_TXP_R PCIE10_L0_TXP_R NRE@ R2715 1 2 0_0201_5% PCIE10_L0_TXP_CONN

D704 1
PCIE10_L0_TXN NRE@ R10329 2 1 0_0201_5% PCIE10_L0_TXN_R PCIE10_L0_TXN_R NRE@ R2716 1 2 0_0201_5% PCIE10_L0_TXN_CONN

<66,89> B_DRV REDR@


PCIE10_L0_RXP_CONN NRE@ R2718 2 1 0_0201_5% PCIE10_L0_RXP_R
PCIE10_L0_RXP_R NRE@ R10332 1 2 0_0201_5% PCIE10_L0_RXP
PCIE10_L0_RXN_CONN NRE@ R2717 2 1 0_0201_5% PCIE10_L0_RXN_R
PCIE10_L0_RXN_R NRE@ R10331 1 2 0_0201_5% PCIE10_L0_RXN

2
REDR@
REDR@ C9131
15
6

U185 0.1U_0402_25V7K

1
VDD1

VDD2

B B
PCIE10_L0_TXP REDR@ C2722 1 2 0.22U_0201_6.3V6-K PCIE10_L0_TXP_C 1 14 PCIE10_L0_TXP_CONN_C REDR@ R10284 2 1 0_0201_5% PCIE10_L0_TXP_CONN
<10> PCIE10_L0_TXP AI+ AO+ PCIE10_L0_TXP_CONN <39>
PCIE10_L0_TXN REDR@ C2723 1 2 0.22U_0201_6.3V6-K PCIE10_L0_TXN_C 2 13 PCIE10_L0_TXN_CONN_C REDR@ R10283 2 1 0_0201_5% PCIE10_L0_TXN_CONN
<10> PCIE10_L0_TXN AI- AO- PCIE10_L0_TXN_CONN <39>

PCIE10_L0_RXP_CONN REDR@ R10281 2 1 0_0201_5% PCIE10_L0_RXP_CONN_C 10 5 PCIE10_L0_RXP_C REDR@ C2725 2 1 0.22U_0201_6.3V6-K PCIE10_L0_RXP
<39> PCIE10_L0_RXP_CONN BI+ BO+ PCIE10_L0_RXP <10>
PCIE10_L0_RXN_CONN REDR@ R10282 2 1 0_0201_5% PCIE10_L0_RXN_CONN_C 11 4 PCIE10_L0_RXN_C REDR@ C2724 2 1 0.22U_0201_6.3V6-K PCIE10_L0_RXN
<39> PCIE10_L0_RXN_CONN BI- BO- PCIE10_L0_RXN <10>
VCC1R2_REDR
PI2EQX862XUAEX_TQFN18_2X2
17 @ R2711 1 2 10K_0201_5%
DE_A
8 @ R2707 1 2 10K_0201_5% VCC1R2_REDR
-REDR_PE_EN 7 DE_B
<39> -REDR_PE_EN EN# 16 @ R2706 1 2 10K_0201_5%
EQ_A
REDR@ R2708 1 2 10K_0201_5% 18 9 @ R2712 1 2 10K_0201_5%
GND_PAD

VCC1R2_REDR MODE EQ_B


GND1

GND2

2 2 2
REDR@ REDR@ REDR@
C2726 C2727 C2728
3

12

19

2 10K_0201_5%
2 10K_0201_5%

2 10K_0201_5%

2 10K_0201_5%

0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K 1U_0402_6.3V6-K


1 1 1

@ @ @ @
R2710 1
R2714 1

R2709 1

R2713 1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 STORAGE I/F REDRIVER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 38 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3B VCC5B VCC3B

IFDET
SATA Device GND
PCIe Device 5K PU to Vsource

2
F1 F41
R10083
10K_0402_5% -PE_DTCT
-PE_DTCT <10>

3A_32V_ERBRD3R00X

3A_32V_ERBRD3R00X
1

1
D

VCC5B_HDD

VCC3B_HDD
IFDET 2 Q178
G LSK3541G1ET2L_VMT3

JHDD1 S

3
2
40 52 R2037 @
-PCIE10_CLK_100M 39 40GND12 51
<12> -PCIE10_CLK_100M 39GND11 20K_0402_5%
PCIE10_CLK_100M 38 50
<12> PCIE10_CLK_100M 38GND10
37 49
37 GND9

1
PCIE10_L1_SATA2_TXP_CONN 36 48
<38> PCIE10_L1_SATA2_TXP_CONN 36 GND8
PCIE10_L1_SATA2_TXN_CONN 35 47
<38> PCIE10_L1_SATA2_TXN_CONN 35 GND7
C 34 46 C
PCIE10_L1_SATA2_RXN_CONN 33 34 GND6 45
<38> PCIE10_L1_SATA2_RXN_CONN 33 GND5
PCIE10_L1_SATA2_RXP_CONN 32 44
<38> PCIE10_L1_SATA2_RXP_CONN 32 GND4
31 43
PCIE10_L0_TXP_CONN 30 31 GND3 42
<38> PCIE10_L0_TXP_CONN 30 GND2
PCIE10_L0_TXN_CONN 29 41
<38> PCIE10_L0_TXN_CONN 29 GND1
28
PCIE10_L0_RXN_CONN 27 28 VCC1R2_REDR
<38> PCIE10_L0_RXN_CONN 27
PCIE10_L0_RXP_CONN 26
<38> PCIE10_L0_RXP_CONN 26
25
-PLTRST_FAR 24 25
<13,41,45,46,55,63,64,65,92> -PLTRST_FAR 24

2
-CLKREQ_PCIE10 23
<12> -CLKREQ_PCIE10 23
SATA2_DEVSLP 22 REDR@
<10> SATA2_DEVSLP 22
IFDET 21 R2719
-HDD_DTCT 20 21 10K_0201_5%
<57> -HDD_DTCT 20
19
19

1
18
17 18
16 17 -PE_DTCT REDR@ D308 1 2 RB521CM-30T2R_VMN2M
16 -REDR_PE_EN <38>
15
14 15
13 14 VCC1R2_REDR
12 13
11 12
10 11
10

2
9
8 9 REDR@
7 8 R2720
6 7
6 10K_0402_5%
5
5

1
B B
-PLTRST_FAR IFDET 4
3 4
2 3
1 2 REDR_MODE <38>
EMC@ EMC@ 1
1 2 2 1
C571 C563 C92 C53

1
I-PEX_20525-040E-02 D
0.1U_0201_6.3V6-K 2 0.1U_0402_25V6-K 10U_0402_6.3V6-M 0.01U_0201_6.3V7-K 2 REDR@
2 1 1 @
G Q224
LSK3541G1ET2L_VMT3
S

3
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 SATA EXPRESS CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 39 of 104


5 4 3 2 1
5 4 3 2 1

USB_PWR_S2
PLACE NEAR USB CONNECTOR
VCC5M
WIDE PATTERN(MIN 500mA)

1
2 EMC@ 2 EMC@
C772 C774 + C1269 @ R10259 1 2 0_0402_5%
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 150U_B2_6.3VM_R35M
FLJ2 EMC@
2
C1291
2
C257
Current Limit Target: 1 1 2 USBP1-_CONN 2 1 USBP1-_AOU_OUT
4.7U_0402_6.3V6-M 0.1U_0402_10V6-K ILIM_Hi -> 2.27A(1.98A - 2.56A) 2 1
@
1 1 ILIM_Lo-> 0.62A(0.52A - 0.72A) USBP1+_CONN 3 4 USBP1+_AOU_OUT
USB_PWR_S2 3 4
JUSB1 @ EMC@ EXC24CH900U_4P
1 AOZ8904CIL_SOT23-6
D
U88 VBUS 2 3 4 D
4 D- 3 @ R10260 1 2 0_0402_5%
1 16 N30910915R1104 1 2 22.1K_0402_1% 7 GND1 D+
IN ILIM_HI 10 GND2 5 Place same location
2 15 N31995447
R1114 1 2 80.6K_0402_1% 11 GND3 StdA_SSRX- 6 2 5
<10> USBP1-_AOU DM_OUT ILIM_LO GND4 StdA_SSRX+
12
3 14 13 GND5 8
<10> USBP1+_AOU DP_OUT GND GND6 StdA_SSTX- 9
4 13 StdA_SSTX+ 1 6
ILIM_SEL FAULT -USB_PORT0_OC0 <10>
5 12 SINGA_2UB4008-500101F D80
<56> USB_ON2 EN OUT @ R10267 1 2 0_0402_5%
6 11 USBP1-_AOU_OUT
<56> AOU_SEL1 CLT1 DM_IN FLJ5 EMC@
7 10 USBP1+_AOU_OUT USB3P1_RXN_CONN 4 3
CLT2 DP_IN 4 3 USB3P1_RXN_AOU <10>

E_PAD
<56> AOU_SEL2 8 9 -AOU_IFLG <56> EMC@
CLT3 STATUS D230 USB3P1_RXP_CONN 1 2
1 2 USB3P1_RXP_AOU <10>
SN1702001RTER_WQFN16_3X3 EXC24CH900U_4P

17
USB3P1_TXP_CONN 1 9 USB3P1_TXP_CONN
USB3P1_TXN_CONN 2 8 USB3P1_TXN_CONN @ R10268 1 2 0_0402_5%
USB3P1_RXP_CONN 4 7 USB3P1_RXP_CONN
USB3P1_RXN_CONN 5 6 USB3P1_RXN_CONN Place same location

TABLE of USB Charge IC (U88)


Vendor P/N LCFC P/N
RCLAMP0524PATCT_SLP2510P8-10-9
TI SN1702001RTER SA00008HF00

3
@ R10269 1 2 0_0402_5%

FLJ6 EMC@
USB3P1_TXN_CONN 4 3 USB3P1_TXN_C C298 1 2 0.1U_0201_6.3V6-K
4 3 USB3P1_TXN_AOU <10>

USB_PWR_S3 USB3P1_TXP_CONN 1 2 USB3P1_TXP_C C325 1 2 0.1U_0201_6.3V6-K


C
WIDE PATTERN(MIN 500mA) 1 2 USB3P1_TXP_AOU <10> C

EXC24CH900U_4P
PLACE NEAR USB CONN
@ R10270 1 2 0_0402_5%

Place same location


1
2 EMC@ 2 EMC@ + C1248
C771 C773
0.1U_0402_10V6-K 0.1U_0402_10V6-K 150U_B2_6.3VM_R35M
1 1 2

@ R10257 1 2 0_0402_5%
VCC5M

JUSB2 @ FLJ1 EMC@


1 USBP0-_CONN 2 1 USBP0-
VBUS 2 1 USBP0- <10>
2
@ 4 D- 3
C3 1 2 4.7U_0402_6.3V6-M USB_PWR_S3 7 GND1 D+ USBP0+_CONN 3 4 USBP0+
GND2 3 4 USBP0+ <10>
10 5
11 GND3 StdA_SSRX- 6 EMC@ EXC24CH900U_4P
C179 1 2 0.1U_0201_6.3V6-K 12 GND4 StdA_SSRX+ AOZ8904CIL_SOT23-6
13 GND5 8 3 4 @ R10258 1 2 0_0402_5%
U53 GND6 StdA_SSTX- 9
9 StdA_SSTX+ Place same location
GND_2
1 8 SINGA_2UB4008-500101F 2 5
2 GND_1 OUT_8 7
3 IN_2 OUT_7 6
USB_ON1 4 IN_3 OUT_6 5 -USB_PORT1_OC1
<56> USB_ON1 EN/EN FLT -USB_PORT1_OC1 <10>
1 6
TPS2069CDGNR MSOP 8P
D231 @ R10261 1 2 0_0402_5%
B B
FLJ3 EMC@
USB3P0_RXN_CONN 4 3
4 3 USB3P0_RXN <10>
EMC@
D229
USB3P0_RXP_CONN 1 2
1 2 USB3P0_RXP <10>
TABLE of USB3.0 Single (U53) EXC24CH900U_4P
USB3P0_TXP_CONN 1 9 USB3P0_TXP_CONN
Vendor P/N LCFC P/N USB3P0_TXN_CONN 2 8 USB3P0_TXN_CONN
USB3P0_RXP_CONN 4 7 USB3P0_RXP_CONN @ R10262 1 2 0_0402_5%
TI TPS2069CDGNR SA00005TE00 USB3P0_RXN_CONN 5 6 USB3P0_RXN_CONN
Place same location
Rohm BD82032FVJ-GE2 SA000084S00

RCLAMP0524PATCT_SLP2510P8-10-9
3

@ R10265 1 2 0_0402_5%

FLJ4 EMC@
USB3P0_TXN_CONN 4 3 USB3P0_TXN_C C263 1 2 0.1U_0201_6.3V6-K
4 3 USB3P0_TXN <10>

USB3P0_TXP_CONN 1 2 USB3P0_TXP_C C293 1 2 0.1U_0201_6.3V6-K


1 2 USB3P0_TXP <10>
EXC24CH900U_4P

@ R10266 1 2 0_0402_5%

Place same location

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 USB POWER/CONN (1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 104
0.1

Date: Thursday, November 09, 2017 Sheet 40 of


5 4 3 2 1
5 4 3 2 1

TABLE

vPro Capability U13 U13

VCC3GBE VCC3B

GbE Yes No
PHY WGI219LM WGI219V
U13 Jacksonville-LM Jacksonville-V SA000073020 SA000072Z10

2
D GBE_V@ GBE_NV@ D
R166 R29
10K_0201_5% 10K_0201_5%
@

1
U13 @

-CLKREQ_PCIE4 48 13 MDI_0+
<12> -CLKREQ_PCIE4 -PLTRST_FAR CLK_REQ_N MDI_PLUS[0] MDI_0- MDI_0+ <42>
36 14
<13,39,45,46,55,63,64,65,92> -PLTRST_FAR PE_RST_N MDI_MINUS[0] MDI_0- <42>
PCIE4_CLK_100M 44 17 MDI_1+
<12> PCIE4_CLK_100M -PCIE4_CLK_100M PE_CLKP MDI_PLUS[1] MDI_1- MDI_1+ <42>
45 18
<12> -PCIE4_CLK_100M PE_CLKN MDI_MINUS[1] MDI_1- <42>
R1857

PCIE
MDI
PCIE4_RXP C49 1 2 0.1U_0201_6.3V6-K PCIE4_RXP_C 38 20 MDI_2+ 1 2
<10> PCIE4_RXP PCIE4_RXN PCIE4_RXN_C PETp MDI_PLUS[2] MDI_2- MDI_2+ <42>
C209 1 2 0.1U_0201_6.3V6-K 39 21
<10> PCIE4_RXN PETn MDI_MINUS[2] MDI_2- <42>
0_0201_5%
PCIE4_TXP C2466 1 2 0.1U_0201_6.3V6-K PCIE4_TXP_C 41 23 MDI_3+
<10> PCIE4_TXP PCIE4_TXN PCIE4_TXN_C PERp MDI_PLUS[3] MDI_3- MDI_3+ <42>
C2467 1 2 0.1U_0201_6.3V6-K 42 24
<10> PCIE4_TXN PERn MDI_MINUS[3] MDI_3- <42> VCC3GBE
SMBUS DEVICE ADDRESSES 0XC8
SML0_CLK R73 1 2 100_0201_1% 28 6
<7> SML0_CLK SML0_DATA SMB_CLK SVR_EN_N
R75 1 2 100_0201_1% 31

SMBUS
<7> SML0_DATA SMB_DATA 1 R178 1 2 4.7K_0201_5%
RSVD1_VCC3P3
-LANWAKE 2 5
<13> -LANWAKE LANWAKE_N VDD3P3_IN
LANPHYPC 3
<13> LANPHYPC LAN_DISABLE_N 4
VDD3P3_4
15 C212 1 2 1U_0402_6.3V6-K
-RJ45_LINKUP 26 VDD3P3_15 19
<42,56> -RJ45_LINKUP -RJ45_ACTIVITY LED0 VDD3P3_19
27 29
<42> -RJ45_ACTIVITY LED1 VDD3P3_29
C 25 C

LED
LED2
47
VDD0P9_47 46
VCC3GBE 32 VDD0P9_46 37
34 JTAG_TDI VDD0P9_37
R171 1 @ 2 10K_0201_5% 33 JTAG_TDO 43
KEEP SHORT AND WIDE
PATTERN

JTAG
R167 1 @ 2 10K_0201_5% 35 JTAG_TMS VDD0P9_43
JTAG_TCK 11
R325 VDD0P9_11
1 2 9 40
10 XTAL_OUT VDD0P9_40 22
470_0201_5% XTAL_IN VDD0P9_22 16
VDD0P9_16 8
30 VDD0P9_8
TEST_EN
Y2 12 7 FL40 1 2 4.7UH_NRS2012T4R7MGJ_20%
25MHZ_10PF_8Y25000010 RBIAS CTRL0P9
49
1 3 GND
1 3 WGI219LM-SLKJ2-A0_QFN48_6X6
GND1 GND2 2 2 2
C231 C255 C1064
2

2 2 22U_0603_6.3V6-M 0.1U_0402_10V6-K 0.1U_0201_6.3V6-K


C107 2 4 C48 R172 R176 @
12P_0201_25V8-J 12P_0201_25V8-J 1K_0201_5% 3.01K_0201_1% 1 1 1

1 1
1

Y2 CRYSTAL - 25MHz 10pF 30ppm


Vendor P/N LCFC P/N
B TXC 8Y25000010 SJ10000FY10 B

KDS 1ZZHAE25000CC0B SJ10000MN00 VCC3LAN VCC3GBE

R10195
1 2

0.01_0603_LE_1%
2 2 2 2
C267 C286 C262 C278
0.1U_0402_10V6-K 0.1U_0402_10V6-K 22U_0603_6.3V6-M 0.1U_0201_6.3V6-K
1 1 1 1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 GBE JACKSONVILLE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 41 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3GBE

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
VCC3GBE

2 2 2 2 2

1 1 1 1 1

C637

C639

C655

C657

C667
R300
4.7K_0201_5%

39
30
21
14
8
4
1
U12

VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
38 DOCK_MDI_3-
B0+ DOCK_MDI_3+ DOCK_MDI_3- <35>
37
MDI_3- B0- DOCK_MDI_3+ <35>
2
<41> MDI_3- A0+ DOCK_MDI_2-
34
MDI_3+ B1+ DOCK_MDI_2+ DOCK_MDI_2- <35>
3 33
<41> MDI_3+ A0- B1- DOCK_MDI_2+ <35>
C C
29 DOCK_MDI_1-
MDI_2- B2+ DOCK_MDI_1+ DOCK_MDI_1- <35>
6 28
<41> MDI_2- A1+ B2- DOCK_MDI_1+ <35>
MDI_2+ 7 25 DOCK_MDI_0-
<41> MDI_2+ A1- B3+ DOCK_MDI_0+ DOCK_MDI_0- <35>
24
B3- DOCK_MDI_0+ <35>
MDI_1- 9 17 -DOCK_ACTIVITY_SYS
<41> MDI_1- A2+ LEDB0 -DOCK_ACTIVITY_SYS <35>
18 -DOCK_LINKUP_SYS
LEDB1 -DOCK_LINKUP_SYS <35>
MDI_1+ 10 41
<41> MDI_1+ A2- LEDB2
36 SYS_MDI_3-
MDI_0- C0+ SYS_MDI_3+ SYS_MDI_3- <43>
11 35
<41> MDI_0- A3+ C0- SYS_MDI_3+ <43>
MDI_0+ 12 32 SYS_MDI_2-
<41> MDI_0+ A3- C1+ SYS_MDI_2+ SYS_MDI_2- <43>
31
C1- SYS_MDI_2+ <43>
-DOCK_RJ45_DET 13 27 SYS_MDI_1-
<35> -DOCK_RJ45_DET SEL C2+ SYS_MDI_1+ SYS_MDI_1- <43>
26
C2- SYS_MDI_1+ <43>
-RJ45_ACTIVITY 15 23 SYS_MDI_0-
<41> -RJ45_ACTIVITY -RJ45_LINKUP LEDA0 C3+ SYS_MDI_0+ SYS_MDI_0- <43>
16 22
<41,56> -RJ45_LINKUP LEDA1 C3- SYS_MDI_0+ <43>
42
LEDA2 19 -RJ45_ACTIVITY_SYS
LEDC0 -RJ45_ACTIVITY_SYS <44>
5 20 -RJ45_LINKUP_SYS
PD LEDC1 -RJ45_LINKUP_SYS <44>
40
43 LEDC2
PAD_GND

PI3L720ZHE+CX_TQFN42_9X3P5

TABLE of LAN Switch (U12)


B B
Vendor P/N LCFC P/N
PERICOM PI3L720ZHE+CX SA00007E900
TI TS3L501ERUAR SA000072400

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date GBE LAN SWITCH
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 42 of 104


5 4 3 2 1
5 4 3 2 1

D D
T1

SYS_MDI_3- 1 1:1
<42> SYS_MDI_3- MX1+ T1/B RJ45_TXD3N
24
TD1+ RJ45_TXD3N <44>

SYS_MDI_3+ 2
<42> SYS_MDI_3+ MX1-
23 RJ45_TXD3P
TD1- RJ45_TXD3P <44>
3 22
MCT1 T1/A TCT1

4 21
SYS_MDI_2- 5 MCT2 1:1 TCT2
<42> SYS_MDI_2- MX2+ T1/B
RJ45_TXD2N
20
TD2+ RJ45_TXD2N <44>

SYS_MDI_2+ 6
<42> SYS_MDI_2+ MX2- RJ45_TXD2P
19
TD2- RJ45_TXD2P <44>

T1/A

SYS_MDI_1- 1:1
7
<42> SYS_MDI_1- MX3+ T1/B
RJ45_TXD1N
18
TD3+ RJ45_TXD1N <44>

SYS_MDI_1+ 8
<42> SYS_MDI_1+ MX3-
17 RJ45_TXD1P
TD3- RJ45_TXD1P <44>
9 16
MCT3 T1/A TCT3

C 10 15 C
SYS_MDI_0- 11 MCT4 1:1 TCT4
<42> SYS_MDI_0- MX4+ T1/B
RJ45_TXD0N
14
TD4+ RJ45_TXD0N <44>

SYS_MDI_0+ 12
<42> SYS_MDI_0+ MX4- RJ45_TXD0P
13
TD4- RJ45_TXD0P <44>

T1/A

BOTH_NA69R-LF

2 75_0805_5%

2 75_0805_5%

2 75_0805_5%

2 75_0805_5%
EMC@

THE WIDTH OF THESE TRACE SHOULD


BE WIDER THAN 35MIL TO PREVENT
VOLTAGE DROP.
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
1U_0402_6.3V6-K

R664 1

R665 1

R666 1

R667 1
PATTERN MUST BE
SHORT AND WIDE.
2 2 2 2 2 2 2
EMC_NS@

EMC_NS@

C303
1 1 1 1 1 1 1

2
SHOULD BE PLACED AS CLOSE 1
EMC@
EMC@

EMC@

EMC@

EMC@
C558
C303

C626

C627

C533

C554

C560

TO MAGNETICS AS POSSIBLE. R960


1M_0805_5% C562
10P_1808_3KV8-J
2

1
HIGH VOLTAGE
10PF CAP
B IS OPTIONAL B

TABLE of Transformer (T1)


ESD REASON
Vendor P/N LCFC P/N
BOTHHAND NA69R-LF SP050008B00
TAIMAG IH-189-A SP050007V0J

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 GBE MAGNETICS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 43 of 104


5 4 3 2 1
5 4 3 2 1

D D

4
D243

I/O4

VDD

I/O3
AZC099-04S.R7G_SOT23-6
EMC_NS@

GND
I/O2

I/O1
3

1
RJ45_TXD1P
<43> RJ45_TXD1P
RJ45_TXD1N
<43> RJ45_TXD1N
RJ45_TXD3P
<43> RJ45_TXD3P
RJ45_TXD3N
<43> RJ45_TXD3N

4
D244

I/O4

VDD

I/O3
AZC099-04S.R7G_SOT23-6
EMC_NS@

C VCC3GBE C

GND
I/O2

I/O1
3

1
JLAN1 @
1 2 B1
R2089 330_0402_5% Green_LED+
<42> -RJ45_LINKUP_SYS -RJ45_LINKUP_SYS B2
Green_LED-
RJ45_TXD0P 1
<43> RJ45_TXD0P TX_DA+
RJ45_TXD0N 2
<43> RJ45_TXD0N TX_DA-
3
RX_DB+
RJ45_TXD2P 4
<43> RJ45_TXD2P BI_DC+
RJ45_TXD2N 5
<43> RJ45_TXD2N BI_DC-
6
RX_DB-
7 GND2
BI_DD+ GND2
8 GND1
BI_DD- GND1
1 2 A1
R2088 220_0201_5% Yellow_LED+
-RJ45_ACTIVITY_SYS A2
<42> -RJ45_ACTIVITY_SYS Yellow_LED-
B SINGA_2RJ3089-118211F B

EMC@ 2 2 EMC@ 2
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 1U_0402_6.3V6-K
C2173 C2174 C9854
1 1 1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 RJ45 CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 44 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3WLAN

2 2
C9099 C9110
47P_0201_25V8-J 100P_0201_50V8-J
RF@ RF@
1 1

VCC3B
TYPE-A NGFF CARD FOR WLAN

2
R591
10K_0201_5%
3.2H CONNECTOR VCC3WLAN

1
JWLAN1
1 2
USBP6+ R790 1 20_0201_5%_SM USBP6+_CONN 3 GND1 3.3VAUX1 4 VCC3WLAN
<10> USBP6+ USBP6-_CONN USB_D+ 3.3VAUX2
USBP6- R792 1 20_0201_5%_SM 5 6
<10> USBP6-
7 USB_D- KEY A LED1#
8
GND2 NC
9 NC NC 10
11 NC NC 12
13 NC NC 14
15 16 2 2 2
17
NC LED2# 18 C1116 C1117 C1155
C 19 MLDIR_SENSE GND16 20 0.1U_0201_6.3V6-K 1U_0402_6.3V6-K 10U_0402_6.3V6-M C
21 DP_ML3N DP_AUXN 22 @
23 DP_ML3P DP_AUXP 24 1 1 1
25 GND3 GND13 26
27 DP_ML2N DP_ML1N 28
29 DP_ML2P DP_ML1P 30
31 GND4 GND14 32
33 DP_HPD DP_ML0N 34
PCIE5_TXP C2468 1 2 0.1U_0201_6.3V6-K PCIE5_TXP_C 35 GND5 DP_ML0P 36
<10> PCIE5_TXP PCIE5_TXN PCIE5_TXN_C PETP0 GND15 -CL_RST_WLAN
C2469 1 2 0.1U_0201_6.3V6-K 37 38
<10> PCIE5_TXN PETN0 RESERVED1 CL_DATA_WLAN -CL_RST_WLAN <7>
39 40
PCIE5_RXP GND6 RESERVED2 CL_CLK_WLAN CL_DATA_WLAN <7>
41 42
<10> PCIE5_RXP PCIE5_RXN PERP0 RESERVED3 CL_CLK_WLAN <7>
43 44
<10> PCIE5_RXN PERN0 COEX3
45 46 C
PCIE5_CLK_100M 47 GND7 COEX2 48
<12> PCIE5_CLK_100M -PCIE5_CLK_100M REFCLKP0 COEX1 SUSCLK_32K
49 50
<12> -PCIE5_CLK_100M REFCLKN0 SUSCLK -PLTRST_FAR SUSCLK_32K <12,55>
51 52
-CLKREQ_PCIE5 GND8 PERST0# -PLTRST_FAR <13,39,41,46,55,63,64,65,92>
53 54
<12> -CLKREQ_PCIE5 -PCIE_WAKE CLKREQ0# W_DISABLE2# -WLAN_RF_KILL BDC_ON <55,57>
55 56
<13,31,65> -PCIE_WAKE PEWAKE0# W_DISABLE1# -WLAN_RF_KILL <55,57>
57 58
59 GND9 I2C_DATA 60
61 PETP1 I2C_CLK 62
63 PETN1 ALERT# 64
65 GND10 RESERVED4 66
67 PERP1 PERST1# 68
69 PERN1 CLKREQ1# 70 VCC3WLAN
71 GND11 PEWAKE1# 72
73 REFCLKP1 3.3VAUX4 74
75 REFCLKN1 3.3VAUX5
GND12
76 77
PEG1 PEG2
3

2 2 2
D109 ARGOS_NASA0-S6705-TSH4 C2656 C2657 C2658
RCLAMP0502BPTCT_SC75-3 @ 0.01U_0201_6.3V7-K 0.1U_0201_6.3V6-K 4.7U_0402_6.3V6-M
EMC_NS@ @ @ @
1 1 1
1

PLACE NEAR J32

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/08/10 M.2 SOCKET 1 MODULE I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 45 of 104


5 4 3 2 1
5 4 3 2 1

VCC3B_WAN VCC3B_WAN

2 2 2 2 2
C1118 C1119 C1156 C9100 C9111
0.1U_0201_6.3V6-K 1U_0402_6.3V6-K 10U_0402_6.3V6-M 47P_0201_25V8-J 100P_0201_50V8-J
@ RF@ RF@
1 1 1 1 1

D D

TYPE-B NGFF CARD FOR WWAN VCC3B VCC3B

VCC3B VCC3B_WAN
3.2H CONNECTOR

2
R10124

2
VCC3B_WAN R2746 R10631
R1005 10K_0201_5% 10K_0201_5% 1 2
47K_0201_5% @

1
0.01_0603_LE_1%

1
D808 RB521CM-30T2R_VMN2M JWWAN1
WWAN_CFG3 2 1 WWAN_CFG3_SW 1 2
<8> WWAN_CFG3 CONFIG_3 3.3VAUX1
3 4
5 GND1 3.3VAUX2 6
USBP5+ R794 1 2 0_0201_5%_SM USBP5+_CONN 7 GND2 FULL_CARD_POWER_OFF# 8 -WWAN_DISABLE
<10> USBP5+ USBP5-_CONN USB_D+ W_DISABLE#1 -WWAN_DISABLE <6,55,57>
USBP5- R793 1 2 0_0201_5%_SM 9 10
<10> USBP5- USB_D- GPIO9/LED1#/DAS/DSS#
11
GND3 NC 12
13 NC NC 14
15 NC KEY-B NC 16
17 NC NC 18
D809 RB521CM-30T2R_VMN2M 19 NC 20
WWAN_CFG0 2 1 WWAN_CFG0_SW 21 GPIO_5 22 @
<8> WWAN_CFG0 CONFIG_0 GPIO_6
23 24 JSIM1
25 GPIO_11 GPIO_7 26 C5
27 DPR GPIO_10 28 GND1 DSW
PCIE6_L1_RXN R10310 1 20_0201_5%_SM PCIE6_L1_RXNR R106421 PCIE6_L1_RXN_R
2 0_0201_5%_SM 29 GND4 GPIO_8 30 UIM_RESET C1 GND2 CSW
<10> PCIE6_L1_RXN PCIE6_L1_RXP PCIE6_L1_RXPR PCIE6_L1_RXP_R PERn1/USB3.0-RX-/SSIC-RxN UIM-RESET UIM_CLK VCC GND3
R10309 1 20_0201_5%_SM R106411 2 0_0201_5%_SM 31 32 R1066 1 2 200_0201_1%
<10> PCIE6_L1_RXP PERp1/USB3.0-RX+/SSIC-RxP UIM-CLK UIM_DATA
33 34 C6 GND1
PCIE6_L1_TXN C2764 1 2 0.22U_0201_6.3V6-K PCIE6_L1_TXN_C 35 GND5 UIM-DATA 36 UIM_PWR VPP GND4 GND2
<10> PCIE6_L1_TXN PCIE6_L1_TXP PETn1/USB3.0-TX-/SSIC-TxN UIM-PWR GND5
C2765 1 2 0.22U_0201_6.3V6-K PCIE6_L1_TXP_C 37 38 GND3
<10> PCIE6_L1_TXP PETp1/USB3.0-TX+/SSIC-TxP DEVSLP GND6
39 40 GND4
PCIE6_L0_SATA1_RXP 41 GND6 GPIO_0 42 C7 GND7 GND5
<10> PCIE6_L0_SATA1_RXP PCIE6_L0_SATA1_RXN PERn0/SATA-B+ GPIO_1 I/O GND8
43 44 GND6
<10> PCIE6_L0_SATA1_RXN PERp0/SATA-B- GPIO_2 GND9
45 46 C3 GND7
PCIE6_L0_SATA1_TXN C9891 1 2 0.22U_0201_6.3V6-K PCIE6_L0_SATA1_TXN_C 47 GND7 GPIO_3 48 CLK GND10 GND8
<10> PCIE6_L0_SATA1_TXN PCIE6_L0_SATA1_TXP C9892 1 PCIE6_L0_SATA1_TXP_C PETn0/SATA-A- GPIO_4 GND11
2 0.22U_0201_6.3V6-K 49 50 C2 GND9
<10> PCIE6_L0_SATA1_TXP PETp0/SATA-A+ PERST# -PLTRST_FAR <13,39,41,45,55,63,64,65,92> RST GND12
51 52 GND10
GND8 CLKREQ# -CLKREQ_PCIE6 <12> GND13
53 54
C <12> -PCIE6_CLK_100M REFCLKN PEWake# C
55 56 JAE_SF72S006VBD
<12> PCIE6_CLK_100M REFCLKP NC1
57 58
GND9 NC2

1
2
3
5
59 60 2
61 ANTCTRL0 COEX3 62 EMC@ C623
63 ANTCTRL1 COEX2 64 D21 4.7U_0402_6.3V6-M
65 ANTCTRL2 COEX1 66 FTZ6.8EGT148_SC-74A5
ANTCTRL3 SIM_DETECT

4
R2563 1 2 0_0201_5% 67 68 1
<8> -WWAN_RESET WWAN_CFG1_SW RESET# SUSCLK
RB521CM-30T2R_VMN2M 2 1 D776 69 70
<8> WWAN_CFG1 CONFIG_1 3.3VAUX3
71 72
73 GND10 3.3VAUX4 74
WWAN_CFG2 75 GND11 3.3VAUX5
<8> WWAN_CFG2 CONFIG_2
76 77 TABLE:
PEG1 PEG2
ARGOS_NASB0-S6705-TSH4 Module Configuration Decodes Module Type
@ Port
CONFIG_0 CONFIG_3 CONFIG_2 CONFIG_1
and
State # Configuration
(Pin 21) (Pin 1) (Pin 75) (Pin 69) Main Host Interface
3

0 GND GND GND GND SSD - SATA N/A


D52
EMC_NS@ 1 GND GND GND NC SSD - PCIe N/A
RCLAMP0502BPTCT_SC75-3
PLACE NEAR J22 2 GND GND NC GND WWAN - PCIe 0
1

3 GND GND NC NC WWAN - PCIe 1


4 GND NC GND GND WWAN - PCIe, USB 3.1 Gen1 0
5 GND NC GND NC WWAN - PCIe, USB 3.1 Gen1 1
6 GND NC NC GND WWAN - PCIe, USB 3.1 Gen1 2
7 GND NC NC NC WWAN - PCIe, USB 3.1 Gen1 3
8 NC GND GND GND WWAN - SSIC 0
9 NC GND GND NC WWAN - SSIC 1
10 NC GND NC GND WWAN - SSIC 2
VCC3M 11 NC GND NC NC WWAN - SSIC 3
B B

12 NC NC GND GND WWAN - PCIe 2


2

13 NC NC GND NC WWAN - PCIe 3


R10659
10K_0201_5% -WWAN_SSD_DTCT 14 GND
-WWAN_SSD_DTCT <57> NC NC NC WWAN - PCIe, USB 3.1 Gen1 Vendor Defined
15 NC NC NC NC No Module Present N/A
1

D
WWAN_CFG1_SW R106581 2 0_0201_5% 2 Q271
G LSK3541G1ET2L_VMT3
VCC3M VCC3M S
3

VCC3B
1

1
R10679 @
R10680 R10234
1

10K_0201_5% 100K_0201_5% D 10K_0201_5%


2 Q274
2

RB521CM-30T2R_VMN2M D806 G LSK3541G1ET2L_VMT3 U189@

2
-WWAN_SSD_DTCT @ D728 1 2 RB521CM-30T2R_VMN2M 2 19 PCIE6_L1_TXP_C
WWAN_CFG0_SW 1 2 S 9 XSD B0_P 18 PCIE6_L1_TXN_C
SEL B0_N
3

17 PCIE6_L1_RXP_R
B1_P
1

D 16 PCIE6_L1_RXN_R
WWAN_CFG3_SW 1 2 2 Q275 PCIE6_L1_TXP @ C2592 1 2 0.22U_0201_6.3V6-K PCIE6_L1_TXP_A0C 3 B1_N 15
G PCIE6_L1_TXN @ C2593 1 2 0.22U_0201_6.3V6-K PCIE6_L1_TXN_A0C 4 A0_P C0_P 14
LSK3541G1ET2L_VMT3 A0_N C0_N
RB521CM-30T2R_VMN2M D807 PCIE6_L1_RXP @ R10644 1 2 0_0201_5% PCIE6_L1_RXP_M 7 13
S PCIE6_L1_RXN @ R10643 1 2 0_0201_5% PCIE6_L1_RXN_M 8 A1_P C1_P 12
A1_N C1_N
3

5
1 GND1 11
VCC3B VDD1 GND2
6 20
@ @ @ 10 VDD2 GND3 21
C9356 C9357 C9358 VDD3 THERMAL_PAD
2 2 2 CBTL02042ABQ_DHVQFN20_2P5X4P5

1
@
TABLE of USB3.0 SW (U189)

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
1 1 1 R10632
TABLE:
A
10K_0201_5% Vendor P/N LCFC P/N A

CONFIG_0 CONFIG_3 CONFIG_2 CONFIG_1 NXP CBTL02042ABQ SA00005R500

2
(Pin 21) (Pin 1) (Pin 75) (Pin 69) Status# Note
PERICOM PI3PCIE3212ZBE SA00005RJ00
Fibcom
L830-EB NC GND GND GND Status# 8 WWAN - SSIC P0 TOSHIBA TC7PCI3212MT SA000066600

Sierra
EM7565 GND NC NC GND Status# 6 WWAN - USB3.1 G1 P2

2242 PCIe Security Classification LC Future Center Secret Data Title


SSD GND GND GND NC Status# 1 WWAN - PCIe
Issued Date 2015/11/02 Deciphered Date 2015/8/10 M.2 SOCKET 2 MODULE I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 46 of 104


5 4 3 2 1
5 4 3 2 1

VCC1R2_RTS5344S VCC1R2_RTS5344S VCC3B_RTS5344S VCC3B_RTS5344S USB2_AV12_RTS5344S VCC3B_RTS5344S DV_12S_RTS5344S

VCC3B VCC3B_RTS5344S

4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M

4.7U_0402_6.3V6-M
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
R10196 2 2 2 2 2 2 2 2 2 2 2 2

C9452

C9451

C9453

C9455

C9454

C9456

C9457

C9458

C9459

C9460

C9461

C9462
1 2
1 1 1 1 1 1 1 1 1 1 1 1
0.01_0603_LE_1%

D D

Near pin5 Near pin32 Near pin7 Near pin8,14 Near pin11 Near pin15 Near pin25

VCC1R2_RTS5344S VCC3B_RTS5344S

USB2_AV12_RTS5344S

DV_12S_RTS5344S
11

25

32

15
5

7
U188

USB3_AV12

USB2_AV12

D3V3

AV33
DV12S

VDD_RX
C9422 1 2 0.1U_0201_6.3V6-K USB3P2_RXN_C 4 26 MOSI_RTS5344S
<10> USB3P2_RXN SS_TX- EEDO/MOSI
C9423 1 2 0.1U_0201_6.3V6-K USB3P2_RXP_C 3 27 SCK_RTS5344S
C <10> USB3P2_RXP SS_TX+ EESK/SCK C
2 28 CS#_RTS5344S
<10> USB3P2_TXN SS_RX- EECS/CS#
1 29 MISO_RTS5344S
<10> USB3P2_TXP SS_RX+ EEDI/MISO

12 30
DM GPIO0
13
DP

GL3213L_X1 9 19
XTLI SD_D0 SD_MMC_D0 <48>
GL3213L_X2 10 18
XTLO SD_D1 SD_MMC_D1 <48>
VCC3B_RTS5344S
23
SD_D2 SD_MMC_D2 <48>
8
3V3_IN1 22
SD_D3 SD_MMC_D3 <48>
14
VCC3_MC 3V3_IN2 24
SD_WP SD_MMC_WPI <48>
16 31
CARD_3V3 SD_CD# SD_MMC_CD <48>
21
SD_CMD SD_MMC_CMD <48>
6
RREF 20 SD_MMC_CLK_R R10308 1 2 0_0201_5%_SM
SD_CLK SD_MMC_CLK <48>
17
SDREG
2
1

VCC3B_RTS5344S 2 EMC_NS@
R10235 C9449 33 C9475
6.2K_0402_1% 1U_0402_6.3V6-K GND 6P_0201_25V8-D
B 1 B
1 RTS5344S-GR_QFN32_4X4
2

Mount 10K if not use crystal


1

10K_0201_5%
R10240
2

VCC3B_RTS5344S VCC3B_RTS5344S
@
R10145
GL3213L_X1 2 1

1
1M_0201_5% 1
GL3213L_X2

1
10K_0201_5% C9450 @
R10238 @ 0.1U_0402_25V6-K R10236 @
@ Y7 2
10K_0201_5%

2
25MHZ_10PF_8Y25000010 U192 @
CS#_RTS5344S 1 8
/CS VCC

2
3 1
3 1 MISO_RTS5344S 2 7
GND2 GND1 VCC3B_RTS5344S MOSI_RTS5344S 5 DO(IO1) /HOLD
@ @ @ DI(IO0) 6 SCK_RTS5344S
2 4 2 2 CLK
C9240 C9241 R10237 1 2 10K_0201_5% 3
12P_0201_25V8-J 12P_0201_25V8-J /WP
4
1 1 GND
W25X10CLSNIG_SO8

A Need to confirm WP and HOLD pin A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEDIA CARD CONTROLLER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 47 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC3_MC

VCC3_MC

1A_32V_ERBRD1R00X
2 2

1
C845 C863
0.1U_0402_10V6-K 10U_0402_6.3V6-M

F61
1 1

2
Near U188
JSD1

1 SD_MMC_D2_CONN R519 1 2 0_0201_5%_SM


DAT2 SD_MMC_D3_CONN SD_MMC_D2 <47>
2 R520 1 2 0_0201_5%_SM
CD/DAT3 SD_MMC_CMD_CONN SD_MMC_D3 <47>
3 R515 1 2 0_0201_5%_SM
CMD SD_MMC_CMD <47>
4
C VSS1 5 C
VDD
6 SD_MMC_CLK_CONN EMC@ R516 1 2 33_0201_5%
CLK SD_MMC_CLK <47>
7
VSS2 8 SD_MMC_D0_CONN R517 1 2 0_0201_5%_SM
DAT0 SD_MMC_D1_CONN SD_MMC_D0 <47>
9 R518 1 2 0_0201_5%_SM
DAT1 SD_MMC_D1 <47>

10 SD_MMC_WPI_CONN EMC_NS@ R9130 1 2 0_0201_5%


W/P SD_MMC_CD_CONN SD_MMC_WPI <47>
11 EMC_NS@ R9131 1 2 0_0201_5%
C/D SD_MMC_CD <47>
12
GND1 13
GND2
2
EMC_NS@ 2 2 2 2 2
T-SOL_156-2000302604_RV C9474 C1065 C9121 C9122 C9123 C9124
@ 10P_0201_25V8-J 8P_0201_25V8-D 2.2P_0402_50V8-C 2.2P_0402_50V8-C 2.2P_0402_50V8-C 2.2P_0402_50V8-C
1 EMC@ EMC@ EMC@ EMC@ EMC@
1 1 1 1 1

B B

VCC3B_RTS5344S VCC3B_RTS5344S

2
R10311 R10312
100K_0201_5% SD_MMC_WPI 100K_0201_5% SD_MMC_CD

1
6

3
Q265A Q265B

D1

D2
SD_MMC_WPI_CONN 2 SD_MMC_CD_CONN 5
G1 G2

S1

S2
NTJD5121NT1G_SC88-6 NTJD5121NT1G_SC88-6

4
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEDIA CARD INTERFACE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 48 of 104


5 4 3 2 1
5 4 3 2 1

TABLE VCC3B
R10410
VCC5B
R10416 Near Pin46 Near Pin41 R10414
VCC5BA
R10603
VCC1R8_SUSA
1 2 1 2 1 2 1 2
Dock support
0.01_0603_LE_1%

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M

10U_0402_6.3V6-M
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
0.01_0603_LE_1% 0.01_0603_LE_1% 0.01_0603_LE_1%
SUPPORT NON-SUPPORT 1 1 1 1 1 1 1 1 1@ 1@ 1 1

C9667

C9668

C9669

C9670

C9671

C9672

C9673

C9674

C9675

C9676

C9677

C9678
2 2 2 2 2 2 2 2 2 2 2 2
R1235 NO ASM NO ASM

R1236 ASM NO ASM


AGND AGND

D R1237 ASM NO ASM D

R1238 ASM NO ASM

LOGIC

18

46

41

40

20
3
U206

DVDD

DVDD-IO

PVDD2

PVDD1

AVDD1

CPVDD/AVDD2
2 -SPK_MUTE
PDB -SPK_MUTE <55,57>
14 HDA_BCLK_R R104611 2 0_0201_5%_SM HDA_BCLK
HP_L_JACK HP_L_JACK_R BCLK HDA_BCLK <9>
R10600 1 2 47_0201_5% 27
<50> HP_L_JACK HPOUT-L HDA_SYNC
15
HP_R_JACK HP_R_JACK_R SYNC HDA_SYNC <9>
R10601 1 2 47_0201_5% 26
<50> HP_R_JACK HPOUT-R 47
MIC2_VREFOL 28 JD2
<52> MIC2_VREFOL MIC2-VREFO-L HP_JD_SYS
48
MIC2_VREFOR JD1 HP_JD_SYS <51>
29
<52> MIC2_VREFOR MIC2-VREFO-R
1
SPDIF-OUT/GPIO2/DMIC-DATA34/DMIC-CLK-IN
4 MIC_DATA
GPIO0/DMIC-DATA12 MIC_DATA <26>
RING2 30
<52> RING2 MIC2-L/RING2 MIC_CLK_R MIC_CLK
5 R104621 2 0_0201_5%_SM
GPIO1/DMIC-CLK MIC_CLK <26>
SLEEVE 31
<52> SLEEVE MIC2-R/SLEEVE 6
BEEP_MIX_ATT C2503 1 2 0.1U_0201_6.3V6-K BEEP_MIX_ATT_C 34 I2C-DATA
<54> BEEP_MIX_ATT PCBEEP 7
I2C-CLK
C VCC5BA C
8
R10468 1 2 10K_0201_5% 33 NC1
5VSTB 9
35 NC2
LINE2-R 10
36 NC3
LINE2-L 11
NC4
12
NC5

C9680 1 2 2.2U_0402_6.3V6-K 23 45 SP_OUTR+_AUDIO


CBP SPK-OUT-R+ SP_OUTR+_AUDIO <53>
24 44 SP_OUTR-_AUDIO
CBN SPK-OUT-R- SP_OUTR-_AUDIO <53>
43 SP_OUTL-_AUDIO
SPK-OUT-L- SP_OUTL-_AUDIO <53>
42 SP_OUTL+_AUDIO
SPK-OUT-L+ SP_OUTL+_AUDIO <53>
32
MIC2-CAP 13
38 DC DET/EAPD
VREF
19 16 HDA_SDIN0_R R10602 1 2 33_0201_5% HDA_SDIN0
LDO3-CAP SDATA-IN HDA_SDIN0 <9>
21 17 HDA_SDO
LDO2-CAP SDATA-OUT HDA_SDO <9>
39
LDO1-CAP 25
TABLE MIC HW ENABLE/DISABLE CPVEE

Thermal Pad

1000P_0201_25V7-K
1000P_0201_25V7-K
1000P_0201_25V7-K

1000P_0201_25V7-K
AVSS1

AVSS2

1 10K_0201_5%
1U_0402_6.3V6-K
2.2U_0402_10V6-K
ENABLE DISABLE

47P_0402_25V8-J
47P_0402_25V8-J
ALC3287-CG_MQFN48_6X6

37

22

49
2.2U_0402_10V6-K

2.2U_0402_10V6-K

2.2U_0402_10V6-K
2.2U_0402_10V6-K

2.2U_0402_10V6-K

R961 ASM NO ASM


33P_0402_50V8-J

33P_0402_50V8-J

33P_0402_50V8-J
33P_0402_50V8-J

B B
1 1 1 1 1
1 1 1

2 2 2 2 2

R10460 2
2 2 2

C9683

C243
C122

C127

C117
1 1 1 1 1 1 1 1 1

C9681
C9857

C9682
LOGIC
@
2 2 2 2 2 2 2 2 2 @ @
C9686

C9687

C9684
C9685

C9856

C544
C9855

C543

C9490

@ @ @ @

AGND AGND
AGND AGND AGND

VCC1R8_SUS VCC1R8_SUSA

VCC5B VCC5BA VCC1R8_SUS VCC1R8_SUSA


R10419 R10203

0.1U_0402_10V6-K

1
1 2 1 2 1 1

C9489
R10324 @
10U_0402_6.3V6-M
10U_0402_6.3V6-M

10U_0402_6.3V6-M

4.7U_0402_6.3V6-M
0.1U_0402_10V6-K
0.1U_0402_10V6-K

0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K

C9488 10_0201_5%
0.01_0603_LE_1% 0.01_0603_LE_1% U194 @
1U_0201_6.3V6-K
2 2@
2 2 2 2 2 2 2 2 @

2
C9141

C2573

C2571
C318

C2574

C2572
C333

C30

1 6
@ @ VIN VOUT

1 1 1 1 1@ 1 1 1 2 5
@ @ GND QOD
C36 C2575 @
1 2 1 2 R10315 1 2 0_0402_5% 3 4
<13,56,59,64,66> BPWRG ON CT
0.01U_0201_6.3V7-K 0.01U_0201_6.3V7-K VCC3B R10316 1 @ 2 0_0402_5% 1
A
TPS22918DBVR_SOT23-6 A
C9486 @
AGND AGND 1000P_0201_25V7-K
2
PLACE UNDER ALC3287

EMC_NS@
C143 EMC@
1 2 R10082 1 2 0_0402_5%
Security Classification LC Future Center Secret Data Title
0.01U_0201_6.3V7-K
Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO ALC32870-CG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
AGND AGND DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 49 of 104


5 4 3 2 1
5 4 3 2 1

NEAR AUDIO CONN


EMC@
FL3
HP_L_JACK 1 2
<49> HP_L_JACK
D MMZ1005Y152CT_2P D

EMC@
FL5
HP_R_JACK 1 2
<49> HP_R_JACK
MMZ1005Y152CT_2P

2 EMC@ 2 EMC@

2
C13 C197
R742 R743 1000P_0201_25V7-K 1000P_0201_25V7-K
220_0201_5% 220_0201_5%
@ @ 1 1

1
AGND AGND

VCC3B

WIDE AND SHORT PATTERN


1

R10463
10K_0201_5%
2

C C
0.1U_0201_6.3V6-K

1
C9688

JHP1 @
WIDE PATTERN

3 MIC_RING2
G/M MIC_SLEEVE MIC_RING2 <52>
MIC_SLEEVE <52>
1
L
HP_L_JACK_CONN
HP_R_JACK_CONN
5
WIDE PATTERN
5
6 HP_JACK_IN
6 HP_JACK_IN <51,55,57>
2
R
EMC@
EMC@

EMC@

EMC@

7 4
MS M/G
D24
D25

1 D99

1 D94

SINGA_2SJ3108-078111F
2

1
1

R139
100K_0201_5%
2
2

Pin 4 and 5 : Normal Open


1

B B
RSB5.6SGTE61_SC-79-2-2
RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

RSB5.6SGTE61_SC-79-2-2

AGND

Serial Debug Near J19 side


HP_L_JACK_CONN @ R10619 2 1 0_0201_5%
UART_RX <57>
HP_R_JACK_CONN @ R10620 2 1 0_0201_5%
UART_TX <57>
EMC@ C162

1 2

1U_0402_6.3V6-K

AGND

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 50 of 104


5 4 3 2 1
5 4 3 2 1

VCC3B

EMC@

2
R104651 2 0_0201_5%
R10133
100K_0201_5%

1
AGND

R10132
D D
1 2
HP_JD_SYS <49>
200K_0201_1%

R10464

1
D
HP_JACK_IN 1 2 2 Q50
<50,55,57> HP_JACK_IN G LSK3541G1ET2L_VMT3
22K_0201_5% S

3
2
C9689
2.2U_0402_6.3V6-K
@
1

AGND AGND

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 51 of 104


5 4 3 2 1
5 4 3 2 1

D MIC2_VREFOR D
<49> MIC2_VREFOR

2
C1416
1U_0402_6.3V6-K
1

2
R1219
2.2K_0402_5%
AGND

1
R10096 1 2 0_0201_5%_SM

MIC2_VREFOL
<49> MIC2_VREFOL

2
2
C73 R460
1U_0402_6.3V6-K 2.2K_0402_5%
1

1
AGND
R10097 1 2 0_0201_5%_SM

C C

R125
MIC_SLEEVE 1 2
<50> MIC_SLEEVE SLEEVE <49>
0_0402_5%_SM

2
2@
R142 C1417
0_0201_5% 1000P_0402_50V7-K
@
1
1

EMC@ R6

1 2

0_0201_5%
AGND AGND

AGND
R126
EMC@ C91
B MIC_RING2 1 2 B
<50> MIC_RING2 RING2 <49>
1 2
0_0402_5%_SM
.01U_0402_25V7-K
2

2@
R144 C142
0_0201_5% 1000P_0201_25V7-K
@ AGND
1
1

AGND AGND

NEAR EXT MIC CONN

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO EXT MIC I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 52 of 104


5 4 3 2 1
5 4 3 2 1

D D

JSPK1
EMC@ L11 1 2 BLM18PG221SN1D_2P SP_OUTL+ 1
<49> SP_OUTL+_AUDIO SP_OUTL- 1
EMC@ L12 1 2 BLM18PG221SN1D_2P 2
<49> SP_OUTL-_AUDIO SP_OUTR- 2
EMC@ L13 1 2 BLM18PG221SN1D_2P 3
<49> SP_OUTR-_AUDIO SP_OUTR+ 3
EMC@ L14 1 2 BLM18PG221SN1D_2P 4
<49> SP_OUTR+_AUDIO 4
5
6 GND1
GND2

HIGHS_WS33040-S0351-HF
@

C 2@ 2@ 2@ 2@ C
C166 C168 C169 C175
220P_0201_25V7-K 220P_0201_25V7-K 220P_0201_25V7-K 220P_0201_25V7-K
1 1 1 1

PLACE, NEAR SPEAKER CONNECTOR

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO SPEAKER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 53 of 104


5 4 3 2 1
5 4 3 2 1

D D

D739
2 1
<9> PCH_SPKR
RB521CM-30T2R_VMN2M

4.7K_0201_5%
D740

2
2 1
<55> EC_SPKR

R10466
RB521CM-30T2R_VMN2M

4.7K_0201_5%
2
R10467
1
BEEP_MIX_ATT
BEEP_MIX_ATT <49>
C C

1
D
-BEEP_ENABLE 2 Q38
<55,57> -BEEP_ENABLE G LSK3541G1ET2L_VMT3

3
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 AUDIO BEEP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 54 of 104


5 4 3 2 1
5 4 3 2 1

VCC3M VCC3B VCC3M

-PLTRST_FAR LPCCLK_EC_24M

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%
2 2
C572 C578
0.1U_0201_6.3V6-K 33P_0201_25V8-J
EMC@ EMC@
1 1

100K_0201_5%
R8820 2
R276 2

R274 2

R8818 2

2
D D

R1212

R10134
R831

R906
1
1

1
U23A
VCC3M VCC3SW VCC3B
DRV[15:0] <58>
-EC_RESET F1 L11 DRV0
<65> -EC_RESET RESETI# KSO0 B7 DRV1
KSO1 E6 DRV2
SUSCLK_32K B3 KSO2 B6 DRV3
<12,45> SUSCLK_32K 32KHZ_IN/GPIO165 KSO3 H12 DRV4
-KBRC J5 KSO4 G10 DRV5 -HOTKEY
<7> -KBRC KBRST KSO5

100K_0201_5%

100K_0201_5%

100K_0201_5%

100K_0201_5%
G9 DRV6
KSO6 H13 DRV7
-EC_SCI K6 KSO7 C6 DRV8
<8> -EC_SCI EC_SCI# KSO8 2
C7 DRV9 C9125
-EC_WAKE N7 KSO9 B5 DRV10 0.1U_0201_6.3V6-K
<8> -EC_WAKE SMI# KSO10 H10 DRV11 EMC@
KSO11 1

HOST I/F
-SUS_STAT H6 H11 DRV12
<7,64> -SUS_STAT LPCPD# KSO12 A5 DRV13
KSO13

2
-CLKRUN L5 L13 DRV14
<7,64> -CLKRUN CLKRUN# KSO14 N12 DRV15
IRQSER N5 KSO15 M11
<7,64> IRQSER SER_IRQ KSO16/GPIO152 D5
KSO17/GPIO175

Keyboard/TrackPoint

R1014 1

R8939 1

R1802 1

R2473 1
-PLTRST_FAR M5
<13,39,41,45,46,63,64,65,92> -PLTRST_FAR LRESET# SENSE[7:0] <58>
-LPC_FRAME L6 N13 SENSE0
<7,64> -LPC_FRAME LFRAME# KSI0 J6 SENSE1
LPCCLK_EC_24M N6 KSI1 N8 SENSE2
<7> LPCCLK_EC_24M PCI_CLK KSI2 J11 SENSE3
LPC_AD0 M6 KSI3 J12 SENSE4
LPC_AD1 M7 LAD0 KSI4 J13 SENSE5
LPC_AD2 L7 LAD1 KSI5 M12 SENSE6
LPC_AD3 K7 LAD2 KSI6 M13 SENSE7
LAD3 KSI7
<7,64> LPC_AD[3:0]
C C
C2 -HOTKEY
VCI_IN2#/GPIO161 -HOTKEY <58>
M_TEMP R439 1 2 1K_0201_5% K3 M9 KBD_BL_PWM
<68> M_TEMP ADC0/GPIO200 PWM0/GPIO053 KBD_BL_PWM <58>
I2C_DATA_BT0 E7 A6 -KBD_BL_DTCT
<68> I2C_DATA_BT0 I2C_CLK_BT0 SMB00_DATA GPIO036 -KBD_BL_DTCT <58>
A7
<68> I2C_CLK_BT0 SMB00_CLK

Battery
F11 R412 1 2 33_0201_5% IPDCLK
-CHG_PROCHOT PS2_CLK0A/GPIO114 IPDCLK <59>
H7
GPIO223 K13 R153 1 2 33_0201_5% IPDDATA
PS2_DAT0A/GPIO115 IPDDATA <59>
K1
ADC1/GPIO201
J7 -LID_CLOSE_EC
I2C_DATA_CHARGE GPIO052 -LID_CLOSE_EC <59>
R62 1 2 100_0201_5% E8
<69> I2C_DATA_CHARGE I2C_CLK_CHARGE SMB02_DATA TP4_RESET
R63 1 2 100_0201_5% B8 A13
<69> I2C_CLK_CHARGE SMB02_CLK GPIO133 TP4_RESET <58>
C12 PAD_DISABLE
GPIO134 PAD_DISABLE <59>
R282 1 2 1K_0201_5% L4
<68> S_TEMP ADC4/GPIO204
-REAR_EJECT_LEVER G7
GPIO224
C9 VGA_BLON
GPIO143/SMB04_DATA VGA_BLON <3>

LCD
A8 BACKLIGHT_ON
GPIO144/SMB04_CLK BACKLIGHT_ON <26>
-LED_LOGO A4
<26> -LED_LOGO LED0/GPIO156
-LED_PWR F5
<26> -LED_PWR LED1/GPIO157 BDC_ON
C11
GPIO145/JTAG_TDI BDC_ON <45,57>

Wireless
-LED_MICMUTE C3 A11 -WWAN_DISABLE
<58> -LED_MICMUTE GPIO024 GPIO146/JTAG_TDO -WWAN_DISABLE <6,46,57>
-LED_MUTE D12 C10 -WLAN_RF_KILL
<58> -LED_MUTE GPIO035 GPIO147/JTAG_CLK -WLAN_RF_KILL <45,57>

LED
-LED_FNLOCK F6
<58> -LED_FNLOCK GPIO034
-LED_CAPSLOCK H2
<58> -LED_CAPSLOCK GPIO221 J8
B PWM2/GPIO055 EC_SPKR <54> B
LED_AC_CON C5 K5 -BEEP_ENABLE
GPIO225 GPIO166 -BEEP_ENABLE <54,57>

Audio
LED_AC_CHG H1 D10 R2434 1 20_0201_5%_SM -SPK_MUTE
GPIO226 GPIO171/MSDATA -SPK_MUTE <49,57>
E10 R2435 1 20_0201_5%_SM HP_JACK_IN
GPIO170/MSCLK HP_JACK_IN <50,51,57>
1

220P_0201_25V7-K
220P_0201_25V7-K
S5

2 10K_0201_5%

2 10K_0201_5%

100K_0201_5%
2 10K_0201_5%

100K_0201_5%
MEC1653

0.1U_0402_25V6-K
SPVT210101_4P
D20

1
@

PESD5V0H1BSF_SOD962-2
1
2

2
2 2 2

2
R2382 1

R2383 1
R10122 1

2
1 1 1

C4549

R8826 1

R2474 1
C196
C188
A1 Pin : ORANGE
A2 Pin : WHITE

VCC3M
R2816
68_0402_5% LED1
LED_AC_CHG 1 2 1 + - 4
ORG
R2817
2

LED_AC_CON 1 2 2 + - 3
R2574 WHI
100K_0201_5% 68_0402_5% 19-223-S2T1D-C01-2T-WSN_ORG_WHI

2 2
1

C2825 C2826
VCCSTG -CHG_PROCHOT 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K
A A
@ @
1 1
1

Q199
2 DTC015TMT2L NPN VMT3
3

Security Classification LC Future Center Secret Data Title


<6,56,69,72> -PROCHOT
Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEC1653(1/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 55 of 104


5 4 3 2 1
5 4 3 2 1

R258: 750_1% for New AC Adapter VCC3M

VCC3M
VCC3M VCC3M
R2156 1 2 75_0201_5%
-PROCHOT <6,55,69,72>

100K_0201_5%
place near Q133

1
10K_0201_5%

10K_0201_5%

10K_0201_5%

100K_0201_5%

10K_0201_5%

100K_0201_5%

10K_0201_5%
R258
D
2
PROCHOT_EC

D263
2 Q133 C246
D D

2
G LSK3541G1ET2L_VMT3 47P_0201_25V8-J

2
R2418 R2419
@ 2.2K_0201_5% 2.2K_0201_5% R990 S 1

3
100K_0201_5%

2
750_0201_1%

RB520CM-30T2R_VMN2M2
1

1
R281

1
2
2

2
R1152
R10295

R10294

R2388

R278

R935

R2389

1
U23B

1
1

Sensor
-PWRSW D7 D8 R2469 1 2 22_0201_5% I2C_DATA_GSENSE
<65> -PWRSW GPIO127/A20M SMB01_DATA/GPIO005 I2C_DATA_GSENSE <62>
-PWRSW_EC G2 C8 R2470 1 2 22_0201_5% I2C_CLK_GSENSE
<13> -PWRSW_EC GPIO106 SMB01_CLK/GPIO006 I2C_CLK_GSENSE <62>

D7
-EXTPWR 1 2 RB521CM-30T2R_VMN2M L9
<65,69> -EXTPWR GPIO001/PWM4
R2090 1 2 10K_0201_5% L2 M1 FAN_ID
ADC2/GPIO202 ADC3/GPIO203 FAN_ID <61>
AC_PRESENT E2

FAN
<13> AC_PRESENT GPIO022 FAN_ON
N9
PWM1/GPIO054 FAN_ON <61>
-SHUTDOWN
-SHUTDOWN <66,97>
-PCH_SLP_SUS K12 D6 FAN_FRQ
<13> -PCH_SLP_SUS GPIO140/SMB06_CLK FAN_TACH0/GPIO050 FAN_FRQ <61>
-RSMRST E3
<13,19> -RSMRST BGPO3/GPIO172

1
SUS_ON1 B2 VCCST VCC3B
<66,83> SUS_ON1 BGPO1/GPIO101 Q141
SUS_ON2 C4 BPWRG 2 DTC115EMGT2L_VMT3
<78> SUS_ON2 BGPO2/GPIO102

Power Management
B11
VREF_VTT

3
-PCH_SLP_S3 G11 B12 R925 1 2 43_0201_5% PECI
<13,17,31,65,89> -PCH_SLP_S3 GPIO110 PECI_DAT PECI <6>

2
-PCH_SLP_S4 G12 R8783
<13,17,65,80> -PCH_SLP_S4 GPIO111 4.7K_0201_5%
BPWRG F3
C <13,49,59,64,66> BPWRG VCC_PWRGD C
2

2
D9 R68 1 2 100_0201_5% EC_SDA2 C6307
SMB03_DATA/GPIO007 EC_SDA2 <7>
R8784 0.1U_0201_6.3V6-K
-LID_CLOSE A1 F8 R69 1 2 100_0201_5% EC_SCL2 1K_0201_5%
<26> -LID_CLOSE VCI_IN3#/GPIO000 SMB03_CLK/GPIO010 EC_SCL2 <7> 1

1
-PCH_SLP_WLAN A12
<13> -PCH_SLP_WLAN GPIO043
E12 R8782 1 20_0201_5%_SM -THRM
M8 SYS_SHDN#
GPIO222

Thermal
-RJ45_LINKUP G3
<41,42> -RJ45_LINKUP GPIO033 G13 2SCR523MT2L_VMT3
DP1_DN4
-DOCK_ATTACHED_3M B10
<57> -DOCK_ATTACHED_3M GPIO150/JTAG_TMS F13 2 2
REMOTE
2
DN1_DP4

1
C6321 C2608 DIODE 4 E
C6322 C
2200P_0201_25V7-K 2 Q198 2 Q142
B
N1 E13 22P_0201_25V8-J 22P_0201_25V8-J B 2SCR523MT2L_VMT3
ADC5/GPIO205 DP2_DN5 1 1 C 1 REMOTE E

3
J4 DIODE 1
GPIO227 D13
PROCHOT_EC D3 DN2_DP5 PLACE NEAR MEC1653 PLACE NEAR DIODE 4 PLACE NEAR DIODE 1
LED2/GPIO153 2SCR523MT2L_VMT3
C13 REMOTE
DP3_DN6 DIODE 5
2 2 2

1
C6324 C9196 C6328 C
E
B13 2200P_0201_25V7-K 2 Q261 2 Q145
B
AOU_SEL1 M10 DN3_DP6 22P_0201_25V8-J 22P_0201_25V8-J B 2SCR523MT2L_VMT3
<40> AOU_SEL1 GPIO015/PWM7 1 1 C 1 REMOTE E

3
AOU_SEL2 L8 DIODE 2
<40> AOU_SEL2 GPIO016

USB/AOU
-AOU_IFLG H9 PLACE NEAR MEC1653 PLACE NEAR DIODE 2
<40> -AOU_IFLG GPIO025/UART_CLK D11 2SCR523MT2L_VMT3
GPIO220/VIN -PD_I2C_INT <33>
REMOTE
2 2 2

1
USB_ON1 B4 C6325 C6327 DIODE 6 E
C6329 C
<40> USB_ON1 BGPO4/GPIO173 E11 2200P_0201_25V7-K 2 Q144 2 Q146
B
USB_ON2 E4 VSET 22P_0201_25V8-J 22P_0201_25V8-J B 2SCR523MT2L_VMT3
<40> USB_ON2 BGPO5/GPIO174 1 1 C 1 REMOTE E
B B

3
DIODE 3
C934

100K_0201_5%

100K_0201_5%

100K_0201_5%

D77 PLACE NEAR MEC1653 PLACE NEAR DIODE 6 PLACE NEAR DIODE 3

R8792
EMC@
1
100K_0201_5%

2 MEC1653
2

2
UCLAMP3301H.TCT_SOD523-2

TABLE
1
R2384

1 Sensor Device Placed on

4.53K_0201_1%
DIODE0 EC internal TOP
1

1
2

2
0.1U_0402_25V6-K
2

R2385

R2386

R2387

DIODE1 CPU DC/DC BOTTOM


2

DIODE2 WWAN BOTTOM


1

DIODE3 WLAN BOTTOM


VCC3SW
DIODE4 FAN BOTTOM
DIODE5 dGPU DC/DC BOTTOM
2

DIODE6 DIMM BOTTOM


R2579
10K_0201_5% -RSMRST
1

D
2 Q201
G LSK3541G1ET2L_VMT3
1

D @ S
3

MPWRG 2 Q200 1 C9491


<13,66> MPWRG G LSK3541G1ET2L_VMT3 0.1U_0201_6.3V6-K
S
3

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEC1653(2/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 56 of 104


5 4 3 2 1
5 4 3 2 1

VCC3M VCC3M_EC

R288 1 2 10_0402_5%

Trace FIFO Debug Port 2


C292
2
C294
2
C295
2 2
C290 C291 VCC3M VCC3M_EC
Enable Disable 10U_0402_6.3V6-M 4.7U_0402_6.3V6-M
1 1 1

0.01U_0201_6.3V7-K
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
1 1 R10204 1 20.01_0603_LE_1%
R2434 22_5% 0_5%
R2435 22_5% 0_5%
R420 NO_ASM ASM
VCC3SW VCC3M VCC3SW VCC3M_EC

0.01_0603_LE_1%

0.01_0603_LE_1%
D D

2
R10205
VCC3M VCC3_LDO_TBT

R10206
1

1
@

2
R10673 R10672

1
1M_0201_5%

1M_0201_5%
100K_0201_5%

100K_0201_5%
0_0201_5% 0_0201_5% @

R1804
2
VCC3M

2
VCC3M_EC
VCC3B

1M_0201_5%

2 R10256
2 R10322

2 R10323

2 R10255

2 R10333
1

R2390 2

R2391 2

R2392 2
R1105

F12
G6
G8
H8

H3

H4
F4

J1
J3
U23C @ @

1
2

VBAT

VTR_REG

VR_CAP
VTR
VTR_18
VTR_LPC

VTR_FLASH

AVTR_ADC
VREF_ADC
2

2
R504 R505 SWG@ SWG@

10K_0201_5% 1
10K_0201_5% 1

10K_0201_5% 1

10K_0201_5% 1
10K_0201_5% 1
3.3K_0201_5% 3.3K_0201_5% R10635 R10636
2.2K_0201_5% 2.2K_0201_5%
1

1
I2C_DATA_VIDEO SWG@ R2471 1 2 22_0201_5% J10 L12 I2C_DATA_BT1
<97> I2C_DATA_VIDEO GPIO130/SMB10_DATA GPIO012/SMB07_DATA I2C_DATA_BT1 <68>
I2C_CLK_VIDEO SWG@ R2472 1 2 22_0201_5% K10 K11 I2C_CLK_BT1
<97> I2C_CLK_VIDEO GPIO131/SMB10_CLK GPIO013/SMB07_CLK I2C_CLK_BT1 <68>
N11 B_ON
GPIO014/PWM6 B_ON <64,65,79,89>
E9
<28,29,33> I2C_DATA_PD GPIO141/SMB05_DATA
B9 E1
<28,29,33> I2C_CLK_PD GPIO142/SMB05_CLK GPIO023
F10 -PCH_SLP_LAN
GPIO135 -PCH_SLP_LAN <13>
VCC3M VCC3M
R10621 1 2 0_0201_5% UART_TX F9
<97> -VIDEO_THERM_ALERT GPIO104/UART_TX
UART_RX A9 M3
GPIO105/UART_RX ADC6/GPIO206
2
2

C SWG@ N3 TOUCH_EN C
ADC7/GPIO207 TOUCH_EN <26>
R8796 R10123
10K_0201_5% 100K_0201_5% N10 J2 -TBT_USB2_BUS_EN
<36> -USBC_USB2_BUS_EN GPIO056/PWM3 ADC8/GPIO210 -TBT_USB2_BUS_EN <35>
@
E5 K2 GSENSE_INT
GPIO051/FAN_TACH1 ADC9/GPIO211 GSENSE_INT <62>
1
1

L1 KBD_ID
VIDEO_ID ADC10/GPIO212 KBD_ID <58>
F2
GPIO062 L3
-JTAG_RST A10 ADC11/GPIO213
JTAG_RST# M2
ADC12/GPIO214
N2 -TBT_RESET_EC
ADC13/GPIO215 -TBT_RESET_EC <31>
2

2 UMA@ ECSPI_CLK J9 M4
<65> ECSPI_CLK SPI_CLK ADC14/GPIO216 -VIDEO_POWER_LIMIT <97>
C6330 R8797 R263
0.1U_0201_6.3V6-K 10K_0201_5% 100K_0201_5% ECSPI_MOSI K9 N4 -EC_SLP_LAN
<65> ECSPI_MOSI SPI_MOSI ADC15/GPIO217 -EC_SLP_LAN <65>

SPI
1 ECSPI_MISO K8
<65> ECSPI_MISO SPI_MISO
1

-ECSPI_SS L10
<65> -ECSPI_SS SPI_CS#

-HDD_DTCT D2
VBAT
<39> -HDD_DTCT VCI_IN0#/GPIO163

-INTRUDER_EC G1 D1 EC_PWRREQ
<13> -INTRUDER_EC VCI_IN1#/GPIO162 VCI_OUT EC_PWRREQ <65>

-WWAN_SSD_DTCT B1
<46> -WWAN_SSD_DTCT VCI_IN4#/GPIO234

A2 C1 -BATLOW
VCI_IN5#/GPIO235 BGPO0 -BATLOW <13,31>
10K_0201_5%
10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%

TABLE : VIDEO_ID
D4 UMA@ @ @ @ @ @ @
VCI_IN6#/GPIO167 R2410 R2411 R2398 R10307 R2399 R2400 R2402 R2414 R2412 R2413 R2415 R2416 R2417
R263 R10123

2
2

2
2

2
SWG NO_ASM ASM

VSS_ADC
VSS_RO
B B
2
1

2
1

BGND
UMA ASM NO_ASM
VSS0
VSS1
VSS2

100K_0201_5%

100K_0201_5%

10K_0201_5%

10K_0201_5%

10K_0201_5%
100K_0201_5%

100K_0201_5%

100K_0201_5%

100K_0201_5%

100K_0201_5%
10K_0201_5%

10K_0201_5%

10K_0201_5%
R2448

R2449

R2396
R2408

R2409

R2395

1
1

1
1

2
MEC1653
H5
G5
F7
G4

K4

A3
R2404 R1208
@1
UMA@ 2

UMA@ 1

1
UMA@ 2

100K_0201_5% 100K_0201_5%

UART_TX
<50> UART_TX

1
UART_RX
<50> UART_RX

TP915 TP912
Test_Point_20MIL Test_Point_20MIL

1
TP916 1 TP910 TP911
Test_Point_20MIL Test_Point_20MIL Test_Point_20MIL
Cover with green paint in SVT
VCC3M 1

1
1

JTAG Debug Port

Enable Disable
R10318 R2429 R2430 R2431
2
2

R8796 NO_ASM -BEEP_ENABLE


ASM -BEEP_ENABLE <54,55>

R8797 NO_ASM -SPK_MUTE


@ @ @ @
ASM -SPK_MUTE <49,55>

R2429 NO_ASM HP_JACK_IN


A ASM HP_JACK_IN <50,51,55> A
1
1

1
10K_0201_5%
10K_0201_5%

10K_0201_5%

10K_0201_5%

R2430 ASM NO_ASM


R2431 ASM NO_ASM
JTAG2 R10318 ASM NO_ASM
1 EC_JTAG_TMS @ R10288 1 2 0_0201_5%
1 EC_JTAG_TDI -DOCK_ATTACHED_3M <56>
2 @ R10289 1 2 0_0201_5% R10288 ASM NO_ASM
2 EC_JTAG_TDO BDC_ON <45,55>
3 @ R10290 1 2 0_0201_5%
3 EC_JTAG_TCK -WWAN_DISABLE <6,46,55>
4 @ R10291 1 2 0_0201_5% R10289 ASM NO_ASM
4 -WLAN_RF_KILL <45,55>
5
5 6 PLACE NEAR EC
6 R10290 ASM NO_ASM
Security Classification LC Future Center Secret Data Title
7 R10291 ASM NO_ASM
GND1 8
GND2 Issued Date 2015/11/02 Deciphered Date 2015/8/10 MEC1653(3/3)
HIGHS_WS32061-S0471-HF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 57 of 104


5 4 3 2 1
5 4 3 2 1

VCC3M VCC3M

2
15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%

15K_0201_5%
F25
0.5A_32V_ERBRD0R50X

D D

1
2

2
2

2
1
C2582
0.1U_0201_6.3V6-K

1
1

1
1

1
2 VCC_TP VCC_TP VCC3B VCC5B VCC5B

R8985

R8989
R8986

R8990
R8987

R8991
R8988

R8992
JKBL1 @

36
<57> KBD_ID 36
TP4MIDDLE 35
TP4RIGHT 34 35
TP4LEFT 33 34
32 33 @
-LED_CAPSLOCK R2450 1 2 100_0201_5% 31 32 R293 R294 R324 @ C9145 C296
<55> -LED_CAPSLOCK 31

2
30 F42 2 F13 2 F23
30

2
-HOTKEY 29
<55> -HOTKEY -LED_MICMUTE 29
R944 1 2 100_0201_5% 28
<55> -LED_MICMUTE -LED_MUTE 28
R41 1 2 100_0201_5% 27

1A_32V_ERBRD1R00X

1A_32V_ERBRD1R00X

1A_32V_ERBRD1R00X
0.01U_0201_6.3V7-K

0.01U_0201_6.3V7-K
<55> -LED_MUTE 27 1 1

10K_0201_5%
-LED_FNLOCK

4.7K_0201_5%

4.7K_0201_5%
R103 1 2 100_0201_5% 26
<55> -LED_FNLOCK 26
25
25

1
DRV11 24
<55> DRV[15:0] 24
DRV8 23
DRV10 22 23
DRV12 21 22
C DRV9 20 21 C
DRV13 19 20
DRV15 18 19 VCC_TP JTP1
DRV5 17 18 12 14
DRV7 16 17 -KBD_BL_DTCT 11 12 GND2 13
16 <55> -KBD_BL_DTCT KBD_BL_PWM 11 GND1
DRV6 15 10
15 <55> KBD_BL_PWM 10
DRV3 14 9
<55> SENSE[7:0] 14 9
DRV1 13 TP4CLK R510 1 20_0201_5%_SM 8
13 <59> TP4CLK 8
SENSE5 12 7
DRV2 11 12 TP4LEFT 6 7
DRV4 10 11 TP4RIGHT 5 6
SENSE0 9 10 TP4MIDDLE 4 5
SENSE2 8 9 TP4_RESET 3 4
8 <55> TP4_RESET 3
DRV0 7 TP4DATA R511 1 20_0201_5%_SM 2
7 <59> TP4DATA 2
SENSE1 6 1
SENSE4 5 6 1
DRV14 4 5 HIGHS_FC1AF121-1151H
SENSE6 3 4 @
SENSE7 2 3 38
SENSE3 1 2 GND2 37
1 GND1
1 2 2
-KBD_BL_DTCT TP4CLK TP4DATA C8308 C8285 C8286
HIGHS_FC5AF361-1151H 220P_0201_25V7-K 22U_0603_6.3V6-M 22U_0603_6.3V6-M
2 1 1
2 2 2
C565 C566 C567
220P_0201_25V7-K 10P_0201_25V8-J 10P_0201_25V8-J
-LED_FNLOCK -LED_MUTE -LED_MICMUTE -LED_CAPSLOCK -HOTKEY EMC@ EMC@ EMC@
1 1 1

2 2 2 2 2
C568
B C9896 C9895 C9894 C9893 0.1U_0402_25V6-K B
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K EMC@
1 EMC@ 1 EMC@ 1 EMC@ 1 EMC@ 1

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 KEYBOARD/TRACK POINT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 58 of 104


5 4 3 2 1

C
5 4 3 2 1

VCC3B VCC3B

2
F15
VCC3B VCC5B

0.5A_32V_ERBRD0R50X
R24 R25

2
F38 F40
D D

4.7K_0201_5%

4.7K_0201_5%

0.5A_32V_ERBRD0R50X

0.5A_32V_ERBRD0R50X
1

1
JNFC1
VCC5B_NFC 1
VCC3B_NFCIO 2 1
I2C0_DATA_NFC 3 2
I2C0_CLK_NFC 4 3
5 4
NFC_INT 6 5
<10> NFC_INT -NFC_DTCT 6
JCP1@ 7
<7> -NFC_DTCT NFC_ON 7
12 14 8
SMB_CLK_3B 12 GND2 <10> NFC_ON NFC_ACTIVE 8
11 13 R9141 1 20_0201_5%_SM 9
<22,24,64> SMB_CLK_3B 11 GND1 <9> NFC_ACTIVE 9
10 10
TP4DATA 9 10 11 10 13
<58> TP4DATA 9 NFC_DLREQ 11 GND1
TP4CLK 8 12 14
<58> TP4CLK SMB_DATA_3B 8 <8> NFC_DLREQ 12 GND2
7
<22,24,64> SMB_DATA_3B VCC3B_PAD 7
6 HIGHS_FC5AF121-2131H
-LID_CLOSE_EC 5 6
<55> -LID_CLOSE_EC 5 @

2
IPDCLK 4
<55> IPDCLK 4
IPDDATA 3 R2723 R2724 R10301
<55> IPDDATA NFC_ACTIVE 3
2 100K_0402_5% 100K_0402_5% 100K_0402_5%
PAD_DISABLE 1 2 VCC3B
<55> PAD_DISABLE 1

1
HIGHS_FC5AF121-2131H

2
C VCC5M VCC3_SUS C
R9137 R9136
10K_0201_5% 10K_0201_5%

1
U183
I2C0_CLK_NFC 1 5
I2C0_DATA_NFC A Vcc

2
2 R9134 R9135
B 10K_0201_5% 10K_0201_5%

3 4
GND OE

1
SN74LVC1G66DCK_SSOP5
I2C0_CLK
I2C0_DATA I2C0_CLK <8>
I2C0_DATA <8>
BPWRG
<13,49,56,64,66> BPWRG

U184
1 5
A Vcc

2
B
2
C9130
3 4 0.01U_0201_6.3V7-K
GND OE
1
SN74LVC1G66DCK_SSOP5

VCC3B
VCC5B
TABLE of U183/U184
B Vendor P/N LCFC P/N B

2
F8
TI SN74LVC1G66DCK SA00005BE0J

0.5A_32V_ERBRD0R50X
NXP 74LVC1G66GW SA00007KS00
ONSemi MC74VHC1G66DFT2G SA00008JQ00
2

1
C2542 2
0.1U_0201_6.3V6-K F43
1A_32V_ERBRD1R00X
1 JFPR1
FUSEVCC3FP 1
USBP8- R799 1 20_0201_5%_SM USBP8-_CONN 2 1
<10> USBP8- 2
1

JSC1 USBP8+ R800 1 20_0201_5%_SM USBP8+_CONN 3


<10> USBP8+ 3
1 4
2 1 5 4
3 2 6 5
SMB_CLK_3B SMB_DATA_3B <9> -SC_DTCT 3 6
USBP2+ 4 7
<10> USBP2+ 4 7
USBP2- 5 8
<10> USBP2- 5 8
6
6
1

9
D82 D81 7 10 GND1
1

EMC@ EMC@ 8 GND1 GND2


GND2 ELCO_04-6811-608-000-846+
HIGHS_FC5AF061-2131H @
-SC_DTCT @ D291 D292

1
EMC@ EMC@ 2
2

C208

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
1

1
UCLAMP3301H.TCT_SOD523-2 UCLAMP3301H.TCT_SOD523-2 2 2.2U_0402_6.3V6-K
2

C569
0.1U_0402_25V6-K 1
EMC@
1

2
IPDCLK IPDDATA TP4CLK TP4DATA

2
A A
D83 D84 D778 D779
1
1

EMC@ EMC@ EMC@ EMC@


PESD5V0H1BSF_SOD962-2
PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2

PESD5V0H1BSF_SOD962-2
1
1

PLACE NEAR J48


2
2

Security Classification LC Future Center Secret Data Title


2
2

Issued Date 2015/11/02 Deciphered Date 2015/8/10 TOUCH PAD/NFC/FPR


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 59 of 104


5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 60 of 104
5 4 3 2 1
5 4 3 2 1

D D

VCC5B

FAN CURRENT
IS 0.5A MAX

FUSE 2.0A

2
F4
2A_32V_ERBRD2R00X

1
JFAN1
VCC5B_F4 1
FAN_ON 2 1
<56> FAN_ON 2
3
4 3
5 4
5
C 6 C
7 GND1
GND2
HIGHS_WS33050-S0351-HF
@

FAN_ID
FAN_ID <56>

FAN_FRQ
FAN_FRQ <56>

FAN_ID

2
C570
0.1U_0402_25V6-K
EMC@
1

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 FAN CONNECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 61 of 104


5 4 3 2 1
5 4 3 2 1

D D

TABLE

P/N ADDR_SEL Address

H 32h (W) & 33h (R)


BMA255
L 30h (W) & 31h (R)

C
H 3Eh (W) & 3Fh (R) C
KX022-1020
L 3Ch (W) & 3Dh (R)
VCC3M

VCC3M
2 2
R2421 1 2 10K_0402_5% ADDR_SEL @ R2420 1 2 10K_0201_5% C2550 C2551
0.1U_0402_10V6-K 10U_0402_6.3V6-M
1 1

U148
ADDR_SEL 1 12 I2C_CLK_GSENSE
I2C_DATA_GSENSE SDO SCL I2C_CLK_GSENSE <56>
2 11
<56> I2C_DATA_GSENSE SDA PS
3 10
4 VDDIO CSB 9
GSENSE_INT 5 NC GND 8
<57> GSENSE_INT INT1 GNDIO
1 6 7
INT2 VDD
TP151 Test_Point_20MIL BMA255_LGA12_2X2

B TABLE of G-Sersor (U148) B

Vendor P/N LCFC P/N


BOSCH BMA255 SA00005YJ00
Kionix KX022-1020 SA000081E00

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 APS G-SENSOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 62 of 104


5 4 3 2 1
5 4 3 2 1

D D
VCC3_SUS

2
R10207 TABLE 2nd Source Main Source
0.01_0603_LE_1%
TCG Infineon ST Micro

1
Pin PTP Spec (v38) SLB9670VQ2.0 FW 7.63 ST33HTPH2E32AHB4
VCC3_SUS_TPM No
SA000075L50 SA000089E10

1 1 1 1 1 VDD VDD NC
@ @
C379 C2497 C9874 C9875 2 GND GND GND
0.1U_0201_6.3V6-K 10U_0402_6.3V6-M 1U_0201_6.3V6-K 0.1U_0201_6.3V6-K 3 GPIO NC NC
2 2 2 2
4 GPIO NC PP

2
R2347 R2482
5 NC NC NC
10K_0201_5% 10K_0201_5% 6 VNC/GPIO GPIO NC
@ 7 GPIO/VDD PP GPIO
8 VDD VDD NC

1
9 GND GND NC
10 VNC NC NC

22

14
11 NC NC

1
U39 NC
12 NC NC NC

VHIO2

VHIO1

VDD

VSB
13 VNC/GPIO NC NC
15 4 14 VDD NC NC
LAD3 PP NC
<10> -TPM_IRQ
-TPM_IRQ 18
LAD2/SPI_IRQ GPX/GPIO2
3 15 NC NC
C SPI_MOSI_IO0 R2345 1 2 33_0201_5% SPI_MOSI_IO0_2_R 21 30 16 NC NC C
<7,21> SPI_MOSI_IO0 SPI_MISO_IO1 R2346 1 2 33_0201_5% SPI_MISO_IO1_2_R 24 LAD1/MOSI SCL/GPIO1 GND
<7,21> SPI_MISO_IO1 -SPI_CS2 -SPI_CS2_R LAD0/MISO
R2343 1 2 33_0201_5% 20
<7> -SPI_CS2 LFRAME/SCS
27
SPI_CLK R2344 1 2 33_0201_5% SPI_CLK_2_R 19 SERIRQ SDA/GPIO0 29
<7,21> SPI_CLK LCLK/SCLK 6 17 SPI_RST# RST# SPI_RST#
13 GPIO3/BADD 5
-PLTRST_FAR 17 CLKRUN/GPIO04/SINT TEST 18 SPI_PIRQ# PIRQ# SPI_PIRQ#
<13,39,41,45,46,55,64,65,92> -PLTRST_FAR LRESET/SPI_RST/SRESET 19 SPI_CLK SCLK SPI_CLK
20 SPI_CS# CS# SPI_CS#
28 2
LPCPD NC1 7
21 MOSI MOSI MOSI
NC2 10 22 VDD VDD VPS
NC3
NC4
11 23 GND GND NC
12 25 24
Reserved NC5 26 MISO MISO MISO
NC6 31
NC7

GND1

GND2

GND3

GND4
33
EX-PAD
25 NC NC NC
ST33HTPH2E32AHB4 VQFN 26 NC NC NC

16

23

32
27 NC NC NC
28 NC NC NC
29 VNC/GPIO NC NC
30 VNC/GPIO NC NC
31 VNC NC NC
32 GND GND NC

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 DISCRETE TPM 2.0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 63 of 104


5 4 3 2 1
5 4 3 2 1

TABLE

REF DES ENABLE DISABLE

J5 ASM NO_ASM

R220 ASM NO_ASM


D D

LOGIC

@
J5

LPCCLK_DEBUG_24M 1 2 -PWRSWITCH
<7> LPCCLK_DEBUG_24M 1 2 LPC_AD0 -PWRSWITCH <17,26,35,65>
3 4
-LPC_FRAME 5 3 4 6 LPC_AD1
<7,55> -LPC_FRAME 5 6 LPC_AD2
-CLKRUN 7 8
<7,55> -CLKRUN 7 8 LPC_AD3
IRQSER 9 10
<7,55> IRQSER -PLTRST_FAR 9 10
11 12
<13,39,41,45,46,55,63,65,92> -PLTRST_FAR B_ON 11 12 -SUS_STAT
13 14
<57,65,79,89> B_ON 13 14 -SUS_STAT <7,55> LPC_AD[3:0] <7,55>
15 16
GND1 GND2
HRS_DF12L3P014DP0P5V86A

C C

VCC3B

2
VCC5M VCC3_SUS
R150 R177
10K_0201_5% 10K_0201_5%

1
U21
SMB_CLK_3B 1 5
<22,24,59> SMB_CLK_3B SMB_DATA_3B A Vcc
<22,24,59> SMB_DATA_3B

2
2 R30 R45
B 10K_0201_5% 10K_0201_5%

3 4
GND OE

1
SN74LVC1G66DCK_SSOP5
SMB_CLK
SMB_DATA SMB_CLK <7>
SMB_DATA <7>
BPWRG
<13,49,56,59,66> BPWRG

U31
1 5
A Vcc

2
B
B
2 B
C25
3 4 0.01U_0201_6.3V7-K
GND OE
1
SN74LVC1G66DCK_SSOP5

TABLE of U21/U31
Vendor P/N LCFC P/N
TI SN74LVC1G66DCK SA00005BE0J
NXP 74LVC1G66GW SA00007KS00
ONSemi MC74VHC1G66DFT2G SA00008JQ00

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 SMBUS SWITCH/LPC DEBUG PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 64 of 104


5 4 3 2 1
5 4 3 2 1

-PLTRST_FAR

2
VCC3SW C573
0.1U_0201_6.3V6-K
EMC@
R53 1
1 2 -EXTPWR_ASIC
VL5
47K_0201_5%
VCC3B
R301
1 2
D D
10K_0201_5%

2
D
C529 1 2 1000P_0201_25V7-K 2 Q65 R2557
G LSK3541G1ET2L_VMT3 10K_0201_5%

1
VCC3SW VCC3SW
-EXTPWR
<56,69> -EXTPWR CPUCORE_ON_ASIC CPUCORE_ON
D285 1 2 RB521CM-30T2R_VMN2M
CPUCORE_ON <13,72>

2 2 2
C254 C273 C283
R2406 R701 R821 R2405 -PCH_SLP_S3 D286 1 2 RB521CM-30T2R_VMN2M
1M_0201_5% 1M_0201_5% 1M_0201_5% 1M_0201_5%
1 1 1

0.01U_0201_6.3V7-K

0.01U_0201_6.3V7-K

0.01U_0201_6.3V7-K
2

2
1

1
U101A

-EXTPWR_ASIC F5 E7 M_ON
EXTPWR# EON M_ON <71>
D9 VCCLAN_ON
-PCH_SLP_S3 LANON VCCLAN_ON <66>
H7
<13,17,31,56,89> -PCH_SLP_S3 SLP_S3# E8
-PCH_SLP_S4 J7 MEON
<13,17,56,80> -PCH_SLP_S4 SLP_S4# A_ON
F9
-PCH_SLP_S5 AON A_ON <79,80>
J8
<13,17> -PCH_SLP_S5 SLP_S5# B_ON
E9
-EC_SLP_LAN BON B_ON <57,64,79,89>
C G6 C
<57> -EC_SLP_LAN SLP_LAN# CPUCORE_ON_ASIC
E6
-PCH_SLP_M F6 CPUON
<13,17> -PCH_SLP_M SLP_M#
H6
SUSPWRACK

-PLTRST_FAR A7 B8
<13,39,41,45,46,55,63,64,92> -PLTRST_FAR PLTRST# PWRON_DOCK#

-PWRSW_ASIC F8
PWRSW#
1/2
-PCIE_WAKE F7 B6 -EC_RESET
<13,31,45> -PCIE_WAKE PME# ECRST# -EC_RESET <55>

C6
PGPIO0
EC_PWRREQ C7 H3 M_TRCL
<57> EC_PWRREQ PGPIO1 MTRCL M_TRCL <70>
C8 G3 S_TRCL
PGPIO2 STRCL S_TRCL <70>
C9 B7
PGPIO3 BATCRG
E4
PGPIO4
A8
PGPIO5 H9 ECSPI_CLK_R R921 1 2 33_0201_5% ECSPI_CLK
SPISCK ECSPI_CLK <57>
H8 ECSPI_MOSI_R R928 1 2 33_0201_5% ECSPI_MOSI
SPIMOSI ECSPI_MOSI <57>
TP153 Test_Point_20MIL 1 A1
TP154 Test_Point_20MIL 1 A9 (TEST_IN1) G8 -ECSPI_SS_R R931 1 2 33_0201_5% -ECSPI_SS
(TEST_IN2) SPISS# -ECSPI_SS <57>
TP155 Test_Point_20MIL 1 J1
TP156 Test_Point_20MIL 1 J9 (TEST_IN3) G7 ECSPI_MISO_R R463 1 2 0_0201_5% ECSPI_MISO
(TEST_IN4) SPIMISO ECSPI_MISO <57>
G5
TEST

100K_0201_5%
100K_0201_5%
B BD4178AGSW-ZE2_BGAW080A80 B

M_ON 1 Test_Point_20MIL TP157


2
2

ECSPI_CLK_R
R711 R1882 VCCLAN_ON 1 Test_Point_20MIL TP158

2
2
100K_0201_5% 100K_0201_5%
A_ON

R907
R890
1 Test_Point_20MIL TP159
2
1
1

C574
33P_0201_25V8-J

1
1
EMC@
1

VCC3M VCC3SW
2

R865 R870
10K_0201_5% 4.7K_0201_5%
1

D1
1 2 -PWRSW
-PWRSW <56>
RB521CM-30T2R_VMN2M
A A

D76
-PWRSWITCH 1 2 -PWRSW_ASIC
<17,26,35,64> -PWRSWITCH
RB521CM-30T2R_VMN2M
2
C316
0.22U_0201_6.3V6-K
1
Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/02 Deciphered Date 2015/8/10 THINK ENGINE-2(1/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 65 of 104


5 4 3 2 1
5 4 3 2 1

R413, R422 : Need Anti-surge Chip Resistors VCC3M VCC5M VDD10

0.1U_0402_25V6-K
0.1U_0201_6.3V6-K

0.1U_0201_6.3V6-K
VREGIN20 2 2 2

C9090
C60

C210
VSYS VDD10
1 1 1

2
2
2
R413 R422 R487
D 20_0603_5% 20_0603_5% D
ESR03EZPJ200/ROHM ESR03EZPJ200/ROHM 10_0603_5%
VCC3SW

1
1
1
VCC5B

VCC5M
REFER TO VCPIN25 CIRCUIT

2
VREGIN20 2
R522 C616

R751
1.78M_0402_1% 0.1U_0402_25V6-K VCC5M
1

2
1
R417

100_0402_5%
D8 D56
1 2 1 2 1 2 2

1
C611

2
0_0402_5%_SM RB521CM-30T2R_VMN2M RB521CM-30T2R_VMN2M 1U_0402_6.3V6-K
R8777

2
33K_0201_5% 1
2 2
R559 C369 C609 2 2
1.24M_0402_1% 470P_0201_25V7-K C115 C238
1 2.2U_0603_25V6-K 1U_0603_25V6-K 1U_0603_25V6-K
1 1

1
R1729 1 1
1 2

H1

A5

A2
20_0603_5% U101B
S1 ESR03EZPJ200/ROHM

VREGIN20

VCC5M

VDD10
1 2
2
C1396
0.1U_0402_25V6-K G1
3 4 VINT20 A4
1 G2 CP10OUT
SKRPABE010_4P BAT_VOLT J4
H2 VCC3SW C5
3SW_OFF# 5B
C C
B4 B3
RD0_ON/5MUBAY RD0_DRV/UBAY_DRV
G4 C3
<65> VCCLAN_ON RD1_ON RD1_DRV VCC3LAN_DRV <88>
H4 D4
<56,83> SUS_ON1 RD2_ON RD2_DRV SUS_DRV <87>
1R8VIDEO_AON_EN @ R10470 1 2 0_0201_5% J5 D3 1R8VIDEO_AON_DRV
<103> 1R8VIDEO_AON_EN RD3_ON RD3_DRV 1R8VIDEO_AON_DRV <104>
SWG@ D763 2 1 RB521CM-30T2R_VMN2M 1R8VIDEO_MAIN_EN SWG@ R10622 1 2 0_0201_5% H5 D2 1R8VIDEO_MAIN_DRV
<92,97,101,102> GFXCORE_D_PWRGD RD4_ON RD4_DRV 1R8VIDEO_MAIN_DRV <104>

1
SWG@ D764 2 1 RB521CM-30T2R_VMN2M D1
<97> GFX_PWR_EN RD5_DRV/WLAN_DRV VCC3WLAN_DRV <90>
UMA@
R10617 R10471 E3
10K_0201_5% 10K_0201_5% RD6_DRV/WWAN_DRV
F3
B_DRV <38,89>

2
RD7_DRV/B_DRV
2/2
F4 B5
<3> PANEL_POWER_ON 3P_ON 3P_DRV VCC3P_DRV <26>
VSYS A6
3B_DRV VCC3B_DRV <89>
C4 VCC3SW VCC3B VCC3M
5B_DRV VCC5B_DRV <89>
E2
M1_DRV M1_DRV <68>
C606 2 1 1U_0603_25V6-K CP25OUT E1 C1
CP25OUT M2_DRV M2_DRV <68>
D57 D64

2
2
2 1 2 1 VCPIN25 B1 F1
VCPIN25 S1_DRV S1_DRV <68>

2
C2 R749 R859
S2_DRV S2_DRV <68>
RB521CM-30T2R_VMN2M RB521CM-30T2R_VMN2M R1101 2K_0201_5% 10K_0201_5%
J6 F2 33K_0201_5%
DISCHARGE BAT_DRV B2
DCIN_DRV

1
1
2 2

1
C679 C336 D7 D6 R71 1 2 0_0201_5%_SM
SHUTDWNIN# M_PGS MPWRG <13,56>
0.01U_0402_25V7-K 0.22U_0603_50V7-K D5
B_PGS BPWRG <13,49,56,59,64>
2

1 1 R10456 J3 D8
TH_DET PWRSHUTDWN# -PWRSHUTDOWN <69>
0_0201_5% VCC3SW

DGND1
PGND1
PGND2
AGND1
1

2
B B
R900
2

0_0201_5%
R1100 BD4178AGSW-ZE2_BGAW080A80

G9
A3
B9
J2
SWG@ 33K_0201_5%

1
R10617 D30
RD4_ON PD and 0 ohm config 5M_3M_PWRG 1 2
<71> 5M_3M_PWRG
1

R10622 R10617
RB521CM-30T2R_VMN2M
UMA NO ASM 10 ohm
2
C1208

540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
SWG ASM 1M ohm 1M_0201_5% 470P_0201_25V7-K
@
SD0431004PT 1
<56,97> -SHUTDOWN

R839 TABLE

1
1

1
1
1
1

1
-PWRSHUTDOWN 1 2

RT9
RT1

RT15
RT7
RT5
RT3

RT11

RT13
ID Target

540_0402NEW_30%_PRF15BB541NB6RC
C954

0_0201_5%
@ 2
RT9 TBT_VBUS_20_F to VINT20 IN FET(PQ1,PQ2)
RT8 USBC_VBUS20_F to VINT20_IN_FET(PQ5,PQ6)

2
2

2
2
2
2

2
RT14 TBD
0.1U_0201_6.3V6-K

1
RT6 VCCCPUCORE DrMOS (PU402)
RT7 VCCGFXCORE DrMOS (PU404)
RT15 CPU Die (U58)

1
1

1
1

1
1

1
RT1 VCCGFXCORE_D DrMOS (PQ601,PQ602)

RT10
RT2

RT8
RT6

RT12
RT4

RT14
540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
540_0402NEW_30%_PRF15BB541NB6RC

540_0402NEW_30%_PRF15BB541NB6RC
RT2 VCC3M Switching FET (PQ203)
RT3 VCC5M Switching FET (PQ201)

2
2

2
2

2
2

2
RT11 M_BAT_PWR to BAT_PWR_FET (PQ17,PQ18)
RT4 S_BAT_PWR to S_BAT_PWR_FET (PQ19,PQ20)
RT5 VCCCPUCORE_DrMOS (PU403)
A
RT13 Battery Charge Discharge FET (PQ103) A

RT10 Battery Charge BUCK FET (PQ101)


RT12 Battery Charge BOOST FET (PQ102)

Security Classification LC Future Center Secret Data Title


Issued Date 2015/11/02 Deciphered Date 2015/8/10 THINK ENGINE-2(2/2)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom C
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 66 of 104


5 4 3 2 1
5 4 3 2 1

PD1 PR18
1SS400CMT2R_VMN2M2 0_0402_5%_SM
TBT_VBUS20_F 2 1 1 2 PQ43
PMBT3906_SOT23-3
3 1

C
E
1

3.92K_0603_1%
PC65

B
2
1

1
PD2 0.1U_0402_25V7-K

PR22
1SS400CMT2R_VMN2M2 PR21 PR23 PR24

2
USBC_VBUS20_F 2 1 2K_0402_1% 3.92K_0603_1% 100K_0201_1%

2
1
PC68
0.01U_0402_25V7-K

1
D D

2
PR19 PR20

2
30.1K_0201_1% 324K_0201_1%
PR25 PD10 PD3

10K_0603_1%
10K_0603_1% 1SS400CMT2R_VMN2M2 1SS400CMT2R_VMN2M2

1
PR57
2

1
PU3
TL331IDBVR_SOT23-5 PD4
1 5 1SS400CMT2R_VMN2M2
IN- VCC

2
1 2 -TH_SHUTDOWN
2 PD5
GND 1SS400CMT2R_VMN2M2
3 4 2 1
IN+ OUT

330P_0402_50V8-J

90.9K_0201_1%
PR63

1
274K_0201_1% D

1
PC66

PR62
PRT1 1 2 2 PQ44
PRF15BB541NB6RC_0402 G LSK3541G1ET2L

2
S

3
1

1
PD6 PC67
Add comment UDZVTE-175.1B_UMD2-2 2.2U_0603_25V6-K
PRT1 near PQ101

2
2
TABLE PL1,PL2

1st: TAIYO FBMJ2125HM210NT


TBT_VBUS20 TBT_VBUS20_F 2nd: MURATA BLM21SN300SN1D
PQ1 PQ2
SI7153DNT1GE_POWERPAK1212-8-5 SI7153DNT1GE_POWERPAK1212-8-5
PF1 1 1 PL1
5A_32V_0438005.WR 2 2 FBMJ2125HM210NT_0805
1 2 5 3 3 5 1 2
VINT20_IN

4
2 2 2

1
0.047U_0402_25V7-K
2 PC14 @ PC15 PC16
C PC13 @ PR69 10U_0603_25V6-K 10U_0603_25V6-K 0.01U_0402_25V7-K C

1
1U_0402_25V6-K 1 0_0201_5%

1
1

1
1 1 1

PC1
1 @ PR71

1
1 @ PC50 PR1 PR2 PR3 PC51
0_0201_5%

2
0.1U_0201_25V6-K 100_0201_5% 100K_0201_1% 100_0201_5% 1000P_0201_25V7-K
2

2
2
2

2
2

1
@ PR70
6.04K_0201_1%
@ PR72

2
TABLE PQ1,PQ2,PQ5,PQ6 6.04K_0201_1%
1 2
1st: VISHAY SI7153DN-T1-GE3

1
2nd: AOS AON7409 @ PR73 PU4 @
3rd:TOSHIBA TPCC8104 10K_0201_1% 5
V+ IN+
1

@ PR75 2
V-
2
1M_0201_5%
2 1 4 3
OUT IN-

1
TLV1701AIDBVR_SOT23-5
2

PR7
G

@ PQ45 10K_0201_1%
LSK3541G1ET2L_VMT3

2
3 1
S

@ PR76
0_0201_5%
PR67

1
0_0201_5% D
2

TBT_HV_GATE 1 2 2 PQ3
<33> TBT_HV_GATE G LSK3541G1ET2L
1

1 S

3
PR15 @ PC52
100K_0201_5% 0.1U_0201_6.3V7-K
2
2

PR95 1
100K_0201_5% D
1 2 -TH_SHUTDOWN 2 PQ4
B
VCC3_LDO_TBT B
G LSK3541G1ET2L

S
3

USBC_VBUS20
PQ5 PQ6
SI7153DNT1GE_POWERPAK1212-8-5 SI7153DNT1GE_POWERPAK1212-8-5
PF2 USBC_VBUS20_F 1 1 PL2
5A_32V_0438005.WR 2 2 FBMJ2125HM210NT_0805
1 2 5 3 3 5 1 2
4

4
1

PC2 2

1
1
1U_0402_25V6-K PC4 @ PC5 PC6
0.047U_0402_25V7-K

10U_0603_25V6-M 10U_0603_25V6-M 0.01U_0402_25V7-K


2

2
2
1
1
1

1 1 @ PR79 @ PR77
1

@ PC53 PR12 PR13 0_0201_5% PR8 PC54 0_0201_5%


PC3

0.1U_0201_25V6-K 100_0201_5% 100K_0201_1% 100_0201_5% 1000P_0201_25V7-K


2

2 2
2
2

@ PR80 @ PR78
6.04K_0201_1% 6.04K_0201_1%
1 2
2
1

@ PR81 PU5 @
10K_0201_1% 5 1
V+ IN+
@ PR91 2
2

1M_0201_5% V-
1 2 4 3
OUT IN-
1
2

TLV1701AIDBVR_SOT23-5 PR14
G

@ PQ46 10K_0201_1%
LSK3541G1ET2L_VMT3 @ PR92
0_0201_5%
2

3 1
S

1 2

PR68
1

0_0201_5% D
USBC_HV_GATE 1 2 2 PQ7
A <33> USBC_HV_GATE A
G LSK3541G1ET2L

S
3
1

1
PR16 @ PC55
100K_0201_5% 0.1U_0201_6.3V7-K
2
2

D
-TH_SHUTDOWN 2 PQ8
G LSK3541G1ET2L
Security Classification LC Future Center Secret Data Title
S
3

Issued Date Deciphered Date DC-IN


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 67 of 104

5 4 3 2 1
5 4 3 2 1

VCC3M
M-BAT-PWR BAT-PWR

2
PR26
PQ17: needs Vgs = 25V
MAIN BAT CONN 6.19K_0201_1% PQ17
SIS406DN-T1-GE3_PAK1212-8-5
PQ18: needs Vgs = 25V
@ PJ2 PF3 3 PQ18

1
1 WIDE PATTERN 10A_32V_0501010.WR1 2 SI7153DNT1GE_POWERPAK1212-8-5
1 2 M_BAT_IN 1 2 1 5 M_BAT_PWR_A 1
D 2 3 PR27 2 D
8 3 4 100_0201_5% 3 5
9 PTH1 4 5 1 2 I2C_CLK_BT0
PTH2 5 I2C_CLK_BT0 <55>

4
10 6 PR28
11 PTH3 6 7 100_0201_5%
PTH4 7

2 4
1 2 I2C_DATA_BT0
I2C_DATA_BT0 <55>

2
HIGHS_WS33071-S0201-HF
PR29 PR30
510K_0201_5% 100_0201_5%
M_TEMP <55>
RF_NS@ EMC@ RF_NS@ EMC@

1
390P_0201_25V7-K

2200P_0201_25V7K

390P_0201_25V7-K

2200P_0201_25V7K
2 2 2 2
PR31

PC18

PC19

PC20

PC21
100K_0201_5%
1 2
1 1 1 1 <66> M1_DRV

PR32
150K_0201_5%
1 2
<66> M2_DRV

TABLE PQ17,PQ19 TABLE PQ18,PQ20


TABLE PF3,PF4
1st: VISHAY SIS406DN-T1-GE3 1st: VISHAY SI7153DN-T1-GE3
1st: LITTLEFUSE 0501010.WR1 2nd: AOS AON7466 2nd: AOS AON7409
2nd: AEM F1206HB10V024TM 3rd:ROHM RQ3E120GNA10 3rd:TOSHIBA TPCC8104

C C

VCC3M

S-BAT-PWR
2

confirm with ME PR33


6.19K_0201_1%
PQ19: needs Vgs = 25V
PQ19
PQ20: needs Vgs = 25V
@ PJ3 PF4 SIS406DN-T1-GE3_PAK1212-8-5 PQ20
1

1 10A_32V_0501010.WR1 3 SI7153DNT1GE_POWERPAK1212-8-5
1 2 S_BAT_IN 1 2 2 1
2 3 PR34 1 5 S_BAT_PWR_A 2
3 4 100_0201_5% 3 5
4 5 1 2 I2C_CLK_BT1
5 I2C_CLK_BT1 <57>
8 6
GND1 6

4
9 7 PR35
GND2 7

4
100_0201_5%
FOX_BBP27BY-B4801-7H 1 2 I2C_DATA_BT1
I2C_DATA_BT1 <57>

2
EMC@ PR36 PR37
RF_NS@ EMC@ RF_NS@ S_TEMP <55>
510K_0201_5% 100_0201_5%
EMC@ EMC@ EMC@
390P_0201_25V7-K

2200P_0201_25V7K

390P_0201_25V7-K

2200P_0402_25V7-K

2 2 2 2 PR38

1
100K_0201_5%
ESD9B5.0ST5G SOD-923

ESD9B5.0ST5G SOD-923

ESD9B5.0ST5G SOD-923
1

1
PC22

PC23

PC24

PC25

1 2
<66> S1_DRV
1 1 1 1
PD7

PD8

PD9
2

PR39
150K_0201_5%
1 2
B <66> S2_DRV B

VREGIN20
M-BAT-PWR

M-BAT-TRCL
PD12
DAN222MGT2L_VMD3
PF7 2
1 2 1
3
0.5A_32V_ERBRD0R50X

S-BAT-PWR S-BAT-TRCL
PD13
DAN222MGT2L_VMD3
PF8 2
1 2 1
3
0.5A_32V_ERBRD0R50X

VSYS_OUT
PD14
DAN222MGT2L_VMD3
PF9 2
1 2 1
3
A 0.5A_32V_ERBRD0R50X A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BATTERY INPUT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 68 of 104

5 4 3 2 1
5 4 3 2 1

PQ108
SI7153DNT1GE_POWERPAK1212-8-5
1
2
3 5
VSYS

1
2
PR169 PC170

2 4
510K_0201_5% 1U_0402_25V6-K

1
PC190
1 PR171 0.01U_0402_25V7-K

2
100_0201_5%

2
1
2
D D
PR172
150K_0201_5%

1 1
D
-PWRSHUTDOWN 2
<66> -PWRSHUTDOWN G PQ109
LSK3541G1ET2L
S

3
Table PL101 Table PQ102
Table PQ101
1st: CYNTEC CMLE063T-2R2MS
2nd:TOKIN MPLCG0630L2R2 1st: VISHAY SIZ340DT-T1-GE3
Infineon : BSC0923 NDI 2nd: AOS AON7934
AOS : A ON6998
MLCCs must be placed Vishay : Si Z998 MLCCs must be placed
VINT20_IN symmetrically on Top and Bottom. symmetrically on Top and Bottom.
PR158 PL101 PQ102
0.01_1206_LE_1% PQ101 2.2UH_CMLE063T-2R2MS_10A_20% SIZ340DTT1_POWERPAIR_3X3-9-10
1 2 RF_NS@ RF_NS@ EMC@ EMC@ BSC0923NDI_PG-TISON-8-7 EMC@ 1 2 EMC@ RF_NS@ RF_NS@ EMC@ EMC@
VSYS_OUT

2200P_0402_25V7-K
100P_0402_50V8-J

10U_0603_25V6-K

10U_0603_25V6-K
47P_0402_50V8-J

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
10U_0603_25V6-K
2 2 1 1 1 1 1 1 1

1
1

1
100P_0402_50V8-J

47P_0402_50V8-J

PC182

PC183
0.01U_0402_25V7-K

0.1U_0402_25V6-K
PC147 PC162

1
1000P_0402_25V7-K

PC160

PC161
PC132

PC156

PC135
PC150

PC129

PC140
PR196 PR197 5 PC142 0.047U_0402_25V7K 0.047U_0402_25V7K PC143 7 10
10U_0603_25V6-K
10U_0603_25V6-K
10U_0603_25V6-K

10U_0603_25V6-K

1 1 1 1 0_0201_5%_SM 0_0201_5%_SM 1 2 4 330P_0201_25V7-K 330P_0201_25V7-K 6 4

2
1 2

1 2
1
2 2

1
1 1 2 2 2 2 2

PC180

PC181

PC136

PC146
3 5 3

2
2

2
PC163
PC149
PC138

PC151

2
EMC@ EMC@
1

1 1
PR149 PR137

2
2 2 2 2 2 PR153 0_0402_5% PU101 0_0402_5% PR156
1

PR138 56_0402_5% BQ25700ARSNR_QFN32_4X4 56_0402_5%


C
PR133 4.99_0201_1% 30 25 PQ103 BAT-PWR C
BTST1 BTST2

1
1

2
4.99_0201_1% SI7153DNT1GE_POWERPAK1212-8-5
LX1_CHG 32 23 LX2_CHG 1 PR151
SW1 SW2
2
2 0.01_1206_LE_1%
2

@ PC145 DL1_CHG 29 26 DL2_CHG 3 5 1 2


0.01U_0402_25V7-K LODRV1 LODRV2
DH2_CHG

0.01U_0201_25V6-K

0.1U_0402_25V7K
1 2 PR160 1 2 0_0402_5% 31 24 PR161 1 2 0_0402_5% 1 PC141
HIDRV1 HIDRV2

1U_0402_25V6-K

0.1U_0402_25V7K
PC158 1 2

PC134
PC159
0.033U_0402_25V7-K 1 22
VBUS VSYS

1
1
0.033U_0402_25V7-K

PC153
PC154
1 2 CH_AGND 0.1U_0402_25V7K

2
2 21 BATDRV# PR170 1 2 0_0402_5% 2
ACN BATDRV# @
Should be placed

2
2
3 20
ACP SRP
1

near ACP, ACN


1U_0402_25V6-K
PC164

1
PC144

7 19
VDDA SRN PR139 10_0201_5% 1 2
VDDA REGN
2

PR136
@ 2 10_0603_5% 6 28 1 2 PR155 10_0201_5% 2 1
ILIM_HIZ REGN CH_AGND
1 2 40.2K_0201_1% PC155 2.2U_0402_10V6-K
Keep these two signals CH_AGND CH_AGND
1
@ PC102 PC148 1 2 PR1341 2 PR144 680P_0201_25V7-K
REGN
as pair routing 1U_0402_25V6-K CH_AGND 16
COMP1 COMP2
17 1 2 PC1571 2 CH_AGND

10U_0603_25V6-K
10U_0603_25V6-K
1800P_0201_25V7-K PC1331 2 10K_0201_1%
2 33P_0201_25V8-J 1 2 1 1

PC168
PC167
1 <6,55,56,72> -PROCHOT PR142 1 2 75_0201_5% 11 18 PC137 15P_0201_25V8-J
PC165 PROCHOT# CELL_BATPRES
1U_0402_25V6-K PR146 1 2 0_0402_5% 13
VDDA <55> I2C_CLK_CHARGE SCL 8 PR157 1 2 0_0201_5%_SM 2 2
2 PR148 1 2 0_0402_5% 12 IADPT
<55> I2C_DATA_CHARGE SDA 9 PR141 1 2 0_0201_5%_SM
IBAT
2

CH_AGND 4
PR147 @ PR168 CHRG_OK 10
PSYS PSYS <72>
174K_0201_1% 1 2 5
VDDA ENZ_OTG 27
PGND

2
100P_0201_50V7-K

100P_0201_50V7-K
100P_0201_50V7-K
10K_0201_5% 15
CMPOUT
1

2
33 PR101
B PAD VDDA B

2
2
14 PR150 137K_0201_1%
CMPIN

PC152

PC139
PC131
20K_0201_1%

1
1

1
1

2
1
1
PR135 PR140 PR154
100K_0201_1% 10K_0201_5% PR190 71.5K_0201_1%
10K_0201_1% CH_AGND CH_AGND CH_AGND CH_AGND CH_AGND
VCC3SW
2

1
2
CH_AGND

2
100K_0201_5%

100K_0201_5%
2

CH_AGND PR145
PR164

PR163

CH_AGND PR162 100K_0201_1%


0_0201_5%_SM
1 2

1
IDPM V(ILIM) PR147
1

<56,65> -EXTPWR
CH_AGND
1

500mA 1.2V 402K D


2 CH_AGND
1

PC128 G
1.0A 1.4V 332K 47P_0201_25V8-J
S
PQ106
LSK3541G1ET2L
# of CELL VCELL_PRES PR154
3
2

1.5A 1.6V 280K


2.0A 1.8V 237K CH_AGND CH_AGND
1-CELL 1.5V 301K
3.0A 2.2V 174K LOGIC
3.25A 162K 2-CELL 2.5V 140K
A
2.3V A
3-CELL 3.5V 71.5K
4-CELL 4.5V 33.2K

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BATTERY CHARGER(BQ25700A)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 69 of 104

5 4 3 2 1
5 4 3 2 1

VSYS_OUT

1
D D
PR4
750_0603_1%

2
1 PQ42
2SCR512P5T100_MPT3

3
1
PR5
20_1210_1%

PU6

2
3
NCP431AISNT1G_SOT23-3
Cathode
2
Reference
Anode

1
PR6
24_1210_1%

2
M-BAT-TRCL
PQ21
C SSM6J402TU_UF6 C
6 PD15
5 DAN222MGT2L_VMD3
4 2 2
1 M-BAT-TRCL_A 1
3

2 3
2
2
PC26 PR40 2
0.01U_0402_25V7K 470K_0201_5% PR41 1
100_0201_5% 3
1

1
PD16

1
DAN222MGT2L_VMD3

2
PR42
4.7K_0201_5%

1
1
2 PQ22
<65> M_TRCL
DTC015EMT2L_VMT3

3
S-BAT-TRCL
B PQ23 B
SSM6J402TU_UF6
6 PD17
5 DAN222MGT2L_VMD3
4 2 2
1 S-BAT-TRCL_A 1
3

23
2
2
PC27 2
0.01U_0402_25V7K PR43 PR44 1
470K_0201_5% 100_0201_5% 3
1

1
PD18
DAN222MGT2L_VMD3
N37033408

2
PR45
4.7K_0201_5%

1
1

2 PQ24
<65> S_TRCL
DTC015EMT2L_VMT3
3

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date CHARGER SELECTOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 70 of 104

5 4 3 2 1
5 4 3 2 1

D D

All the input MLCCs on 20V must be placed


Table PQ201,PQ203 symmetrically on Top and Bottom.
All the input MLCCs on 20V must be placed
symmetrically on Top and Bottom. 1st : AOS AON7516 @ PJ202
@ PJ201 2st : TOSHIBA TPN4R303NL @ PR221 EMC@ RF@ RF@ EMC@ JUMP_43X79
JUMP_43X79 EMC@ RF@ RF@ EMC@ 0_0201_5% 2 1
2 1 VSYS

47P_0402_50V8-J
100P_0402_50V8-J
2 1 1 2
VSYS 2 1

47P_0402_50V8-J

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K
0.01U_0402_25V7-K

0.1U_0402_25V6
100P_0402_50V8-J

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.01U_0402_25V7-K
0.1U_0402_25V6

VTEO
CDDC
CC
3===
M
1 1 1 1 1

1
PC206

PC229

PC228

PC231
1 1 1 1 1 VSYS VL5
1

1
1

PC227
PC230

PC201

PC205

PC210
PC226

PC208

PC207
PC209
VTEO
CDDC
CC
5===
M

9
.
5
AA.
PC202

PC203

PC204

2
1
2 2 2 2 2
9
.
5
AA.

CP
1
31
2

2
2
2 2 2

1
2 2 PR222 @ PD201
0_0201_5% RB521CM_30
CP
1
31

5
4
A
@ @

2
4
2
A

2
4.7U_0402_6.3V
1 1 VCC3M

1
1

PC212
PC211 PC213 @ PC235
0.01U_0402_25V 4.7U_0402_6.3V6-M 0.1U_0201_25V6-K
VCC5M

2
2
2 2

5
PQ203

D
<65> M_ON
Table PL202

12

13
AON7516 1N DFN

1
C PQ201 C
Table PL201 AON7516 1N DFN PR201 PR219 PR220

VIN

VREG5

VREG3
1
1

4 0_0201_5% 4 1st : Cyntec :CMLE063T-1R0MS 0.01_1206_LE_1% 0.01_1206_LE_1%


PR217 PR218 G 1 2 M_ON_1 20 6 G
0.01_1206_LE_1% 0.01_1206_LE_1% PR202 EN1 EN2 PR203 2st : TDK:SPM6530T-1R0M120
1st : Cyntec :CMLE063T-1R0MS

S1
S2
S3

S3
S2
S1

2
6.8_0402_5% 8.2_0402_5%
2st : TDK:SPM6530T-1R0M120 1 2 VCC5M_DH 16 10 VCC3M_DH 1 2
DRVH1 DRVH2

1
2
3

3
2
1
2
2

PR204 PR205 PC215


PC214 0_0402_5% 0_0402_5% 0.1U_0402_25V7-K
1 2 1 2VCC5M_BST
17 9 VCC3M_BST 1 2 1 2
PL201 VBST1 PU201 VBST2 PL202
1UH_CMLE063T-1R0MS_16A_20% 0.1U_0402_25V7-K TPS51285B-1RUKR_WQFN20_3X3 1UH_CMLE063T-1R0MS_16A_20%
EMC@ VCC5MP 1 2 VCC5M_LX
18 8 VCC3M_LX 1 2 EMC@
SW1 SW2

5
PQ204
EMC_NS@

1
5

220U_B2_6.3VM_R25M

220U_B2_6.3VM_R25M
VCC5M_DL 15 VCC3M_DL

0.01U_0201_6.3V7-K
11 AON7508 1N DFN 1
VCC5MP DRVL1 DRVL2
1

PC216 PR207 1 1
EMC_NS@

D
PR206 1 1000P_0201_50V7-K 0_0201_5%_SM 1
+ +

PC223

PC218
PC222
0_0201_5%_SM PC217 14 4 VCC3M_VFB2 4
VO1 VFB2 G 2
220U_B2_6.3VM_R25M

220U_B2_6.3VM_R25M

220U_B2_6.3VM_R25M

1000P_0201_50V7-K

PGOOD
EMC_NS@

2
1
VCC5M_FB12
0.01U_0201_6.3V7-K

VCLK
1

S3
S2
S1
1 1

GND
G VFB1
2

CS1

CS2
2 PR208 2 2 2
1 EMC_NS@ 2
1

1
+ + +
PC219

PC220

PC221

PC224

PC225 2.2_0603_5%
S1
S2
S3

3
2
1
1

PR209 0.1U_0201_6.3V6K PR211

19

21

7
PR210 2.2_0603_5% 133K_0201_1%
1
2
3

2
2 2 2 2 154K_0201_1% PQ202 1
AON7508 1N DFN
2

2
2

10K_0201_1%
1

1
PR212

PR213
200_0402_1% PR214

1
12.7K_0201_1%
PR215
5M_3M_PWRG <66>

2
200K_0201_1%

2
Table PQ202,PQ204 Table PC218,PC223
B B

2
2

PR216 1st : AOS AON7508 Panasonic : 6TPE220MAPB


100K_0201_1%
2st : TOSHIBA TPN2R703NL KEMET: T520B227M006ATE025
NEC-TOKIN TEPSLB20J227M25LQ8R
1

Table PC219,PC220,PC221

Panasonic : 6TPE220MAPB
KEMET: T520B227M006ATE025
NEC-TOKIN TEPSLB20J227M25LQ8R

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC VCC5M/VCC3M(TPS51285B-1)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 71 of 104
5 4 3 2 1
5 4 3 2 1

VSYS VCC5M

VCCST VCCST

2
2

1
PC401 PR401 PR402 VCC5M VCC3B VCCSTG

2
0.01U_0402_25V7-K 1K_0201_5% 2_0201_1% PC402 PR488
D 1U_0402_6.3V6-K 1K_0402_1% D
2

1
PC403

1
0.1U_0201_6.3V6-K

2
2

2
PR403 PR404 1

2
100_0201_5% 45.3_0201_1% GND_81218 GND_81218
@ PR405 PR406 @ PR407

12

13
0_0201_5% 10K_0201_5% 510_0201_5%

1
GND_81218

VRMP

VCC

1
<13,65> CPUCORE_ON CPUCORE_ON PR413 1 2 0_0201_5%_SM 37 38 CPUCORE_PWRGD CPUCORE_PWRGD <13>
EN VR_RDY

<14> -SVID_ALERT -SVID_ALERT PR408 1 2 0_0201_5%_SM 33 31 PR409 1 2 75_0201_5% -PROCHOT


ALERT# VR_HOT# -PROCHOT <6,55,56,69>

<14> SVID_CLK SVID_CLK PR414 1 2 51_0201_5% 34 35 PR415 1 2 0_0201_5%_SM DRVON


SCLK DRVON DRVON <73,74,75>

SVID_DATA PR410 1 2 10_0201_5% 32 22 PWM_1A


<14> SVID_DATA SDIO PWM_1A PWM_1A <74>
PR417
7.5K_0603_1%
PSYS PR416 1 2 0_0201_5%_SM 46 29 1 2 SW_1A SW_1A <74>
<69> PSYS PSYS CSP_1A
@ PR411 1 2 20K_0201_1% PR418
13.3K_0201_1%
PR419 PC404 PR420 1 2
0_0201_5%_SM 1000P_0201_25V7-K 2.49K_0201_1%

2200P_0201_25V7-K
VCCGT_SENSE 1 2 1 2 1 2 GND_81218
<15> VCCGT_SENSE

2
PR412 PU401 1 PRT401

1
PC405
3.09K_0201_1% PC406 MURAT_NCP03WF104F05RL
1 2 24 NCP81218MNTXG_QFN48_6X6 0.022U_0201_16V6-K
VSP_1A

1
2 PLACE CLOSE TO

2
PC407 PR421 VCCCPUCORE PL401
1000P_0201_25V7-K 10_0201_1%
28 CSN_1A_28 1 2 CSN_1A
CSN_1A <74>

1
PR422 CSN_1A
422_0201_1%
1 2 25 23 PR423 1 2 0_0201_5%_SM
VSN_1A TSENSE_1PH

2200P_0201_25V7-K
PR424 PC408
0_0201_5%_SM 3300P_0201_25V7-K VCC5M

2
<15> VSSGT_SENSE VSSGT_SENSE 1 2 1 2

2
1

2
PC410
PC409 PRT402
C 0.1U_0201_6.3V6-K PR425 C
MURAT_NCP03WF104F05RL
PC411 1 2 150P_0201_25V8-J 26 13K_0201_1%

1
2
COMP_1A

2
1
PR426 PC412 PLACE CLOSE TO @ PR427

1
1 2 1 2 1K_0201_5%
2.15K_0201_1% VCCCPUCORE PU402
PR428 0.015U_0201_6.3V6-K

1
GND_81218 35.7K_0201_1%
1 2 27 GND_81218 GND_81218
ILIM_1A
PC413 1 2 1000P_0201_25V7-K 16 PWM1_2PH PWM1_2PH <73>
PWM1_2PH
GND_81218 PR429 1 2 69.8K_0201_1% 30
IOUT_1A 17 PR430 PWM2_2PH
PWM2_2PH PWM2_2PH <73>
PC414 1 2 470P_0201_25V7-K 8.06K_0201_1%
1 2 CSP2 CSP2 <73>
PR432
PR431 8.06K_0201_1%
0_0201_5%_SM GND_81218 10 1 2 CSP1 CSP1 <73>
VCC_SENSE 1 2 47 CSP1_2PH
<14> VCC_SENSE VSP_2PH 9
CSP2_2PH
2 2
PC415 PC416
2 0.022U_0201_6.3V6-K 0.022U_0201_6.3V6-K
PC417 PR433
1000P_0201_25V7-K 1K_0201_1% 1 1
1 2 48
1

VSN_2PH 8 PR434 2 1 10_0201_1% CSN1


CSREF_2PH CSN1 <73>
PR436 PC418 PR437
0_0201_5%_SM 2200P_0201_25V7-K 29.4K_0201_1% PR435 2 1 10_0201_1% CSN2 CSN2 <73>
VSS_SENSE 1 2 1 2 1 2 1
<14> VSS_SENSE IOUT_2PH

2
PC420 PC419
470P_0201_25V7-K 0.01U_0201_6.3V7-K
1 2

1
PR438
GND_81218 GND_81218 66.5K_0603_1%
2 7 1 2 CSP1
DIFFOUT_2PH CSSUM_2PH
3 2
FB_2PH

2
PC421 PC422
470P_0201_25V7-K 330P_0201_25V7-K
PR440 PR443 PC423

1
1K_0201_1% 4.75K_0201_1% 2200P_0201_25V7-K 1 PR439 PR441 PR442
1 2 1 2 1 2 4 73.2K_0201_1% 165K_0201_1% 66.5K_0603_1%
PR444 PC424 PC425 COMP_2PH 6 1 2 1 2 1 2 CSP2
37.4_0201_1% 330P_0201_25V7-K 10P_0201_25V8-D CSCOMP_2PH PR445
B 1 2 1 2 1 2 20K_0201_1% B
5 1 2 PLACE CLOSE TO
ILIM_2PH PRT403
1 2 VCCGT PL402
PR446 PC426 PR447
0_0201_5%_SM 1000P_0201_25V7-K 2.15K_0201_1% MURAT_NCP03WL224E05RL
<15> VCCSA_SENSE VCCSA_SENSE 1 2 1 2 1 2 45
VSP_1B PR449
0_0201_5%_SM PRT404
PR448 1 2 2.21K_0201_1% 11 1 2 1 2
TSENSE_2PH

2
2

PC428 1
1000P_0201_25V7-K PC427 PR450 MURAT_NCP03WF104F05RL
PC429 1 2 220P_0201_25V7-K 0.1U_0402_25V6-K 13K_0201_1%
1

PR451 PLACE CLOSE TO


0_0201_5%_SM 2
VCCGT PU403

1
<15> VSSSA_SENSE VSSSA_SENSE 1 2 PR452 1 2 499_0201_1% 44
VSN_1B GND_81218
PC430 36 PWM_1B
PWM_1B PWM_1B <75>
15P_0201_25V8-J
1 2 43 40 PR453 1 2 7.5K_0603_1% SW_1B SW_1B <75>
PR454 PC431 COMP_1B CSP_1B PRT405
1.5K_0201_1% 0.01U_0201_6.3V7-K PR455 1 2 13.3K_0201_1% 1 2
1 2 1 2 PR456
Location U42 U22 2

2
15.8K_0201_1% PC432 @ PC433 MURAT_NCP03WF104F05RL

ROSC_COREGT
1 2 42 0.022U_0201_6.3V6-K 0.01U_0201_6.3V7-K

ADDR_VBOOT
ICCMAX_2PH
ILIM_1B

ROSC_SAUS
GND_81218 PLACE CLOSE TO

ICCMAX_1B
ICCMAX_1A

1
PC434 1 2 1000P_0201_25V7-K 1 PR458
10_0201_1% VCCSA PL404
PR456 15.8K 18.7K PR457 1 2 71.5K_0201_1% 39 41 1 2 CSN_1B
CSN_1B <75>
IOUT_1B CSN_1B

TAB
GND_81218
PR457 71.5K 91K PC435
24K_0201_1% 14

24K_0201_5% 15

19.1K_0201_1% 20

35.7K_0402_1% 21
100K_0201_1% 18

97.6K_0201_1% 19

49
220P_0201_25V7-K
1 2
PR462 100K 49.9K

1
PC436
PR459 2200P_0201_25V7-K
0_0402_5%_SM
PR464 19.1K 15.8K

2
1 2
GND_81218
PR445 20K 10K
2

2
2
2

GND_81218
PR442 66.5K NA
PR435 10 NA
PR460 1

PR461 1

PR463 1

PR465 1
PR464 1
PR462 1

GND_81218

PR430 8.06K NA
A A
2
2

0_0201_5%
0_0201_5%

PR427 NA 1K
PR467
PR466

PC416 0.022u NA
1
1

PR437 29.4K 28K


GND_81218 GND_81218 GND_81218
PR440 1K 680

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC IMVP8(NCP81218)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 72 of 104
5 4 3 2 1
5 4 3 2 1

VCCCPUCORE
VSYS MLCCs must be placed
EMC@
PL405 symmetrically on Top and Bottom.
MPZ1608S300AT_2P~D
1 2 EMC@ EMC@ RF@ RF@ 12pcs(+4pcs) 22uF for VCCCPUCORE

V
C
C
C
P
U
C
O
R
E
1000P_0402_25V7-K

100P_0402_50V8-J
10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

47P_0402_50V8-J

U TU
4I
2c
:MC:MC

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
68U_D3L_25VM

68U_D3L_25VM

68U_D3L_25VM

0.1U_0402_25V6
1 1 1

cD2c
x= a
a
=4
6
4
A
1 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

1
+ + +

PC438

PC439

PC440

PC441

PC442

PC443

PC451

PC452

PC905
PC444

PC445

PC446

PC447

PC448

PC449

PC450

PC901

PC902

PC903

PC904

PC906

PC907

PC908

PC909

PC910

PC911

PC914
PC912

PC913

PC915

PC916
PC437

2
A 3A
0.1U_0402_25V6-K

2
2 2 2 2 1 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2IT
@ @ @ @ @
@ @ @ @

cD
x
=2
2
A
D D

=
1
PR468
VCC5M 3.9_0603_5%
1 2
VCCCPUCORE 22pcs(+4pcs) 10uF 6.3V for VCCCPUCORE
TABLE PL401

1
PC455

17

5
0.22U_0402_25V6-K
PR469 1st: CYNTEC CMLE063T-R12MS0R657

THWN

VIN2

VIN1

nc

BOOT

2
2_0402_1%
1 2 3 7 2nd: TOKIN MPCH0730LR12 VCCCPUCORE
VCC PHASE

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
2

PC453 PC454 15 PL401


VCCD

2
2

2
2

2
2

2
PC942
PC935

PC939

PC944
PC917

PC934

PC936

PC937

PC941
PC932

PC933

PC938

PC940

PC943

PC945
1U_0402_6.3V6-K 1U_0402_6.3V6-K 0.12UH_CMLE063T-R12MS0R657_40A_20%
12 1 4
SW2
1

4
CGND

1
1

1
1

1
1

1
2 3
18 PU402
AGND
NCP302045MNTWG_PQFN33-19_5X5
11
<72> PWM1_2PH
PWM1_2PH 1 SW1
2
EMC_NS@
PWM

2
2
PC456
<72,74,75> DRVON DRVON 16 1000P_0201_50V7-K PR470 PR471
DISB# 0_0201_5%_SM 0_0201_5%_SM

PGND1

PGND2
2 1
VCC5M SMOD#

GL1

GL2

1
1
EMC_NS@

13

19

10

14

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V
PR472 CSN1 CSN1 <72>

2
2

2
2

2
2

PC949
PC947

PC950

PC951

PC953

PC954

PC956
PC948

PC952

PC955
PC946
2.2_0603_5%_PULSE_PROOF/SURGE_PROOF
TABLE PU402 CSP1 CSP1 <72>

1
1

1
1

1
1
C @ @ @ @ C
ON-Semi NCP302045 TABLE PR472 0603 SIZE

ROHM ESR03EZPJ2R2
Pana ERJPA3J2R2V
YDS RN73S2CL-2R20-F

1 1 1 Table for PC957,PC958


@ PC1042 + + PC957 + PC958
330U_B2_2.5V_R9M 330U_B2_2.5V_R9M 330U_B2_2.5V_R9M
Panasonic ETPE330MA9L
VSYS MLCCs must be placed
NEC TOKIN TEPSGB20E337M9-8R
EMC@ 2 2 2 KEMET T520B337M2R5ATE009
PL406 symmetrically on Top and Bottom.
MPZ1608S300AT_2P~D
1 2 EMC@ EMC@ RF@ RF@

1000P_0402_25V7-K
10U_0603_25V6-K
10U_0603_25V6-K

100P_0402_50V8-J

47P_0402_50V8-J
10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

0.1U_0402_25V6
1 2 2 2 2 2 2 2 2 1

1
2
PC465

PC467

PC469
PC458

PC459

PC468
PC460

PC462
PC461

PC466
PC463

PC464

PC457
0.1U_0402_25V6-K
10pcs 1uF 6.3V for VCCCPUCORE
VCCCPUCORE

2
1
2 1 1 1 1 @ 1 @ 1 @ 1 @ 1 2

PR473
VCC5M 3.9_0603_5%

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
B 1 2 B

1
1

1
1
1

1
1

PC966
PC963

PC968
PC965
PC964

PC967

PC969

PC970
PC961

PC962
TABLE PL402
1

PC470
17

0.22U_0402_25V6-K

2
2

2
2
2

2
2

2
PR474 1st: CYNTEC CMLE063T-R12MS0R657
THWN

VIN2

VIN1

nc

BOOT

2_0402_1%
1 2 3 7 2nd: TOKIN MPCH0730LR12
VCC PHASE
2
2

PC471 PC472 15 PL402


1U_0402_6.3V6-K 1U_0402_6.3V6-K VCCD 0.12UH_CMLE063T-R12MS0R657_40A_20%
12 1 4
SW2
1
1

4
CGND 2 3
18 PU403
AGND
NCP302045MNTWG_PQFN33-19_5X5
11
<72> PWM2_2PH
PWM2_2PH 1 SW1
2
EMC_NS@
PWM
2

PC473 R U-42 U-22 Remark


DRVON 16 1000P_0201_50V7-K PR475 PR476
DISB# 0_0201_5%_SM 0_0201_5%_SM
PGND1

PGND2

2 1
VCC5M SMOD# PU403,PL402,PL406,PC457,PC471,PC472
GL1

GL2

PC458,PC459,PC460,,PC466,PC467 ASM NO_ASM


1

PC470,,PR473,PR474,PC468,PC469
13

19

10

14

CSN2 CSN2 <72>


TABLE PU403 The Number of 22uF
EMC_NS@ KBL R U-42: 12pcs
2

CSP2 CSP2 <72> PC907,PC908,PC909,PC910,PC911,PC912 ASM NO_ASM


ON-Semi NCP302045 PR477 KBL U-22: 6pcs
2.2_0603_5%_PULSE_PROOF/SURGE_PROOF

TABLE PR477 0603 SIZE The Number of 10uF


1

KBL R U-42: 22pcs


PC938,PC939,PC940,PC941 ASM NO_ASM KBL U-22: 18pcs
A ROHM ESR03EZPJ2R2 A
Pana ERJPA3J2R2V
YDS RN73S2CL-2R20-F
The Number of 1uF
PC961,PC962 ASM NO_ASM KBL R U-42: 10pcs
KBL U-22: 8pcs

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC CPUCORE(NCP302045)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 73 of 104
5 4 3 2 1
5 4 3 2 1

VCCGFXCORE_I

D D

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2

PC977

PC978

PC979

PC980

PC981

PC982

PC983

PC984

PC985

PC986

PC987

PC988
1 1 1 1 1 1 1 1 1 1 1 1
@ @

14pcs(+8pcs) 22uF for VCCGFXCORE_I


VSYS MLCCs must be placed
EMC@ symmetrically on Top and Bottom.
PL407 VCCGFXCORE_I
MPZ1608S300AT_2P~D
1 2 EMC@ EMC@ RF@ RF@

1000P_0402_25V7-K

47P_0402_50V8-J
10U_0603_25V6-K

100P_0402_50V8-J
10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K
10U_0603_25V6-K

10U_0603_25V6-K

0.1U_0402_25V6
1 2 2 2 2 2 2 1

1
1
PC475

PC484
PC476

PC477

PC480

PC481

PC483
PC482
PC478

PC479
PC474

22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
0.1U_0402_25V6-K 1 1 1
2 2 2 2 2 2 2 2 2 2

2
2
2 1 1 1 1 1 1 2 + + +

PC994

PC995
PC992

PC997

PC999

PC1000
PC991

PC993

PC996

PC998
@ PC1043 PC989 PC990
330U_B2_2.5V_R9M 330U_B2_2.5V_R9M 330U_B2_2.5V_R9M

VTI
CDc
CC
G=a
F
X1
CA
O
R
E
_
I
@ @
2 2 2 1 1 1 1 1 1 1 1 1 1

8=
c
M
x

3
1
A
C PR478 @ @ @ @ @ @ C
VCC5M 3.9_0603_5%
1 2
TABLE PL403 Table for PC989,PC990

1
PC485 Panasonic ETPE330MA9L
17

5
0.22U_0402_25V6-K 1st: CYNTEC CMLE063T-R15MS0R907
PR479 NEC TOKIN TEPSGB20E337M9-8R
2nd: MAG.LAYERS SPS-06CZER15MGX5
THWN

VIN2

VIN1

BOOT
nc

2
2_0402_1% KEMET T520B337M2R5ATE009
1 2 3 7 VCCGFXCORE_I
VCC PHASE
2

PC486 PC487 15 PL403


1U_0402_6.3V6-K 1U_0402_6.3V6-K VCCD 0.15UH_CMLE063T-R15MS0R907_38A_20%
12 1 4
22pcs 10uF 6.3V for VCCGFXCORE_I
1

SW2
1

4
CGND 2 3 VCCGFXCORE_I
18 PU404
AGND
NCP302045MNTWG_PQFN33-19_5X5
11
<72> PWM_1A
PWM_1A 1 SW1
2
EMC_NS@
PWM

2
PC488

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V

10U_0402_6.3V
<72,73,75> DRVON DRVON 16 1000P_0201_50V7-K PR480 PR481
DISB#

2
2

2
2

2
2

2
2

2
PC1004

PC1010

PC1011

PC1016
PC1002

PC1005
PC1003

PC1009

PC1015
PC1007

PC1012

PC1013

PC1014
PC1001

PC1006

PC1008
0_0201_5%_SM 0_0201_5%_SM
PGND1

PGND2

2 1
SMOD#
GL1

GL2

1
1

1
1

1
1

1
1

1
13

19

10

14

CSN_1A
CSN_1A <72>
TABLE PU404
SW_1A SW_1A <72>
ON-Semi NCP302045 EMC_NS@ VCCGFXCORE_I
2

PR482
2.2_0603_5%_PULSE_PROOF/SURGE_PROOF
TABLE PR482 0603 SIZE
1

B B

Rohm, ESR03EZPJ2R2
Pana, ERJPA3J2R2V

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V
YDS, RN73S2CL-2R20-F

2
2

2
2

2
PC1017

PC1022
PC1019

PC1020
PC1018

PC1021
1

1
1

1
1

1
VCCGFXCORE_I 6pcs 1uF 6.3V for VCCGFXCORE_I

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1
1
1

1
1

PC1026

PC1028
PC1025
PC1023

PC1027
PC1024

2
2
2

2
2
A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC VCCGFXCORE_I(NCP302035)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 74 of 104
5 4 3 2 1
5 4 3 2 1

D D

MLCCs must be placed


VSYS symmetrically on Top and Bottom.
EMC@
PL408
MPZ1608S300AT_2P~D
1 2 EMC@ EMC@ RF@ RF@

1000P_0402_25V7-K
10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

10U_0603_25V6-K

100P_0402_50V8-J

47P_0402_50V8-J
0.1U_0402_25V6
1 2 2 2 2 1

1
PC490

PC491

PC492

PC493

PC494

PC495

PC496

PC497
PC489
0.1U_0402_25V6-K

2
2 1 1 1 1 2
VCCSA
4pcs(+2pcs) 22uF for VCCSA

VTI
CDc
CC
S=a
A4x
A=
PR483
VCC5M 3.9_0603_5%

c
M

6
A
C 1 2 C
TABLE PL404

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
2 2 2 2 2 2

PC1029

PC1030

PC1032
PC1031

PC1033

PC1034
PC498 TDK SPM6530T-R68M140KA

17

5
0.22U_0402_25V6-K
PR484 CYNTEC CMLE063T-R68MS

THWN

VIN2

VIN1

nc

BOOT

2
2_0201_1% 1 1 1 1 1 1
1 2 3 7 VCCSA @ @
VCC PHASE
2

PC499 PC500 15 PL404


1U_0402_6.3V6-K 1U_0402_6.3V6-K VCCD 0.68UH_SPM6530T-R68M140KA_16.6A_20%
12 1 4
1

4 SW2
CGND 2 3
18 PU405
AGND
NCP302035MNTWG_PQFN33-19_5X5
11
<72> PWM_1B PWM_1B 1 SW1
2
EMC_NS@
PWM

2
PC501
<72,73,74> DRVON DRVON 16 1000P_0201_50V7-K PR485 PR486 VCCSA
DISB# 0_0201_5%_SM 0_0201_5%_SM
4pcs 10uF for VCCSA
PGND1

PGND2
2 1
SMOD#
GL1

GL2

1
13

19

10

14
CSN_1B

10U_0402_6.3V

10U_0402_6.3V
10U_0402_6.3V

10U_0402_6.3V
CSN_1B <72>

2
2

2
PC1035

PC1037
PC1036

PC1038
TABLE PU405 SW_1B SW_1B <72>
EMC_NS@

1
1

1
2
B B
ON-Semi NCP302035 PR487
2.2_0603_5%_PULSE_PROOF/SURGE_PROOF

TABLE PR487 0603 SIZE

1
Rohm, ESR03EZPJ2R2
Pana, ERJPA3J2R2V
YDS, RN73S2CL-2R20-F

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC VCCSA(NCP302035)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 75 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 76 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2014/07/01 Deciphered Date 2015/12/31 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.03
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 77 of 104
5 4 3 2 1
5 4 3 2 1

D D

VTMO
CDaC
CC
1===
R
0.9
_5A1
SA
U
S
6
xP
PJ701
1 2 EMC@ EMC@ RF_NS@ RF_NS@

2
.
2
A
VSYS 1 2

2
2200P_0402_25V7-K
10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M

68P_0402_50V8J

47P_0402_50V8-J
0.1U_0402_25V6

JUMP_43X79 PR786
TABLE PL701
1
1

1
1

1
@
PC722

PC702
PC701

PC703

PC704

PC705

PC706
150K_0201_5% PR716
0_0402_5% 1st: TOKIN MPLCG0630L1R0
1R0_SUS_BST 1 2
2nd: CYNTEC PCMC063T-1R0MN VCC1R0_SUS
2

2
2

1
C 2 C

1
PC717
0.22U_0402_25V6-K

11

10

2
PL701 PR769

CLM

BST
1UH_MPLCG0630L1R0_16.8A_20% 0.01_1206_LE_1%
1R0_SUS_VIN 1 9 1R0_SUS_SW 1 2 EMC@ EMC@ 2 1
VIN SW

2200P_0402_25V7-K
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M
PR766

0.1U_0402_6.3V7-K
EMC_NS@

2
0_0201_5% 1 2 2 2 2 2 PR770

1
1R0_SUS_EN

PC708

PC710

PC711

PC712
PC709

PC719

PC720
<56> SUS_ON2 1 2 15 PR707 0.01_1206_LE_1%
EN 4.7_0603_5% 2 1
13 1R0_SUS_FB
FB

2
2 1 1 1 1@
1

1
PC718 PU701 1

1
0.1U_0402_16V7-K PR715 PC715 PR785
NB693GQ-Z_QFN16_3X3 100K_0201_5% 220P_0201_25V7-K 10_0201_1%
2

12 2 1
PG VCC3M

2
@ PR787

2
825K_0201_1%
PR713 1 2
0_0201_5%_SM
1 2 14 16 1R0_SUS_VIN
MODE NC2

1
1

1
PR714 PC716
5.1_0402_5% 680P_0402_50V7K PR784 PR717
1 2 3 8 1R0_SUS_SW 499_0201_1% 6.8K_0201_1%
VCC3M 3V3 NC1 EMC_NS@

2
PGND1

PGND2

PGND3

PGND4

PGND5
1

PC714
2.2U_0603_10V6-K
B B
2

1
PR718
10K_0201_1%

2
A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC VCC1R0_SUS(NB693)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 78 of 104
5 4 3 2 1
5 4 3 2 1

D D

T_on<65us
T_on<65us
VCC1R0_SUS VCCSTG
VCC1R0_SUS VCCST VCC3M
C C

1
PU1
TPS22971YZPT_DSBGA8 PR46 PU2
A2 A1 10K_0402_1% TPS22971YZPT_DSBGA8
VIN1 VOUT1 A2 A1
B2 B1 VIN1 VOUT1
VIN2 VOUT2

2
B2 B1
PR74 C2 C1 VIN2 VOUT2
0_0402_5%_SM CT PG PD19 C2 C1
1 2 D2 D1 RB521CM_30 CT PG
<65,80> A_ON ON GND 1 2 D2 D1
<57,64,65,89> B_ON ON GND

PD20

1
RB521CM_30 PC29
1

PC30 1 2 0.1U_0402_6.3V7-K
<13,17> -PCH_SLP_S0

1
10U_0402_6.3V6-M PC28 PC32

2
0.1U_0402_6.3V7-K 10U_0402_6.3V6-M
2

2
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date LOAD SW VCCST & VCCSTG
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 79 of 104
5 4 3 2 1
5 4 3 2 1

PJ305
2 1
VCC1R2AP 2 1 VCC1R2A
@ JUMP_43X118

PJ302
2 1
VCC1R2AP 2 1 VCC1R2A
@ JUMP_43X118
D D

PJ303
2 1
VCC0R6BP 2 1 VCC0R6B
PJ301
2 1 @ JUMP_43X39
VSYS 2 1
@ JUMP_43X79

4700P_0402_25V7-K
PJ304

10U_0603_25V6-M

10U_0603_25V6-M

10U_0603_25V6-M
2 1
VCC2R5AP 2 1 VCC2R5A

VTMO
CD
CC
1===
R
2.9
AA
1 1 1 1

1
PC301

PC302

PC303

PC304
PC305
0.1U_0402_25V7-K PR301 PC306 @ JUMP_43X39

7
5A1
0_0402_5% 0.22U_0402_25V6-K Table PL301

2
2 2 @ 2 2 1 2 1 2

a
xP
1st: CYNTEC CMLB053T-R68MS

1
.
2
A
VCC3M 2nd: TOKIN MPLCH0530LR68G

10
1
PL301

VIN

BST
0.68UH_CMLB053T-R68MS_17A_20%
PR303 8 9 1R2A_SW 1 2
5.1_0402_5% VPPIN SW VCC1R2AP

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M

0.1U_0201_6.3V6-K
1 2 3
3V3
2

PC307 PR304 PU301 13


NB687GQ-C669-Z FB

1
1

2
PC309

PC311

PC316
PC308

PC310

PC312

PC314

PC315

PC317
22U_0603_6.3V6-M 100K_0201_5%
1 2 +1.2V_PG 12
PG
1

6
VDDQ

2
2

1
C PC313 1 2 1U_0402_6.3V6-K PR307 PC318 C
AGND_1R2A
@ 0_0201_5% 220P_0201_25V7-K
DDR_VTT_PG_CTRL PR306 2 1 0_0201_5%_SM +1.2V_EN1 16 2 1 1 2 @ @ @
<4> DDR_VTT_PG_CTRL EN1 5
1A
VTT VCC0R6BP
<13,17,56,65> -PCH_SLP_S4 -PCH_SLP_S4 PR308 2 1 0_0201_5% +1.2V_EN2 15
EN2

VTTREF
1A

MODE

1
1
AGND

PGND
11 2
VPP VCC2R5AP PC319 PR309 PR310
<65,79> A_ON @ PR315 2 1 0_0201_5% 22U_0603_6.3V6-M 499_0201_1% 102K_0201_1%

14

7
1

2
2

1
AGND_1R2A PR312

0.22U_0402_25V6-K
100K_0201_1%

22U_0603_6.3V6-M
22U_0603_6.3V6-M

2
2

PC320
PR313 PR311
0_0402_5%_SM 0_0201_5%_SM

1
1

PC322
PC321
1 2

1
2
AGND_1R2A

2
2
AGND_1R2A
B B

AGND_1R2A

TABLE NB687GQ:EN1/EN2 TABLE NB687GQ:MODE


State EN1 EN2 VDDQ VTTREF VTT VPP State USM Fs Resistor to GND
S0 High High ON ON ON ON M1 NO 700KHz 0
S3 Low High ON ON OFF(High-Z) ON M2 YES 700KHz 90K
S4/S5 Low Low OFF OFF OFF OFF M3 NO 500KHz 150K
Others High Low OFF OFF OFF OFF M4 YES 500KHz >230K or Float

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC VCC1R2A(NB687)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Thursday, November 09, 2017
Date: Sheet 80 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 81 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 82 of 104
5 4 3 2 1
5 4 3 2 1

D D

VCC5M

1
PJ708

1
JUMP_43X79

VMO
CaC
CxP
1==
R
851
_0.
S0
UmA
SA
@

2
2

7
EMC_NS@
2 2
PC734 PC735
0.1U_0201_6.3V6K 2.2U_0402_6.3V6-K
C C
1 1
Table PL702 VCC1R8_SUS

1st: TOKO DFE201612R-H-1R0M


2nd: CYNTEC HMME20161B-1R0MDR

A1
PU702
3rd: TDK VLS201612HBX-1R0M-1

VIN
PL702 PR772
1.0UH_DFE201612R-H-1R0M_20% 0.01_1206_LE_1%
B1 B2 1 2 2 1
PR727 MODE LX
0_0201_5%_SM 1 2
<56,66> SUS_ON1 1 2 A2 B3 PC736 PC737
EN FB 4.7U_0402_6.3V 0.1U_0201_6.3V6K

GND
2 1 EMC_NS@

A3
BU90104GWZ-E2_UCSP35L1-6

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date DC/DC VCC1R8_SUS(BU90104GWZ)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 83 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date
BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.03
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 84 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date BLANK

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 85 of 104
5 4 3 2 1
5 4 3 2 1

D D

C C

BLANK

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/11/01 Deciphered Date 2013/12/31 BLANK
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 86 of 104
5 4 3 2 1
5 4 3 2 1

D D

0.8A
VCC3_SUS
VCC3M

1
PR47
0.01_0603_LE_1%

2
PQ25
FDMA8878_MICROFET-2X2-6-8

4
C C

2
PR48
33_0402_5%

1
PR49
100_0201_5%

2
PD21
RB521CM_30

1
<66> SUS_DRV

2
PC34
0.1U_0402_25V7K
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date Deciphered Date LOAD SW PCH SUS/TRACK POINT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 87 of 104
5 4 3 2 1
5 4 3 2 1

D D

0.5A
VCC3LAN

VCC3M

1
PR50
0.01_0603_LE_1%

2
C C

PQ26
FDMA8878_MICROFET-2X2-6-8

2
PR51
33_0402_5%

1
1

3
2

2
PD22
PR52 RB521CM_30
100_0201_5%

1
1
<66> VCC3LAN_DRV

2
PC35
0.1U_0402_25V7K
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SW LAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 88 of 104
5 4 3 2 1
5 4 3 2 1

D D

Table 、 PQ29
for PQ27、P Q28

FAIRCHILD FDMA8878
VISHAY SIA462DJ

3.4A
VCCCPUIO

VCC3M 6.4A
VCC3B VCC5M 4.2A
VCC5B

22U_0603_6.3V6-M

22U_0603_6.3V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M

0.1U_0402_25V7K
VCC1R0_SUS

1
1 1 1 1
1

2
PC60

PC63
PC61

PC62

PC64
PR65

1
PR53 0.01_0603_LE_1%
0.01_0603_LE_1% PR54

1
0.01_0603_LE_1% 2 2 2 2

2
2

PQ29

2
FDMA8878_MICROFET-2X2-6-8

PQ27
FDMA8878_MICROFET-2X2-6-8 PQ28
FDMA8878_MICROFET-2X2-6-8
5

4
5

4
270_0402_5%
1

100_0402_5%
C C

2
PR55

PR56
2

1
1

3
1

3
2

2
@ PC36 @ PC37
0.1U_0402_25V7K 0.1U_0402_25V7K
1

1
PR85
2

PD23 270_0201_5%

2
2
PR59 RB521CM_30 PD24
100_0201_5% PR60 RB521CM_30
1

2
100_0201_5%

1
1

1
1
PR86 @ PC42 @PR87
<66> VCC3B_DRV 100_0201_5% 0.1U_0402_25V7K 10_0603_5%
<66> VCC5B_DRV

2
1

2
VDD10
<38,66> B_DRV
2

2
PC39 PD35

1
0.1U_0402_25V7K PC38 VCC3M VCC5M RB521CM_30

2
0.047U_0402_25V6
1

1
PR88

2
100K_0201_5%

2
PR89
PR90 100K_0201_5%

1
100K_0201_5%

1
1

1
D
PD36 2

2
B RB521CM_30 D G PQ33 PC43 B

<57,64,65,79> B_ON 1 2 2 LSK3541G1ET2L 0.1U_0402_25V7K

1
G PQ32 S D

1
LSK3541G1ET2L 2
S G @ PQ34

3
LSK3541G1ET2L
S

3
PD37
RB521CM_30
<13,17,31,56,65> -PCH_SLP_S3 1 2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SW B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 89 of 104
5 4 3 2 1
5 4 3 2 1

D D

2.7A
VCC3WLAN

VCC3M

1
1
@ PF10
PR61 4A_32V_ERBRD4R00X
0.01_0603_LE_1%

2
C C
PQ30
FDMA8878_MICROFET-2X2-6-8

2
PR64
33_0402_5%

1
1

3
2

2
PD26
PR66 RB521CM_30
100_0201_5%

1
1
<66> VCC3WLAN_DRV

2
PC41
0.22U_0402_25V6-K
B 1 B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SW WWAN & WLAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 90 of 104
5 4 3 2 1
5 4 3 2 1

H1 H2 H10
PAD_C6P0D3P2 PAD_C6P0D3P2 PAD_C6P0D2P5

@ @ @

1
H29 H5 H3 H4 H11
D PAD_O5P3X1P2D5P3X1P2N PAD_D2P8 PAD_C6P0D3P2 PAD_C6P0D3P2 pad_ct6p0shapeb7p0x7p5d2p5 D

@ @ @ @ @

1
H12
PAD_CT6P0B5P0D2P5

H6
PAD_C6P0D2P5 @

1
@

1
H9
PAD_C6P0D2P5
H7 H8
PAD_D2P8 PAD_C5P0D2P5
@

1
@ @ H14

1
PAD_CB6P0D2P8

1
C C

H15 H16
PAD_CT6P0B7P6D2P5 PAD_C6P0D3P2

@ @

1
H18
PAD_O3P1X2P1D3P1X2P1N

1
H19 H20 H21 H22
PAD_C6P0D2P5
PAD_SHAPET8P0X11P0CB7P6D2P5 pad_ct6p0shapeb8p0x6p0d2p5 PAD_CB6P0D2P8

@ @ @ @

1
B B

H23
PAD_SHAPET8P0X11P0CB7P6D2P5 H24 H25 H26
PAD_O3P1X2P1D3P1X2P1N PAD_C2P3D2P3N pad_o2p1x3p1d2p1x3p1n

1
@ @ @

1
H27 H28
PAD_O1P1X2P7D1P1X2P7N PAD_O0P9X2P6D0P9X2P6N

@ @

1
PCB Fedical Mark PAD
FD1 FD2 FD3 FD4 FD5 FD6

1
1

1
A A

Security Classification LC Future Center Secret Data Title


Issued Date 2014/07/01 Deciphered Date 2015/12/31 SCREW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 91 of 104


5 4 3 2 1
5 4 3 2 1

VCC1R8VIDEO_AON

1
SWG@
R10247
10K_0201_5%
SWG@ ???mA
U208A VCC1R0VIDEO

2
1/14 PCI_EXPRESS Place under GPU Place near GPU Place between GPU and PS
<97> -PEX_RST

D731 SWG@ 1 2 RB521CM-30T2R_VMN2M


<13,39,41,45,46,55,63,64,65> -PLTRST_FAR
D 1 1 1 1 1 1 1 D
AA22 SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@
D730 SWG@ 1 2 RB521CM-30T2R_VMN2M AC7 PEX_DVDD_1 AB23 C6031 C9692 C9693 C9694 C9695 C9696
<3> -GPU_RST PEX_RST* PEX_DVDD_2 C9697
AC24 1U_0402_6.3VAK 4.7U_0603_6.3VA-K 4.7U_0603_6.3VA-K 4.7U_0603_6.3VA-K 10U_0603_6.3V6-M 10U_0603_6.3V6-M 22U_0603_6.3V6-M
-CLKREQ_PCIE0_VGA AC6 PEX_DVDD_3 AD25 2 2 2 2 2 2 2
PEX_CLKREQ* PEX_DVDD_4 AE26
AE8 PEX_DVDD_5 AE27
<12> PCIE0_CLK_100M PEX_REFCLK PEX_DVDD_6
AD8
<12> -PCIE0_CLK_100M PEX_REFCLK* NEAR BALLS
PCIE0_L0_RXP C6042 1 2 0.22U_0201_6.3V6M SWG@ PCIE0_L0_RXP_C AC9
<10> PCIE0_L0_RXP PCIE0_L0_RXN PCIE0_L0_RXN_C PEX_TX0
C6043 1 2 0.22U_0201_6.3V6M SWG@ AB9 ???mA
<10> PCIE0_L0_RXN PEX_TX0* VCC1R8VIDEO_MAIN
PCIE0_L0_TXP AG6 SWG@
<10> PCIE0_L0_TXP PCIE0_L0_TXN PEX_RX0
AG7 AA10 R10472
<10> PCIE0_L0_TXN PEX_RX0* PEX_HVDD_1 AA12 1 2
PCIE0_L1_RXP C6044 1 2 0.22U_0201_6.3V6M SWG@ PCIE0_L1_RXP_C AB10 PEX_HVDD_2 AA13
<10> PCIE0_L1_RXP PCIE0_L1_RXN PCIE0_L1_RXN_C PEX_TX1 PEX_HVDD_3
C6045 1 2 0.22U_0201_6.3V6M SWG@ AC10 AA16 0_0805_5%
<10> PCIE0_L1_RXN PEX_TX1* PEX_HVDD_4 AA18 1 1 1 1 1 1 1 1 1
PCIE0_L1_TXP AF7 PEX_HVDD_5 AA19 SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@
<10> PCIE0_L1_TXP PCIE0_L1_TXN PEX_RX1 PEX_HVDD_6
AE7 AA20 C9698 C9699 C9700 C9701 C9702 C9703 C9704 C9705 C9706
<10> PCIE0_L1_TXN PEX_RX1* PEX_HVDD_7 AA21 1U_0402_6.3VAK 1U_0402_6.3VAK 1U_0402_6.3VAK 1U_0402_6.3VAK 4.7U_0603_6.3VA-K 4.7U_0603_6.3VA-K 10U_0603_6.3V6-M 10U_0603_6.3V6-M 22U_0603_6.3V6-M
PCIE0_L2_RXP C6046 1 2 0.22U_0201_6.3V6M SWG@ PCIE0_L2_RXP_C AD11 PEX_HVDD_8 AB22 2 2 2 2 2 2 2 2 2
<10> PCIE0_L2_RXP PCIE0_L2_RXN PCIE0_L2_RXN_C PEX_TX2 PEX_HVDD_9
C6047 1 2 0.22U_0201_6.3V6M SWG@ AC11 AC23
<10> PCIE0_L2_RXN PEX_TX2* PEX_HVDD_10 AD24
PCIE0_L2_TXP AE9 PEX_HVDD_11 AE25
<10> PCIE0_L2_TXP PCIE0_L2_TXN PEX_RX2 PEX_HVDD_12
AF9 AF26
<10> PCIE0_L2_TXN PEX_RX2* PEX_HVDD_13 AF27
PCIE0_L3_RXP C6050 1 2 0.22U_0201_6.3V6M SWG@ PCIE0_L3_RXP_C AC12 PEX_HVDD_14
<10> PCIE0_L3_RXP PCIE0_L3_RXN PCIE0_L3_RXN_C PEX_TX3
C6051 1 2 0.22U_0201_6.3V6M SWG@ AB12
<10> PCIE0_L3_RXN PEX_TX3*
PCIE0_L3_TXP AG9
<10> PCIE0_L3_TXP PCIE0_L3_TXN PEX_RX3
AG10
<10> PCIE0_L3_TXN PEX_RX3*
AB13
Cap near U208 side AC13 PEX_TX4
PEX_TX4*
AF10 210mA
AE10 PEX_RX4
PEX_RX4* VCC1R8VIDEO_MAIN
C AD14 C
AC14 PEX_TX5 AA8 PEX_PLL_HVDD_SVDD SWG@ R10473 1 2 0_0805_5%
VCC1R8VIDEO_AON PEX_TX5* PEX_PLL_HVDD_1 AA9
AE12 PEX_PLL_HVDD_2
AF12 PEX_RX5
PEX_RX5* 1
SWG@
AC15 C9707
VCC3_SUS AB15 PEX_TX6 0.1U_0402_10V7-K
PEX_TX6*
1

2
SWG@ AG12
R10474 AG13 PEX_RX6
10K_0201_5% PEX_RX6*
AB16
PEX_TX7
2
5

AC16
1 PEX_TX7*
P

<66,97,101,102> GFXCORE_D_PWRGD B 4 AF13


Y DGFX_PWRGD <9> PEX_RX7
2 AE13
<102> 1R35VIDEO_PWRGD A PEX_RX7*
G

SWG@ AD17
PEX_TX8
3

U209 AC17
MC74VHC1G09DFT2G_SC70-5 PEX_TX8*
AE15
AF15 PEX_RX8
PEX_RX8*
1

SWG@ AC18
R10475 AB18 PEX_TX9
VCC1R8VIDEO_AON 0_0201_5% PEX_TX9*

PEX LANES 15 - 4 ARE DEFEATURED


AG15
PEX_RX9
2

AG16
PEX_RX9*
AB19
AC19 PEX_TX10
PEX_TX10*
1

SWG@ AF16
PEX_RX10
2

R10476 SWG@ AE16


G

10K_0201_5% Q268 PEX_RX10*


RUM002N05MGT2L_VMT3 AD20
PEX_TX11
2

AC20
-CLKREQ_PCIE0_VGA 3 1 PEX_TX11*
S

B -CLKREQ_PCIE0 <12> B
AE18
AF18 PEX_RX11
Q268 Low Vgs PJT138KA max Vgs=1.00V PEX_RX11*
AC21
AB21 PEX_TX12
PEX_TX12*
AG18
AG19 PEX_RX12
PEX_RX12*
AD23
AE23 PEX_TX13
PEX_TX13*
AF19
AE19 PEX_RX13
PEX_RX13*
AF24
AE24 PEX_TX14
PEX_TX14*
AE21
AF21 PEX_RX14
PEX_RX14*
AG24
AG25 PEX_TX15
PEX_TX15*
AG21
AG22 PEX_RX15
PEX_RX15*

AF25 PEX_TERMP
PEX_TERMP

N17S-G1-A1_GB2C64-595
1

SWG@
R8548
2.49K_0201_1%
2

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/06/21 Deciphered Date 2012/06/21 N17S-G1(1/6) PEG I/F
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 92 of 104

5 4 3 2 1
5 4 3 2 1

<98> FBA_D[63:0]

SWG@
U208B
2/14 FBA
FBA_D0 E18
FBA_D1 F18 FBA_D0
FBA_D2 E16 FBA_D1
FBA_D3 F17 FBA_D2
FBA_D4 D20 FBA_D3
FBA_D5 D21 FBA_D4
FBA_D6 F20 FBA_D5
FBA_D7 E21 FBA_D6
D D
FBA_D8 E15 FBA_D7
FBA_D9 D15 FBA_D8
FBA_D10 F15 FBA_D9
FBA_D11 F13 FBA_D10
FBA_D12 C13 FBA_D11
FBA_D13 B13 FBA_D12
FBA_D14 E13 FBA_D13
FBA_D15 D13 FBA_D14
FBA_D16 B15 FBA_D15
FBA_D17 C16 FBA_D16
FBA_D18 A13 FBA_D17
FBA_D19 A15 FBA_D18
FBA_D20 B18 FBA_D19
FBA_D21 A18 FBA_D20
FBA_D22 A19 FBA_D21
FBA_D23 C19 FBA_D22
FBA_D24 B24 FBA_D23
FBA_D25 C23 FBA_D24
FBA_D26 A25 FBA_D25
FBA_D27 A24 FBA_D26
FBA_D28 A21 FBA_D27
FBA_D29 B21 FBA_D28
FBA_D30 C20 FBA_D29
FBA_D31 C21 FBA_D30
FBA_D32 R22 FBA_D31
FBA_D33 R24 FBA_D32 C27 -FBA_CS_L
FBA_D34 FBA_D33 FBA_CMD0 FBA_BA3_L -FBA_CS_L <98>
T22 C26
FBA_D35 FBA_D34 FBA_CMD1 FBA_BA0_L FBA_BA3_L <98>
R23 E24
FBA_D36 FBA_D35 FBA_CMD2 FBA_BA2_L FBA_BA0_L <98>
N25 F24
FBA_D37 FBA_D36 FBA_CMD3 FBA_BA1_L FBA_BA2_L <98>
N26 D27
FBA_D38 FBA_D37 FBA_CMD4 -FBA_WE_L FBA_BA1_L <98>
N23 D26
FBA_D39 FBA_D38 FBA_CMD5 FBA_MA8_L -FBA_WE_L <98>
N24 F25
FBA_D40 FBA_D39 FBA_CMD6 FBA_MA11_L FBA_MA8_L <98>
V23 F26
FBA_D41 FBA_D40 FBA_CMD7 -FBA_ABI_L FBA_MA11_L <98>
V22 F23
FBA_D42 FBA_D41 FBA_CMD8 FBA_RFU_L -FBA_ABI_L <98>
T23 G22
FBA_D43 FBA_D42 FBA_CMD9 FBA_MA10_L FBA_RFU_L <98>
U22 G23
FBA_D44 FBA_D43 FBA_CMD10 FBA_MA9_L FBA_MA10_L <98>
Y24 G24
FBA_D45 FBA_D44 FBA_CMD11 -FBA_RAS_L FBA_MA9_L <98>
AA24 F27
FBA_D46 FBA_D45 FBA_CMD12 -FBA_RST_L -FBA_RAS_L <98>
C Y22 G25 C
FBA_D47 FBA_D46 FBA_CMD13 -FBA_CKE_L -FBA_RST_L <98>
AA23 G27
FBA_D48 FBA_D47 FBA_CMD14 -FBA_CAS_L -FBA_CKE_L <98>
AD27 G26
FBA_D49 FBA_D48 FBA_CMD15 -FBA_CS_H -FBA_CAS_L <98>
AB25 M24
FBA_D50 FBA_D49 FBA_CMD16 FBA_BA3_H -FBA_CS_H <98>
AD26 M23
FBA_D51 FBA_D50 FBA_CMD17 FBA_BA0_H FBA_BA3_H <98>
AC25 K24
FBA_D52 FBA_D51 FBA_CMD18 FBA_BA2_H FBA_BA0_H <98>
AA27 K23
FBA_D53 FBA_D52 FBA_CMD19 FBA_BA1_H FBA_BA2_H <98>
AA26 M27
FBA_D54 FBA_D53 FBA_CMD20 -FBA_WE_H FBA_BA1_H <98>
W26 M26
FBA_D55 FBA_D54 FBA_CMD21 FBA_MA8_H -FBA_WE_H <98>
Y25 M25
FBA_D56 FBA_D55 FBA_CMD22 FBA_MA11_H FBA_MA8_H <98>
R26 K26
FBA_D57 FBA_D56 FBA_CMD23 -FBA_ABI_H FBA_MA11_H <98>
T25 K22
FBA_D58 FBA_D57 FBA_CMD24 FBA_RFU_H -FBA_ABI_H <98>
N27 J23
FBA_D59 FBA_D58 FBA_CMD25 FBA_MA10_H FBA_RFU_H <98>
R27 J25
FBA_D60 FBA_D59 FBA_CMD26 FBA_MA9_H FBA_MA10_H <98>
V26 J24
FBA_D61 FBA_D60 FBA_CMD27 -FBA_RAS_H FBA_MA9_H <98>
V27 K27
FBA_D62 FBA_D61 FBA_CMD28 -FBA_RST_H -FBA_RAS_H <98>
W27 K25
FBA_D63 FBA_D62 FBA_CMD29 -FBA_CKE_H -FBA_RST_H <98>
W25 J27 VCC1R35VIDEO
FBA_D63 FBA_CMD30 -FBA_CAS_H -FBA_CKE_H <98>
J26
FBA_CMD31 -FBA_CAS_H <98>
B19
D19 FBA_CMD32 F22 FBA_CMD34 @ R10477 1 2 60.4_0402_1%
<98> FBA_DBI0 FBA_DQM0 FBA_CMD34 FBA_CMD35
D14 J22 @ R10478 1 2 60.4_0402_1%
<98> FBA_DBI1 FBA_DQM1 FBA_CMD35
C17
<98> FBA_DBI2 FBA_DQM2
C22
<98> FBA_DBI3 FBA_DQM3
P24
<98> FBA_DBI4 FBA_DQM4
W24
<98> FBA_DBI5 FBA_DQM5
AA25
<98> FBA_DBI6 FBA_DQM6
U25
<98> FBA_DBI7 FBA_DQM7

E19
<98> FBA_EDC0 FBA_DQS_WP0
C15
<98> FBA_EDC1 FBA_DQS_WP1
B16 D24
<98> FBA_EDC2 FBA_DQS_WP2 FBA_CLK0 FBA_CLK0 <98>
B22 D25
<98> FBA_EDC3 FBA_DQS_WP3 FBA_CLK0* -FBA_CLK0 <98>
R25 N22
<98> FBA_EDC4 FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 <98>
W23 M22
<98> FBA_EDC5 FBA_DQS_WP5 FBA_CLK1* -FBA_CLK1 <98>
AB26
<98> FBA_EDC6 FBA_DQS_WP6
T26
<98> FBA_EDC7 FBA_DQS_WP7
B B
F19 D18
FBA_DQS_RN0 FBA_WCK01 FBA_WCK0 <98>
C14 C18
FBA_DQS_RN1 FBA_WCK01* -FBA_WCK0 <98>
A16 D17
FBA_DQS_RN2 FBA_WCK23 FBA_WCK1 <98>
A22 D16
FBA_DQS_RN3 FBA_WCK23* -FBA_WCK1 <98>
P25 T24
FBA_DQS_RN4 FBA_WCK45 FBA_WCK2 <98>
W22 U24
FBA_DQS_RN5 FBA_WCK45* -FBA_WCK2 <98>
AB27 V24
FBA_DQS_RN6 FBA_WCK67 FBA_WCK3 <98>
T27 V25
FBA_DQS_RN7 FBA_WCK67* -FBA_WCK3 <98> 1.5A
VCC1R8VIDEO_MAIN
FL76
F16 Place under GPU FB_PLL_AVDD SWG@ R10479 1 2 0_0603_5% SWG@ 1 2 MPZ1608S300AT_2P
FB_PLL_AVDD_1
P22 1 1 1
FB_PLL_AVDD_2 SWG@ SWG@ SWG@
H22 C9710 C9708 C9709
FB_REFPLL_AVDD 0.1U_0402_25V7K 0.1U_0402_25V7K 22U_0603_6.3V6-M
2 2 2

Test_Point_20MIL SWG@ R10480 1 2 0_0603_5%


TP940 1 FB_VREF D23
FB_VREF
1 1
SWG@ SWG@
N17S-G1-A1_GB2C64-595 C9712 C9711
0.1U_0402_25V7K 0.1U_0402_25V7K
2 2

A A

Security Classification LC Future Center Secret Data Title


N17S-G1(2/6) VRAM I/F
Issued Date 2012/05/02 Deciphered Date 2012/5/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 93 of 104


5 4 3 2 1
5 4 3 2 1

VCCGFXCORE_D
NV recommand change to 4.7uF
Place under GPU SWG@
U208C
11/14 NVVDD
K10
K12 VDD_001
1 1 1 2 2 2 2 2 2 2 2 VDD_002
SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ K14
C9713 C9714 C9715 C9716 C9717 C9718 C9719 C9720 C9721 C9722 C9723 K16 VDD_003
1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M K18 VDD_004
2 2 2 1 1 1 1 1 1 1 1 L13 VDD_005
L15 VDD_006
M10 VDD_007
M12 VDD_008
M16 VDD_009
M18 VDD_010
N11 VDD_011
N13 VDD_012
D Place near GPU VDD_013 D
N15
N17 VDD_014
NV recommand remove VDD_015
P14
R11 VDD_016
1 1 1 1 1 1 1 1 1 1 VDD_017
SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ R13
C9728 C9729 C9731 C9732 C9733 C9734 R15 VDD_018
C9724 C9725 C9726 C9727 VDD_019
4.7U_0603_6.3VA-K 4.7U_0603_6.3VA-K 4.7U_0603_6.3VA-K 4.7U_0603_6.3VA-K 10U_0402_6.3V6-M 10U_0402_6.3V6-M 10U_0402_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M R17
2 2 2 2 2 2 2 2 2 2 T10 VDD_020
T12 VDD_021
T16 VDD_022
T18 VDD_023
U13 VDD_024
U15 VDD_025
V10 VDD_026
V12 VDD_027
V14 VDD_028
V16 VDD_029
1 1 1 VDD_030
SWG@ SWG@ SWG@ V18
+ C9737 C9735 C9736 VDD_031
330U_D2_2V_R9M 10U_0402_6.3V6-M 10U_0402_6.3V6-M
2 2
2 F2
VDD_SENSE GPU_VDD_SENSE <101>
F1
GND_SENSE GPU_GND_SENSE <101>

trace width: 16mils


N17S-G1-A1_GB2C64-595
differential voltage sensing.
differential signal routing.
VCC1R35VIDEO
SWG@
Place under GPU U208D
C 12/14 FBVDDQ C

B26
C25 FBVDDQ_01
1 1 1 1 1 1 1 1 1 1 FBVDDQ_02
SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ E23
C9740 C9741 C9742 C9763 C9764 C9765 C9766 C9767 C9768 C9769 E26 FBVDDQ_03
1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 1U_0402_6.3V6-K 10U_0402_6.3V6-M 10U_0402_6.3V6-M F14 FBVDDQ_04
2 2 2 2 2 2 2 2 2 2 F21 FBVDDQ_05
G13 FBVDDQ_06
G14 FBVDDQ_07
G15 FBVDDQ_08
G16 FBVDDQ_09
G18 FBVDDQ_10
G19 FBVDDQ_11
G20 FBVDDQ_12
Place near GPU FBVDDQ_13
G21
L22 FBVDDQ_14
L24 FBVDDQ_19
L26 FBVDDQ_20
1 1 1 1 FBVDDQ_21
SWG@ SWG@ SWG@ SWG@ M21
C9770 C9771 C9772 C9773 N21 FBVDDQ_22
10U_0402_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M 22U_0603_6.3V6-M R21 FBVDDQ_23
2 2 2 2 T21 FBVDDQ_24
V21 FBVDDQ_25
W21 FBVDDQ_26
H24 FBVDDQ_27
H26 FBVDDQ_15
J21 FBVDDQ_16
K21 FBVDDQ_17
FBVDDQ_18

B B

VCC1R35VIDEO

1
SWG@
R10482
40.2_0402_1%

2
D22
FB_CAL_PD_VDDQ

C24
FB_CAL_PU_GND

B25
FB_CAL_TERM_GND

1
1
SWG@ SWG@
R10481 R10483
60.4_0402_1% 40.2_0402_1%

2
2
N17S-G1-A1_GB2C64-595

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/06/21 Deciphered Date 2012/06/21 N17S-G1(3/6) POWER1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 94 of 104


5 4 3 2 1
5 4 3 2 1

VCCGFXCORE_D

VCCGFXCORE_D SWG@
U208F SWG@
Place under GPU 7/14 VDDS U208G
6/14 XVDD

L11
L17 VDDS_1 G1 N4
M14 VDDS_2 G2 XVDD_1 XVDD_36 N5
P10 VDDS_3 G3 XVDD_2 XVDD_37 N7
D P12 VDDS_4 G4 XVDD_3 XVDD_38 P3 D
2 2 2 2 2 2 VDDS_5 XVDD_4 XVDD_39
SWG@ SWG@ SWG@ SWG@ SWG@ SWG@ P16 G5 P4
C9775 C9774 C9798 C9799 C9800 C9801 P18 VDDS_6 G6 XVDD_5 XVDD_40 P6
1U_0402_6.3V6-K 1U_0402_6.3V6-K 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M 4.7U_0402_6.3V6-M T14 VDDS_7 G7 XVDD_6 XVDD_41 R1
1 1 1 1 1 1 U11 VDDS_8 H3 XVDD_7 XVDD_42 R2
U17 VDDS_9 H4 XVDD_8 XVDD_43 R3
VDDS_10 H6 XVDD_9 XVDD_44 R4
J1 XVDD_10 XVDD_45 R5
J2 XVDD_11 XVDD_46 R6
J3 XVDD_12 XVDD_47 R7
J4 XVDD_13 XVDD_48 T1
NV recommand change to 4.7uF GM108 J5 XVDD_14 XVDD_49 T2
J6 XVDD_15 XVDD_50 T3
Place near GPU RSVD F4 J7 XVDD_16 XVDD_51 T4
VDDS_SENSE F3 K1 XVDD_17 XVDD_52 T5
RSVD GNDS_SENSE XVDD_18 XVDD_53
NV recommand remove K2 T6
K3 XVDD_19 XVDD_54 T7
N17S-G1-A1_GB2C64-595 K4 XVDD_20 XVDD_55 U3
K5 XVDD_21 XVDD_56 U4
XVDD_22 XVDD_57
2

2
2

2
SWG@ SWG@ SWG@ SWG@ SWG@ K6 U6
C9796 C9797 C9817 C9818 C9819 K7 XVDD_23 XVDD_58 V1
10U_0603_25V6-M 10U_0603_25V6-M 10U_0603_25V6-M 10U_0603_25V6-M 10U_0603_25V6-M L3 XVDD_24 XVDD_59 V2
XVDD_25
1

1 XVDD_60
1

1
L4 V3
M1 XVDD_26 XVDD_61 V4
GM108
M2 XVDD_27 XVDD_62 V5
M3 XVDD_28 XVDD_63 V6
M4 XVDD_29 XVDD_64 V7
XVDD_30 RSVD XVDD_65
M5 W1
M7 XVDD_31 XVDD_66 W2
N1 XVDD_32 XVDD_67 W3
N2 XVDD_33 XVDD_68 W4
N3 XVDD_34 XVDD_69
NV recommand remove XVDD_35

1 2
SWG@ SWG@
C9780 C9783
22U_0805_6.3V6-M 10U_0402_6.3V6-M N17S-G1-A1_GB2C64-595
2 1

C C

VCC1R8VIDEO_MAIN

2 1

2
SWG@ SWG@ SWG@ SWG@
C9804 C9802 C9807 C9806
SWG@ 4.7U_0402_6.3V6-M
1U_0402_6.3V6-K 0.1U_0402_16V7-K 0.1U_0402_16V7-K

1
U208E 1 2
14/14 VDD18

G8
VDD18_1 G9
VDD18_2 G10
1V8_AON_1 G12
1V8_AON_2

VCC1R8VIDEO_AON

2 2
2

SWG@ SWG@ SWG@ SWG@


C9809 C9808 C9803 C9805
0.1U_0402_16V7-K 0.1U_0402_16V7-K 1U_0402_6.3V6-K 4.7U_0402_6.3V6-M
1

1 1
N17S-G1-A1_GB2C64-595

B B

A A

Security Classification LC Future Center Secret Data Title


N17S-G1(4/6) POWER2
Issued Date 2012/05/02 Deciphered Date 2012/5/02
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 95 of 104


5 4 3 2 1
5 4 3 2 1

SWG@ SWG@
U208H U208I
13/14 GND 5/14 NC
SWG@
A2 K11 GM108 U208J
AB17 GND_001 GND_057 K13 TP941 1Test_Point_20MIL AA14 PEX_PLLVDD 4/14 IFPAB
AB20 GND_005 GND_058 K15 TP942 1Test_Point_20MIL AA15 NC_1 PEX_PLLVDD
AB24 GND_006 GND_059 K17 AB6 NC_2
DVI HDMI DP
AC2 GND_007 GND_060 L10 TP943 1Test_Point_20MIL AB8 NC_3 PEX_SVDD_3V3 SL/DL
AC22 GND_008 GND_061 L12 AD10 NC_4
AC26 GND_009 GND_062 L14 AD7 NC_5 AC4
AC5 GND_010 GND_063 L16 TP944 1Test_Point_20MIL AE22 NC_6 PEX_TSTCLK* IFPA_L3* AC3
TXC/TXC
D
AC8 GND_011 GND_064 L18 AE3 NC_7 IFPA_L3 D
AD12 GND_012 GND_065 L5 AE4 NC_8 AA6
AD13 GND_013 GND_069 M11 AF2 NC_9 IFPAB_RSET Y3
TXD0/0
A26 GND_014 GND_070 M13 TP945 1Test_Point_20MIL AF22 NC_10 PEX_TSTCLK IFPA_L2* Y4
AD15 GND_002 GND_071 M15 AF3 NC_11 IFPA_L2
AD16 GND_015 GND_072 M17 AF4 NC_12
AD18 GND_016 GND_073 N10 AG3 NC_13 AA2
TXD1/1
AD19 GND_017 GND_074 N12 D10 NC_14 W7 IFPA_L1* AA3
AD21 GND_018 GND_075 N14 E10 NC_15 IFPAB_PLLVDD IFPA_L1
AD22 GND_019 GND_076 N16 F10 NC_16
AE11 GND_020 GND_077 N18 F5 NC_17 AA1
TXD2/2
AE14 GND_021 GND_078 P11 F6 NC_18 MLS_REF0 IFPA_L0* AB1
AE17 GND_022 GND_079 P13 W5 NC_19 IFPA_L0
AE20 GND_023 GND_080 P15 NC_20
AB11 GND_024 GND_081 P17 GM108 COMPATIBLE DESIGNS MUST AA5
AF1 GND_003 GND_082 P23 LEAVE NC PINS FLOATING EXCEPT IFPA_AUX_SDA* AA4
AF11 GND_025 GND_084 P26 FOR THOSE IFPA_AUX_SCL
AF14 GND_026 GND_085 R10 SHOWN
AF17 GND_027 GND_087 R12 N17S-G1-A1_GB2C64-595 AB4
AF20 GND_028 GND_088 R14 IFPB_L3* AB5
TXC
AF23 GND_029 GND_089 R16 IFPB_L3
AF5 GND_030 GND_090 R18
AF8 GND_031 GND_091 T11 W6 AB2
TXD0/3
AG2 GND_032 GND_092 T13 IFP_IOVDD_1 IFPB_L2* AB3
AG26 GND_033 GND_093 T15 Y6 IFPB_L2
AB14 GND_034 GND_094 T17 IFP_IOVDD_2
B1 GND_004 GND_095 U10 AD2
TXD1/4
B11 GND_035 GND_096 U12 IFPB_L1* AD3
B14 GND_036 GND_097 U14 IFPB_L1
B17 GND_037 GND_098 U16
C C
B20 GND_038 GND_099 U18 AD1
TXD2/5
B23 GND_039 GND_100 U23 IFPB_L0* AE1
B27 GND_040 GND_102 U26 IFPB_L0
B5 GND_041 GND_103 V11
B8 GND_042 GND_105 V13 AD5
E11 GND_043 GND_106 V15 IFPB_AUX_SDA* AD4
E14 GND_044 GND_107 V17 IFPB_AUX_SCL
E17 GND_045 GND_108 Y2
E2 GND_046 GND_109 Y23
GND_047 GND_110
E20
E22 GND_048 GND_111
Y26
Y5
IFPAB (DEFEATURED 0N GM108)

E25 GND_049 GND_112 AA7 N17S-G1-A1_GB2C64-595


E5 GND_050 GND_F AB7
E8 GND_051 GND_H
GND_052

OPTIONAL GND:

XVDD AREA

H2 P2
H5 GND_053 GND_083 P5
L2 GND_056 GND_086 U2 SWG@
GND_066 GND_101 U5 U208N
GND_104
3/14 JTAG

PCB ADR/CMD
B B
R10544 1 @ 2 10K_0201_5% AE5
PWR REFERENCE
TP946 1Test_Point_20MIL AE6 JTAG_TCK
H23 L23 TP947 1Test_Point_20MIL AF6 JTAG_TDI
H25 GND_054 GND_067 L25 TP948 1Test_Point_20MIL AD6 JTAG_TDO
GND_055 GND_068 R10545 2 SWG@ 1 10K_0201_5% AG4 JTAG_TMS
N17S-G1-A1_GB2C64-595 R10546 2 SWG@ 1 10K_0201_5% AD9 JTAG_TRST*
NVJTAG_SEL

N17S-G1-A1_GB2C64-595

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/06/21 Deciphered Date 2012/06/21 N17S-G1(5/6) GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 96 of 104


5 4 3 2 1
5 4 3 2 1

VCC1R8VIDEO_AON 30ohm@100MHz ESR=0.01


VCC1R8VIDEO_MAIN
FL30
1 2

1 R10547

1 R10548

1 R10549

1 R10550

1 R10551

1 R10552
SWG@

SWG@

SWG@

SWG@

SWG@

SWG@
MPZ1608S300AT_2P 1 1 1 1
VCC1R8VIDEO_AON SWG@ SWG@ SWG@ SWG@ SWG@
C9810 C9814 C9811 C9812
22U_0603_6.3V6-M 4.7U_0402_6.3V6-M 0.1U_0402_25V7K 0.1U_0402_25V7K
2 2 2 2

2.2K_0201_5% 2

2.2K_0201_5% 2

2.2K_0201_5% 2

2.2K_0201_5% 2

2.2K_0201_5% 2

2.2K_0201_5% 2
SWG@
R10634 U208M 1 U208L
10K_0201_5% 8/14 MISC1 SWG@ 9/14 XTAL_PLL
C9813 GM108

2
0.1U_0402_25V7K L6
D 2 XS_PLLVDD PLLVDD D
M6
SWG@ F11 SP_PLLVDD
GPCPLL_AVDD NC
N6
U232 D9 I2CS_SCL VID_PLLVDD NC
RUM002N05MGT2L_VMT3 I2CS_SCL D8 I2CS_SDA
I2CS_SDA 1
1 3 -OVERT A6 SWG@
,66> -SHUTDOWN OVERT
AE2 A9 C9815
D

TS_VREF I2CC_SCL B9 VCC1R8VIDEO_AON 0.1U_0402_25V7K


I2CC_SDA 2 A10 C10
XTAL_SSIN XTAL_OUTBUFF
E12
G
2

THERMDN

100K_0201_5%
SWG@ R10553

SWG@ R10554

SWG@ R10557
C9 C11 B10
I2CB_SCL XTAL_IN XTAL_OUT

1
F12 C8

10K_0201_5%

10K_0201_5%
THERMDP I2CB_SDA N17S-G1-A1_GB2C64-595

1
<92> -PEX_RST SWG@
SWG@ SWG@
R8572 @ R8577 1 2 1M_0201_5% 27MHZ_OUT R8573

2
10K_0201_5% 10K_0201_5%

1
2

2
C6 SWG@ SWG@
GPIO0 GC6_FB_EN VIDEO_PWM_VID <101>
B2 Y1 R8578
GPIO1 GC6_FB_EN <9,102>
D6 SWG@ D765 2 1 RB521CM-30T2R_VMN2M 27MHZ_7PF_8Y27000005 1.8K_0201_5%
GPIO2 -GPU_EVENT <9>
C7 Crystal
GPIO3

2
F9 1R8VIDEO_MAIN_ON @ R10559 1 2 0_0201_5% 4 3 N20390305
GPIO4 A3 GND2 OUT
GPIO5 A4 27MHZ_IN 1 2
GPIO6 VGA_CORE_PSI <101> IN GND1
B6 SWG@ D771 2 1 RB521CM-30T2R_VMN2M
GPIO7 E9
GPIO8 F8 @ R10558 1 2 0_0201_5%
GPIO9 -VIDEO_THERM_ALERT <57> 1 1
C5 SWG@ SWG@
GPIO10 FB_VREF_ACTIVE <98>
E7 C6147 C6148
GPIO11 D7 @ R10560 1 2 0_0201_5% 10P_0201_25V8-J 10P_0201_25V8-J
GPIO12 -VIDEO_POWER_LIMIT <57> 2 2
B4
GPIO13 B3 SWG@ D772 2 1 RB521CM-30T2R_VMN2M
GPIO14 C3
GPIO15 D5
GPIO16

1
D4 Y1 CRYSTAL 27MHz- 7pF 20ppm
GPIO17 C2 SWG@ SWG@
GPIO18 F7 R10556 R10555
GPIO19 E6 100K_0201_5% 10K_0201_5%
Vendor P/N LCFC P/N
GM108 GPIO20 C4
GPIO21 TXC 8Y27000005 SJ10000IB00

2
A7
C I2CA_SDA GPIO22 B7 C
I2CA_SCL GPIO23 KDS 1ZZHAE27000CC0A SJ10000I800

N17S-G1-A1_GB2C64-595
SWG@

VCC3_SUS VCC3_SUS
SWG@
U230

1 5
VCC1R8VIDEO_AON <66,92,101,102> GFXCORE_D_PWRGD IN B VCC
VCC3_SUS

2
2
GFX_PWR_EN 2 Enable: Vh:2.0V Vl:0.8V
SWG@ SWG@ IN A
SWG@ VCC1R8VIDEO_AON R10573 R10575 3 4
U231 GND OUT Y 1R0VIDEO_EN <100>
SWG@ 10K_0402_5% 10K_0402_5% SWG@
1 8 200K_0201_5% 1 2 R10625 GFXCORE_D_PWRGD U228
GND EN

1
1

1
2 7 NL17SZ08DFT2G_SC70-5
I2CS_SCL 3 VREF1 VREF2 6 1 5 SWG@
SCL1 SCL2 I2C_CLK_VIDEO <57> IN B VCC
2

I2CS_SDA 4 5 R10581
SDA1 SDA2 I2C_DATA_VIDEO <57>
SWG@ SWG@ 2 100K_0402_5%
IN A

1
PCA9306DQER_X2SON8P_1P4x1 R10574 Q205 D

2
10K_0402_5% 2 3 4
G GND OUT Y GFX_PWR_EN <66>
1
1

SWG@
C9876 SWG@ S LSK3541G1ET2L_VMT3 NL17SZ08DFT2G_SC70-5
3

1
1

100P_0201_25V8-J Q204 D
2 1R8VIDEO_MAIN_ON 2 SWG@
G R10583
100K_0402_5% VCC3_SUS
S

2
3

RUM002N05MGT2L_VMT3

2
SWG@
R10660
<3,103> 1R8VIDEO_AON_ON
10K_0402_5%

1
SWG@
R10661
B 10K_0402_5% B
VCC1R0VIDEO_PWRGD
VCC1R0VIDEO_PWRGD <102>

1
VCC1R8VIDEO_AON

VCC1R8VIDEO_AON

1
U208K D SWG@
10/14 MISC2 VCC1R0VIDEO 2 Q272
1
1

G LSK3541G1ET2L_VMT3
1

1
1
1

SWG@ SWG@ SWG@


VX76@ VX76@ VX76@ @ @ @ R10567 R10568 R10569 S

3
1
R10584 R10586 R10588 R10304 R10300 R10566 100K_0201_1% 100K_0201_1% 100K_0201_1% SWG@
100K_0201_1% 100K_0201_1% 100K_0201_1% 100K_0201_1% 100K_0201_1% 100K_0201_1% D12 Q273
2
2

ROM_CS* 2 DTC015TMT2L NPN VMT3


2

2
2
2

B12
ROM_SI A12
STRAP0 D1 ROM_SO C12

3
STRAP1 D2 STRAP0 ROM_SCLK
STRAP2 E4 STRAP1
STRAP2
1

1
1

STRAP3 E3 SWG@
STRAP4 D3 STRAP3 @ @ SWG@ D777
STRAP5 C1 STRAP4 R10570 R10571 R10572 2 1
STRAP5 NC GM108 100K_0201_1% 100K_0201_1%
100K_0201_1%
RB751S40T1G_SOD523-2
2

2
2
1

1
1
1
1

VCC3_SUS
VX76@ VX76@ VX76@ SWG@ SWG@ SWG@ D11 SWG@
RESERVED BUFRST*
R10585 R10587 R10589 R10563 R10564 R10565 U229
100K_0201_1% 100K_0201_1% 100K_0201_1% 100K_0201_1% 100K_0201_1% 100K_0201_1% Delay core power disable for around 100us to make
1 5
<103,104> 1R8_MAIN_PWRGD sure PCIE power drop earlier than core power.
2

IN B VCC
2
2
2

GFX_PWR_EN 2 SWG@
IN A D766 Enable: Vh:1.5V Vl:0.7V
3 4 2 1
GND OUT Y GFXCORE_D_EN <101>
RB751S40T1G_SOD523-2
NL17SZ08DFT2G_SC70-5

100K_0201_5%
1 2

SWG@ R10678
N17S-G1-A1_GB2C64-595
SWG@ @ @ R10578
R10582 1K_0402_1%
100K_0402_5%

2
2
A A

VX76 Config (VRAM + Resistance)


STRAP 0 STRAP 1 STRAP 2 ZZZ
Memory Density Vendor Manufacturer P/N RAMCFG Setting Number
R10584 R10585 R10586 R10587 R10588 R10589
K4G80325FB-HC28
Samsung SA000081C10 0 (0x0000) No ASM ASM No ASM ASM No ASM ASM Security Classification LC Future Center Secret Data Title

MT51J256M32HF-70:A Micron 2G Issued Date 2012/06/21 Deciphered Date 2012/06/21 N17S-G1(6/6) GPIO / XTAL
8Gb (256M x 32) Micron SA000081710 1 (0x0001) ASM No ASM No ASM ASM No ASM ASM X7644L01001
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
Hynix H5GC824MJR-R0C 2 (0x0002) No ASM ASM ASM No ASM No ASM ASM
SWG@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 97 of 104


5 4 3 2 1
5 4 3 2 1

<93> FBA_D[0..63]

MF=0 U93

U91 MF=0 MF=1 MF=1 MF=0

MF=0 MF=1 MF=1 MF=0 VCC1R35VIDEO A4 FBA_D38


FBA_EDC4 C2 DQ24 DQ0 A2 FBA_D36
VCC1R35VIDEO FBA_D4 <93> FBA_EDC4 FBA_EDC5 EDC0 EDC3 DQ25 DQ1 FBA_D32
A4 C13 B4
FBA_EDC0 DQ24 DQ0 FBA_D6 <93> FBA_EDC5 FBA_EDC6 EDC1 EDC2 DQ26 DQ2 FBA_D37
C2 A2 R13 B2 BYTE4
<93> FBA_EDC0 FBA_EDC1 EDC0 EDC3 DQ25 DQ1 FBA_D0 <93> FBA_EDC6 FBA_EDC7 EDC2 EDC1 DQ27 DQ3 FBA_D33
C13 B4 R2 E4
<93> FBA_EDC1 FBA_EDC2 EDC1 EDC2 DQ26 DQ2 FBA_D7 <93> FBA_EDC7 EDC3 EDC0 DQ28 DQ4 FBA_D39
R13 B2 BYTE0 E2
<93> FBA_EDC2 FBA_EDC3 EDC2 EDC1 DQ27 DQ3 FBA_D5 DQ29 DQ5 FBA_D34
R2 E4 F4
<93> FBA_EDC3 EDC3 EDC0 DQ28 DQ4 DQ30 DQ6

1
E2 FBA_D1 SWG@ FBA_DBI4 D2 F2 FBA_D35
DQ29 DQ5 <93> FBA_DBI4 DBI0# DBI3# DQ31 DQ7
1
SWG@ F4 FBA_D2 R10111 FBA_DBI5 D13 A11 FBA_D40
FBA_DBI0 DQ30 DQ6 FBA_D3 <93> FBA_DBI5 FBA_DBI6 DBI1# DBI2# DQ16 DQ8 FBA_D42
R10011 D2 F2 10K_0402_1% P13 A13
<93> FBA_DBI0 FBA_DBI1 DBI0# DBI3# DQ31 DQ7 FBA_D8 <93> FBA_DBI6 FBA_DBI7 DBI2# DBI1# DQ17 DQ9 FBA_D44
D 10K_0402_1% D13 A11 P2 B11 D
<93> FBA_DBI1 FBA_DBI2 DBI1# DBI2# DQ16 DQ8 FBA_D11 <93> FBA_DBI7 DBI3# DBI0# DQ18 DQ10 FBA_D45
P13 A13 B13 BYTE5
<93> FBA_DBI2 DBI2# DBI1# DQ17 DQ9 DQ19 DQ11

2
FBA_DBI3 P2 B11 FBA_D10 FBA_CLK1 J12 E11 FBA_D41
<93> FBA_DBI3 DBI3# DBI0# DQ18 DQ10 <93> FBA_CLK1 CK DQ20 DQ12
2

B13 FBA_D15 BYTE1 -FBA_CLK1 J11 E13 FBA_D46


FBA_CLK0 DQ19 DQ11 FBA_D9 -FBA_CKE_H <93> -FBA_CLK1 CK# DQ21 DQ13 FBA_D47
J12 E11 J3 F11
<93> FBA_CLK0 -FBA_CLK0 CK DQ20 DQ12 FBA_D12 <93> -FBA_CKE_H CKE# DQ22 DQ14 FBA_D43
J11 E13 F13
-FBA_CKE_L <93> -FBA_CLK0
J3 CK# DQ21 DQ13 F11 FBA_D13 DQ23 DQ15 U11 FBA_D51
<93> -FBA_CKE_L CKE# DQ22 DQ14 FBA_D14 FBA_BA0_H DQ8 DQ16 FBA_D50
F13 H11 U13
DQ23 DQ15 FBA_D16 <93> FBA_BA0_H FBA_BA1_H BA0/A2 BA2/A4 DQ9 DQ17 FBA_D55
U11 K10 T11
FBA_BA0_L DQ8 DQ16 FBA_D18 <93> FBA_BA1_H FBA_BA2_H BA1/A5 BA3/A3 DQ10 DQ18 FBA_D48
H11 U13 K11 T13
<93> FBA_BA0_L FBA_BA1_L BA0/A2 BA2/A4 DQ9 DQ17 FBA_D17 <93> FBA_BA2_H FBA_BA3_H BA2/A4 BA0/A2 DQ11 DQ19 FBA_D52
K10 T11 H10 N11 BYTE6
<93> FBA_BA1_L FBA_BA2_L BA1/A5 BA3/A3 DQ10 DQ18 FBA_D19 <93> FBA_BA3_H BA3/A3 BA1/A5 DQ12 DQ20 FBA_D53
K11 T13 BYTE2 N13
<93> FBA_BA2_L FBA_BA3_L BA2/A4 BA0/A2 DQ11 DQ19 FBA_D22 DQ13 DQ21 FBA_D54
H10 N11 M11
<93> FBA_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 FBA_D20 FBA_MA8_H DQ14 DQ22 FBA_D49
N13 K4 M13
DQ13 DQ21 FBA_D23 <93> FBA_MA8_H FBA_MA9_H A8/A7 A10/A0 DQ15 DQ23 FBA_D63
M11 H5 U4
FBA_MA8_L DQ14 DQ22 FBA_D21 <93> FBA_MA9_H FBA_MA10_H A9/A1 A11/A6 DQ0 DQ24 FBA_D62
K4 M13 H4 U2
<93> FBA_MA8_L FBA_MA9_L A8/A7 A10/A0 DQ15 DQ23 FBA_D28 <93> FBA_MA10_H FBA_MA11_H A10/A0 A8/A7 DQ1 DQ25 FBA_D61
H5 U4 K5 T4
<93> FBA_MA9_L FBA_MA10_L A9/A1 A11/A6 DQ0 DQ24 FBA_D31 <93> FBA_MA11_H FBA_RFU_H A11/A6 A9/A1 DQ2 DQ26 FBA_D57
H4 U2 J5 T2
<93> FBA_MA10_L FBA_MA11_L A10/A0 A8/A7 DQ1 DQ25 FBA_D24 <93> FBA_RFU_H A12/RFU/NC DQ3 DQ27 FBA_D60
K5 T4 N4 BYTE7
<93> FBA_MA11_L FBA_RFU_L A11/A6 A9/A1 DQ2 DQ26 FBA_D25 DQ4 DQ28 FBA_D59
J5 T2 A5 N2
<93> FBA_RFU_L A12/RFU/NC DQ3 DQ27 FBA_D27 VPP/NC1 DQ5 DQ29 FBA_D56
N4 BYTE3 U5 M4
A5 DQ4 DQ28 N2 FBA_D30 VPP/NC2 DQ6 DQ30 M2 FBA_D58
U5 VPP/NC1 DQ5 DQ29 M4 FBA_D26 DQ7 DQ31
VPP/NC2 DQ6 DQ30 M2 FBA_D29 R10604 2 SWG@ 1 1K_0402_1% J1 VCC1R35VIDEO
DQ7 DQ31 R10605 2 SWG@ 1 1K_0402_1% J10 MF
R10597 2 SWG@ 1 1K_0402_1% J1 VCC1R35VIDEO R10606 2 SWG@ 1 120_0402_1% J13 SEN B1
R10598 2 SWG@ 1 1K_0402_1% J10 MF ZQ VDDQ1 D1
R10599 2 SWG@ 1 120_0402_1% J13 SEN B1 VDDQ2 F1
ZQ VDDQ1 D1 -FBA_ABI_H J4 VDDQ3 M1
VDDQ2 <93> -FBA_ABI_H -FBA_RAS_H ABI# VDDQ4
F1 G3 P1
-FBA_ABI_L VDDQ3 <93> -FBA_RAS_H -FBA_CS_H RAS# CAS# VDDQ5
J4 M1 G12 T1
<93> -FBA_ABI_L -FBA_RAS_L ABI# VDDQ4 <93> -FBA_CS_H -FBA_CAS_H CS# WE# VDDQ6
G3 P1 L3 G2
<93> -FBA_RAS_L -FBA_CS_L RAS# CAS# VDDQ5 <93> -FBA_CAS_H -FBA_WE_H CAS# RAS# VDDQ7
G12 T1 L12 L2
<93> -FBA_CS_L -FBA_CAS_L CS# WE# VDDQ6 <93> -FBA_WE_H WE# CS# VDDQ8
L3 G2 B3
<93> -FBA_CAS_L -FBA_WE_L CAS# RAS# VDDQ7 VDDQ9
L12 L2 D3
<93> -FBA_WE_L WE# CS# VDDQ8 VDDQ10
B3 F3
VDDQ9 D3 -FBA_WCK2 D5 VDDQ11 H3
VDDQ10 <93> -FBA_WCK2 FBA_WCK2 WCK01# WCK23# VDDQ12
F3 D4 K3
-FBA_WCK0 VDDQ11 <93> FBA_WCK2 WCK01 WCK23 VDDQ13
D5 H3 M3
<93> -FBA_WCK0 FBA_WCK0 WCK01# WCK23# VDDQ12 -FBA_WCK3 VDDQ14
D4 K3 P5 P3
<93> FBA_WCK0 WCK01 WCK23 VDDQ13 <93> -FBA_WCK3 FBA_WCK3 WCK23# WCK01# VDDQ15
M3 P4 T3
-FBA_WCK1 VDDQ14 <93> FBA_WCK3 WCK23 WCK01 VDDQ16
P5 P3 E5
<93> -FBA_WCK1 FBA_WCK1 WCK23# WCK01# VDDQ15 VDDQ17
P4 T3 N5
<93> FBA_WCK1 WCK23 WCK01 VDDQ16 VDDQ18
E5 A10 E10
VDDQ17 N5 U10 VREFD1 VDDQ19 N10
C
A10 VDDQ18 E10 FBA_VREFC J14 VREFD2 VDDQ20 B12 C
U10 VREFD1 VDDQ19 N10 VREFC VDDQ21 D12
FBA_VREFC J14 VREFD2 VDDQ20 B12 VDDQ22 F12
VREFC VDDQ21 D12 VDDQ23 H12
VDDQ22 F12 -FBA_RST_H J2 VDDQ24 K12
VDDQ23 <93> -FBA_RST_H RESET# VDDQ25
H12 M12
-FBA_RST_L J2 VDDQ24 K12 VDDQ26 P12
<93> -FBA_RST_L RESET# VDDQ25 VDDQ27

1
M12 SWG@ T12
VDDQ26 P12 R10110 VDDQ28 G13
VDDQ27 VDDQ29
1

SWG@ T12 10K_0402_1% H1 L13


R9667 VDDQ28 G13 K1 VSS1 VDDQ30 B14
10K_0402_1% H1 VDDQ29 L13 B5 VSS2 VDDQ31 D14

2
K1 VSS1 VDDQ30 B14 G5 VSS3 VDDQ32 F14
B5 VSS2 VDDQ31 D14 L5 VSS4 VDDQ33 M14
2

G5 VSS3 VDDQ32 F14 T5 VSS5 VDDQ34 P14


L5 VSS4 VDDQ33 M14 B10 VSS6 VDDQ35 T14
T5 VSS5 VDDQ34 P14 D10 VSS7 VDDQ36
B10 VSS6 VDDQ35 T14 G10 VSS8
D10 VSS7 VDDQ36 L10 VSS9 A1
G10
L10
VSS8
VSS9 A1
P10
T10
VSS10
VSS11
VSSQ1
VSSQ2
C1
E1 For U93
P10
T10
H14
K14
VSS10
VSS11
VSS12
VSS13
VSSQ1
VSSQ2
VSSQ3
VSSQ4
C1
E1
N1
R1
VCC1R35VIDEO
For U91 VCC1R35VIDEO
H14
K14
VSS12
VSS13
VSS14
VSSQ3
VSSQ4
VSSQ5
VSSQ6
N1
R1
U1
H2
VCC1R35VIDEO

VCC1R35VIDEO VSS14 VSSQ5 VSSQ7

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
10U_0603_6.3V6-M

10U_0603_6.3V6-M

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K
U1 G1 K2
VSSQ6 VDD1 VSSQ8

C9859

C9860

C9862

C9864

C9865
SWG@ C9858

C9863
C9861
H2 L1 A3 2 1 1 1 1 1 1 1
VSSQ7 VDD2 VSSQ9

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
10U_0603_6.3V6-M

10U_0603_6.3V6-M

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K
G1 K2 G4 C3
VDD1 VSSQ8 VDD3 VSSQ10

C9831

SWG@ C9832

C9833

SWG@ C9836
SWG@ C9835

SWG@ C9837
SWG@ C9830

C9834
L1 A3 2 1 1 1 1 1 1 1 L4 E3
G4 VDD2 VSSQ9 C3 C5 VDD4 VSSQ11 N3
L4 VDD3 VSSQ10 E3 R5 VDD5 VSSQ12 R3 1 2 2 2 2 2 2 2
C5 VDD4 VSSQ11 N3 C10 VDD6 VSSQ13 U3

SWG@

SWG@

SWG@
R5 VDD5 VSSQ12 R3 1 2 2 2 2 2 2 2 R10 VDD7 VSSQ14 C4
C10 VDD6 VSSQ13 U3 D11 VDD8 VSSQ15 R4
R10 VDD7 VSSQ14 C4 G11 VDD9 VSSQ16 F5
D11 VDD8 VSSQ15 R4 L11 VDD10 VSSQ17 M5
G11 VDD9 VSSQ16 F5 P11 VDD11 VSSQ18 F10
L11 VDD10 VSSQ17 M5 G14 VDD12 VSSQ19 M10
P11 VDD11 VSSQ18 F10 L14 VDD13 VSSQ20 C11
VDD12 VSSQ19 VDD14 VSSQ21

22U_0603_6.3V6-M

10U_0603_6.3V6-M

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
G14 M10 R11
VDD13 VSSQ20 VSSQ22

C9872
SWG@ C9881

C9867

C9869

C9871
C9868
SWG@ C9866

C9870

C9873
L14 C11 A12 1 2 1 1 1 1 1 1 1
VDD14 VSSQ21 VSSQ23
22U_0603_6.3V6-M

10U_0603_6.3V6-M

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K

1U_0402_6.3V6-K

1U_0402_6.3V6-K
1U_0402_6.3V6-K
1U_0402_6.3V6-K

R11 C12
VSSQ22 VSSQ24
SWG@ C9880

SWG@ C9847

SWG@ C9851
SWG@ C9846

SWG@ C9849

SWG@ C9852

SWG@ C9853
SWG@ C9850
A12 1 2 1 1 SWG@ C9848 1 1 1 1 1 E12
VSSQ23 C12 VSSQ25 N12
B
VSSQ24 E12 VSSQ26 R12 2 1 2 2 2 2 2 2 2 B
VSSQ25 N12 170-BALL VSSQ27 U12
VSSQ26 R12 2 1 2 2 2 2 2 2 2 VSSQ28 H13
170-BALL VSSQ27 U12 SGRAM GDDR5 VSSQ29 K13
VSSQ28 H13 VSSQ30 A14
SGRAM GDDR5 VSSQ29 K13 VSSQ31 C14
VSSQ30 A14 VSSQ32 E14
VSSQ31 C14 VSSQ33 N14
VSSQ32
VSSQ33
E14
N14
VSSQ34
VSSQ35
R14
U14 CLOSE TO THE MEMORY
K4G80325FB-HC03_BGA170
VSSQ34
VSSQ35
VSSQ36
X76@
R14
U14 CLOSE TO THE MEMORY VCC1R35VIDEO
K4G80325FB-HC03_BGA170
VSSQ36
X76@

FBA_CLK1 SWG@ RV31 1 2 40.2_0402_1%


1

FBA_CLK0 SWG@ RV21 1 2 40.2_0402_1% SWG@

2
RV127 @
549_0402_1% RV216
2

@ 160_0402_1%
RV123 SWG@ 16 mil
2

160_0402_1% RV212

1
1 2 FBA_VREFC

820P_0402_50V7-K
820P_0402_50V7-K

-FBA_CLK1 SWG@ RV36 1 2 40.2_0402_1%


1

-FBA_CLK0

SWG@ CV176
SWG@ CV42
SWG@ RV28 1 2 40.2_0402_1% 931_0402_1% 1 1
1

SWG@
RV128
.01U_0402_25V7-K

1.33K_0402_1% 1
2 2
SWG@
CV155

1 SWG@
CV175
2

.01U_0402_25V7-K
2
2
1

QV10 D
<97> FB_VREF_ACTIVE 2 Change to Vgs(th) < 1.0V
G
N-MOS, For
S FBVREF_ACTIVE = 1.8V
3

TABLE RUM002N05MGT2L_VMT3
SWG@
A A
GDDR5 VIDEO MEMORY

SAMSUNG 8GBITS MICRON 8GBITS Hynix

U91 K4G80325FB-HC28 MT51J256M32HF-70:A H5GC824MJR-R0C


U93

Security Classification LC Future Center Secret Data Title


Issued Date 2012/06/21 Deciphered Date 2012/06/21 VRAM CHANNEL-A
LOGIC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 98 of 104


5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/05/02 Deciphered Date 2012/5/02 MEMORY TERMINATION
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 99 of 104


5 4 3 2 1
5 4 3 2 1

D D

V
C
C
1
R
0
V
I
D
E
O
EE
DD
PP
C-
-
o
n
=k
t
0
.0
1
A2
@ PJ604

P
e
a
=
.
A
1 2
VCC3M 1 2
SWG@ 2 SWG@
JUMP_43X79

2
PC661 PC662 Table PL604
0.1U_0201_6.3V6K 10U_0402_6.3V

1
1
Murata :DFE252012F-0R47M=P2 VCC1R0VIDEO
Cyntec :HMLQ25201B-R47M
C C
PU603
BD9B304QWZE2_UMMP008AZ020-8-9
PC665 SWG@
1 0.1U_0201_6.3V6K
VIN 3 1 2 SWG@
BOOT PL604 @ PJ602
2 0.47UH DFE252012F-R47M 5.8A_20% JUMP_43X79
<97> 1R0VIDEO_EN EN 4 1 2 1 2
SW 1 2
2 8
@ PC660 GND

22U_0603_6.3V6M

22U_0603_6.3V6M
0.1U_0201_6.3V6K SWG@ 2 SWG@
5 7 PR673 PC666 2 2 2 SWG@
1 MODE FB

SWG@ PC669

SWG@ PC670
75K_0201_1% 100P_0201_25V8-J PC667

E-PAD
6 0.1U_0201_6.3V6K
FREQ 1

2
1 1 1

1
SWG@
PR674
300K_0201_1%
B B

VCC5M VCC1R0VIDEO

2
1

SWG@ SWG@
PR778 PR779
100K_0402_5% 10_0603_5%
2

SWG@
3

PQ612B D
5
SWG@ G
6

PQ612A D UM6K33N_UMT6
1R0VIDEO_EN 2 S
4

A G A
UM6K33N_UMT6
S
1

Security Classification LC Future Center Secret Data Title


DC/DC VCC1R0VIDEO
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
B
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 100 of 104


5 4 3 2 1
5 4 3 2 1

MLCCs must be placed


D
symmetrically on Top and Bottom. SWG_EMC@ D

PL610
MPZ1608S300AT_2P~D
SWG_EMC@ SWG_EMC@ 1 2
VSYS
PR614
0_0201_5%_SM

0.1U_0402_25V6-K

1000P_0402_25V7-K

10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K
1 2
<97> GFXCORE_D_EN
SWG@
VCC1R8VIDEO_AON VCC1R8_SUS 1 1 1 1

1
1

SWG@

SWG@

SWG@

SWG@
PC603
PC601

PC602

PC604

PC605

PC606
PC656
0.1U_0402_25V6-K

2
2

2
2

1
SWG@ 2 2 2
PR621 @ PR651
10K_0201_1% 10K_0201_1%

Table PL601

2
SWG@ SWG@ PQ601
PR623 PR680 SWG@

2
3
4
8
0_0201_5% UGATE1_VGA 1.5_0402_1% SIZ980DT-T1-GE3 2N POWERPAIRR6X5-8 CYNTEC : CMLE063T-R15MS0R907
<97> VGA_CORE_PSI 1 2 PSI_VGA UGATE1_VGA 1 2 1
SWG@ SWG@ SWG@ MAG.LAYERS : SPS-06CZER15MGX5
PR602 PC607 PL601

1
1_0603_1% 0.22U_0402_25V6-K 0.15UH_CMLE063T-R15MS0R907_38A_20%
@ PC639 1 @ PR650 1 2 1 2 7 PHASE1_VGA 1 2 SWG_EMC@ SWG_EMC@
0.1U_0402_25V6-K 10K_0201_1% PR603 VCCGFXCORE_D
SWG_EMC_NS@

2200P_0402_25V7-K
LGATE1_VGA

10U_0603_6.3V6-M

10U_0603_6.3V6-M

10U_0603_6.3V6-M
10U_0603_6.3V6-M
0_0201_5%_SM 6

0.1U_0402_25V7-K

470U_D2E_2.5VM_R7M

470U_D2E_2.5VM_R7M
2 1 1
2

SWG@ PC609

SWG@ PC610
1 2 PC608

BOOT1_VGA
<97> VIDEO_PWM_VID 1 1 1 1
2
PHASE1_VGA + +

SWG@ PC611

SWG@ PC613

SWG@ PC614
SWG@ PC612
470P_0201_50V7-K

1
PC685

PC686
SWG@ 1

5
PR605 2 2 2 2 2 2
SWG_EMC_NS@

2
2
GFX_AGND 20.5K_0201_1%
VREF_272 1 2 PR604
2.2_0603_5%_PULSE_PROOF/SURGE_PROOF
SWG@ LGATE1_VGA
@ PC615 PR606

1
C 2700P_0201_25V7-K 6.19K_0201_1% TABLE : PC609 / PC610 C
1 2 1 2
GFX_AGND MLCCs must be placed

VID_VGA

PSI_VGA
TABLE : PQ601,PQ602

VIDBUF
GFX_AGND
1st: 2R5TPE470M7 PANASONIC symmetrically on Top and Bottom.

1
SWG@ Infineon : SIZ980DT 2nd : T520V477M2R5ATE007 KEMET
SWG@ SWG@ PR608
PR609 PR610 4.32K_0201_1% AOS : AON6982 EDP-Continuous:28A

1
309_0201_1% 16.5K_0201_1%
MLCCs must be placed SWG_EMC@ EDP-Peak:53A

2
GFX_AGND 1 2 1 2

PSI
VIDBUF

VID

EN

HG1

BST1
symmetrically on Top and Bottom. PL611
1

SWG@ PC616 SWG@ SWG@ MPZ1608S300AT_2P~D


PR775 SWG@
GFX_AGND
1 2 REFIN_2727 20 PC618 SWG_EMC@ SWG_EMC@ 1 2

VEEO
CDDC
CP
GC
Fo
Xn
C==A
O
R36
E0
_A.
D
100_0201_1% PC617 REFIN PH1 4.7U_0603_6.3V6-K VSYS

1000P_0402_25V7-K
1 2 4700P_0201_25V6-K VREF_272 8 19 1 2

-P
tk
0.1U_0402_25V6-K
GFX_AGND VREF LG1

10U_0805_25V6-K
10U_0805_25V6-K

10U_0805_25V6-K

10U_0805_25V6-K
PR612 SWG@
2

PR613 0.01U_0402_25V7-K 1 2 SWG@ FS 9 PU601 21

PP
-
e
a8

0
1
A
FS NCP81278TMNTXG_QFN20_3X3PAD 1 1 1 1

1
1

SWG@
SWG@

SWG@

SWG@
PC620

PC622
PC621
PC619

PC623

PC624
0_0201_5% GFX_AGND 34K_0201_1% SWG@

1
SWG@ 1 2 FBRTN 10 18 PC657

=
7
<94> GPU_GND_SENSE
SWG@ SWG@ FBRTN PVCC VCC5M 0.1U_0402_25V6-K

2
2
SWG@ PC626 PR615 SWG@ FB_VGA 11 17 2 2 2 2
1 FB LG2

2
PC625 47P_0402_50V8-J 49.9_0201_1% PC627
100P_0201_25V8-J 1 2FB1_VGA 1 2 1 2 COMP_VGA 12 16
PR616 PR617 COMP/ILMT PH2

PGOOD
0_0201_5% 2 10K_0201_1% 10P_0402_50V8-J PR618

BST2
HG2
<94> GPU_VDD_SENSE SWG@ 1 2 1 2 1 2FB2_VGA1 2 Table PL602
SWG@ 82K_0201_1% SWG@ SWG@
PC628 SWG@ PR620 PC629
VCCGFXCORE_D

13

14

15
100P_0402_50V8-J 1_0603_1% 0.22U_0402_25V6-K SWG@ SWG@ CYNTEC : CMLE063T-R15MS0R907
1

SWG@ SWG@ BOOT2_VGA 1 2 1 2 PR681 PQ602


1

2
3
4
8
PR776 SWG@ 1.5_0402_1% SIZ980DT-T1-GE3 2N POWERPAIRR6X5-8 MAG.LAYERS : SPS-06CZER15MGX5
100_0201_1% PR652 UGATE2_VGA 1 2 1
36K_0402_1% UGATE2_VGA SWG@
PL602
2

0.15UH_CMLE063T-R15MS0R907_38A_20%
SWG_EMC@ SWG_EMC@
2

7PHASE2_VGA 1 2

2200P_0402_25V7-K
GFXCORE_D_PWRGD <66,92,97,102>
LGATE2_VGA

22U_0603_6.3V6-M
22U_0603_6.3V6-M

22U_0603_6.3V6-M

22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
6

0.1U_0201_6.3V6-K
B 2 SWG_EMC_NS@ B
VCCGFXCORE_D 1 1 1 1 1 1

1
SWG@ PC637
SWG@ PC632

PC687
SWG@ PC634

SWG@ PC636

PC638
SWG@ PC635
SWG@ PC633
PC631
SWG@ 470P_0201_50V7-K
PR768 PHASE2_VGA 1

2
5
10K_0201_1% 2 2 2 2 2 2
SWG_EMC_NS@

2
1 2
VCC3_SUS PR624
2.2_0603_5%_PULSE_PROOF/SURGE_PROOF

1
LGATE2_VGA
MLCCs must be placed
symmetrically on Top and Bottom.
PR625
0_0201_5%_SM
2 1

VCC5M VCCGFXCORE_D
GFX_AGND
1

SWG@ SWG@
PR780 PR781
100K_0402_5% 10_0603_5%
2

A SWG@ A
3

PQ613B D
5
SWG@ G
6

PQ613A D UM6K33N_UMT6
GFXCORE_D_EN 2 S
4

G
UM6K33N_UMT6
S
1

Security Classification LC Future Center Secret Data Title


Issued Date 2012/11/01 Deciphered Date 2013/12/31 DC/DC VCCGFXCORE_D (NCP81278T)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 101 of 104
5 4 3 2 1
5 4 3 2 1

D D

PJ603
1 2 SWG_EMC@ SWG_EMC@ VCC1R35VIDEO_VIN
VSYS 1 2

2200P_0402_25V7-K
10U_0603_25V6-M

10U_0603_25V6-M

47P_0402_50V8-J
0.1U_0402_25V6-K
JUMP_43X79
1 1 1 1
@

SWG@ PC645

SWG@ PC646

PC652

PC663
1

PC653
SWG_RF_NS@
2 2 2 2
2

AGND_1R35VIDEO

VEE
CDD
CP
1-
Ro
3n
5
V==
I
D56
E.
O6
C-
t

A9
VCC1R35VIDEO

P
P
e
a
k

.
A
VCC1R8VIDEO_AON

1
SWG@
PR629 PR631 Table PL603
0_0201_5%_SM 0_0402_5%
1 2
1st: CYNTEC CMLB053T-R68MS

2
SWG@
2nd:TOKIN MPLCH0530LR68G
1

PC674 SWG@

1
0.01U_0402_25V7-K PC642
0.22U_0402_25V6-K

11

10
2

SWG@

2
PL603 @ PJ610

CLM

BST
C SWG@ 0.68UH_CMLB053T-R68MS_17A_20% JUMP_43X79 C
PU604 1 9 VCC1R35VIDEO_SW 1 2 SWG_EMC@ SWG_EMC@ 1 2
VIN SW 1 2
6

74AUP1G32GF_SOT891-6_1X1

2200P_0402_25V7-K
22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
PR626

0.1U_0402_6.3V7-K
Vcc

2 0_0201_5%_SM 2 2 2 2 2 2 2 1
<9,97> GC6_FB_EN A 1R35VIDEO_ON VCC1R35VIDEO_EN

SWG@PC1041

SWG@PC1040
SWG@ PC644

SWG@ PC649

@ PC683

@ PC684

PC664

PC643
@ PR698 4 1 2 15 SWG@
Y EN

2
1 2 0_0201_5% 1 PC647 PC682
GND

<66,92,97,101> GFXCORE_D_PWRGD B
5 SWG@ 13 680P_0402_50V7K 220P_0201_25V7-K
PR699 NC PU703 FB 1 1 1 1 1 1 1 2
SWG_EMC_NS@

1
1

1
1 2 SWG@ PR695 SWG@
<97> VCC1R0VIDEO_PWRGD
3

PR601 NB693GQ-Z_QFN16_3X3 @ 0_0201_5% PR688


0_0201_5% 100K_0201_5% 12 1R35VIDEO_PWRGD 2 1 10_0201_1%
PG

1
SWG@
PR632
2

2
1
PR635 4.7_0603_5% SWG@
0_0201_5%_SM SWG_EMC_NS@ PR687
1 2 14 16 VCC1R35VIDEO_VIN 499_0201_1%
MODE NC2

2
SWG@ SWG@
PR630 PR636

2
5.1_0402_5% 0_0201_5%
1 2 3 8 VCC1R35VIDEO_SW 1 2
VCC3M 3V3 NC1

SWG@

PGND1

PGND2

PGND3

PGND4

PGND5
1

1
PC668 SWG@
1U_0402_10V6-K PR689
VCC5M VCC1R35VIDEO 12.4K_0201_1%
2

2
SWG@
PR634
100K_0402_5%
B 2 1 B
VCC3M

1
AGND_1R35VIDEO SWG@
1

SWG@ SWG@ PR690


PR691 PR692 10K_0201_5%
100K_0402_5% 10_0603_5%
1R35VIDEO_PWRGD <92>

2
2

PR633
0_0402_5%_SM
1 2
SWG@
3

PQ604B D AGND_1R35VIDEO
5
SWG@ G
6

PQ604A D UM6K33N_UMT6
VCC1R35VIDEO_EN 2 S AGND_1R35VIDEO
4

G
UM6K33N_UMT6
S
1

A A

Security Classification LC Future Center Secret Data Title


Issued Date DC/DC VCC1R35VIDEO(NB693GQ-Z)
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 102 of 104
5 4 3 2 1
5 4 3 2 1

D
VCC3M D

1
@ PJ605

1
JUMP_43X79

2
2
SWG@ SWG@

V
C
C
1
R
8
V
I
D
E
O
_
A
O
N
2

2
PC676 PC1039
0.1U_0201_6.3V6K 10U_0402_6.3V

M
a
x
=
0
.
3
A
1
1

Table PL605
<66> 1R8VIDEO_AON_EN
C SWG@ Murata :DFE252012F-0R47M=P2 VCC1R8VIDEO_AON C
PD605 SWG@
RB521CM_30 PU605 Cyntec :HMLQ25201B-R47M VCC1R8VIDEO_AONP
2 1 BD9B304QWZE2_UMMP008AZ020-8-9 SWG@
<97,104> 1R8_MAIN_PWRGD
PC677
SWG@ 1 0.1U_0201_6.3V6K
PD606 VIN 3 1 2 SWG@
RB521CM_30 BOOT PL605 @ PJ606
2 1 1R8VIDEO_AON_EN 2 0.47UH DFE252012F-R47M 5.8A_20% JUMP_43X79
<3,97> 1R8VIDEO_AON_ON EN 4 1 2 VCC1R8VIDEO_AONP 1 2
SW 1 2
8
GND

22U_0603_6.3V6M

22U_0603_6.3V6M
SWG@ SWG@

1
5 7 PR682 PC678 2 2 2 SWG@
MODE FB
2

SWG@ PC679

SWG@ PC680
158K_0201_1% 120P_0201_50V9-J PC681
SWG@ 6 E-PAD 0.1U_0201_6.3V6K
FREQ

2
PR777

2
1M_0201_5% 1 1 1
1

1
SWG@
PR683
120K_0201_1%

2
B B

VCC5M VCC1R8VIDEO_AON
1

SWG@ SWG@
PR782 PR783
100K_0402_5% 10_0603_5%
2

SWG@
3

PQ614B D
5
SWG@ G
6

PQ614A D UM6K33N_UMT6
A
1R8VIDEO_AON_EN 2 S
A
4

G
UM6K33N_UMT6
S
1

Security Classification LC Future Center Secret Data Title


DC/DC VCC1R8VIDEO_AON
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Custom
Windu-2 0.1

Date: Thursday, November 09, 2017 Sheet 103 of 104


5 4 3 2 1
5 4 3 2 1

D D

VCC1R8_SUS VCC1R8VIDEO_MAIN VCC1R8_SUS VCC1R8VIDEO_AON

PJ607
Not mount solder on shrtpad
1

1
PR640 @ PR677
1

@ PJ607 0.01_0603_LE_1% 0.01_0603_LE_1%


VCC1R8VIDEO_AONP JUMP_43X79 VCC3_SUS
2

2
2

C C
VCC1R8VIDEO_MAIN
SWG@
PQ606 @ PQ607

1
RW1E014SNT2R_WEMT6 RW1E014SNT2R_WEMT6 SWG@
PR686
6 6 10K_0402_5%

1
S

S
D

D
5 4 5 4 SWG@
2 2 PR685

2
1
1 1 SWG@ 10K_0402_5%
PR684
10K_0402_5%
G

G
1R8_MAIN_PWRGD <97,103>
3

2
2
2

3
SWG@ @ PQ609B D
PR642 PR678 5
33_0402_5% 33_0201_5% G SWG@
UM6K33N_UMT6
S
1

4
6
PQ609A D
2
G SWG@
SWG@ @ UM6K33N_UMT6
2

2
PD601 PD604 S

1
RB521CM_30 RB521CM_30
2

2
SWG@
1

1
PR641 @ PR679
100_0201_5% 100_0201_5%
1

1
<66> 1R8VIDEO_MAIN_DRV <66> 1R8VIDEO_AON_DRV

SWG@
2

2
PC655 @ PC672
0.1U_0402_25V7K 0.1U_0402_25V7K
1

1
B B

A A

Security Classification LC Future Center Secret Data Title


Issued Date 2012/11/01 Deciphered Date 2013/12/31 LOAD SW VIDEO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
Custom 0.24
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER. Windu-2
Date: Thursday, November 09, 2017 Sheet 104 of 104
5 4 3 2 1

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