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Lab: Digital Logic

LAB: DIGITAL LOGIC


Learning Outcome:
• Understand and apply basic logic gates, law and rules of Boolean algebra and De Morgan’s theorems
to Boolean expressions
• Able to design a combinational logic circuit for a given Boolean output expression

Overview

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Lab: Digital Logic

Method 1: Simplification using Boolean Laws and Rules

Example 1
a) Simplify the Boolean function and then design the combinational logic circuit. Note: SOP form

F = (A’B’C’D’) + (A’B’C’D)+ (A’B’CD’) + (A’B’CD) + (ABC’D) < Not simplified version

= A’B’ + ABC’D < Simplified version

b) Count the number of the logic gates involved before and after simplification process.

[ 5 AND gates + 1 OR gates] REDUCE TO [2 AND gates & 1 OR gates]

c) Create a Truth Table

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Lab: Digital Logic

Example 2

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Lab: Digital Logic

Method 2: Simplification using Karnaugh Map

Note: Based on SOP, A = 1; A’ = 0

A guideline for grouping 1’s in K-Map


1. The groups can ONLY contain 1s. (Figure 4-5)
2. Only 1s adjacent cells can be grouped; diagonal grouping is not allowed. (Figure 4-6)
3. The number of 1s in a group must be a power of 2, means a group can contain 2,4,8 or 16 of
1s. (Figure 4-7)
4. The groups must be as large as possible while still following all rules. (Figure 4-8)
5. All 1s must belong to a group, even if it is a group of one. (Figure 4-9)
6. Overlapping groups are allowed. (Figure 4-9)
7. Wrap around is allowed. (Figure 4-9)
8. Use the fewest number of groups possible. (Figure 4-9)

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Lab: Digital Logic

Example 3
Based on the Truth Table, you are required to:

INPUTS OUTPUTs
A B C L1 L2 L3
0 0 0 0 0 0
0 0 1 1 0 0
0 1 0 1 0 0
0 1 1 1 1 0
1 0 0 1 0 0
1 0 1 1 1 0
1 1 0 1 1 0
1 1 1 1 1 1

a) Write down the Boolean equations.


b) Create K-Map for each expression.
c) Simply each expression using K-Map.
d) Draw the simplified logic circuit for each expression.

Example 4
Based on the K-Map, you are required to:

CD
00 01 11 10
00 1 0 0 1
AB 01 0 1 1 1
11 0 0 0 0
10 1 0 0 1

a) Find out a simplified expression.


b) Compare number of logic gates before and after simplification process.

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Lab: Digital Logic

Exercise

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Lab: Digital Logic

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Lab: Digital Logic

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