112

UNIT III
ANALOG MULTIPLIER AND PLL

3.1. ANALOG MULTIPLIER USING EMITTER COUPLED TRANSISTOR PAIR

A circuit using an emitter coupled pair is shown in fig 3.1. The output currents
Ic1 and Ic2 are related to the differential input voltage V1 by

-----------(1) ------------------(2)
Where VT is the thermal voltage and the base currents have been neglected.

Combining Eq 1 & 2, the difference between the two output currants as

_________(3)

Fig 3.1 Emitter coupled Transistor Pair

The dc transfer characteristic of the emitter – coupled pair is shown in fig.3.1 It

shows that the emitter coupled pair can be used as a simple multiplier using this
configuration. When the differential input voltage V1 << VT it approximate as given by

_____(4)
Then Eqn.(3) becomes

________(5)

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 113

The current IEE is the bias current for the emitter coupled pair. If the current I EE is
made proportional to a second input signal V2, then

_______(6)
Substituting Eqn(6) in Eqn(5)

Fig 3.2 Simple Modulator using Differential amplifier

This arrangement is shown in Fig.3.2 It is a simple modulator circuit using a
differential amplifier. It can be used as a multiplier, provided V1 is small and much
less than 50mV, and V2 is greater than VBE(on).
But the multiplier circuit shown in Fig 3.2 has several Limitations.
1. V2 is offset by VBE(on).
2. V2 must always positive which results in only a two quadrant multiplier
operation.
3. The tanh (X) is approximated as X where X = V1/ 2VT
The First two limitations are overcome by Gilbert cell.

3.2. GILBERT MULTIPLIER CELL

The Gilbert multiplier cell is a modification of the emitter coupled cell and this
allows four quadrant multiplications. Therefore the basis of most of the integrated
circuit balanced multipliers. Two cross coupled pairs in series connection with an
emitter coupled pair form the structure of the Gilbert multiplier cell.

The operation of the Gilbert cell is shown in Fig.3.3

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 114

The collector currents of Q3 and Q4 are given by

------(1) ----(2)
Similarly the collector currents of Q5 and Q6 are given by

---------(3) -----(4)

Fig3.3 Gilbert multiplier cell

The collector currents IC1 and IC2 , of transistors Q1 and Q2 can be expressed as

----(5) -----(6)
Substituting Eqn( 5) in Eqn(1) and Eqn(2) , we get

______(7)
When this functional block is used, it compensates for the nonlinearity of the inputs.

_____(8)
Where Io1,K1 and Io2,K2 are the parameters of the functional blocs following inputs V 1
and V2 respectively. Equation (8) shows that the differential output current is
proportional to the product V1V2

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 115

3.3. APPLICATIONS OF MULTIPLIER ICs

The multiplier ICs are used for the following purposes:
(i). Voltage squarer (ii). Frequency doubler (iii).Voltage divider
(iv). Square rooter (v). Phase angle detector (vi). Rectifier

3.4. PHASE LOCKED LOOP

INTRODUCTION
The phase locked loop, commonly called PLL, is a closed loop feedback
system, whose output frequency and phase are in lock with frequency and phase of
the signal. The PLL is an important building block of a linear system, which can
detect the phases of two signals and reduce the difference in the presence of a
phase difference.

3.4.1. OPERATION OF PLL

The basic block diagram of a phase locked loop is shown in Fig.3.4. The main
elements of the PLL are a phase detector/comparator a low pass filter, an error
amplifier (A) and a voltage controlled oscillator (VCO). The phase detector is
fundamentally a multiplier, which generates the sum and difference of the two input
signals.
The free running frequency f0 of the VCO is determined by an externally
connected resistor and a timing capacitor. When the loop is locked, the frequency f 0
is directly proportional to an externally applied voltage v0 called the dc controlled
voltage. When an input periodic signal vi of frequency fi and VCO output signal vo
of frequency fo are applied to the PLL, the phase detector produces a dc or low
frequency signal ve which is proportional to the phase difference between the input
signal vi and the VCO output signal vo.

Fig.3.4 Block Diagram of PLL

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 116

When the phase sensitive signal from the phase detector is passed through
the low pass filter F(s), the high frequency sum component is filtered out. The low
frequency difference component passes out of the filter and then amplified by the
error amplifier A. This amplified signal is applied to the input of VCO as control
voltage v0, which changes the VCO frequency f0 in such a way that the difference
between f0 and fi is reduced. If the two frequencies are brought almost identical by
this feedback action, then the circuit is said to be locked. Once the lock is achieved
the VCO frequency f0 becomes equal to the input signal frequency f i with a finite
phase difference Φ.

Process of Capture
It is an important aspect of PLL, by which the loop achieves the condition of
being in-lock with a signal from a free running and unlocked condition. In the
unlocked condition of the PLL, the VCO operates at a frequency fc, called center
frequency or free running frequency. This corresponds to an applied voltage of 0V dc
at its control input. The capture process is inherently non linear and starts occurring
as described below.

Let assume that the feedback loop of the PLL is initially open between the
loop filter and VCO control input. An input signal of frequency f i, which is assumed to
be closer to the VCO center frequency fc is applied to the input of the phase detector.
The phase detector is usually an analog multiplier that multiplies the two sinusoids
together, and it produces the sum and difference of the two signals at its output.
Since the high frequency sum component is filtered out by the low pass filter,
the output of the LPF is a sinusoid, whose frequency is equal to the difference
between the VCO center frequency fc and incoming signal frequency fi.

Considering that the loop is suddenly closed, the difference frequency

sinusoid is applied to the VCO input as the control voltage Vc. Thus this will make the
VCO frequency fo, a sinusoidal function of time. Therefore it alternately moves closer
and farther away from fi. The output frequency of the phase detector being the
difference between fo and fi, moves to a higher frequency when f moves away from f i,
and moves to a lower frequency when fo moves closer to f.

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 117

This fact is reflected in the phase detector output having an asymmetrical

wave shape during the capture process as shown in Fig.3.5 This asymmetry in the
waveform produces a dc component in the phase detector output.

Fig.3.5 Output of phase detector during capture process

This dc component shifts the VCO frequency f0 towards fi and the frequency
difference gradually diminishes. When the loop is locked, the frequency difference
becomes zero, and a dc voltage remains at the loop filter output.

The low pass loop filter filters out the difference frequency components
resulting from interfering signals, which are far away from the center frequency. It
also acts as a memory for the loop, when the lock is momentarily lost due to a large
interfering transient signal. Therefore, the capture range and pull in time are
dependent on the amount of gain in the loop and the bandwidth of the filter.

The signal will be out of capture range when the beat frequency is too high
due to the VCO frequency which is far away from the center frequency. Once lock is
achieved the VCO can track the signal well beyond the capture range. Reducing the
bandwidth of the filter thus improves the rejectivity of out of band signals, but it
reduces the capture range; the pull-in time increases and loop phase margin become
less.
The capture range of a PLL is defined as the range of input frequencies
around the center frequency within which the loop can get locked from an unlocked
condition. The pull in time is the total time required for the loop to get captured with
the input signal.

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 118

An important feature of PLL is its ability to suppress the noise such as those
superimposed on the input signal and the noise generated by the VCO.

3.4.2. CLOSED LOOP ANALYSIS OF PLL

Fig.3.6 Detailed Block Diagram of PLL

Assume that the PLL is initially in locked condition. Also assume that the gain
of the phase detector is kd Volt/rad of phase difference, the transfer function of the
loop filter is f(S) and the gain in the forward loop is A.

The input signal vi is represented by

Where θi and θosc are phase shifts with respect to an arbitrarily assumed reference.
The phase of the signal at the output of VCO as a function of time is equal to the
integral of the VCO output frequency, and it can be expressed as

Therefore the integral component is represented as 1/s inside the VCO block
of the Fig 3.6. The oscillator frequency ωosc and the dc control voltage vc are actually
related by

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 119

Where ωc is the center or free running angular frequency that results when vc = 0
and K0 is the VCO gain in rad / s per volt. Then the closed loop transfer function of
the PLL becomes

To study the response of the loop to frequency variations at the input rather
than phase, the above equation can be represented as

Since

Considering F(s) = 1 with the loop having a first order low pass frequency response,
we have

Where Kv, the loop bandwidth is given by Kv = K0 Kd A Then the loop bandwidth Kv
is the effective bandwidth, and the loop and capture ranges are very much
dependent on Kv. If Kv decreases, the capture time rises, and the capture range
reduces. Therefore, the property of interference rejection improves.

3.5 VOLTAGE CONTROLLED OSCILLATOR

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 120

Fig.3.7 Voltage control Oscillator

The basic block diagram of 566 VCO are shown in Fig. 3.7. A timing capacitor
C T is linearly charged or discharged by a constant current source/sink. The amount
of current can be controlled by changing the voltage v c applied at the modulating
input (pin 5) or by changing the timing resistor R T external to IC chip. The voltage at
pin 6 is held at the same voltage as pin 5. Thus, if the modulating voltage at pin 5 is
increased, the voltage at pin 6 also increases, resulting in less voltage across RT
and thereby decreasing the charging current.

The voltage across the capacitor C t is applied to the inverting input terminal of
Schmitt trigger A 2 via buffer amplifier A1. The output voltage swing of the Schmitt
trigger is designed to Vcc and 0.5 Vcc. If Ra = R h in the positive feedback loop, the
voltage at the non-inverting input terminal of A 2 swings from 0.5 to 0.25 Vcc. In Fig.
3.7(c), when the voltage on the capacitor Ct exceeds 0.5Vcc during charging, the
output of the Schmitt trigger goes LOW (0.5 Vcc). The capacitor now discharges and
when it is at 0.25 Vcc, the output of Schmitt trigger goes high.

Since the source and sink currents are equal, capacitor charges and
discharges for the same amount of time. This gives a triangular voltage waveform
across CT which is also available at pin 4. The square wave output of the Schmitt
trigger is inverted by inverter A3 and is available at pin 3. The output waveforms are
shown in Fig. 3.7(c).
The output frequency of the VCO can be calculated as follows:

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 121

The total voltage on the capacitor changes from 0.25 Vcc to 0.5 Vcc. Thus ∆v
= 0.25 Vcc. The capacitor chargers with a constant current source.

The Time period T of triangular waveform = 2∆t. The frequency of Oscillator f0 is

The output frequency of the VCO can be changed either by (1) RT (2) CT or (3) The
voltage Vc at the modulating input terminal pin 5. With no modulating input signal if
the voltage at pin 5 is biased at 7/8 Vcc and the above Eqn gives the VCO output
frequency as

Voltage to Frequency Conversion Factor (Kv):

It is defined as Kv = ∆f0/∆Vc
∆Vc is the modulation voltage required to produce the frequency shift ∆f 0 for a VCO
f0= original frequency
f1 = new frequency

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 122

Putting the values of RT & CT

3.6. MONOLITHIC PLL IC 565

The block diagram of IC 565 PLL consists of phase detector, amplifier low-
pass filter and VCO. As shown in block diagram the phase locked feedback loop is
not internally connected. Therefore it is necessary to connect output of VCO to the
phase comparator input externally.
fo = 0.25/RT CT
Where RT & CT are external resistor and capacitor

Fig3.8 Block diagram of IC565 PLL

3.6.1 DERIVATION OF LOCK RANGE

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 123

Fig 3.9 PLL block diagram to determine Lock range

Let us assume that the output voltage of the phase detector is

____________(1)
The output voltage of the phase detector is filtered by low-pass filter to
remove high frequency component. The output of the filter is amplified by a gain A
and then applied as a control voltage VC to the VCO is given by

_______________(2)
This control voltage VC will result in a shift in the VCO frequency from its
center frequency fo to a frequency f, given by

______________(3)
When PLL is locked into the input signal frequency fi, we have

_____________(4)
Substituting value vc from eqn.2 we have,

___________(5)
The maximum output voltage magnitude available from the phase detector
occurs for θ=π and 0 radian and is

The corresponding value of the maximum control voltage available to drive

the VCO will be

___________(6)
191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III
 124

Substituting the maximum value of Vc from eqn (6) in eqn (4) we have

Where 2∆ft. will be lock-in frequency range given by

The lock-in range is symmetrically located with respect to VCO free running
frequency fo, For PLL 565,

________(7)
3.6.2 DERIVATION OF CAPTURE RANGE
The capture range is the range of input frequencies for which the initially
unlocked on an input signal. Thus is always less than the lock range. Since capture
range, ∆ωcap denotes a transient condition; it is not as readily derived as lock-in
range. However, an approximate parametric expression for the capture range will be
initially derived to give an estimate of the capture range. It can be derived by
employing simple lag filter. When PLL is not locked the phase angle difference
between the signal and the VCO output voltage is given by

The phase angle difference thus not be constant, but will change with time at
a rate given by

The phase detector output voltage will therefore not have a dc component, but
rather will have an ac voltage with a triangular waveform of peak amplitude k Φ(Π/2)
and the fundamental frequency of ωs- ωo i.e. fs-fo=∆f.
Let us derive an approximate expression for capture range for PLL employing
a simple lag filter. The transfer function for a simple lag filter is given by

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 125

For the condition that (f/f1)2 >> 1, the transfer function can be expressed
approximately as

The fundamental input frequency term supplied to the low pass filter by the
phase detector will be at the difference frequency ∆f=fs-fo. IF ∆f.>3f1, the transfer
function of LPF will be approximately given by

The voltage available to drive the VCO is given by

The corresponding value of the maximum frequency shift will be given by

For the acquisition of the signal frequency fs, we must have that f=fs, so that
the maximum signal frequency range can be required by the PLL will be

For IC PLL 565, R=3.6KΩ

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 126

The total capture range is 2∆ fcap

3.7. AM DETECTION
A PLL can be used to demodulate AM signals as shown in fig 3.10

Fig3.10. PLL used as AM demodulator

The PLL is locked to the carrier frequency of the incoming AM signal. Once
locked the output frequency of VCO is same as the carrier frequency, but it is in
unmodulated form. The modulated signal with 90 phase shift and the unmodulated
carrier from output of PLL are fed to the multiplier. Since VCO output is always 90
out of phase with the incoming AM signal under the locked condition, both the
signals applied to the multiplier are in same phase. Therefore, the output of the
multiplier contains both the sum and the difference signals. The low pass filter
connected at the output of the multiplier rejects high frequency components gives
demodulated output.

3.8. PLL FM DEMODULATOR / DETECTOR

When the PLL is locked in on the FM signal, the VCO frequency follows the
instantaneous frequency of the FM signal, and the error voltage or VCO control
voltage is proportional to the deviation of the input frequency from the centre
frequency. Therefore, the ac component of error voltage or control voltage of VCO
will represent a true replica of the modulating voltage that is applied to the FM carrier
at the transmitter. The faithful reproduction of modulating voltage depends on the
linearity between the instantaneous frequency deviation and the control voltage of
VCO. It is also important to note that the FM frequency deviation and modulating
191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III
 127

frequency should remain in the locking range of PLL to get the faithful replica of the
modulating signal.

PLL FM DEMODULATION BASICS

The way in which a phase locked loop, PLL FM demodulator works is
relatively straightforward. It requires no changes to the basic phase locked loop,
itself, utilising the basic operation of the loop to provide the required output.

When used as an FM demodulator, the basic phase locked loop can be used
without any changes. With no modulation applied and the carrier in the centre
position of the pass-band the voltage on the tune line to the VCO is set to the mid
position. However if the carrier deviates in frequency, the loop will try to keep the
loop in lock. For this to happen the VCO frequency must follow the incoming signal,
and in turn for this to occur the tune line voltage must vary. Monitoring the tune line
shows that the variations in voltage correspond to the modulation applied to the
signal. By amplifying the variations in voltage on the tune line it is possible to
generate the demodulated signal.

3.9. FRQUENCY SYNTHESIZER

The PLL can be used as the basis for frequency synthesizer that can product
a precise series of frequencies that are derived from a stable crystal controlled
oscillator. It is similar to frequency multiplier circuit except that divided by M network
is added at the input of phase lock loop. The frequency of the crystal controlled
oscillator is divided by an integer factor M by divider network to produce a frequency
fosc/M, where fosc is the frequency of the crystal controlled oscillator. The VCO
frequency fvco is similarly divided by factor N by divider network to give frequency
equal to fvco /N. When the PLL is locked in on the divided-down oscillator frequency,
we will have fosc/M=fvco /N, so that
fvco=(N/M) fosc

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 128

Fig 3.11 Block diagram of frequency synthesizer

3.10. FSK MODULATOR:

In digital data communication, binary data is transmitted by means of a carrier

frequency. It used two different carrier frequencies for logic 1 and logic 0 states of
binary data signal. This type of data transmission is called Frequency Shift Keying
(FSK).

Fig 3.12. Frequency Shift Keying demodulator.

Let us consider that there are two frequencies, one frequency (f1) is
represented as “0” and other frequency (f2) is represented as “1”. If the PLL remain
is locked into the FSK signal at both f1 and f2, the VCO control voltage which is also
supplied to the comparator will be given as

Vc1=(f1-f0)/kv

Vc2=(f2-f0)/kv

Where kv is the voltage to frequency transfer coefficient of the VCO.

The difference between the two control voltage levels will be Vc=(f2-f1)/ kv

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 129

The reference voltage for the comparator is derived from the additional low
pass filter and it is adjusted midway between Vc1 and Vc2. Therefore for Vc1 and Vc2
comparator gives output‟0‟ and „1‟ respectively.

TWO MARKS QUESTIONS WITH ANSWER

1. What is a four quadrant multiplier?

A Multiplier that accepts inputs of either polarity (i.e, positive or negative) and
preserves the correct polarity relationship at the output is referred to as a Four
Quadrant Multiplier.

2. What are the advantages of variable transconductance techniques?

(May/June 2012, dec2011)
1. Provides very good accuracy
2. Simple to integrate into monolithic chip
3. High speed of operation
4. Reduced error

3. What is Linearity Error?

Linearity error represent maximum output deviation from the best fit straight time for
the case where, one input is varied from end to end, while the other is kept fixed. It
is also referred to as Non-Linearity.

4. What is analog multiplier?(MAY 2010)

A multiplier produces an output v0, which is proportional to the product of two inputs
vx and vy .V0= kv x vy

5. List out the various methods available for performing for analog multiplier.
• Logarithmic summing technique
• Pulse height /width modulation technique
• Variable transconductance technique

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 130

• Multiplication using Gilbert cell

• Multiplication technique using transconductance technique.

6. Give the schematic symbol of multipliers?

7. Name few applications of analog multiplier?

 Signal modulation / demodulation.
 CRT distortion compensation
 Frequency doubling / shifting.
 Transducer response linearization
 Phase angle detection.

8. What is a VCO?(Apr-2010)
An oscillator which generates output frequency, which is proportional to input voltage
is called as voltage controlled oscillator.

9. What are the functional building blocks of PLL?

1. Phase Detector / Comparator 2.Low pass filter
3. Error amplifier 4.Voltage controlled Oscillator
10. List out the application of PLL (May/June 2013)
1. Frequency multiplication / division. 2. Frequency translation.
3. AM Detection. 4. FM Demodulation
5. FSK Demodulator

11. Mention some areas where PLL is widely used. (DEC 2009)
1. Radar synchronizations 2. Satellite communication systems
3. Air borne navigational systems 4. FM communication systems
5. Computers.

12. What are the different stages of operation in PLL?

1.Free running range 2.Capture range 3.Lock in range (or) Tracking

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 131

13. What is lock-in range and capture range of PLL. (Nov/Dec 2013,Nov-
2010,DEC 2011)
Lock-in-range:The range of frequencies over which the PLL can maintain lock with
the incoming signal is called as lock–in range or tracking range. It is expressed as a
percentage of fo the VCO frequency.
Capure range:The range of frequencies over which the PLL can acquire lock with
an input signal is called capture range of the PLL.

14.Define Pull-in time. (Capture time)?

The total time taken by the PLL to establish lock is called pull-in time. It depends on
the initial phase and frequency difference between the two signals as well as on the
overall loop gain and loop filter characteristics.

15. A PLL has free running frequency of 500 kHz and bandwidth of LPF is 10
kHz. Will the loop acquire lock for an input signal of 600 kHz? Justify
Assume that phase detector produces and difference frequency components.
Solution: Phase detector output = 600 kHz + 500 kHz = 1100 kHz.
As both the components are outside the pass band of low pass filter, the
loop will to acquire lock.

16. What is the purpose of having a low pass filter in PLL?

*It removes the high frequency components and noise.
*Controls the dynamic characteristics of the PLL such as capture range, lock-in
range, band-width and transient response.
*The charge on the filter capacitor gives a short- time memory to the PLL.

17. Discuss the effect of having large capture range.

The PLL cannot acquire a signal outside the capture range, but once captured, it will
hold on till the frequency goes beyond the lock-in range. Thus, to increase the ability
of lock range, large capture range is required. But, a large capture range will make
the PLL more susceptible to noise and undesirable signal.

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 132

18. For perfect lock, what should be the phase relation between the incoming
signal and VCO output signal?
The VCO output should be 90 degrees out of phase with respect to the input signal.

19. What is the need for frequency synthesizer?(MAY 2014)

A frequency synthesizer is an electronic system for generating any of a range of
frequencies from a single fixed time base or oscillator. They are found in many
moderndevices,including radio receivers, radiotelephones, walkie-talkies, CB radios,
satellite receivers, GPS systems, etc. A frequency synthesizer can combine
frequency multiplication, frequency division, and frequency mixing (the frequency
mixing process generates sum and difference frequencies) operations to produce the
desired output signal.

20. Draw the relation between the capture ranges and lock range in a PLL.
(Apr-2010)

Fig. Transfer characteristics of PLL

The frequency range between f 3 and f1 is called capture range and frequency range
between f2 and f4 is called lock range.

20. What are the advantages of emitter coupled transistor pair?(Apr-2011)

 It avoids saturation effect by operating in differential mode with limited emitter
current
 Total current in transistor pair is less than saturation current for one transistor
 It will be operated at high switching speed

21. With reference to VCO, define voltage to frequency factor conversion K v.

(Apr-2011)
Voltage to frequency factor conversion KV for VCO is defined as the ratio of change
in frequency shift in the modulation voltage. And it is given by,
191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III
 133

Where VC is modulation input voltage.

fo=fo2-fo1
where fo1 is the original frequency and fo2 is the new frequency

22. VCO is called as V to F convertor why?? (May/June 2012, DEC 2012)

VCO is an oscillator circuit in which the frequency of oscillation can be controlled by
externally applied voltage, VCO provides the linear relationship between the applied
voltage and output frequency hence it is called V to F convertor.

23. What is the need for modulation?

Low frequency audio signals cannot be transmitted through atmosphere from
antenna, so a frequency spectrum of audio signal is translated by high frequency
carrier wave. Bandwidth of modulated signal can be made smaller or larger than
original signal.

24. What is Modulation?

The process in which some characteristics of carrier wave changes in accordance
with the instantaneous value of a incoming or modulating (message) signal.

25. What is demodulation?

Demodulation or detection is the process of recovering eh original modulating
(message) signal (Vm) from the modulated output signal (V0)

26. What is Amplitude Modulation?

The amplitude of high frequency carrier waves is varied in accordance with the input
or message signal, this process is called Amplitude modulation.

27. What is Frequency Modulation?

The frequency of the carrier wave is varied in accordance with the message signal
and this process is called frequency modulation (FH).

28. Write the expression for FSK modulation.(MAY 2010)

Δvf=f2-f1/k0
29. Define free running mode .(MAY 2010)

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 134

An interactive computer mode that allows more than one user to have simultaneous
use of a program.

30. What is a voltage controlled oscillator?

Voltage controlled oscillator is a free running multivibrator operating at a set
frequency called the free running frequency. This frequency can be shifted to either
side by applying a dc control voltage and the frequency deviation is proportional to
the dc control voltage.

31. Give the classification of phase detector:

1.Analog phase detector .
2.Digital phase detector

32. What is a switch type phase detector?

An electronic switch is opened and closed by signal coming from VCO and the input
signal is chopped at a repetition rate determined by the VCO frequency. This type of
phase detector is called a half wave detector since the phase information for only
one half of the input signal is detected and averaged.

33. What are the problems associated with switch type phase detector?
1. The output voltage Ve is proportional to the input signal amplitude. This is
undesirable because it makes phase detector gain and loop gain dependent on the
input signal amplitude.
2. The output is proportional to cosine function making it non linear.

34. What is meant by frequency synthesizing? (DEC 2013)

A frequency synthesizer is an electronic system for generating any of a range of
frequencies from a single fixed time base or oscillator. A frequency synthesizer can
combine frequency, frequency division, and frequency mixing (the frequency mixing
process generates sum and difference frequencies) operations to produce the
desired output signal.

35. What is a two quadrant Multiplies?

If one of the inputs is held positive and the other is allowed to swing both positive
and negative it is called two quadrant multipliers.

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III

 135

PART B QUESTIONS
1. (i) With a neat diagram explain the variable transconductance technique in analog
multiplier and give its output equation. (8)
(ii) Briefly explain the working of voltage controlled oscillator. (8)( May - 2010)
2. What are important building block of phase locked loop (PLL) explain its Working?
(16) ( May - 2010)
3. Draw the functional block schematic of a NE565 PLL and explain the roles of the low
pass filter and VCO. Derive the expression for the capture range and lock in range of the
PLL. [16]( Dec - 2010)(May 15)
4. With suitable block diagram, explain the operation of 566 voltage controlled oscillator.
Also derive an expression for the frequency of the output waveform generated. [16]
5. Sketch and explain the following applications of multipliers:
1) Squaring 2) finding square root 3) frequency doubler 4) phase angle detector(May -
2011)
6. (i) Draw the block diagram of VCO and explain its operation. Also derive the
frequency of oscillator.(10)
(ii) Draw the circuit of a PLL used as AM detector and explain its operation(6)
(May - 2011)
7. (i) Sketch and explain the multiplier cell using emitter coupled transistor pair. Prove
that the output voltage is proportional to the product of the two input voltages.(12)
(ii)state the limitations of emitter coupled pair.(4)( Dec - 2011)
8. (i) with usual notations show that the lock in range of PLL is ∆fl=+-7.8 f0/v.(10)
(ii)explain how the IC 565 PLL can be as a FSK demodulator(6) ( Dec - 2011)
9. (i) List and define the various performance parameters of a Multiplier IC. (6)
(ii) How the multiplier is used as voltage divider? (5)
(iii) How the multiplier is used as frequency doubler? (5) (May - 2012)
10. Explain, with neat block diagrams, how PLL is used as
(i) AM Detector. (5) (ii) FM Detector . (5)
(iii) Frequency Synthesizer. (6) (May - 2012)
191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III
 136

11. Explain with a schematic how a PLL can be used as: (Dec - 2012)
(i) Frequency multiplier. (ii) Frequency translator
12. (i) What do you mean by variable transconductance analog multiplier?(May15)
(ii) State the advantages of variable transconductance analog multiplier for multiplication.
(iii) Draw the circuit and explain the working of one quadrant variable trans conductance
analog multiplier.( May - 2013)

13. Draw the circuit and explain principle of working, characteristics and applications of
i) frequency synthesizer ii) Frequency shift keying demodulator. ( May - 2013)

14. (i)Explain the working of a Gilbert multiplier cell(11)

(ii)Explain the principle of operation of a PLL (5) (Dec – 2013)
15. (i) Explain the working of IC 565.(10)
(ii) Explain the application of PLL used for FM detection (6) (Dec – 2013)
16. Explain the working of Analog multiplier using emitter coupled transistor pair.
Discuss the applications of analog multiplier IC. (16)( May - 2014)
17. Explain the application of PLL as AM detection, FM detection and FSK demodulation.
( May – 2014 &15)

191ROS402T LINEAR INTEGRATED CIRCUITS UNIT III