8086 Microprocessor: Dr. E.Sathish SENSE

8086 microprocessor
Dr. E.Sathish SENSE

General Architecture of Processor
Introduction to 8086
• Limitations of 8-bit processors:
– Low speed
– Low memory addressing capability
– Limited no. of general purpose registers
– Less Powerful instruction set
• 8086 was the first 16-bit processor, launched in
1978
• Had architectural developments  programming
flexibility & improvement in speed
Introduction to 8086
• Backward compatible with 8085
• Memory interfacing technique is similar, though
memory addressing is different
• 40-pin DIP, 5V supply
• 29,000 transistors
• 20 bit address to access memory
• (memory space = 220 = 1MB)
8085 Vs. 8086
Block diagram of 8086
Software Model of the 8086 Microprocessors
Architecture
• Bus Interface Unit (BIU)
• BIU sends out addresses, fetches

instructions, reads data from
memory and I/O ports, writes
data to memory and I/ O ports
…
• Execution Unit (EU)
• EU tells BIU where to fetch the

instructions/data from, decodes
instructions and executes
instructions that have already
been fetched by the BIU.
• BIU and EU functions separately.

• ALU
– It handles all arithmetic and logical operations,
like +, −, ×, /, OR, AND, NOT operations.
• Flag Register
– It is a 16-bit register that behaves like a flip-flop,
i.e. it changes its status according to the result
stored in the accumulator.
– 9 flags and they are divided into 2 groups −
Conditional Flags and Control Flags.
Flag Register
Overflow Carry
Direction Parity
Interrupt enable Auxiliary Carry

Trap Zero
6 - status flags
Sign
3 - control flag
Execution Unit (EU)
Auxiliary Carry Flag
Carry Flag
This is set, if there is a carry from the
lowest nibble, i.e, bit three during This flag is set, when there is
addition, or borrow for the lowest a carry out of MSB in case of
nibble, i.e, bit three, during addition or a borrow in case
subtraction. of subtraction.
Sign Flag Zero Flag Parity Flag
This flag is set, when the This flag is set, if the result of This flag is set to 1, if the lower
result of any computation the computation or comparison byte of the result contains even
is negative performed by an instruction is number of 1’s ; for odd number
zero of 1’s set to zero.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
Trap Flag
Over flow Flag If this flag is set, the processor
This flag is set, if an overflow occurs, i.e, if the result of a signed enters the single step execution
operation is large enough to accommodate in a destination
mode by generating internal
register. The result is of more than 7-bits in size in case of 8-bit
signed operation and more than 15-bits in size in case of 16-bit interrupts after the execution of
sign operations, then the overflow will be set. each instruction
Direction Flag Interrupt Flag

This is used by string manipulation instructions. If this flag bit
is ‘0’, the string is processed beginning from the lowest Causes the 8086 to recognize
address to the highest address, i.e., auto incrementing mode. external mask interrupts; clearing IF
Otherwise, the string is processed from the highest address disables these interrupts.
towards the lowest address, i.e., auto incrementing mode.
General Purpose Registers
AX - the Accumulator
BX - the Base Register
CX - the Count Register
DX - the Data Register
• Normally used for storing temporary results

• Each of the registers is 16 bits wide (AX, BX, CX, DX)
• Can be accessed as either 16 or 8 bits AX, AH, AL
• AX
– Accumulator Register
– Preferred register to use in arithmetic, logic and data
transfer instructions because it generates the shortest
Machine Language Code
– Must be used in multiplication and division
operations
– Must also be used in I/O operations
• BX
– Base Register
– Also serves as an address register
• CX
– Count register
– Used as a loop counter
– Used in shift and rotate operations
• DX
– Data register
– Used in multiplication and division
– Also used in I/O operations
Pointer and Index Registers
• All 16 bits wide, L/H bytes are not accessible
• Used as memory pointers

– Example: MOV AH, [SI]
• Move the byte stored in memory location whose address is contained in
register SI to register AH
• IP is not under direct control of the programmer

BUS INTERFACE UNIT
BIU - QUEUE
• While EU is decoding or executing an
instruction, which does not require the use of
buses, BIU fetches upto 6 instruction bytes for
the following instructions.
• BIU stores these prefetched bytes in a FIFO
register called queue.
• When the EU is ready for its next instruction,
it reads from queue.
Segment Registers
• Out of the available 1MB memory, at any
given time, 8086 works only with four 64KB
segments (total 16 segments).
• SR holds the first 16 bits of the starting
address of the four memory segments.
Segment register
• − BIU has 4 segment buses, i.e. CS, DS, SS& ES.
• It holds the addresses of instructions and data in memory, which
are used by the processor to access memory locations.
• It also contains 1 pointer register IP, which holds the address of the
next instruction to be executed by the EU.
• CS − It stands for Code Segment. It is used for addressing a memory
location in the code segment of the memory, where the executable
program is stored.
• DS − It stands for Data Segment. It consists of data used by the
program andis accessed in the data segment by an offset address or
the content of other register that holds the offset address.
• SS − It stands for Stack Segment. It handles memory to store data
and addresses during execution.
• ES − It stands for Extra Segment. ES is additional data segment,
which is used by the string to hold the extra destination data.
Instruction Pointer
• CSR holds the upper 16 bits of the starting
address of the segment from which the BIU is
currently fetching the instruction code bytes.
• IPR holds the 16-bit offset address of the next
code byte within this code segment.
• This offset value is added to the base address
stored in the CSR, to derive the physical
address.
Physical Address Computation
SSR & SPR
• Stack is a section of memory set aside to store
addresses and data while a subprogram is
executing
• 8086 allows an entire 64KB segment as a stack
• SSR holds the upper 16-bit of the starting address
of this segment
• SPR in the EU holds the 16-bit offset from the
start of the segment to the memory location
where a word was recently stored on the stack.
• Memory location where a word was most
recently stored is called the top of stack.
8086 Programmer’s Model
ES Extra Segment
CS Code Segment
BIU registers
(20 bit adder) SS Stack Segment
DS Data Segment
IP Instruction Pointer
EU registers AX AH AL Accumulator
BX BH BL Base Register
CX CH CL Count Register
DX DH DL Data Register
SP Stack Pointer
BP Base Pointer
SI Source Index Register
DI Destination Index Register
FLAGS
8086 Microprocessor
Execution Unit (EU)
Architecture
EU
Registers
Source Index (SI) and Destination Index (DI)
Used in indexed addressing.
Instructions that process data strings use the SI and DI

registers together with DS and ES respectively in order to
distinguish between the source and destination addresses.
ADDRESSING MODES
Addressing modes
 An instruction is a basic command given to a microprocessor to
perform a specified operation with given data.
 Each instruction has two groups of bits.
 One group of bits is known as operation code (opcode), which
defines what operation will be performed by the instruction.
 The other field is called operand, which specifies data that will
be used in arithmetic and logical operations.
 The operand can specify a register or a memory location in any
one of the memory segments or I/O ports.
 The addressing mode is used to locate the operand or data.
 There are different types of addressing modes depending upon
the location of data in the 8086 processor.
INTRODUCTION
• Most 8086 instructions can operate on the 8086’s
general purpose register set.
• By specifying the name of the register as an operand
to the instruction, you may access the contents of
that register.
• Consider the 8086 mov (move) instruction:
mov destination, source
• This instruction copies the data from the source
operand to the destination operand.
• The eight and 16 bit registers are certainly valid
operands for this instruction.
• The only restriction is that both operands must be
the same size.
INTRODUCTION
• mov ax, bx ;Copies the value from BX into AX
• mov dl, al ;Copies the value from AL into DL
• mov si, dx ;Copies the value from DX into SI
• mov sp, bp ;Copies the value from BP into SP
• mov dh, cl ;Copies the value from CL into DH
• mov ax, ax ;Yes, this is legal!
• In addition to the general purpose registers, many 8086
instructions (including the mov instruction) allow you to specify
one of the segment registers as an operand.
• There are two restrictions on the use of the segment registers
with the mov instruction.
• First of all, you may not specify cs as the destination operand,
• second, only one of the operands can be a segment register.
• You cannot move data from one segment register to another with
a single mov instruction.
• To copy the value of cs to ds, you’d have to use some sequence
like:
mov ax, cs
mov ds, ax
• You should never use the segment registers as data registers to
hold arbitrary values.
• They should only contain segment addresses
INTRODUCTION
8086 Microprocessor
Addressing Modes
Every instruction of a program has to operate on a data.
The different ways in which a source operand is denoted
in an instruction are known as addressing modes.
1. Register Addressing
Group I : Addressing modes for register and
2. Immediate Addressing immediate data
3. Direct Addressing
4. Register Indirect Addressing
5. Based Addressing
Group II : Addressing modes for memory data
6. Indexed Addressing
7. Based Index Addressing
8. String Addressing
9. Direct I/O port Addressing

Group III : Addressing modes for I/O ports
10. Indirect I/O port Addressing
11. Relative Addressing Group IV : Relative Addressing mode
12. Implied Addressing Group V : Implied Addressing mode

8086 Microprocessor Group I : Addressing modes for register and
immediate data
Addressing Modes
The instruction will specify the name of the
2. Immediate Addressing register which holds the data to be operated by
the instruction.
Example:
5. Based Addressing MOV CL, DH
6. Indexed Addressing The content of 8-bit register DH is moved to

another 8-bit register CL
(CL)  (DH)
11. Relative Addressing
12. Implied Addressing

8086 Microprocessor Group I : Addressing modes for register and
immediate data
Addressing Modes
In immediate addressing mode, an 8-bit or 16-bit
1. Register Addressing data is specified as part of the instruction
2. Immediate Addressing Example:
3. Direct Addressing MOV DL, 08H

4. Register Indirect Addressing The 8-bit data (08H) given in the instruction is
moved to DL
5. Based Addressing
(DL)  08H

MOV AX, 0A9FH
The 16-bit data (0A9FH) given in the instruction is
9. Direct I/O port Addressing moved to AX register
10. Indirect I/O port Addressing (AX)  0A9FH

8086 Microprocessor
Addressing Modes : Memory Access

20 Address lines  8086 can address up to 220 = 1M bytes
of memory
However, the largest register is only 16 bits
Physical Address will have to be calculated Physical Address :

Actual address of a byte in memory. i.e. the value which goes out
onto the address bus.
Memory Address represented in the form – Seg : Offset (Eg

- 89AB:F012)
Each time the processor wants to access memory, it takes the

contents of a segment register, shifts it one hexadecimal place to
the left (same as multiplying by 1610), then add the required
offset to form the 20- bit address
16 bytes of contiguous
memory
89AB : F012  89AB  89AB0 (Paragraph to byte  89AB x 10 = 89AB0)

F012  0F012 (Offset is already in byte unit)
+ -------
98AC2 (The absolute address)
8086 Microprocessor Group II : Addressing modes for memory
Addressing Modes
data
2. Immediate Addressing
Here, the effective address of the memory
location at which the data operand is stored is
4. Register Indirect Addressing given in the instruction.
5. Based Addressing The effective address is just a 16-bit number

written directly in the instruction.
Example:
MOV BX, [1354H]
8. String Addressing MOV BL, [0400H]
The square brackets around the 1354H denotes
the contents of the memory location. When
executed, this instruction will copy the contents of
11. Relative Addressing the memory location into BX register.
12. Implied Addressing This addressing mode is called direct because the
displacement of the operand from the segment
base is specified directly in the instruction.
Addressing Modes data
1. Register Addressing In Register indirect addressing, name of the

register which holds the effective address (EA)
2. Immediate Addressing will be specified in the instruction.
3. Direct Addressing Registers used to hold EA are any of the following

registers:
BX, BP, DI and SI.
5. Based Addressing
Content of the DS register is used for base
address calculation.
Example:
8. String Addressing Note : Register/ memory
MOV CX, [BX] enclosed in brackets refer to
9. Direct I/O port Addressing content of register/ memory
Operations:
EA = (BX)
11. Relative Addressing BA = (DS) x 1610
MA = BA + EA
(CX)  (MA) or,
(CL)  (MA)
(CH)  (MA +1)
1. Register Addressing In Based Addressing, BX or BP is used to hold the

base value for effective address and a signed 8-bit
2. Immediate Addressing or unsigned 16-bit displacement will be specified
in the instruction.
In case of 8-bit displacement, it is sign extended
4. Register Indirect Addressing to 16-bit before adding to the base value.
5. Based Addressing When BX holds the base value of EA, 20-bit

physical address is calculated from BX and DS.
When BP holds the base value of EA, BP and SS is
used.
Example:
MOV AX, [BX + 08H]
Operations:
0008H  08H (Sign extended)
12. Implied Addressing EA = (BX) + 0008H
BA = (DS) x 1610
MA = BA + EA
(AX)  (MA) or,
(AL)  (MA)
(AH)  (MA + 1)
1. Register Addressing SI or DI register is used to hold an index value for

memory data and a signed 8-bit or unsigned 16-
2. Immediate Addressing bit displacement will be specified in the
instruction.
Displacement is added to the index value in SI or
4. Register Indirect Addressing DI register to obtain the EA.
5. Based Addressing In case of 8-bit displacement, it is sign extended

to 16-bit before adding to the base value.

Example:
MOV CX, [SI + 0A2H]
Operations:
FFA2H  A2H (Sign extended)
EA = (SI) + FFA2H
12. Implied Addressing BA = (DS) x 1610
MA = BA + EA
(CX)  (MA) or,
(CL)  (MA)
(CH)  (MA + 1)
1. Register Addressing In Based Index Addressing, the effective address

is computed from the sum of a base register (BX
2. Immediate Addressing or BP), an index register (SI or DI) and a
displacement.
Example:
MOV DX, [BX + SI + 0AH]
5. Based Addressing
Operations:
000AH  0AH (Sign extended)
8. String Addressing EA = (BX) + (SI) + 000AH

BA = (DS) x 1610
9. Direct I/O port Addressing MA = BA + EA
10. Indirect I/O port Addressing (DX)  (MA) or,
11. Relative Addressing (DL)  (MA)

(DH)  (MA + 1)
1. Register Addressing Employed in string operations to operate on string

data.
The effective address (EA) of source data is stored
3. Direct Addressing in SI register and the EA of destination is stored in
DI register.
Segment register for calculating base address of
5. Based Addressing source data is DS and that of the destination data
is ES

Example: MOVS BYTE
Operations:
Calculation of source memory location:
10. Indirect I/O port Addressing EA = (SI) BA = (DS) x 1610 MA = BA + EA
11. Relative Addressing Calculation of destination memory location:

EAE = (DI) BAE = (ES) x 1610 MAE = BAE + EAE
Note : Effective address of the (MAE)  (MA)

Extra segment register
If DF = 1, then (SI)  (SI) – 1 and (DI) = (DI) - 1
If DF = 0, then (SI)  (SI) +1 and (DI) = (DI) + 1
8086 Microprocessor Group III : Addressing modes for I/O
Addressing Modes ports
1. Register Addressing These addressing modes are used to access data

from standard I/O mapped devices or ports.
In direct port addressing mode, an 8-bit port
3. Direct Addressing address is directly specified in the instruction.
4. Register Indirect Addressing Example: IN AL, [09H]
5. Based Addressing Operations: PORTaddr = 09H

(AL)  (PORT)
Content of port with address 09H is
moved to AL register
In indirect port addressing mode, the instruction
9. Direct I/O port Addressing will specify the name of the register which holds
the port address. In 8086, the 16-bit port address
10. Indirect I/O port Addressing is stored in the DX register.
11. Relative Addressing Example: OUT [DX], AX
12. Implied Addressing Operations: PORTaddr = (DX)

(PORT)  (AX)
Content of AX is moved to port

whose address is specified by DX
register.
8086 Microprocessor Group IV : Relative Addressing
mode
1. Register Addressing Addressing Modes

3. Direct Addressing In this addressing mode, the effective address of

a program instruction is specified relative to
4. Register Indirect Addressing Instruction Pointer (IP) by an 8-bit signed
displacement.
5. Based Addressing
Example: JZ 0AH
Operations:
8. String Addressing 000AH  0AH (sign extend)
9. Direct I/O port Addressing If ZF = 1, then
10. Indirect I/O port Addressing EA = (IP) + 000AH

BA = (CS) x 1610
11. Relative Addressing MA = BA + EA
12. Implied Addressing If ZF = 1, then the program control jumps to

new address calculated above.
If ZF = 0, then next instruction of the

program is executed.
8086 Microprocessor Group IV : Implied Addressing
mode
1. Register Addressing Addressing Modes

2. Immediate Addressing Instructions using this mode have no operands.
The instruction itself will specify the data to be
3. Direct Addressing operated by the instruction.
4. Register Indirect Addressing Example: CLC
5. Based Addressing This clears the carry flag to zero.


Instruction Set of 8086
An instruction is a binary pattern designed
inside a microprocessor to perform a specific
function.
The entire group of instructions that a
microprocessor supports is called
Instruction Set.
8086 has more than 20,000 instructions.
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Classification of Instruction Set
1. Arithmetic Instructions and Logical Instruction
2. Data Transfer Instructions
3. Branch and Loop Instruction
4. M/C control Instruction
5. Flag Manipulation Instructions
6. Shift and Rotate Instruction
7. String Instructions
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1. Arithmetic And Logical
Instructions
Arithmetic Instructions
ADD Des, Src:
 It adds a byte to byte or a word to word.
 It effects AF, CF, OF, PF, SF, ZF flags.
 E.g.:
 ADD AL, 74H
 ADD DX, AX
 ADD AX, [BX]
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ADC Des, Src:
 It adds the two operands with CF.
 E.g.:
 ADC AL, 74H
 ADC DX, AX
 ADC AX, [BX]
52
SUB Des, Src:
 It subtracts a byte from byte or a word from word.
 For subtraction, CF acts as borrow flag.
 E.g.:
 SUB AL, 74H
 SUB DX, AX
 SUB AX, [BX]
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SBB Des, Src:
 It subtracts the two operands and also the
borrow from the result.
 E.g.:
 SBB AL, 74H
 SBB DX, AX
 SBB AX, [BX]
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 MUL Src:
 It is an unsigned multiplication instruction.
 It multiplies two bytes to produce a word or two words to
produce a double word.
 AX = AL * Src
 DX : AX = AX * Src
 This instruction assumes one of the operand in AL or AX.
 Src can be a register or memory location. And Flags-OF, CF
 Unused bits of destination register is always filled with sign bit
 IMUL Src:
 It is a signed multiplication instruction.
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 DIV Src:
 It is an unsigned division instruction.
 It divides word by byte or double word by word.
 The operand is stored in AX, divisor is Src and
the result is stored as:
 AH = remainder, AL = quotient (for word/byte)
 DX=remainder, AX=quotient (for D-word/word)
 IDIV Src:
 It is a signed division instruction.
56
 CBW (Convert Byte to Word):
 This instruction converts byte in AL to word in AX.
 The conversion is done by extending the sign bit of AL
throughout AH.
 CWD (Convert Word to Double Word):

 This instruction converts word in AX to double word in
DX : AX.
 The conversion is done by extending the sign bit of AX
throughout DX.
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INC Src:
 It increments the byte or word by one.
 The operand can be a register or memory
location.
 E.g.: INC AX
 INC [SI]
58
DEC Src:
 It decrements the byte or word by one.
 The operand can be a register or memory
location.
 E.g.: DEC AX
DEC [SI]
59
 CMP Des, Src:
 It compares two specified bytes or words.
 The Src and Des can be a constant, register or memory
location.
 Both operands cannot be a memory location at the same
time.
 The comparison is done simply by internally subtracting
the source from destination.
 The value of source and destination does not change, but
the flags CF, ZF, SF are modified to indicate the result.
60
NEG Src:
It creates 2’s complement of a given
number.
That means, it changes the sign of a
number.
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 DAA (Decimal Adjust after Addition)
 It is used to make sure that the result of adding two BCD
numbers is adjusted to be a correct BCD number.
 It only works on AL register.
 For Subtraction : DAS (Decimal Adjust after

Subtraction)
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 AAA (ASCII Adjust after Addition):
 This Instruction Can be used to convert the contents of the
AL register to unpacked BCD result
 i.e. If lower nibble of AL>9 then
1. AL=AL+6 2. AH=AH+1
3. AL=AL AND 0FH
 This instruction does not have any operand.
 Other ASCII Instructions:
 AAS (ASCII Adjust after Subtraction)
 AAM (ASCII Adjust after Multiplication)
63
 AAD (ASCII Adjust Before Division)
Logical Instructions
 NOT Src:
 It complements each bit of Src to produce 1’s
complement of the specified operand.
 The operand can be a register or memory location.
 e,.g NOT AX
64
Logical Instructions
 AND Des, Src:
 It performs AND operation of Des and Src.
 Src can be immediate number, register or memory
location.
 Des can be register or memory location.
 Both operands cannot be memory locations at the same
time.
 CF and OF become zero after the operation.
 PF, SF and ZF are updated.
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Bit Manipulation Instructions
 OR Des, Src:
 It performs OR operation of Des and Src.
location.
time.
66
 XOR Des, Src:
 It performs XOR operation of Des and Src.
location.
time.
67
 TEST Des, Src:
 It performs AND operation of Des and Src.
 Src can be immediate number, and src/Des can be
register or memory location.
 It is Non-Destructive And means Dest is not modified
only flags are affected.
time.
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2. Data Transfer Instructions
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Data Transfer Instructions
 MOV Des, Src:
 It is used to copy the content of Src to Des
 Src operand can be register, memory location or immediate
operand.
 Des can be register or memory operand.
 Both Src and Des cannot be memory location at the same
time.
 E.g.:
 MOV CX, 037A H
 MOV AL, BL
 MOV BX, [0301 H]
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 PUSH Operand:
 It pushes the operand into top of stack.
 E.g.: PUSH BX
 POP Des:
 It pops the operand from top of stack to Des.
 Des can be a general purpose register, segment register
(except CS) or memory location.
 E.g.: POP AX
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The Stack
• The stack is used for temporary storage of information
such as data or addresses.
• When a CALL is executed, the 8086 automatically PUSHes

the current value of CS and IP onto the stack.
• Other registers can also be pushed
• Before return from the subroutine, POP instructions can

be used to pop values back from the stack into the
corresponding registers.
The Stack
 XCHG Des, Src:
 This instruction exchanges Src with Des.
 It cannot exchange two memory locations directly.
 E.g.: XCHG DX, AX
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 IN Accumulator, Port Address:
 It transfers the operand from specified port to accumulator
register.
 E.g.: IN AX, 0028 H
 OUT Port Address, Accumulator:

 It transfers the operand from accumulator to specified port.
 E.g.: OUT 0028 H, AX
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LEA Register, Src:
It loads a 16-bit register with the offset
address of the data specified by the Src.
E.g.: LEA BX, [DI]
 This instruction loads the contents of DI
(offset) into the BX register.
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 LDS Des, Src:
 It loads 32-bit pointer from memory source to
destination register and DS.
 The word is placed in the destination register and the
segment is placed in DS.
 This instruction Copies the word at the lower memory
address to the Des reg and the word at the higher
address to the segment reg i.e. DS.
 E.g.: LDS BX, [0301 H]
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 LES Des, Src:
 It loads 32-bit pointer from memory source to
destination register and ES.
 The Word is placed in the destination register and the
segment is placed in ES.
 This instruction is very similar to LDS except that it
initializes ES instead of DS.
 E.g.: LES BX, [0301 H]
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 LAHF:
 It copies the lower byte of flag register to AH.
 SAHF:
 It copies the contents of AH to lower byte of flag register.
 PUSHF:
 Pushes flag register to top of stack.
 POPF:
 Pops the stack top to flag register.
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3. Branch/Program Execution Transfer
Instructions
 These instructions cause change in the sequence of the
execution of instruction.
 This change can be a conditional or sometimes
unconditional.
 The conditions are represented by flags.
80
Branch Instructions
 CALL Des:
 This instruction is used to call a subroutine or function
or procedure.
 The address of next instruction after CALL is saved onto
stack.
 RET:
 It returns the control from procedure to calling program.
 Every CALL instruction should have a RET.
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Branch Instructions
 JMP Des:
 This instruction is used for unconditional jump from
one place to another.
 Jxx Des (Conditional Jump):

 All the conditional jumps follow some conditional
statements or any instruction that affects the flag.
82
Conditional Jump Table
Mnemonic Meaning Jump Condition
JA Jump if Above CF = 0 and ZF = 0
JAE Jump if Above or Equal CF = 0
JB Jump if Below CF = 1
JBE Jump if Below or Equal CF = 1 or ZF = 1
JC Jump if Carry CF = 1
JE Jump if Equal ZF = 1
JNC Jump if Not Carry CF = 0
JNE Jump if Not Equal ZF = 0
JNZ Jump if Not Zero ZF = 0
JPE Jump if Parity Even PF = 1

83
Loop Instructions
 Loop Des:
 This is a looping instruction.
 The number of times looping is required is placed in the
CX register.
 With each iteration, the contents of CX are
decremented.
 ZF is checked whether to loop again or not.
84
Program Execution Transfer Instructions
 INTO (Interrupt on overflow):
 This instruction generates type 4 interrupt (i.e.
interrupt for overflow) and causes the 8086 to do an
indirect far call a procedure which is written by the
user to handle the overflow condition.
 IRET
 To return the execution to the interrupted program
85
4. Machine Control
Instructions
Machine Control Instructions
HLT (Halt) :- It causes the processor to enter in to the halt
state.
NOP (No Operation) :- It causes the processor to enter in
to the wait state for 3 Clock cycles.
WAIT :- wait for TEST pin to go LOW
LOCK :- This instruction prevents other processors to
take the control of shared resources. For e.g LOCK IN
AL,80H
ESC:- escape to external devices like co processor
5. Flag Manipulation
Instructions
Flag Manipulation Instructions
 STC:
 It sets the carry flag to 1.
 CLC:
 It clears the carry flag to 0.
 CMC:
 It complements the carry flag.
89
 STD:
 It sets the direction flag to 1.
 If it is set, string bytes are accessed from higher memory
address to lower memory address.
 CLD:
 It clears the direction flag to 0.
 If it is reset, the string bytes are accessed from lower
memory address to higher memory address.
90
 STI:
 It sets the Interrupt flag to 1.
 CLI:
 It clears the Interrupt flag to 0.
91
6. Shift And Rotate Instructions
Shift And Rotate Instructions
 SHL/SAL Des, Count:
 It shift bits of byte or word left, by count.
 It puts zero(s) in LSBs.
 MSB is shifted into carry flag.
 If the number of bits desired to be shifted is 1, then the
immediate number 1 can be written in Count.
 However, if the number of bits to be shifted is more than
1, then the count is put in CL register. And recent bit to
the CF (Carry flag)
93
 SHR/SAR Des, Count:
 It shift bits of byte or word right, by count.
 It puts zero(s)(for SHL) and Sign bit (for SAL) in MSBs.
 LSB is shifted into carry flag.
the CF (Carry flag)
94
 ROL Des, Count:
 It rotates bits of byte or word left, by count.
 LSB is transferred to MSB and also to CF.
the CF (Carry flag)
95
 ROR Des, Count:
 It rotates bits of byte or word right, by count.
 MSB is transferred to LSB and also to CF.
the CF (Carry flag)
96
 RCR Des, Count:
 It rotates bits of byte or word right, by count.
 LSB to MSB then MSB is transferred to CF and CF to
LSB.
the CF (Carry flag)
97
 RCL Des, Count:
 It rotates bits of byte or word left, by count.
 MSB to LSB then LSB is transferred to CF and CF to
MSB.
the CF (Carry flag)
98
7. String Manipulation
Instructions
String Manipulation
Instructions
 String in assembly language is just a sequentially
stored bytes or words.
 There are very strong set of string instructions in 8086.
 By using these string instructions, the size of the
program is considerably reduced.
100
8086 Microprocessor
String Manipulation Instructions

 String : Sequence of bytes or words
 8086 instruction set includes instruction for string movement, comparison, scan, load and
store.
 REP instruction prefix : used to repeat execution of string instructions
 String instructions end with S or SB or SW. S represents string, SB string byte and
SW string word.
 Offset or effective address of the source operand is stored in SI register and that of the
destination operand is stored in DI register.
 Depending on the status of DF, SI and DI registers are automatically updated.
 DF = 0  SI and DI are incremented by 1 for byte and 2 for word.
 DF = 1  SI and DI are decremented by 1 for byte and 2 for word.
101
String Manipulation
Instructions
 MOVS / MOVSB / MOVSW:
 It causes moving of byte or word from one string to
another.
 In this instruction, the source string is in Data Segment
referred by DS:SI and destination string is in Extra
Segment referred by ES:DI.
 For e.g. movs str1,str2
 Movsb
 Movsw
102
String Manipulation
Instructions
 LODS / LODSB / LODSW:
 It causes TRANSFER of byte or word from one string to
another.
 In this instruction, the source string is in Data Segment
referred by DS:SI transferred to Accumulator.
 For e.g. lods string
 lodsb
 lodsw
103
String Manipulation
Instructions
 STOS / STOSB / STOSW:
It causes TRANSFER of byte or word from one string to
another.
In this instruction, the string is in Extra Segment referred by
ES:DI transferred to Accumulator.
 For e.g. stos string
 stosb
 stosw
104
String Manipulation
Instructions
 CMPS Des, Src:
 It compares the string bytes or words.
 SCAS String:
 It scans a string.
 It compares the String with byte in AL or with word in
AX.
105
String Manipulation
Instructions
 REP (Repeat):
 This is an instruction prefix.
 It causes the repetition of the instruction until CX
becomes zero.
 E.g.: REP MOVSB
 It copies byte by byte contents.
 REP repeats the operation MOVSB until CX becomes zero.
106
8086 Microprocessor
String Manipulation
Instructions
REP
REPZ/ REPE While CX  0 and ZF = 1, repeat execution of

string instruction and
(Repeat CMPS or SCAS (CX)  (CX) – 1
until ZF = 0)
REPNZ/ REPNE While CX  0 and ZF = 0, repeat execution of

string instruction and
(Repeat CMPS or SCAS (CX)  (CX) - 1
until ZF = 1)
107

8086 Microprocessor: Dr. E.Sathish SENSE

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8086 microprocessor

Dr. E.Sathish SENSE

• BIU sends out addresses, fetches

• EU tells BIU where to fetch the

• BIU and EU functions separately.

Interrupt enable Auxiliary Carry

Sign Flag Zero Flag Parity Flag

Direction Flag Interrupt Flag

• Normally used for storing temporary results

• All 16 bits wide, L/H bytes are not accessible

• Used as memory pointers

• IP is not under direct control of the programmer

Source Index (SI) and Destination Index (DI)

Used in indexed addressing.

Instructions that process data strings use the SI and DI

4. Register Indirect Addressing

7. Based Index Addressing

9. Direct I/O port Addressing

11. Relative Addressing Group IV : Relative Addressing mode

12. Implied Addressing Group V : Implied Addressing mode

5. Based Addressing MOV CL, DH

6. Indexed Addressing The content of 8-bit register DH is moved to

9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

2. Immediate Addressing Example:

3. Direct Addressing MOV DL, 08H

7. Based Index Addressing

10. Indirect I/O port Addressing (AX)  0A9FH

11. Relative Addressing

12. Implied Addressing

Addressing Modes : Memory Access

However, the largest register is only 16 bits

Physical Address will have to be calculated Physical Address :

Memory Address represented in the form – Seg : Offset (Eg

Each time the processor wants to access memory, it takes the

89AB : F012  89AB  89AB0 (Paragraph to byte  89AB x 10 = 89AB0)

5. Based Addressing The effective address is just a 16-bit number

Addressing Modes data

1. Register Addressing In Register indirect addressing, name of the

3. Direct Addressing Registers used to hold EA are any of the following

Addressing Modes data

1. Register Addressing In Based Addressing, BX or BP is used to hold the

5. Based Addressing When BX holds the base value of EA, 20-bit

(AX)  (MA) or,

Addressing Modes data

1. Register Addressing SI or DI register is used to hold an index value for

5. Based Addressing In case of 8-bit displacement, it is sign extended

7. Based Index Addressing

(CX)  (MA) or,

Addressing Modes data

1. Register Addressing In Based Index Addressing, the effective address

8. String Addressing EA = (BX) + (SI) + 000AH

10. Indirect I/O port Addressing (DX)  (MA) or,

11. Relative Addressing (DL)  (MA)

Addressing Modes data

1. Register Addressing Employed in string operations to operate on string

7. Based Index Addressing

11. Relative Addressing Calculation of destination memory location:

Note : Effective address of the (MAE)  (MA)

Addressing Modes ports