SDA SW Block Description

SDA SW-Block Description Version of Description: 5.
19
SDA SW-Block Description "AT Basic Blocks", "AT_LIB"
Purpose of this document is

- To describe the blocks from SDA AT_Basic_Blocks and AT_Lib
- Inform if a SW-Library function for 32 Bit exists, that can be used to implement a SDA – block
- To propose an implementation in SW of these blocks, that do not have any corresponding SW-library function so far
- To give some advice, how to use the blocks in order to be able to create efficient SW
Reference: SDA-Release 8.0

SDA-Release 7.1
SDA-Release 7.0
SDA-Release 6.3
SDA-Release 6.2
SDA-Release 6.1
SDA-Release 6.0
SDA-Release 5.2
Math_V035
Calm_V0122
Calm_V0123
MathF32 (Spec version 1.2)
CalmF32 (Spec version 1.4)
Bitop_001_1
SDA_SW_Block_Description.Docx, 21.02.14 Page: 1/149

SDA SW-Block Description Version of Description: 5.19
Library structure
SDA-Block Library SW Library
AT_Basic_Blocks
Automotive Blockset
Discret
Math ECMATH
(elementary
Highpass, Lowpass mathematical
operations)
.
.
.
AT_LIB CALMLIB
Calibration data (calibration data
handling handling)
General remarks for all block versions:
SDA:
 With SDA 6.2 the following blocks are added: MathFunction and Trigonom (AT_Basic_Blocks)
 With SDA 6.1 a new block DTC_F32 (AT_Lib) are added.
 With SDA 6.0 for some blocks it is possible to insert DataType-Conversion-blocks for in- and outports.
 With SDA 6.0 the block version-numbers goes from V5.x to V7.x
 With SDA 5.2 all blocks have been reworked for optimized auto code generation without change of the basic functionality, but sometimes with different Icons and
different numbers of in- and outports (block version goes from V5.x to V6.x).
 The description shall help to understand the behavior of the block. If there are any doubts, refer to the implementation in SDA.

 Only blocks, which are in “AT_BASIC_Blocks”, “AT_LIB” and "AT_Extended_Lib" are allowed to be used in SDA models.
 The effort of implementing matrix operations (e.g. cross product) is too high and must be avoided.
 Block properties that change the functional block behavior are displayed either in or below the pictogram of the block.
 A function within SDA is a “triggered block” and is more like a “contraction” than a C-function with passing parameters. The term “function call” in SDA is confusing for SW-
developers.
 Matlab/Simulink blocks start executing the Run-Code at start of simulation, if they are not in a triggered sub-system.
Since SDA is based on triggered sub-systems, all blocks execute the "System-init-code" once at start of simulation and start the execution of "Run-Code" with the next trigger (e.g.
after 10ms)!
 From SDA 5.0 on the blocks show their PVCS-Version number for identification.
A functional change in a block is indicated by an update of the main version number (e.g. V 6.4 -> V 7.0).
A block change without impact on block functionality is indicated by an update of the minor version number (e.g. V 5.4 -> V 5.5).
 Implementation of all blocks, which contain dT, is not straight forward, since there is usually no hexadecimal representation of dT specified.
The strategy is to avoid additional calculations on target system, e.g. LowpassKRE: Calculate m=K*dT and use DigitalLowpassRE in SW (also as calibration constant, as long as
there is no tool based treatment possible).
 For Timers, dT shall be given externally (if not – dT is the sampling time, with which the block is triggered; remark: this must be measured in case the trigger is not periodic or not
constant –e.g. segment synchronous).
The resolution of all input and output data shall respect the timer resolution to minimize the calculation effort.
 StopWatch with high resolution should not be used, because it is difficult to implement this on target, since it requires access to the high-resolution internal clock frequency, which
may be target dependent, at least not free to be defined.
It is open how the requirement can be transferred to I/O SW (IRS – implementation in SDA) and how it can be implemented in I/O SW. The usage should be restricted to IRS.
StopWatch with the model resolution can be used, if required. “dT” must be given externally and the output “cnt” must respect the resolution of dT to avoid additional calculations.
 Signal lines labeled with x_1 usually refer to x[n-1]!
 All blocks show the version of the block either in the icon, or below.
SW-Implementation:
 Vector operations are not possible in SW and must be implemented as loops! In order to keep the model compact vectors should be used.
 LIB functions in SW usually treat 2 parameters not “n” as possible within SDA.
 Complex and flexible blocks with a lot of inputs (i.e. configuration parameters), which can be customized by setting inputs to e.g. to 0, should not be implemented as one function,
since a simple specific block can be implemented much more runtime efficient (e.g. “DifferenceLimiter”).
 The Initialization of all SDA-Blocks is usually not done by the corresponding SW library function, but must be implemented separately by manual C-code.
 The SW-library functions, given for a certain block are hints what could be appropriated. Anyway, it is up the SW-developer to decide upon the correct usage of the appropriate SW-
library functions case by case.
 The given Pseudo Code cannot be taken 1:1 to implement a block. It has to be adjusted to the integer behavior of the model.
 Indices starting with 1 in Simulink shall start with 0 in SW (watch-out: from SDA 5.0 on a lot of blocks allow optional indices starting from 0!).
General remarks for block version 5.x (SDA_5.0 not SDA_5.2!):

 All blocks are implemented with the same architecture in SDA: The real functionality can be found in the "run" subsystem
reset
Out
Chart_RE
finalize Pass
reset
Out
Pass
Chart_RE
finalize

 Some blocks can exist in two versions (only SDA version before 5.2): multirate and singlerate, the block functionality remains the same in both versions.
The multirate version with R_FC (reset function call) and CLC_FC (calculation function call) inputs should originally be used, if a system reset shall be simulated.
This reset function (R_FC) only resets block internal data and not the output data.
The following picture shows an example of a block in its both versions:
But according to a decision of the reset working group in Sep. 2004, multirate blocks shall not be used any more to initialize data storages!
 Some blocks can have also inputs and outputs, that allow access to the internal data of a block: x_in and x_out. From SDA 5.2 on these ports are always visible. In prior SDA-
releases they could be removed - in this case x_in and x_out are internally connected.
According to a decision of the reset working group in Sep. 2004, the R_FC is not used to initialize internal states of a block.
Internal storages of blocks are initialized on the top level of the model using the ports x_in and x_out.
 Some blocks can have optional inputs and outputs, that can be removed when not needed! This leads to a different block design:
General remarks for block version 6.x:
 No change in functional behaviour of blocks from V.5.0 to V.5.2!

 Support mode switch between floating point, scaled float and fixed point simulation mode
 Internal settings and implementation optimized for Automatic Code Generation
 Multirate option removed from Automotive Blockset library (R_FC and CLC_FC removed).

 Adaptation to ASAM MBFS V1.0: Order of inputs and outputs changed for some blocks; Icons changed for some blocks
General remarks for block version 7.x:
 Blocks that convert input- and/or output-data-types under their masks can be found via the SDA-Model-Advisor-Rule:
"Find blocks with inserted Conversion Blocks on Ports"

Index
1) ArithmeticOperators
2) ComparisonOperator
3) MathematicalFunctions
4) CounterAndTimer
5) Delay Blocks (e.g. Z-1)
6) Integrators and "Σ"
7) Logical Operators
8) LowAndHighpass
9) Math Blocks
10) Memory Blocks / falling and rising edges / Flipflops
11) Nonlinear Blocks (e.g. Limit)
12) Nonlinear (e.g. Switch)
13) Signals & systems (e.g. for/while-loops, MUX, Actions)
14) AT_EXTENDED_LIB (PI, PID Controller)
15) Basic Algorithms (DT1, Mean_value, Fading)
16) Calibration Data Handling
17) Control Structures
18) Signal Types
19) Signals (Bus-Merge, Branch, Case-Multiport-Switch, Feedthrough)
20) Simulation data handling
21) Vectors and Matrices (Array-Handling, DirectLookup, Bit Operations)

Arithmetic Operators
Icon Description Pseudo code SW Implementation Comment Manual Comment
SW Implementation Automatic Code
Generation
Mul
y = u1*u2*u3…*un  s16_mul_s16_u16
 s16_mul_s16_s16_facX
SW LIB only provides
 s16_mul_s16_u16_facX functions for 2 parameters.
 s16_mul_u16_u16_fac256
 s32_mul_s16_s16 For more parameters a
 s32_mul_s32_s8_facW description of the
 s32_mul_s16_u16
V. 5.0
 s32_mul_s32_s32 intermediate result is
 s32_mul_s32_u16 required. -> therefore only 2
 s32_mul_s32_u8_facW
 s32_mul_u32_s32 parameters allowed.
Valid till V.5.x  u16_mul_u16_u16
 u16_mul_u16_u16_facX
Depending on overflow
 u16_mul_u16_u8_facY possibility, a standard C-
 u32_mul_s32_s32
 u32_mul_u16_u16 Implementation is possible.
 u32_mul_u32_s16_facW Number of block inputs are
 u32_mul_u32_s32_facW
 u32_mul_u32_s8_facW limited to 2 numerators.
 u32_mul_u32_s32
 u32_mul_u32_u16
 u32_mul_u32_u16_facW
 u32_mul_u32_u32
 u8_mul_u8_u8_facY
 s8_mul_s8_u8_facY
 s32_mul_s32_s16_facW
W = 05,1,2
X = 0125,025,05,1, 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096
Y = 0125,025,05,1,2, 4, 8, 16, 32, 64, 128
 Z = 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096

y = u1 *u2  s16_mul_s16_u16
Does the multiplication of the two  s16_mul_s16_s16_facX
input values.  s16_mul_s16_u16_facX
 s16_mul_u16_u16_fac256
Port I/O Description  s32_mul_s16_s16
u1 In Source signal  s32_mul_s32_s8_facW
u2 In Source signal  s32_mul_s16_u16
y Out Output signal
Valid till V.6.x  s32_mul_s32_s32
 s32_mul_s32_u16
 s32_mul_u32_s32
 u16_mul_u16_u16
 u32_mul_s32_s32
 u32_mul_u16_u16
 u32_mul_u32_s32
 u32_mul_u32_u16
 u32_mul_u32_u32
W = 05,1,2
X = 0125,025,05,1, 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096
Y = 0125,025,05,1,2, 4, 8, 16, 32, 64, 128
 Z = 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096

y = u1 *u2  s16_mul_s16_u16 If SW-Lib is selected in ACG-Tab

Does the multiplication of the two  s16_mul_s16_s16_facX on Block-Mask the following
input values.  s16_mul_s16_u16_facX routines can be used:
 s16_mul_u16_u16_fac256
Port I/O Description  s32_mul_s16_s16  s8_mul_s8_u8_fac1
u1 In Source signal  s8_mul_s8_u8_fac2
V. 7.3  s32_mul_s32_s8_facW
u2 In Source signal  s16_mul_s16_s16_fac1
 s32_mul_s16_u16  s16_mul_s16_s16_fac2
y Out Output signal
 s32_mul_s32_s32  s16_mul_s16_u8_fac1
 s32_mul_s32_u16  s16_mul_s16_u8_fac2
Valid till V.8.x  s32_mul_s32_u8_facW  s16_mul_s16_u16_fac1
 s32_mul_u32_s32  s16_mul_s16_u16_fac2
 u16_mul_u16_u16  u8_mul_u8_u8_fac1
 u8_mul_u8_u8_fac2
 u16_mul_u16_u8_facY  u16_mul_u16_u8_fac2
 u32_mul_s32_s32  u16_mul_u16_u16_fac1
 u32_mul_u32_s16_facW  u32_mul_u32_u16_fac1
 u32_mul_u32_s32_facW  u32_mul_u32_u16_fac2
 u32_mul_u32_s8_facW  u32_mul_u32_s16_fac1
 u32_mul_u32_s16_fac2
 u32_mul_u32_s32
 u32_mul_u32_u16_facW  u32_mul_u32_s32_fac1
 u32_mul_u32_u32_facW  u32_mul_u32_s32_fac2
 u32_mul_u32_u8_facW  s32_mul_s32_u16_fac1
 u32_mul_u32_u32  s32_mul_s32_u16_fac2
 u8_mul_u8_u8_facY  s32_mul_s32_s16_fac1
 s32_mul_s32_s16_fac2
 s32_mul_s32_u32_fac1
 s16_mul_s16_u8_facY  s32_mul_s32_u32_fac2
 s32_mul_s32_u16_facW  s32_mul_s32_u32_fac05
 s32_mul_s32_s16_facW  s32_mul_s32_s32_fac1
 s32_mul_s32_u32_facW  s32_mul_s32_s32_fac2
 s32_mul_s32_s32_facW  s32_mul_s32_s32_fac05
W = 05,1,2
X = 0125,025,05,1, 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096  s32_mul_s32_u8_fac2
Y = 0125,025,05,1,2, 4, 8, 16, 32, 64, 128  s32_mul_s32_s8_fac1
 Z = 2, 4,8,16,32,64,128,256,  s32_mul_s32_s8_fac2
512,1024, 2048,4096  s16_mul_s16_u16
 s16_mul_u16_u16_fac256
 s32_mul_s16_u16
 s32_mul_s32_u16
 u32_mul_u32_u16
 u16_mul_u16_u16
 u32_mul_u16_u16
 s32_mul_s16_s16
 u32_mul_u32_s32

 u32_mul_s32_s32
 u32_mul_u32_u32
 s32_mul_u32_s32
 s32_mul_s32_s32
 s16_mul_s16_s16_fac0125
 s16_mul_s16_s16_fac025
 s16_mul_s16_s16_fac05
 s16_mul_s16_s16_fac16
 s16_mul_s16_s16_fac32
 s16_mul_s16_s16_fac64
 s16_mul_s16_s16_fac128
 s16_mul_s16_s16_fac256
 s16_mul_s16_s16_fac512
 s16_mul_s16_s16_fac1024
 s16_mul_s16_s16_fac2048
 s16_mul_s16_s16_fac4096
 s16_mul_s16_u8_fac0125
 s16_mul_s16_u8_fac025
 s16_mul_s16_u8_fac128
 s16_mul_s16_u16_fac0125
 s16_mul_s16_u16_fac025
 s16_mul_s16_u16_fac05
 s16_mul_s16_u16_fac16
 s16_mul_s16_u16_fac32
 s16_mul_s16_u16_fac64
 s16_mul_s16_u16_fac128
 s16_mul_s16_u16_fac256
 s16_mul_s16_u16_fac512
 s16_mul_s16_u16_fac1024
 s16_mul_s16_u16_fac2048
 s16_mul_s16_u16_fac4096

 u16_mul_u16_u8_fac0125
 u16_mul_u16_u8_fac025
 u16_mul_u16_u8_fac128
 u16_mul_u16_u16_fac0125
 u16_mul_u16_u16_fac025
 u16_mul_u16_u16_fac05
 u16_mul_u16_u16_fac16
 u16_mul_u16_u16_fac32
 u16_mul_u16_u16_fac64
 u16_mul_u16_u16_fac128
 u16_mul_u16_u16_fac256
 u16_mul_u16_u16_fac512
 u16_mul_u16_u16_fac1024
 u16_mul_u16_u16_fac2048
 u16_mul_u16_u16_fac4096'
 u32_mul_u32_u16_fac05
 u32_mul_u32_s16_fac05
 u32_mul_u32_u32_fac05
 u32_mul_u32_s32_fac05
 s32_mul_s32_u16_fac05
 s32_mul_s32_s16_fac05

Div
Y = u1*u2*u3…*un / (z1*z2…zm)  s16_fac05_div_s16_s16 Depending on overflow possibility, a
 s16_fac05_div_s16_u16 standard C-Implementation is
 s16_div_s16_u16_shl0 possible.
 s16_div_s32_s16 Number of block inputs are
V. 5.0  s16_div_s32_u32 limited to 2 numerators and 1
 s16_mul_s16_s16_div_s16 divisor.
Valid till V.5.x  s16_mul_s16_s16_div_u16
 s16_mul_s16_u16_div_s16
 s16_mul_u16_s16_div_u16
 s32_div_s32_s32
 s32_div_s32_u32
 s32_div_u32_s32
 s32_mul_s32_s32_div_s32
 s32_mul_s32_s32_div_u32
 s32_mul_u32_s32_div_s32
 s32_mul_u32_s32_div_u32
 u16_div_s32_u16
 u16_div_u32_u16
 u16_mul_s16_u16_div_s16
 u16_mul_s16_u16_div_u16
 u16_mul_u16_u16_div_u16
 u32_div_s32_s32
 u32_div_s32_u32
 u32_div_u32_s32
 u32_div_u32_u16
 u32_div_u32_u32
 u32_mul_u32_s32_div_s32
 u32_mul_u32_s32_div_u32
 u32_mul_u32_u32_div_s32
 u8_div_u16_u16
 u16_fac1_div_u16_u16
Y =u1 / u2  s16_mul_s16_u16
Does the Division of the two input  s16_mul_s16_s16_facX
values.  s16_mul_s16_u16_facX
 s16_mul_u16_u16_fac256
Port I/O Description  s32_mul_s16_s16
u1 In Source signal  s32_mul_s32_s8_facW
u2 In Source signal  s32_mul_s16_u16
Valid till V.6.x Y Out Output signal
 s32_mul_s32_s32
 s32_mul_s32_u16
 s32_mul_u32_s32

 u16_mul_u16_u16
 u32_mul_s32_s32
 u32_mul_u16_u16
 u32_mul_u32_s32
 u32_mul_u32_u16
 u32_mul_u32_u32
W = 05,1,2
X = 0125,025,05,1, 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096
Y = 0125,025,05,1,2, 4, 8, 16, 32, 64, 128
 Z = 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096
Y =u1 / u2  s16_mul_s16_u16 If SW-Lib is selected in ACG-Tab

Does the Division of the two input  s16_mul_s16_s16_facX on Block-Mask the following
values.  s16_mul_s16_u16_facX routines can be used:
 s16_mul_u16_u16_fac256
Port I/O Description  s32_mul_s16_s16  s16_fac05_div_s16_s16
V. 7.2 u1 In Source signal  s32_mul_s32_s8_facW  s16_div_s32_s16
u2 In Source signal  s32_mul_s16_u16  s16_fac05_div_s16_u16
Y Out Output signal
 s32_mul_s32_s32  u8_fac1_div_u16_u16
 s32_mul_s32_u16  u16_div_s32_u16
Valid for >= V.7.x  s32_mul_s32_u8_facW  u16_fac1_div_u16_u16
 s32_mul_u32_s32  u16_div_u32_u16
 u16_mul_u16_u16  u32_div_u32_u16
 u16_mul_u16_u16_facX  u32_div_u32_s32
 u16_mul_u16_u8_facY  u32_div_s32_u32
 u32_mul_s32_s32  u32_div_s32_s32
 u32_mul_u16_u16  u32_div_u32_u32
 u32_mul_u32_s16_facW  s32_div_u32_s32

 u32_mul_u32_s32_facW  s32_div_s32_u32
 u32_mul_u32_s8_facW  s32_div_s32_s32
 u32_mul_u32_s32  s16_div_s32_u32
 u32_mul_u32_u16
 u32_mul_u32_u32
W = 05,1,2
X = 0125,025,05,1, 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096
Y = 0125,025,05,1,2, 4, 8, 16, 32, 64, 128
 Z = 2, 4,8,16,32,64,128,256,
512,1024, 2048,4096
Neg
y = -u  s8_sub_s8_s8 There is no special library function to
Does the negation of the given  s8_sub_s8_u8 negate values.
value.  s8_sub_u8_u8 The usage of standard C “-“ operator
 u8_sub_u8_s8 is dangerous, since it does not treat
 u16_sub_u16_s16 any overflow.
Port I/O Description  s16_sub_s16_s16 examples (using ‘-‘ operator):
u In source signal  s16_sub_s16_u16 -(s8)0x81 -> (s8)0x7F
y Out Output signal -(s8)0x80 -> (s8)0x80, not 0x7F
Valid for >= V.5.x  s16_sub_u16_s16
 s16_sub_u16_u16
 s32_sub_s32_s32 The “sub” library functions can be
 s16_sub_u32_u32 used to negate signed, unsigned
 s32_sub_u32_s32 values with respect of the limitations
 s32_sub_s32_u32 of the target value:
 s32_sub_u32_u32 example:
 u32_sub_u32_s32 0x7F = s8_sub_u8_u8 (0,0x80)
 u32_sub_s32_s32

Gain
y = K*u; Implementation as standard C-code! For this block, there is no SW
Only factor 1 allowed in SDA implementation required, since only
models. factor of 1 is allowed.
For all other factors a mul block is
required.
Obsolete with SDA

5.3
Product of elements
Implementation as standard C-code! Problem with this block is that the
Vector scalar product of all vector y=1; resolution of the intermediate result
elements: Number of elements is for (i = 0; i<max; i++) is not defined.
"max" y = y*u[i]; Therefore it should be avoided.
The only reasonable usage seems
Obsolete with y = ui to be the product of factors.
SDA 5.2
Sum
If one input is negated, subtraction y = u1+u2+…un  s16_add_s16_s16 Vectors not supported by SW LIB
lib can be taken  s16_add_s16_s16_s16 Must be implemented as loops!
 s16_add_u16_s16 An add with more than 2 input
 s16_sub_s16_s16 values is possible in Matlab, but not
 s16_sub_s16_u16 for all data types a SW-lib function is
 s16_sub_u16_s16 available.
 s16_sub_u16_u16 If more than 2 inputs are required,
this should be discussed with the
 s16_sub_u32_u32
Port I/O Description SW developer.
 s32_add_s32_s32_s32
u1 In Source signal Whenever possible standard C-
 s32_add_s32_s32 operators should be used (32bit) for
u2 In Source signal  s32_add_u32_s32
y Out Output signal more than one input with final
 s32_sub_s32_s32 limitation, when an exactly fitting
 s32_sub_s32_u32 SW-lib function does not exist, in
 s32_sub_u32_s32 order to get the most efficient code.
 s32_sub_u32_u32
 s8_add_s8_s8
 s8_add_u8_s8

 s8_sub_s8_u8
 s8_sub_u8_u8
 u16_add_u16_s16
 u16_add_u16_u16
 u16_add_u16_u16_u16
 u16_add_u16_u16_u16_u16
 u16_sub_u16_s16
 u16_sub_u16_u16
 u16_sub_u32_u32
 u32_add_s32_s32
 u32_add_u32_s32
Valid for: V.5.x,  u32_add_u32_u32
V.6.x  u32_add_u32_u32_u32
 u32_sub_s32_s32
 u32_sub_u32_s32
 u32_sub_u32_s32
 u32_sub_s32_u32
 u32_sub_u32_u32
 u8_add_u8_s8
 u8_add_u8_u8
 u8_sub_u8_u8
If one input is negated, subtraction y = u1+u2+…un  s16_add_s16_s16 Vectors not supported by SW LIB If SW-Lib is selected in
+
lib can be taken  s16_add_s16_s16_s16 Must be implemented as loops!
ACG-Tab on Block-Mask
+  s16_add_u16_s16 An add with more than 2 input
V. 7.2  s16_sub_s16_s16 values is possible in Matlab, but not the following routines can
+
 s16_sub_s16_u16 for all data types a SW-lib function is be used:
–  s16_sub_u16_s16 available.
V. 7.2  s16_sub_u16_u16 If more than 2 inputs are required,  's8_add_s8_s8'
this should be discussed with the 
–  s16_sub_u32_u32 's8_add_u8_s8'
Port I/O Description SW developer. 
+  s32_add_s32_s32_s32 's16_add_s16_s16'
Whenever possible standard C-
u1 In Source signal  s32_add_s32_s32  's16_add_u16_s16'
V. 7.2 u2 In Source signal operators should be used (32bit) for
 s32_add_u32_s32  's32_add_s32_s32'
y Out Output signal more than one input with final

  s32_sub_s32_s32 limitation, when an exactly fitting 'u8_add_u8_s8'
 s32_sub_s32_u32 SW-lib function does not exist, in  'u8_add_u8_u8'
V. 7.2  s32_sub_u32_s32 order to get the most efficient code.  'u16_add_u16_u16'
 s32_sub_u32_u32  'u16_add_u16_s16'
 s8_add_s8_s8  'u32_add_u32_u32'
Valid for >= V.7.x  s8_add_u8_s8  'u16_add_u16_u16_u16'
 s8_sub_s8_u8  'u16_add_u16_u16_u16
 s8_sub_u8_u8 _u16'
 u16_add_u16_s16  's16_add_s16_s16_s16'
 u16_add_u16_u16  'u32_add_u32_s32'
 u16_add_u16_u16_u16  'u32_add_s32_s32'
 u16_add_u16_u16_u16_u16  's32_add_u32_s32'
 u16_sub_u16_s16  'u32_add_u32_u32_u32'
 u16_sub_u16_u16  's32_add_s32_s32_s32'
 u16_sub_u32_u32  's8_sub_s8_u8'

ComparisonOperators
Generation
 u32_add_s32_s32  's8_sub_u8_u8'
 u32_add_u32_s32  's16_sub_s16_s16'
 u32_add_u32_u32  's16_sub_s16_u16'
 u32_add_u32_u32_u32  's16_sub_u16_s16'
 u32_sub_s32_s32  's16_sub_u16_u16'
 u32_sub_u32_s32  'u8_abs_sub_u8_u8'
 u32_sub_u32_s32  'u8_sub_u8_u8'
 u32_sub_s32_u32  'u16_abs_sub_u16_u16'
 u32_sub_u32_u32  'u16_sub_u16_u16'
 u8_add_u8_s8  'u16_sub_u32_u32'
 u8_add_u8_u8  'u16_abs_sub_s16_s16'
 u8_sub_u8_u8  'u32_sub_u32_u32'
 'u16_sub_u16_s16'
 's32_sub_s32_s32'
 's16_sub_u32_u32'
 'u32_sub_u32_s32'
 'u32_sub_s32_u32'
 'u32_sub_s32_s32'
 'u32_abs_sub_u32_u32'
 's32_sub_u32_s32'
 's32_sub_s32_u32'
 's32_sub_u32_u32'
 's32_abs_sub_s32_s32'
 's8_sub_s8_s8'
 'u8_sub_u8_s8'

EQ: Implementation as standard C-code No Library necessary

y = (u1 == u2); C standard!
Port I/O Description
u1 In Source signal NEQ :
u2 In Source signal y = (u1 != u2);
y Out Output signal
GT:
y =(u1 > u2);
GE:
y =(u1 >= u2);
LT:
y = (u1 < u2);
LE:
y = (u1 <= u2);
Valid for >= V.5.x

Interval
Output is true, if the value is in range CLOSE INTERVAL: Implementation as standard C-code!
not max/min value returned!
If ((MN <= u)&&(u <= MX))
Port I/O Description y= 1;
u In Input signal Else
Closed Interval MX In Maximum value y =0;
MN In Minimum value
y Out Output signal
LEFT OPEN INTERVAL:
If ((MN < u)&&(u <= MX))

y= 1;
LeftOpenInterval Else
y =0;
RIGHT OPEN INTERVAL:
If ((MN <= u)&&(u < MX))

y= 1;
RightOpenInterval
Else
y =0;
OPEN INETRVAL:
Open Interval If ((MN < u)&&(u < MX))
y= 1;
Else
y =0;
Valid for >= V.5.x

MathematicalFunctions
Generation
Two_Power_n
Calculates the power of 2  * (standard C command) Only 2z allowed
y = 2v;  / (Sandard C-command) (z: integer)
(v: integer) -> multiplication, division  u16_exp2_u16_u8
by 2  s16_exp2_s16_s8
 u8_lsl_u8_u8
 u16_lsl_u16_u8
 u32_lsl_u32_u8
u In: First input: source signal (=2)
 u64_lsl_u64_u8
v In: Second input: Power (integer)  u8_lsr_u8_u8
y Out: Output signal (real)  u16_lsr_u16_u8
 u32_lsr_u32_u8
 u64_lsr_u64_u8
Obsolete with SDA example: 2z

5.3 u8_lsl_u8_u8(1, z)
Use *_lsl_* for z>0 and

*_lsr_* for z<0 !
Attention:
If the shift count is higher than the
data size, the output is set to ZERO!
SquareRoot
Calculates square root Y = Sqrt(u); u16_sqrt_u32 From SW point of view, this function
can be used, if it can be
implemented with the library function
u16_sqrt_u32.
u In Source signal (real)
For all other manual
y Out Output signal (real)
implementations, the micro
Obsolete with SDA performance is not enough.
6.0

Square
Calculates the square See multiplication Use multiplication functions.
y = u2 ; If required often: Create Macro that
Port I/O Description uses basic multiplication function.
u In Source signal (real) From SW-point of view, this function
y Out Output signal (real) can be used.
Obsolete with SDA
6.0

CounterAndTimer
Icon Description Pseudo code SW Comment Manual Comment
Implementation SW Implementation Automatic Code
Generation
CountDown_RE
Output is true, if the number of block System-Init-Code reset(): No library function available. Multirate (asynchronous to the
evaluations since the last reset is less than x = 0; x = round(IV); Block is implemented as normal trigger rate) is required only
the initial number of block evaluations IV. y = 0; manual C-code. for simulation of system reset and
cnt = 0; run(): has no other SW relevance!
Port I/O Description if (x > 0) IV is supposed to be integer on
E In 0: Suppresses the block calc. R_FC { target, therefore there is no need for
R In 1: Resets to init values reset(); x = x - 1; implementing "round(IV)"!
IV In Initial value set upon reset }
y Out 0 if counter state is zero CLC_FC It is proposed to define an
Valid till V.5.x cnt Out Internal counter state if (R) finalize(): implementation pattern.
optional ports: { -
R_FC In System reset request reset(); Be aware, that this down
CLC_FC In System calculation request finalize(); out():
counter can be re-
x_in In Direct input of internal state (x) } cnt = x;
x_out Out Direct output of internal state (x) else if (E) y = (x > 0); triggered!
{
run(); pass():
finalize(); x = x;
}
else pass();
out();

Output is true, if the number of block System-Init-Code No library function available. IV is supposed to be integer on
evaluations since the last reset is less than x = 0; if (R) Block is implemented as target, therefore there is no need for
the initial number of block evaluations IV. { x = round(IV); manual C-code. implementing "round(IV)"!
E }
y
R Port I/O Description else if (E) It is proposed to define an
E In 0: Suppresses the block calc. { implementation pattern.
IV R In 1: Resets to init values if (x > 0) { x = x
x_out
x_in IV In Initial value set upon reset - 1; Be aware, that this down
y Out 0 if counter state is zero }
V. 6.2 counter can be re-
x_in In Direct input of internal state (x) y = (x > 0);
x_out Out Direct output of internal state (x) triggered!
Valid for >= V.6.x
CountDownRTE
Output is true, if the number of block System-Init-Code reset(): No library function available. Multirate (asynchronous to the
evaluations since the last reset is less than x = 0; x = round(IV); Block is implemented as normal trigger rate) is required only
the initial number of block evaluations IV. y = 0; manual C-code. for simulation of system reset and
cnt = 0; run(): has no other SW relevance!
Port I/O Description RT_1 = 0; if (x > 0) IV is supposed to be integer on
E In 0: Suppresses the block calc. { target, therefore there is no need for
RT In 0->1: Resets to init values R_FC x = x - 1; implementing "round(IV)"!
IV In Initial value set upon reset reset(); }
Obsolete with SDA y Out 0, if counter state is zero RT_1 = 0; It is proposed to define an
6.0 cnt Out Internal counter state finalize(): implementation pattern.
CLC_FC -
optional ports: if (RT && !RT_1) Be aware, that this down
R_FC In System reset request { out():
counter can be re-
CLC_FC In reset(); cnt = x; System calculation request
x_in In Direct input of internal state (x) finalize(); y = (x > 0); triggered!
x_out Out Direct output of internal state (x) }
else if (E) pass():
{ x = x;
run();
finalize();
}
else pass();
out();
RT_1 = RT;

Output is true, if the number of block System-Init-Code Run Code No library function available. IV is supposed to be integer on
evaluations since the last reset is less than x = 0; Block is implemented as target, therefore there is no need for
the initial number of block evaluations IV. x2 = 0; /* RT[n-1] if (RT && !x2) manual C-code. implementing "round(IV)"!
*/ {
Port I/O Description x = round(IV); It is proposed to define an
E In 0: Suppresses the block calc. } implementation pattern.
RT In 0->1: Resets to init values else if (E)
IV In Initial value set upon reset {
y Out 0, if counter state is zero if (x > 0) Be aware, that this down counter
x_in In Direct input of internal state (x) { can be re-triggered!
Obsolete with SDA x_out Out Direct output of internal state (x) x = x - 1;
6.0 }
}
x2 = RT;
y = (x > 0);
CounterRE
Counts up and outputs the number of block System-Init-Code reset(): No separate library function Multirate (asynchronous to the
evaluations since the last reset. x = 0; x = round(IV); available. normal trigger rate) is required only
y = 0; Block is implemented as for simulation of system reset and
Port I/O Description run(): manual C-code using existing, has no other SW relevance!
E In 0: Suppresses the block calc. R_FC x = x + 1; appropriated matlib functions. IV is supposed to be integer on
R In 1: Resets to init values reset(); target, therefore there is no need for
IV In Initial value set upon reset finalize(): implementing "round(IV)"!
y Out counter value CLC_FC -
Valid till V.5.x if (R) { It is proposed to define an
optional ports: reset(); out(): implementation pattern.
finalize(); y = x;
R_FC In System reset request }
CLC_FC In System calculation request else if (E) { pass():
x_in In Direct input of internal state (x) run(); x = x;
x_out Out Direct output of internal state (x) finalize();
}
else pass();
out();

Counts up and outputs the number of block System-Init-Code Run code No separate library function Multirate (asynchronous to the
evaluations since the last reset. x = 0; available. normal trigger rate) is required only
if (R) Block is implemented as for simulation of system reset and
Port I/O Description { manual C-code using existing, has no other SW relevance!
E In 0: Suppresses the block calc. x = round(IV); appropriated matlib functions. IV is supposed to be integer on
R In 1: Resets to init values } target; therefore there is no need for
IV In Initial value set upon reset else if (E) The usage of a separate implementing "round (IV)"!
y Out counter value } variable for "x" can be avoided
x = x + 1; in SW implementation. Use y It is proposed to define an
Valid for >= V.6.x optional ports: } instead to store the value! implementation pattern.
x_in In Direct input of internal state (x) y = x;
x_out Out Direct output of internal state (x)
Example: During startup, if the number of failed crank starts is greater than threshold value then starter relay will be deactivated in order to stop battery draining completely.
Note: Countdown timer also can be used for the similar purpose.
CounterRTE
The block outputs the time since the system System-Init-Code reset(): No separate library function Multirate (asynchronous to the
init or the last reset x = 0; x = round(IV); available. normal trigger rate) is required only
y = 0; Block is implemented as for simulation of system reset and
Port I/O Description RT_1 = 0; run(): manual C-code using existing, has no other SW relevance!
E In 0: Suppresses the block calc. x = x + 1; appropriated matlib functions IV is supposed to be integer on
RT In 0->1: Resets to init values R_FC target, therefore there is no need for
IV In Initial value set upon reset reset(); finalize(): implementing "round(IV)"!
y Out counter value RT_1 = 0; -
Obsolete with SDA optional ports: It is proposed to define an
6.0 R_FC In System reset request CLC_FC out(): implementation pattern.
CLC_FC In System calculation request if (RT && !RT_1) y = x;
x_in In Direct input of internal state (x) {
x_out Out Direct output of internal state (x) reset(); pass():
finalize(); x = x;
}
else if (E)
{
run();
finalize();
}
else pass();
out();
RT_1 = RT;

The block outputs the time since the system System-Init-Code Run Code No separate library function Multirate (asynchronous to the
init or the last reset x = 0; available. normal trigger rate) is required only
x2 = 0; /* RT[n-1] */ if (RT && !x2) Block is implemented as for simulation of system reset and
Port I/O Description { manual C-code using existing, has no other SW relevance!
E In 0: Suppresses the block calc. x = round(IV); appropriated matlib functions IV is supposed to be integer on
RT In 0->1: Resets to init values } target, therefore there is no need for
IV In Initial value set upon reset else if (E) The usage of a separate implementing "round(IV)"!
y Out counter value { variable for "x" can be avoided
x_in In Direct input of internal state (x) x = x + 1; in SW implementation. Use y It is proposed to define an
x_out Out Direct output of internal state (x) } instead to store the value! implementation pattern.
Obsolete with SDA
x2 = RT;
6.0
y = x;
StopWatchRE
The block outputs the time since the system System-Init-Code reset(): No library function available. If possible “Counter” should be
init or the last reset and resets the block to x = 0; x = 0; Block is implemented as used instead of “Stopwatch”
initial states while R=1. y = 0; manual C-code. Stopwatch with the model resolution
run(): If possible “Counter” should be can be used, if required. “dT” must
Port I/O Description R_FC x = x + dT; used instead of “Stopwatch” be given externally and the output
E In 0: Suppresses the block calc. reset(); “y” must respect the resolution of dT
R In 1: Resets to init values finalize(): to avoid additional calculations.
y Out Time since last reset CLC_FC -
optional ports: if (R) {
Valid till V.5.x R_FC In System reset request reset(); out():
CLC_FC In System calculation request finalize(); y = x;
dT In Sample Time }
x_in In Direct input of internal state (x) else if (E) pass():
x_out Out Direct output of internal state (x) { x = x;
run();
finalize();
}
else pass(); Stopwatch with high resolution is
out(); difficult to implement on target, since
it requires access to the high-
resolution internal clock frequency,
which may be target dependent, at
least not free to be defined.
It is open how the requirement can
be transferred to I/O SW (IRS –
implementation in SDA) and how it
can be implemented in I/O SW. The
usage should be restricted to IRS.
dT has to be given externally!

The block outputs the time since the system System-Init-Code Run Code No library function available. If possible “Counter” should be used
init or the last reset and resets the block to x = 0.0; Block is implemented as instead of “Stopwatch”
initial states while R=1. if (R) manual C-code. Stopwatch with the model resolution
{ If possible “Counter” should be can be used, if required. “dT” must
Port I/O Description x = 0.0; used instead of “Stopwatch” be given externally and the output
E In 0: Suppresses the block calc. } “y” must respect the resolution of dT
R In 1: Resets to init values else if (E) to avoid additional calculations.
y Out Time since last reset }
x_in In Direct input of internal state (x) x = x + dT; Stopwatch with high resolution is
x_out Out Direct output of internal state (x) } difficult to implement on target, since
y = x; it requires access to the high-
Valid for >= V.6.x optional ports: resolution internal clock frequency,
dT In Sample Time which may be target dependent, at
least not free to be defined.
Example:
During vehicle start-up, the Push start button on the dashboard, whenever driver pushes the push button a free stop watch timer will increment.
Once the free timer reaches the calibration time threshold software will treat it as start request from driver. This will avoid faulty startup in case when driver accidentally touches the push start button, but not intended to start the
vehicle.
StopWatchRTE

The block outputs the time since the system System-Init-Code reset(): No library function available. If possible “Counter” should be used
init or the last reset x = 0; x = 0; Block is implemented as instead of “Stopwatch”
and resets the block states to their initial y = 0; manual C-code. Stopwatch with the model resolution
values on rising edge RT 0->1. RT_1 = 0; run(): If possible “Counter” should be can be used, if required. “dT” must
x = x + dT; used instead of “Stopwatch”. be given externally and the output
Port I/O Description R_FC “y” must respect the resolution of dT
E In 0: Suppresses the block calc. reset(); finalize(): to avoid additional calculations.
RT In 0->1: Resets to init values RT_1 = 0; -
y Out Time since last reset Stopwatch with high resolution is
Obosolete with optional ports: CLC_FC out(): difficult to implement on target, since
R_FC In System reset request if (RT && !RT_1) y = x; it requires access to the high-
SDA 6.0 CLC_FC In System calculation request { resolution internal clock frequency,
dT In Sample Time reset(); pass(): which may be target dependent, at
x_in In Direct input of internal state (x) finalize(); x = x; least not free to be defined.
x_out Out Direct output of internal state (x) } It is open how the requirement can
else if (E) be transferred to I/O SW (IRS –
{ implementation in SDA) and how it
run(); can be implemented in I/O SW. The
finalize(); usage should be restricted to IRS.
} dT has to be given externally!
else pass();
out();
RT_1 = RT;

The block outputs the time since the system System-Init-Code Run Code No library function available. If possible “Counter” should be used
init or the last reset x= 0.0; Block is implemented as instead of “Stopwatch”
and resets the block states to their initial x2 = 0; /* RT[n-1] */ if (RT && !x2) manual C-code. Stopwatch with the model resolution
values on rising edge RT 0->1. { If possible “Counter” should be can be used, if required. “dT” must
x= 0.0; used instead of “Stopwatch”. be given externally and the output
Port I/O Description } “y” must respect the resolution of dT
E In 0: Suppresses the block calc. else if (E) to avoid additional calculations.
RT In 0->1: Resets to init values {
y Out Time since last reset x = x + dT; Stopwatch with high resolution is
x_in In Direct input of internal state (x) } difficult to implement on target, since
Obsolete with SDA x_out Out Direct output of internal state (x) x2 = RT; it requires access to the high-
6.0 y = x; resolution internal clock frequency,
optional ports: which may be target dependent, at
dT In Sample Time least not free to be defined.

TimerRE
The block indicates 1, if the initial time IV System-Init-Code reset(): No library function available. dT has to be given externally!
has not passed since the last reset of the x = 0; x = IV; Block is implemented as The resolution of all input and output
block. Reset on R=1 can only be y = 0; manual C-code. data shall respect the timer
performed, if the counter has run down to cnt = 0; run(): If possible “Counter” should be resolution to minimize the calculation
zero. x = MAX(x - used instead of “Timer”. effort.
R_FC dT, 0);
Port I/O Description reset();
E In 0: Suppresses the block calc. finalize():
R In 1: Resets to init values CLC_FC -
IV In Initial value set upon reset if (R && (x <= 0))
Valid till V.5.x y Out 1: Timer is running (time >0) { out():
cnt Out Internal counter state reset(); y = (x>0);
optional ports: finalize(); cnt = x;
Implementation as counter is
preferred
CLC_FC In System calculation request else if (E) pass():
Attention:
dT In Sample Time { x = x;
The SDA – Implementation of this
x_in In Direct input of internal state (x) run();
block in SDA4.0 is different to the
implementation in SDA3.1. Use this
}
description to implement the block,
else pass();
but clarify with the function
out();
developer the expected behavior of
each block in the model.

The block indicates 1, if the initial time IV System-Init-Code Run Code: No library function available. dT has to be given externally!
has not passed since the last reset of the x = 0.0; Block is implemented as The resolution of all input and
block. Reset on R=1 can only be performed, if (R && (x <= manual C-code. output data shall respect the timer
if the counter has run down to zero. 0.0)) If possible “Counter” should be resolution to minimize the
{ used instead of “Timer”. calculation effort.
Port I/O Description x = IV;
E In 0: Suppresses the block calc. }
R In 1: Resets to init values else
IV In Initial value set upon reset if (E)
y Out 1: Timer is running (time >0) {
Valid for >= V.6.x x_in In Direct input of internal state (x) x = MAX(x -
x_out Out Direct output of internal state (x) dT, 0.0);
}
optional ports: y = (x > 0.0);
dT In Sample Time
preferred
Attention:
The SDA – Implementation of this
block in SDA4.0 is different to the
implementation in SDA3.1. Use
this description to implement the
block, but clarify with the function
developer the expected behavior
of each block in the model.
Note: Working principle is same as retrigger timer, only difference is that, it cannot be retriggered.

TimerRTE
The block indicates 1, if the initial time IV System-Init-Code reset(): No library function For Timers, dT shall be given
has not passed since the last reset of the x = 0; x = IV; available. Block is externally. The resolution of all input
block. Reset on rising edge RT 0->1 can y = 0; implemented as manual and output data shall respect the
only be performed, if the counter has run cnt = 0; run(): C-code. timer resolution to minimize the
RT_1 = 0;
down to zero. x = MAX(x - dT, 0); If possible “Counter” calculation effort.
should be used instead
R_FC finalize():
Port I/O Description reset();
of “Timer”. Implementation as counter is
E In 0: Suppresses the block calc. - preferred.
RT_1 = 0;
RT In 0->1: Resets to init values
Obsolete with SDA IV In Initial value set upon reset out():
CLC_FC y = (x>0);
6.0 y Out 1: Timer is running (time >0) if (RT && !RT_1 && (x<=0))
cnt = x;
cnt Out Internal counter state {
optional ports: reset();
finalize(); pass():
R_FC In System reset request x = x;
CLC_FC In System calculation request }
else if (E)
dT In Sample Time {
}
else pass();
out();
RT_1 = RT;
The block indicates 1, if the initial time IV System-Init-Code Run Code No library function For Timers, dT shall be given
has not passed since the last reset of the available. Block is externally. The resolution of all input
block. Reset on rising edge RT 0->1 can x= 0.0; if ((RT && !x2) implemented as manual and output data shall respect the
only be performed, if the counter has run x2 = 0; /* RT[n-1] */ && (x <= 0.0)) C-code. timer resolution to minimize the
down to zero. { If possible “Counter” calculation effort.
x = IV; should be used instead
Port I/O Description } of “Timer”. Implementation as counter is
E In 0: Suppresses the block calc. else if (E) preferred.
RT In 0->1: Resets to init values {
IV In Initial value set upon reset x = MAX(x -
y Out 1: Timer is running (time >0) dT, 0.0);
Obsolete with SDA x_in In Direct input of internal state (x) }
x_out Out Direct output of internal state (x) x2 = RT;
6.0
y = (x > 0.0);
optional ports:
dT In Sample Time

TimerRetriggerRE
Timer with reset to initial value when R=1 System-Init-Code reset(): No library function dT has to be given dT has to be given
and can be retriggered while the timer is x = 0; x = IV; available. Block is
externally! externally!
running. y = 0; implemented as manual
The resolution of all input and output
cnt = 0; run(): C-code.
data shall respect the timer
Port I/O Description x = MAX(x - dT, 0); If possible “Counter”
resolution to minimize the calculation
E In 0: Suppresses the block calc. R_FC should be used instead
effort.
R In 1: Resets to init values reset(); finalize(): of “Timer”.
IV In Initial value set upon reset -
y Out 1: Timer is running (time >0) CLC_FC
preferred.
cnt Out Internal counter state if (R) out():
optional ports: { y = (x>0);
Valid till V.5.x R_FC In System reset request reset(); cnt = x;
CLC_FC In System calculation request finalize();
dT In Sample Time } pass():
x_in In Direct input of internal state (x) else if (E) x = x;
x_out Out Direct output of internal state (x) {
run();
finalize();
}
else pass();
out();
Timer with reset to initial value when R=1 System-Init-Code Run Code No library function dT has to be given dT has to be given
and can be retriggered while the timer is x = 0; available. Block is
running. if (R) implemented as manual
{ C-code.
Port I/O Description x = IV; If possible “Counter”
E In 0: Suppresses the block calc. } should be used instead
effort.
R In 1: Resets to init values else if (E) of “Timer”.
y Out 1: Timer is running (time >0) x = MAX(x - dT,
preferred.
x_in In Direct input of internal state (x) 0.0);
y = (x > 0.0);
Valid for >= V.6.x optional ports:
dT In Sample Time
Need: For cruise control monitoring of acceleration, for particular duration.
Example: Once the acceleration is high, the timer is triggered. Once the timer elapses and as long as acceleration is high the cruise will be disabled. This timer is used to disable cruise control when acceleration exceeds certain
threshold for a specified duration of time.
If the acceleration exceeds beyond the threshold limit and it comes back below the threshold before timer elapses cruise is not disabled. If there is fluctuation of acceleration around the threshold point the timer will be retriggered.

TimerRetriggerRTE
Timer with reset to initial value when System-Init-Code reset(): No library function dT has to be given
transition of RT 0->1 and can be x = 0; x = IV; available. Block is
externally!
retriggered while the timer is running. y = 0; implemented as
cnt = 0; run(): standard code.
Port I/O Description RT_1 = 0; x = MAX(x - dT, 0); If possible “Counter”
E In 0: Suppresses the block calc. should be used instead
effort.
RT In 0->1: Resets to init values R_FC finalize(): of “Timer”.
IV In Initial value set upon reset reset(); -
y Out 1: Timer is running (time >0) RT_1 = 0;
preferred.
Oboslete with SDA cnt Out Internal counter state out():
optional ports: CLC_FC y = (x>0);
6.0
R_FC In System reset request if (RT && !RT_1) cnt = x;
CLC_FC In System calculation request {
dT In Sample Time reset(); pass():
x_in In Direct input of internal state (x) finalize(); x = x;
else if (E)
{
run();
finalize();
}
else pass();
out();
RT_1 = RT;
Timer with reset to initial value when System-Init-Code Run Code No library function dT has to be given
transition of RT 0->1 and can be X = 0.0; available. Block is
externally!
retriggered while the timer is running. x2 = 0; /* RT[n-1] */ if (RT && !x2) implemented as
{ standard code.
Port I/O Description data shall respect the timer
x = IV; If possible “Counter”
E In 0: Suppresses the block calc. resolution to minimize the calculation
} should be used instead
RT In 0->1: Resets to init values effort.
else if (E) of “Timer”.
y Out 1: Timer is running (time >0) Implementation as counter is
x = MAX(x - dT, 0.0);
x_in In Direct input of internal state (x) preferred.
}
x_out Out Direct output of internal state (x) x2 = RT;
Obsolete with SDA
y = (x > 0.0);
6.0 optional ports:
dT In Sample Time

DelayBlocks
Generation
UnitDelay
The unit delay block delays the output by No SW implementation required!
one sample.
This block shall only be used to solve
algebraic loops like:
y = y + 1 -> yn = yn-1+1;
For all other use cases the block

DelayResetEnabled shall be used!
DelayResetEnabled

Port I/O Description System-Init-Code reset(): No SW library function available. Sometimes delay blocks are not
E In 0: Suppress block calc. x = 0; x1 = IV; Block is implemented as manual necessary to be implemented as
R In 1: Resets to init values y = 0; x=IV; C-code. storage: e.g.: yn = yn-1+1;
IV In Initial value set upon reset x1 = 0;
u In Source signal (real) run(): Sometimes an implementation as
y Out Output signal, delay by 1 R_FC x1 = x storage is required: e.g.:
optional ports: reset(); x = u; yn = xn + xn-1;
R_FC In System reset request Decision up to developer
Obsolete with CLC_FC In System calculation request CLC_FC finalize():
SDA 5.2 x_in In Direct input of internal state (x) if (R) -
reset(); out():
This block cannot break algebraic loops! finalize(); y = x1;
}
else if (E) pass():
{ x1 = x;
run(); x = x;
finalize();
}
else pass();
out();
DelayRE
Depending if the block is used in the System-Init-Code Run Code No SW library function Due to the fact, that the applicable
forward or backward branch of a model, a x = y = 0; (forward) available. Pseudo code is not unique, but
different Pseudo-Code is valid! if (R) { Block has to be implemented depends on the model context,
Init-Code (R_FC) x = y = IV; as manual C-code. according to the change request
Avoid the usage of this block! Not implemented } Block does not support (T31-RCN-1) this block has been
else if (E) { multirate! removed from the automotive
Run Code y = x; blockset with SDA 5.2.
Port I/O Description (backward) x = u; Use the new version of this block in
Obsolete with E In 0: Suppress block calc. if (R) } SDA 5.2 or "DelayResetEnabled"
SDA 5.2 R In 1: Resets to init values { else { for delays in the forward path and
IV In Initial value set upon reset x = y = IV; y = x; "Unit Delay" to break algebraic loops
u In Source signal (real) } } in the backward path.
y Out Output signal, delay by 1 else if (E)
{
y = u;
x = u;
}
else
{
y = x;
}

Port I/O Description System-Init-Code Run Code No SW library function Sometimes delay blocks are not
E In 0: Suppress block calc. x = 0; available. Block is necessary to be implemented as
R In 1: Resets to init values if (R) implemented as manual C- storage: e.g.: yn = yn-1+1;
IV In Initial value set upon reset { code.
u In Source signal (real) x = IV; Sometimes an implementation as
y Out Output signal, delay by 1 y = IV; storage is required: e.g.:
x_in In Direct input of internal state (x) } yn = xn + xn-1;
x_out Out Direct output of internal state (x) else Decision up to developer
{
Shall be used to break algebraic loops, y =x;
Valid for >= V.6.x when an initial value at ECU reset is if (E)
simulated. {
x = u;
}
}
TurnOffDelaySample

A falling edge of the input signal u is delayed System-Init-Code reset(): No SW library function In target, there is no difference
by n block evaluations. x = 0; x = round(n); available. between TurnOffDelaySample and
y = 0; Block is implemented as TurnOffDelayTime.
Port I/O Description temp = 0; run(): manual C-code.
E In 0: Suppress block calc. /* temp can be x = x; The usage of a the IV is supposed to be integer on
R In 1: Resets to init values omitted in variable "temp" can be target, therefore there is no need for
n In Number of delays implementation /* finalize(): avoided in SW implementing "round(IV)"!
u In Source signal (boolean) temp = x; implementation, if the
Valid till V.5.x y Out falling edge u, delay by n R_FC if (u){ out – operation is done
optional ports: reset(); x = round(n); as first operation in
R_FC In System reset request ........} "finalize()".
CLC_FC In System calculation request CLC_FC else if (x > 0) {
x_in In Direct input of internal state (x) if (R) x = x-
x_out Out Direct output of internal state (x) { 1;
reset(); }
finalize();
} out():
else if (E) y = (( temp>0) || u );
{
run(); pass():
finalize(); x = x;
}
else pass();
out();
A falling edge of the input signal u is delayed System-Init-Code Run Code No SW library function In target, there is no difference
by n block evaluations. x = 0; available. between TurnOffDelaySample and
if (R) Block is implemented as TurnOffDelayTime.
Port I/O Description { manual C-code.
R In 1: Resets to init values x = round(n); IV is supposed to be integer on
n In Number of delays } The usage of the target, therefore there is no need for
u In Source signal (boolean) temp = x; variable "temp" can be implementing "round(IV)"!
y Out falling edge u, delay by n if (u) { avoided (use x) in SW
optional ports: x = round(n); implementation, if y is
Valid for >= V.6.x x_in In Direct input of internal state (x) } calculated directly
x_out Out Direct output of internal state (x) else instead of "temp = x".
{
if (temp > 0)
{
x = x - 1;
}
}
y = ((temp > 0) || u);
TurnOffDelayTime

A falling edge of the input signal u is delayed System-Init-Code reset(): No library function dT has to be given dT has to be given
by the time T. x = 0; x = T; available. Block is
To avoid the question of the timer
y = 0; implemented as manual
resolution; the usage of this block shall temp = 0; run(): C-code.
be avoided. TurnOffDelaySample should x = x; The usage of the
be used instead. R_FC variable "temp" can be
reset(); finalize(): avoided in SW
Port I/O Description temp = x; implementation, if the
E In 0: Suppress block calc. CLC_FC if (u) out – operation is done
Valid till V.5.x R In 1: Resets to init values if (R) { as first operation in
T In Delay time { x = T; "finalize()".
u In Source signal (boolean) reset(); }
y Out falling edge u, delay by T finalize(); else if (x > 0) If the resolution of the
optional ports: } { delay timer is higher
R_FC In System reset request else if (E) x = x-dT; than the rest of the
CLC_FC In System calculation request { } calculation, the delay
x_in In Direct input of internal state (x) run(); timer must be calculated
x_out Out Direct output of internal state (x) finalize(); out(): in a separate task.
dT In Sample Time } y = ( (temp>0) || u ); Usually this does not
else pass(); make sense and shall
out(); pass(): be avoided.
x = x;
For a proposed
implementation, see
TurnOffDelaySample
with n = T / dT.

A falling edge of the input signal u is delayed System-Init-Code Run Code No library function dT has to be given dT has to be given
by the time T. x = 0; available. Block is
externally; externally!
To avoid the question of the timer resolution; if (R) implemented as manual
the usage of this block shall be avoided. { C-code.
TurnOffDelaySample should be used x = T;
instead. } If the resolution of the
temp = x; delay timer is higher
Port I/O Description if (u) than the rest of the
R In 1: Resets to init values { calculation, the delay
Valid for >= V.6.x T In Delay time x = T; timer must be calculated
u In Source signal (boolean) } in a separate task.
y Out falling edge u, delay by T else Usually this does not
x_in In Direct input of internal state (x) { make sense and shall
x_out Out Direct output of internal state (x) if (temp > 0.0) be avoided.
{
optional ports: x = x - dT; For a proposed
dT In Sample Time } implementation, see
} TurnOffDelaySample
y = ((temp > 0.0) || with n = T / dT.
u);
The usage of the
variable "temp" can be
avoided (use x) in SW
implementation, if y is
calculated directly
instead of "temp = x".
Event: During foot down by driver, high torque is requested, and cruise control is switched from closed loop to open loop in case of high torque request. If the requested torque exceeds the upper torque threshold, and this high
torque requests exists for certain duration (or delay which is generated by the delay block) then cruise control mode is disabled.

Example: If cruise control is set at 100Nm and say if torque upper threshold is 120Nm beyond which cruise control is disabled provided high torque request ( > 120Nm) has to exists say for 2s (Calibrated delay time which is
generated by delay block).
Fig: Input to the delay block, which is logical 1 or 0. (Torque request > Threshold Torque set point, then logical high is set) Y-axis: amplitude, X-axis: time.
Fig: Output of delay block, which is logical 1 or 0? Y-axis: amplitude, X-axis: time. (Output of this delay block is held at logical 1 for some calibrated duration).
Note: 1) Turn ON delay works other way round.

2) TurnONDelayTimer is based on time elapsed.
3) TrunONDelaySample is based on number of samples.

TurnOnDelaySample
A rising edge of the input signal u is delayed System-Init-Code reset(): No library function In target, there is no difference
by n block evaluations. x = 0; x = round(n); available. Block is between TurnOnDelaySample and
y = 0; implemented as manual TurnOnDelayTime
Port I/O Description temp = 0; run(): C-code.
E In 0: Suppress block calc. x = x; IV is supposed to be integer on
R In 1: Resets to init values R_FC The usage of the target, therefore there is no need for
n In Number of delays reset(); finalize(): variable "temp" can be implementing "round(IV)"!
u In Source signal (boolean) temp = x; avoided in SW
if (!u)
Valid till V.5.x y Out rising edge u, delay by n CLC_FC {
implementation, if the
optional ports: if (R) x = round(n); out – operation is done
R_FC In System reset request { ........} as first operation in
CLC_FC In System calculation request reset(); else if (x > 0) "finalize()".
x_in In Direct input of internal state (x) finalize(); {
x_out Out Direct output of internal state (x) } x = x-1;
else if (E) }
{
run(); out():
y = ( (temp<=0) && u );
finalize();
}
pass():
else pass(); x = x;
out();
A rising edge of the input signal u is delayed System-Init-Code Run Code No library function In target, there is no difference
by n block evaluations. x = 0; available. Block is between TurnOnDelaySample and
if (R) implemented as manual TurnOnDelayTime
Port I/O Description { C-code.
R In 1: Resets to init values x = round(n); IV is supposed to be integer on
}
n In Number of delays temp = x;
The usage of the target, therefore there is no need for
u In Source signal (boolean) if (u) variable "temp" can be implementing "round(IV)"!
y Out rising edge u, delay by n { avoided (use x) in SW
if (temp > 0) implementation, if y is
x_in In Direct input of internal state (x) { calculated directly
Valid for >= V.6.x x = x - 1;
x_out Out Direct output of internal state (x) instead of "temp = x".
}
}
else
{
x = round(n);
}
y = ((temp <= 0) && u);

TurnOnDelayTime
A rising edge of the input signal u is delayed System-Init-Code reset(): No library function dT has to be given dT has to be given
by the time T. x = 0; x = T; available. Block is
To avoid the question of the timer y = 0; implemented as manual
resolution; the usage of this block shall temp = 0; run(): C-code.
be avoided. TurnOnDelaySample should x = x; The usage of the
be used instead. R_FC variable "temp" can be
reset(); finalize(): avoided in SW
Port I/O Description temp = x; implementation, if the
if (!u)
E In 0: Suppress block calc. CLC_FC {
out – operation is done
Valid till V.5.x R In 1: Resets to init values if (R) x = T; as first operation in
T In Delay time { ........} "finalize()".
u In Source signal (boolean) reset(); else if (x > 0)
y Out rising edge u, delay by T finalize(); { If the resolution of the
optional ports: } x = x-dT; delay timer is higher
R_FC In System reset request else if (E) } than the rest of the
CLC_FC In System calculation request { calculation, the delay
x_in In Direct input of internal state (x) run(); out(): timer must be calculated
y = ( (temp<=0) && u );
x_out Out Direct output of internal state (x) finalize(); in a separate task.
dT In Sample Time } Usually this does not
pass():
else x = x;
make sense and shall
pass(); be avoided.
out(); For a proposed

implementation, see
TurnOnDelaySample
with n = T / dT.

A rising edge of the input signal u is delayed System-Init-Code Run Code No library function dT has to be given dT has to be given
by the time T. x = 0.0; available. Block is
if (R)
implemented as manual
To avoid the question of the timer resolution, { C-code.
the usage of this block shall be avoided. x = T;
}
TurnOnDelaySample should be used temp = x;
If the resolution of the
instead. if (u) delay timer is higher
{ than the rest of the
Port I/O Description if (temp > 0.0) calculation, the delay
Valid for >= V.6.x R In 1: Resets to init values { timer must be calculated
T In Delay time x = x - dT; in a separate task.
u In Source signal (boolean) } Usually this does not
}
y Out rising edge u, delay by T else
make sense and shall
x_in In Direct input of internal state (x) { be avoided.
x_out Out Direct output of internal state (x) x = T;
} For a proposed
optional ports: y = ((temp <= 0.0) && u); implementation, see
dT In Sample Time TurnOnDelaySample
with n = T / dT.
The usage of the

variable "temp" can be
avoided (use x) in SW
implementation, if y is
calculated directly
instead of "temp = x".
Integrators
Generation

AccumulatorREL
This block behaves as a time discrete System-Init-Code reset(): No library function available. If Bmax and Bmin is not required, it
integrator. The integrator output value y is x = 0; x = IV; Block is implemented as must not be implemented.
limited to the maximum MX and the y = 0; manual C-code. Max/Min often is the physical range
minimum MN. cnt = 0; run(): of data type! Additional limitation is
B_min = 0; x = x + u; The usage of a separate only required if this is not sufficient.
Port I/O Description B_max = 0; variable for "x" can be Note:
finalize():
E In 0: Suppress block calc. -
avoided in SW Make sure that B_min and B_max
R In 1: Resets to init values R_FC implementation, if R_FC is not are also set correctly, if the data type
IV In Initial value reset(); out(): used. Use y instead to store limitation is done by matlib!
u In Input signal to accumulate if (x > MX) { the value!
Valid till V.5.x MX In Upper state limit CLC_FC y = MX;
MN In Lower state limit if (R) B_max = 1;
y Out u accumulated (running sum) { B_min = 0;
B_max Out True if upper limitation active reset(); else if (x < MN) {
y = MN;
B_min Out True if lower limitation active finalize();
optional ports: } B_max = 0;
R_FC In System reset request else if (E)
CLC_FC In System calculation request { B_min = 1;
x_in In Direct input of internal state (x) run(); }
x_out Out Direct output of internal state (x) finalize(); else {
} y = x;
B_max = 0;
else B_min = 0;
pass(); }
out(); x = y;
pass():
x = x;

This block behaves as a time discrete System-Init-Code Run Code No library function available. If Bmax and Bmin is not required, it
integrator. The integrator output value y is x = 0; Block is implemented as must not be implemented.
limited to the maximum MX and the if (R) manual C-code. Max/Min often is the physical range
minimum MN. { of data type! Additional limitation is
x = IV; The usage of a separate only required if this is not sufficient.
}
Port I/O Description else if (E)
variable for "x" can be avoided
E In 0: Suppress block calc. in SW implementation. Use y
{ Note:
R In 1: Resets to init values x = x + u; instead to store the value!
IV In Initial value } Make sure that B_min and
u In Input signal to accumulate if (x > MX) B_max are also set correctly,
MX In Upper state limit {
x = MX;
if the data type limitation is
MN In Lower state limit
Valid for >= V.6.x B max = 1; done by matlib!
y Out u accumulated (running sum) B min = 0;
B_max Out True if upper limitation active }
B_min Out True if lower limitation active else if (x < MN)
x_out Out Direct output of internal state (x) x = MN;
B max = 0;
B min = 1;
}
else
{
B max = 0;
B min = 0;
}
y = x;

IntegratorKREL
A time discrete integrator with gain K and System-Init-Code run(): No library function available. Matlib implementation is not dT has to be given
limitation of the integrator value y to the x = 0; x = x + K*u*dT; Block is implemented as proposed, due to simple algorithm
externally!
maximum MX and the minimum MN. y = 0; standard code. and high number of variants if dT is
cnt = 0; finalize(): Use K’ (K’=K*dT) to reduce considered.
Port I/O Description B_min = 0; - implementation effort in SW.
E In 0: Suppress block calc. B_max = 0;
out(): dT has to be given
R In 1: Resets to init values if (x > MX) {
The usage of the variable "x"
IV In Initial value R_FC can be avoided in SW externally!
y =
U In Input signal to integrate (real) reset(); MX; implementation, if R_FC is not
MX In Upper state limit B_max used. Use y instead!
MN In Lower state limit CLC_FC = 1;
K In Gain if (R) B_min
Valid till V.5.x = 0;
Y Out integrated value of u {
}
B_max Out True if upper limitation active reset(); else if (x < MN) {
B_min Out True if lower limitation active finalize(); y
Optional ports: } = MN;
R_FC In System reset request else if (E)
CLC_FC In System calculation request { B_max = 0;
x_out Out Direct output of internal state (x) finalize(); B_min = 1;
}
dT In Sample Time } else {
else y = x;
pass(); B_max = 0;
out(); B_min = 0;
}
x = y;
reset():
x = IV; pass():
x = x;

A time discrete integrator with gain K and System-Init-Code Run Code No library function available. Matlib implementation is not dT has to be given
limitation of the integrator value y to the x = 0; Block is implemented as proposed, due to simple algorithm
if (R)
externally!
maximum MX and the minimum MN. standard code. and high number of variants if dT is
{ considered.
Port I/O Description x = IV; Use K’ (K’=K*dT) to reduce
E In 0: Suppress block calc. }
implementation effort in SW.
R In 1: Resets to init values else if (E) dT has to be given
{
IV In Initial value x = x + K*u*dT; The usage of a separate externally!
u In Input signal to integrate (real) } variable for "x" can be avoided
MX In Upper state limit if (x > MX) in SW implementation. Use y
MN In Lower state limit { instead to store the value!
K In Gain x = MX;
y Out integrated value of u B max = 1;
B_max Out True if upper limitation active B min = 0;
Valid for >= V.6.x }
B_min Out True if lower limitation active else if (x < MN)
x_out Out Direct output of internal state (x) x = MN;
B max = 0;
Optional ports: B min = 1;
dT In Sample Time }
else
{
B max = 0;
B min = 0;
}
y = x;

Purpose: This is used in PI controller in-order to control Engine speed limitation. Initially the integrator is loaded with proportion value. The main purpose of integrator is to reduce steady state error.
Integrator action in PI controller: Integral action of the PI controller eliminate offset. Integration is a continual summing. Integration of error over time means that we sum up the complete controller error history up to the present
time, starting from when the controller was first switched to automatic.
Since the integral sum starts accumulating when the controller is first put in automatic, the total integral sum grows as long as e (t) is positive and shrinks when it is negative.
Example: At time t = 60 min on the plots, the integral sum is 135 – 34 = 101. The response is largely settled out at t = 90 min and the integral sum is then 135 – 34 + 7 = 108. The previous sentence makes a subtle yet very
important observation. The response is largely complete at time t = 90 min, yet the integral sum of all error is not zero.
In this example, the integral sum has a final or residual value of 108. It is this residual value that enables integral action of the PI controller to eliminate offset.
Fig: Engine speed controlling using PI controller for a particular set-point
Example: Say set point is 60 rpm and current Engine speed is 50 rpm. By using only proportional controller makes the speed to oscillate around 60 rpm, but due to inclusion of integral control, we get damped (diminishing)
oscillation and curve finally settle to set point i.e. 60 rpm.

IntegratorTREL
A time discrete integrator with gain 1/T and System-Init-Code run(): No library function available. Matlib implementation is not dT has to be given
limitation of the integrator value y to the x = 0; x = x + u*dT/T; Block is implemented as proposed, due to simple algorithm
externally!
maximum MX and the minimum MN. y = 0; manual C-code. and high number of variants if dT is
cnt = 0; finalize(): Use K’ (K’= dT/T) to reduce considered.
-
Port I/O Description B_min = 0; implementation effort in SW.
E In 0: Suppress block calc. B_max = 0; out(): dT has to be given
R In 1: Resets to init values if (x > MX) { The usage of the variable "x"
IV In Initial value R_FC y = MX;
externally!
can be avoided in SW
u In Input signal to integrate (real) reset(); B_max = 1; implementation, if R_FC is not
MX In Upper state limit B_min = 0;
}
used. Use y instead!
MN In Lower state limit CLC_FC
Valid till V.5.x T In Time constant (1/Gain) if (R) else if (x < MN) {
y = MN;
y Out integrated value of u {
B_max Out True if upper limitation active reset(); B_max = 0;
B_min Out True if lower limitation active finalize();
optional ports: } B_min = 1;
R_FC In System reset request else if (E) }
CLC_FC In System calculation request { else {
x_in In Direct input of internal state (x) run(); y = x;
B_max = 0;
x_out Out Direct output of internal state (x) B_min = 0;
dT In Sample Time finalize(); }
} x = y;
else pass();
out(); pass():
x = x;
reset():
x = IV;

A time discrete integrator with gain 1/T and System-Init-Code Run Code No library function available. Matlib implementation is not dT has to be given
limitation of the integrator value y to the x = 0; Block is implemented as proposed, due to simple algorithm
externally!
maximum MX and the minimum MN. if (R) { manual C-code. and high number of variants if dT is
x = IV; considered.
Port I/O Description } Use K’ (K’= dT/T) to reduce
E In 0: Suppress block calc. else if (E) implementation effort in SW.
dT has to be given
R In 1: Resets to init values {
IV In Initial value x = x + u*dT/T; The usage of a separate externally!
u In Input signal to integrate (real) } variable for "x" can be avoided
MX In Upper state limit if (x > MX) in SW implementation. Use y
MN In Lower state limit { instead to store the value!
T In Time constant (1/Gain) x = MX;
y Out integrated value of u B max = 1;
B_max Out True if upper limitation active B min = 0;
Valid for >= V.6.x B_min Out True if lower limitation active }
x_in In Direct input of internal state (x) else if (x < MN)
x = MN;
optional ports: B max = 0;
dT In Sample Time B min = 1;
}
else
{
B max = 0;
B min = 0;
}
y = x;

LogicalOperators
Generation
Logical Operations
Logical Operations: inputs are logical values No library function available. If u1 and u2 are vectors, the logical
AND: Block is implemented as operation is performed on the
Port I/O Description y = u1 && u2 &&...&& un manual C-code. corresponding vector elements and
u1 in input 1: logic the output is again a vector.
u2 in input 2: logic NOT :
y Out output: logic y = !u;
OR:
y = u1 || u2 || ... ||un;
XOR:
y = (u1 && !u2) || (u2 && !u1);
Valid for >= V.5.x
BitWise Operations

Logical Operations: inputs are logical values AND: No library function available. If u1 and u2 are vectors, the logical
y = u1 & u2 &...& un Block is implemented as operation is performed on the
Port I/O Description manual C-code. corresponding vector elements and
u1 in input 1 OR: the output is again a vector.
u2 in input 2 y = u1 | u2 | ... | un;
y Out output
XOR:
y = (u1 & ~u2) | (u2 & ~u1);
Valid for >= V.5.x
Port I/O Description NOT :  u8_inv_u8 If u is a vector, the logical operation

u in input: y = ~u;  u16_inv_u16 is performed on the corresponding
y Out output  u32_inv_u32 vector elements and the output is
 u64_inv_u64 again a vector.
Valid for >= V.5.x
LowAndHighpass
Icon Description Pseudo code SW Comment Manual Comment Automatic
Code Generation
Implementation SW
Implementation
DigitalLowPassRE

Digital Lowpass: Reset enable System-Init- reset():  s16_mmv_s16_s16_s16_fac1 Direct SW implementation for
Code x = IV;  s16_mmv_s16_s16_u16_fac1 typical factor ranges available.
Port I/O Description x = 0;  u16_mmv_u16_u16_s16_fac1 Available factor ranges of:
E In Suppress calculation while 0 y = 0; run():  u16_mmv_u16_u16_u16_fac1 m: 0..0,9961; 0..0,9999;-
R In Resets to IV while 1 x = x + m*(u - x);  u8_mmv_u8_u8_u8_fac1 1…0,9999; 0...1,9999.
 s32_mmv_s32_s16_u16_fac1
IV In Initial value set upon reset R_FC
 u32_mmv_u32_u32_u32_fac1
u In Source signal (real) reset(); finalize(): SW-lib function does not cover
 u32_mmv_u32_u32_u16_fac1
m In Filter factor -  u32_mmv_u32_u16_u16_fac1 initialization. This must be
y Out Filtered signal CLC_FC  u32_mmv_u32_u32_s32_fac1 implemented as manual C-code, if
Valid till V.5.x optional ports: if (R) out():  u32_mmv_u32_u32_s16_fac1 required!
R_FC In System reset request { y = x;  u32_mmv_s32_s32_u32_fac1
CLC_FC In System calculation request reset();  u32_mmv_s32_s32_u16_fac1
x_in In Direct input of internal state (x) finalize(); pass():  u32_mmv_s32_s32_s32_fac1
x_out Out Direct output of internal state (x) } x = x;  u32_mmv_s32_s32_s16_fac1
else if (E)  u16_mmv_u16_u16_u16_fac2
{ The usage of the variable "x"
run(); can be avoided in SW
finalize(); implementation, if R_FC is not
} used. Use y instead!
else
pass();
out();
Digital Lowpass: Reset enable System-Init- Run Code  s16_mmv_s16_s16_s16_fac1 Direct SW implementation for If SW-Lib is selected in ACG-Tab
Code if (R)  s16_mmv_s16_s16_u16_fac1 typical factor ranges available. on Block-Mask the following
Port I/O Description x = 0.0; {  u16_mmv_u16_u16_s16_fac1 Available factor ranges of: routines can be used:
E In Suppress calculation while 0 x = IV;  u16_mmv_u16_u16_u16_fac1 m: 0..0,9961; 0..0,9999;-
R In Resets to IV while 1 }  u8_mmv_u8_u8_u8_fac1 1…0,9999; 0...1,9999.  s16_mmv_s16_s16_s16_fac1
 s32_mmv_s32_s16_u16_fac1  s16_mmv_s16_s16_u16_fac1
IV In Initial value set upon reset else if (E)
 u32_mmv_u32_u32_u32_fac1  s32_mmv_s32_s16_u16_fac1
u In Source signal (real) { SW-lib function does not cover
 u32_mmv_u32_u32_u16_fac1  u16_mmv_u16_u16_s16_fac1
m In Filter factor x = x + m*(u - x);  u32_mmv_u32_u16_u16_fac1 initialization. This must be
y Out Filtered signal } implemented as manual C-code, if  u16_mmv_u16_u16_u16_fac1
 u32_mmv_u32_u32_s32_fac1  u16_mmv_u16_u16_u16_fac2
x_in In Direct input of internal state (x) y = x;  u32_mmv_u32_u32_s16_fac1 required!
 u32_mmv_u32_u16_u16_fac1
x_out Out Direct output of internal state (x)  u32_mmv_s32_s32_u32_fac1  u8_mmv_u8_u8_u8_fac1
 u32_mmv_s32_s32_u16_fac1  u32_mmv_u32_u32_u32_fac1
Valid for >= V.6.x  u32_mmv_s32_s32_s32_fac1  u32_mmv_u32_u32_u16_fac1
 u32_mmv_s32_s32_s16_fac1  u32_mmv_u32_u32_s32_fac1
 u16_mmv_u16_u16_u16_fac2  u32_mmv_u32_u32_s16_fac1
 f32_mmv_f32_f32_f32  u32_mmv_s32_s32_u32_fac1
The usage of a separate  u32_mmv_s32_s32_u16_fac1
variable for "x" can be avoided in  u32_mmv_s32_s32_s32_fac1
SW implementation. Use y  u32_mmv_s32_s32_s16_fac1
instead to store the value!  f32_mmv_f32_f32_f32

Example: Vehicle speed calculated is highly fluctuating entity. To filter randomly varying vehicle speed calculated from sensors, filtering is used in order to achieve a smooth value which varies very slowly without any fluctuations.
m  Is unit less entity. As ‘m’ varies from 1 to 0 the filtered value becomes more and more smooth.
Following graph shows how input/output behaviour of the filter for variation in ‘m’. This is just ideal simulated values just for the developer to understand the behaviour of the filter block and not the exact scenario. Please do not
take the values shown in figure.
Fig: Measured Vehicle speed directly from electromagnetic speed sensor, showing large number of fluctuation.

When ‘m = 1’  Output of filter exactly follows input.
Fig: Filtered speed output for m = 1
When ‘m = 0.05’  Output of the filter is very smooth not showing much variation. Speed output from ‘mmv’ filter. There is a smooth transition of speed unlike calculated speed. Filtered signal just follows the calculated speed
pattern.
Fig: Filtered speed output for m = 0.05

When there is a sudden change in acceleration (say from 0 m/s2 to 27 m/s2) and if acceleration is given as input to “mmv” filter, the response of the filter would be smooth transition as shown below.
Fig: Output of filter block when a step signal is given to its input

LowPassKRE
First order lowpass filter with time constant System-Init- reset(): SW-implementation: see Direct SW implementation for
1/K. Code x = IV; DigitalLowpassRE with m=K*dT. typical factor ranges available.
x = 0; The usage of the variable "x" Available factor ranges of
Port I/O Description y = 0; run(): can be avoided in SW m: 0..0,9961; 0..0,9999;-
x = x + K*dT*(u - x);
E In Suppress calculation while 0 implementation, if R_FC is not 1…0,9999; 0...1,9999.
R In Resets to IV while 1 R_FC finalize(): used. use y instead!
IV In Initial value set upon reset reset(); - SW-lib function does not cover
u In Source signal (real) initialization. This must be
K In Filter factor CLC_FC out(): implemented as manual C-code, if
y Out Filtered signal if (R) y = x; required!
Valid till V.5.x optional ports: {
R_FC In System reset request reset(); pass(): To improve the performance:
CLC_FC In System calculation request finalize(); x = x; Use DigitalLowpassRE with
x_in In Direct input of internal state (x) } m=K*dT, whenever possible!
x_out Out Direct output of internal state (x) else if (E)
dT In Sample Time {
run();
finalize();
}
else
pass();
out();
First order lowpass filter with time constant System-Init- Run Code: SW-implementation: see Direct SW implementation for If SW-Lib is selected in ACG-Tab
1/K. Code DigitalLowpassRE with m=K*dT. typical factor ranges available. on Block-Mask the following
x = 0.0; if (R) Available factor ranges of routines can be used:
Port I/O Description { m: 0..0,9961; 0..0,9999;-
E In Suppress calculation while 0 x = IV; The usage of a separate 1…0,9999; 0...1,9999.  s16_mmv_s16_s16_s16_fac1
}  s16_mmv_s16_s16_u16_fac1
R In Resets to IV while 1 else if (E)
variable for "x" can be avoided in
IV In Initial value set upon reset SW implementation. Use y SW-lib function does not cover  s32_mmv_s32_s16_u16_fac1
{
u In Source signal (real) instead to store the value! initialization. This must be  u16_mmv_u16_u16_s16_fac1
x = x + K*dT*(u-x);
K In Filter factor } implemented as manual C-code, if  u16_mmv_u16_u16_u16_fac1
y = x;  u16_mmv_u16_u16_u16_fac2
y Out Filtered signal required!
 u32_mmv_u32_u16_u16_fac1
x_in In Direct input of internal state (x)
 u8_mmv_u8_u8_u8_fac1
x_out Out Direct output of internal state (x) To improve the performance: 
Valid for >= V.6.x Use DigitalLowpassRE with
u32_mmv_u32_u32_u32_fac1
 u32_mmv_u32_u32_u16_fac1
optional ports: m=K*dT, whenever possible!  u32_mmv_u32_u32_s32_fac1
dT In Sample Time  u32_mmv_u32_u32_s16_fac1
 u32_mmv_s32_s32_u32_fac1
 u32_mmv_s32_s32_u16_fac1
 u32_mmv_s32_s32_s32_fac1
 u32_mmv_s32_s32_s16_fac1
 f32_mmv_f32_f32_f32
k  proportional gain over a period of time “dT”
Description is same as Digital Lowpass filter. Only difference is proportional gain ‘k’ over a period of time ‘dT’ is used as filter factor.

LowPassTRE
First order lowpass filter with time constant System-Init- reset(): SW-implementation: see Direct SW implementation for
T. Code x = IV; DigitalLowpassRE with m=dT/T typical factor ranges available.
x = 0; Available factor ranges of
Port I/O Description y = 0; run(): The usage of the variable "x" m: 0..0,9961; 0..0,9999;-
E In Suppress calculation while 0 x = x + dT/T*(u - x); can be avoided in SW 1…0,9999; 0...1,9999.
R In Resets to IV while 1 R_FC implementation, if R_FC is not
IV In Initial value set upon reset reset(); finalize(): used. Use y instead! SW-lib function does not cover
u In Source signal (real) - initialization. Must be implemented
T In Time constant CLC_FC as manual C-code, if required!
if (R) out():
y Out Filtered signal {
Valid till V.5.x optional ports: y = x; To improve the performance:
reset();
R_FC In System reset request finalize(); Use DigitalLowpassRE with
pass(): m=dT/T, whenever
x = x;
x_in In Direct input of internal state (x) else if (E) possible!
dT In Sample Time run();
finalize();
}
else
pass();
out();
First order lowpass filter with time constant System-Init- Run Code SW-implementation: see Direct SW implementation for If SW-Lib is selected in ACG-Tab
T. Code DigitalLowpassRE with m=dT/T typical factor ranges available. on Block-Mask the following
x = 0.0; if (R) Available factor ranges of routines can be used:
Port I/O Description { The usage of a separate m: 0..0,9961; 0..0,9999;-
E In Suppress calculation while 0 x = IV; variable for "x" can be avoided in 1…0,9999; 0...1,9999.  s16_mmv_s16_s16_s16_fac1
}  s16_mmv_s16_s16_u16_fac1
R In Resets to IV while 1 else if (E)
SW implementation. Use y
IV In Initial value set upon reset instead to store the value! SW-lib function does not cover  s32_mmv_s32_s16_u16_fac1
{
u In Source signal (real) initialization. Must be implemented  u16_mmv_u16_u16_s16_fac1
x = x + dT*(u-x)/T;
T In Time constant } as manual C-code, if required!  u16_mmv_u16_u16_u16_fac1
y = x;  u16_mmv_u16_u16_u16_fac2
y Out Filtered signal
 u32_mmv_u32_u16_u16_fac1
x_in In Direct input of internal state (x) To improve the performance:
 u8_mmv_u8_u8_u8_fac1
x_out Out Direct output of internal state (x) Use DigitalLowpassRE with  u32_mmv_u32_u32_u32_fac1
m=dT/T, whenever possible!  u32_mmv_u32_u32_u16_fac1
Valid for >= V.6.x optional ports:  u32_mmv_u32_u32_s32_fac1
dT In Sample Time  u32_mmv_u32_u32_s16_fac1
 u32_mmv_s32_s32_u32_fac1
 u32_mmv_s32_s32_u16_fac1
 u32_mmv_s32_s32_s32_fac1
 u32_mmv_s32_s32_s16_fac1
 f32_mmv_f32_f32_f32
Description is similar to description of Digital Low-pass filter. Only change is instead of constant entity ‘m’, sample time ‘dT’ over a period ‘T’ is used as filtering factor.

LowPassSecOrdRE
Second order lowpass filter with time System-Init- reset(): No library function Implementation as library is not Not supported for ACG
constant T and damping factor D (PT2). Code x1 = IV1; available. proposed since this block is not
x1 = 0; x2 = IV2; Block is implemented used very often.
Port I/O Description x2 = 0; as manual C-code. Algorithm will be implemented if
E In Suppress calculation while 0 y = 0; run(): required:
R In Resets to IV while 1 temp = x2[n-1]; The usage of the y_lop2_yold_yold2_u_m_fac1
R_FC temp1 = T*T + 2*D*T*dT;
IV1 In IV (for timestep n) at reset x2[n] = x1[n-1];
variable "x1" can be
reset();
IV2 In IV (for timestep n-1) at reset x1[n] = x1[n-1]+[dT*dT*(u–x1[n-1]) avoided in SW
u In Source signal (real) +T*T*(x1[n-1]–temp)] / implementation, if
CLC_FC
T In Time constant if (R) / temp1; R_FC is not used. –
D In Damping constant { use y instead!
Valid till V.5.x y Out Highpass filtered signal reset(); finalize():
optional ports: finalize(); -
CLC_FC In System calculation request else if (E) out():
{ y = x1;
x1_in In Direct input of internal state (x)
run();
x2_in In Direct input of internal state (x) finalize(); pass():
x1_out Out Direct output of internal state (x) } x1 = x1;
x2_out Out Direct output of internal state (x) else x2 = x2;
dT In Sample Time pass();
out();

Second order lowpass filter with time System-Init- Run Code: No library function Implementation as library is not Not supported for ACG
constant T and damping factor D (PT2). Code available. proposed since this block is not
x1 = 0.0; if (R) Block is implemented used very often.
Port I/O Description x2 = 0.0; { as manual C-code. Algorithm will be implemented if
E In Suppress calculation while 0 x1 = IV1; required:
x2 = IV2;
R In Resets to IV while 1 }
The usage of a y_lop2_yold_yold2_u_m_fac1
IV1 In IV (for timestep n) at reset else if (E) separate variable for
IV2 In IV (for timestep n-1) at reset { "x1" can be avoided in
u In Source signal (real) temp = x2[n-1]; SW implementation.
T In Time constant temp1 = pow(T,2) + 2*D*T*dT; Use y instead to store
D In Damping constant x2[n] = x1[n-1]; the value!
y Out Highpass filtered signal x1[n] = x2 + [pow(dT, 2)*(u-x2)] /
temp1 + pow(T,2)*(x2 - temp) /
x1_in In Direct input of internal state (x) temp1;
x2_in In Direct input of internal state (x) }
x1_out Out Direct output of internal state (x) y = x1;
x2_out Out Direct output of internal state (x)
Valid for >= V.6.x
optional ports:
dT In Sample Time
HighpassTRE

This block performs a discrete first order System-Init- reset(): “y_hip1_yold_u_uold_m_fac1” Implementation as library is
high pass filter with the continuous time Code x1 = IV1; planned (digital highpass):
Laplace notation: x1 = 0; x2 = IV2; s16_hip1_s16_u8_u8_u16_fac1  without initialization, and
x2 = 0; s16_hip1_s16_s8_s8_u16_fac1 reset
y = 0; run(): s32_hip1_s32_u16_u16_u16_fac1
 with “TD = T”
x1 = x1+ (TD*u – TD*x2 – s32_hip1_s32_s16_s16_u16_fac1
dT*x1)  with “m = dT/T”
If TD=T the block behaves as a CSD R_FC
reset(); / T; m: 0…0,999985 0h…FFFFh
discrete high pass. resulting formula:
u: input value
Port I/O Description CLC_FC finalize(): y: filtered value y = yn-1 – m*yn-1+un-un-1
if (R) -
E In Suppress calculation while 0 { for s16_hip1_s16_u8_u8_u16_fac1:
Valid till V.5.x R In Resets to IV while 1 reset(); u, uold: 0…255 Res.: 1 Not proposed due to
out(): saturation problems or 64Bit
IV1 In IV (for timestep n) at reset finalize(); y = x1;
y, yold: -256,0…255,9921875 Res.:
1/128 intermediate result:
IV2 In IV (for timestep n-1) at reset } x2 = u;
u In Source signal (real) else if (E) s16_hip_s16_u16_u16_u16_fac1
T In Time constant { The usage of the variable "x1" can s16_hip_s16_s16_s16_u16_fac1
run();
pass(): be avoided in SW implementation, s32_hip_s32_u32_u32_u32_fac1
TD In Time constant x1 = x1;
finalize(); if R_FC is not used. – use y s32_hip_s32_s32_s32_u32_fac1
y 0ut H ighpass filtered signal }
x2 = x2;
instead!
else pass(); A SDA change request will be
optional ports: out();
R_FC In System reset request Use this block for constant written to implement a “Digital
CLC_FC In System calculation request sampling times, for variable Highpass” with the above
x1_in In Direct input of internal state (x) formula.
x2_in In Direct input of internal state (x) sampling time the “DT1” block
x1_out Out Direct output of internal state (x) is intent.
dT In Sample Time

This block performs a discrete first order System-Init- Run Code: “y_hip1_yold_u_uold_m_fac1” Implementation as library is If SW-Lib is selected in ACG-Tab
high pass filter with the continuous time Code planned (digital highpass): on Block-Mask the following
Laplace notation: x1 = 0.0; if (R) s16_hip1_s16_u8_u8_u16_fac1  without initialization, and routines can be used:
x2 = 0.0; { s16_hip1_s16_s8_s8_u16_fac1 reset
s32_hip1_s32_u16_u16_u16_fac1
x1 = IV;
s32_hip1_s32_s16_s16_u16_fac1
 with “TD = T” s16_hip1_s16_s8_s8_u16_fac1
}  with “m = dT/T” s16_hip1_s16_u8_u8_u16_fac1
If TD=T the block behaves as a CSD else if (E) s32_hip1_s32_s16_s16_u16_fac1
m: 0…0,999985 0h…FFFFh s32_hip1_s32_u16_u16_u16_fac1
discrete high pass. { resulting formula:
u: input value f32_hip_f32_f32_f32_f32
x1 = x1 + (TD*u -
Port I/O Description y: filtered value y = yn-1 – m*yn-1+un-un-1
TD*x2 - dT*x1)/T;
E In Suppress calculation while 0 }
for Not proposed due to
R In Resets to IV while 1 x2 = u;
s16_hip1_s16_u8_u8_u16_fac1: saturation problems or 64Bit
TD In Time constant y = x1;
u, uold: 0…255 Res.: 1 intermediate result:
IV In Initial value set upon reset
y, yold: -256,0…255,9921875 s16_hip_s16_u16_u16_u16_fac1
u In Source signal (real)
Valid for >= V.6.x T In Time constant Res.: 1/128 s16_hip_s16_s16_s16_u16_fac1
s32_hip_s32_u32_u32_u32_fac1
y Out Highpass Filtered signal s32_hip_s32_s32_s32_u32_fac1
The usage of a separate variable
x1_in In Direct input of internal state (x) f32_hip_f32_f32_f32_f32
x2_in In Direct input of internal state (x) for "x1" can be avoided in SW
implementation. Use y instead to
store the value!
x2_out Out Direct output of internal state (x) A SDA change request will be
written to implement a “Digital
optional ports: Use this block for constant
Highpass” with the above
dT In Sample Time sampling times, for variable
formula.
sampling time the “DT1” block
is intent.
Usage: High-Pass filter is used instead of DT1 element in case sampling time is fixed. In order to pick-up high frequency variation, when the variations are beyond some threshold.
Example: This is also used as ‘D’ controller, in PID controller. Output of high-pass filter (D-controller) is added with PI controller to get PID control action.

Math Blocks
Generation
Math Function
SQRTl Operations: input is f32 values
SQRT: f32_sqrt_f32 f32_sqrt_f32 f32_sqrt_f32
Port I/O Description y = sqrt(u)
u in input : f32 Implementation only in f32
y Out output: f32 data type.
Valid for >= V.6.x
Trigonom
Trigonometric Operations: input is f32l
values SIN: f32_sin_f32 f32_sin_f32 f32_sin_f32
y = sin(u) f32_cos_f32 f32_cos_f32 f32_cos_f32
Port I/O Description f32_tan_f32 f32_tan_f32 f32_tan_f32
u in input : f32 COS:
y Out output: f32 y = cos(u) Implementation only in f32 Implementation only in f32 data type.
data type.
TAN:
y = tan(u)
Valid for >= V.6.x

MemoryBlocks
Icon Description Pseudo code SW Comment Comment
Implementation Manual SW Automatic Code
Implementation Generation
DeltaOneStep
Calculates the difference between the System-Init-Code reset(): No library function available. Block This block Is implemented as
current and the last input value. x = 0; x = IV; is implemented as standard code. Library subtraction. An own
y = 0; Library element is not
Port I/O Description run(): proposed, since it must be
E In Suppress calculation while 0 R_FC x = x; available for all data types and
R In Resets to IV while 1 reset(); a separate internal storage
IV In Initial value set upon reset finalize(): must be implemented for all.
u In Source signal (real) CLC_FC y = u - x;
Valid till V.5.x y Out Difference signal if (R) x = u; In MSR there is no Enable
optional ports: { defined.
R_FC In System reset request reset(); out(): -> Behavior when !E is not
CLC_FC In System calculation request finalize(); y = y; defined.
x_in In Direct input of internal state (x) } Enable should not be used.
x_out Out Direct output of internal state (x) else if (E) pass():
{ x = x;
run();
finalize();
}
else pass();
out();
Calculates the difference between the System-Init-Code Run Code No library function available. Block This block is implemented as
current and the last input value. is implemented as standard code. Library subtraction. An own
x = 0.0; if (R) Library element is not
Port I/O Description { proposed, since it must be
R In Resets to IV while 1 x = IV; available for all data types and
IV In Initial value set upon reset } a separate internal storage
x_in In Direct input of internal state (x) y = u - x; must be implemented for all.
x_out Out Direct output of internal state (x) x = u;
u In Source signal (real) Enable input removed
y Out Difference signal according to ASAM MBFS
V1.0 standard
Valid for >= V.6.x

DifferenceQuotient
Calculates the rate of change of the input System-Init-Code reset(): No library function available. Block Block is implemented with
signal over time x = 0; x = IV; is implemented as standard code. subtraction / division.
y = 0; Own Library function is not
Port I/O Description: run(): proposed, since it must be
E In Suppress calculation while 0 R_FC x = x; available for all data types and
R In Resets to IV while 1 reset(); a separate internal storage
IV In Initial value set upon reset finalize(): must be implemented for all
u In Source signal (real) CLC_FC y = (u- x)/dT; incidences.
y Out Rate of change (gradient) if (R) x = u; Watch out for the init
optional ports: { behaviour!
Valid till V.5.x R_FC In System reset request reset(); out():
CLC_FC In System calculation request finalize(); y = y; In MSR there is no Enable
x_in In Direct input of internal state (x) } defined.
x_out Out Direct output of internal state (x) else if (E) pass(): -> Behavior when !E is not
dT In Sample Time { x = x; defined.
run(); Enable should not be used.
finalize();
}
else pass();
out();
Calculates the rate of change of the input System-Init-Code Run Code No library function available. Block Block is implemented with
signal over time x = 0.0; is implemented as standard code. subtraction / division.
if (R) Own Library function is not
Port I/O Description: { proposed, since it must be
u In Source signal (real) x = IV; available for all data types and
R In Resets to IV while 1 } a separate internal storage
IV In Initial value set upon reset y = (u -x)/dT; must be implemented for all
x_in In Direct input of internal state (x) x = u; incidences.
x_out Out Direct output of internal state (x) Watch out for the init
y Out Rate of change (gradient) behavior!
optional ports:
Valid for >= V.6.x
dT In Sample Time Enable input removed
according to ASAM MBFS
V1.0 standard

Example: Above block is used to measure acceleration as a factor of vehicle speed. So change in vehicle speed for certain duration of time is measured. Fig2.1 Data taken between two consecutive sample time and fig2.2 shows
variation of velocity with time, slope in fig2.2 gives acceleration or deceleration. This block mainly calculates the change of rate of the input, i.e. the difference of the input over the sample time. Since the current input value remains
in the memory of the block (x_in, x_out), for the described example above, any input Delta and Time duration which are not sample based, must be properly defined by the developer in order to get correct result.
Delta  Change of vehicle speed from the previous sample.
dt  Sample time. A= V1 − V2/dt m/s2

EdgeBi
The output indicates true at any change of System-Init-Code reset(): No library function available. Block A library function is not
the logical input value. x = 0; x = IV; is implemented as standard code. proposed, since it must be
y = 0; available for all data types and
Port I/O Description run(): a separate internal storage
E In Suppress calculation while 0 R_FC x = x; must be implemented for all
R In Resets to IV while 1 reset(); incidences.
IV In Initial value set upon reset finalize():
u In Source signal (boolean) CLC_FC y = (x != u); In MSR there is no Enable
Valid till V.5.x y Out Edge pulse if (R) x = u; defined.
optional ports: { -> Behavior when !E is not
R_FC In System reset request reset(); out(): defined.
CLC_FC In System calculation request finalize(); y = y; Enable should not be used.
x_in In Direct input of internal state (x) }
x_out Out Direct output of internal state (x) else if (E) pass():
{ x = x;
run();
finalize();
}
else pass();
out();
The output indicates true at any change of System-Init-Code Run Code No library function available. Block Block is implemented with
the logical input value. x = 0; is implemented as standard code. subtraction / division.
if (R) Own Library function is not
Port I/O Description { proposed, since it must be
u In Source signal (boolean) x = IV; available for all data types and
R In Resets to IV while 1 } a separate internal storage
IV In Initial value set upon reset y = (x != u); must be implemented for all
x_in In Direct input of internal state (x) x = u; incidences.
x_out Out Direct output of internal state (x) Watch out for the init
y Out Edge pulse behaviour!
Valid for >= V.6.x
Enable input removed
V1.0 standard

Need: Perform some action at rising or falling edge of the input signal.
Example: Updating tank refilling condition only at particular instance, say when engine speed drops below certain threshold value or goes above certain threshold value (e.g. 10kmph). Vehicle speed dropping below threshold is
represented by falling edge and engine speed going beyond threshold is represented by rising edge.
Fig: Input signal to triggering block. Y-axis: Amplitude, X-axis: Time
Fig: Output of triggering block. Y-axis: Amplitude, X-axis: Time

EdgeFalling
The output indicates true if the input value System-Init-Code reset(): No library function available. Block A library function is not
changes from true to false x = 0; x = IV; is implemented as manual C-code. proposed, since it must be
IV In Initial value set upon reset finalize():
u In Source signal (boolean) CLC_FC y = (x && !u); In MSR there is no Enable
y Out Edge pulse if (R) x = u; defined.
Valid till V.5.x { -> Behavior when !E is not
optional ports: reset(); out(): defined.
R_FC In System reset request finalize(); y = y; Enable should not be used.
x_in In Direct input of internal state (x) else if (E) pass():
x_out Out Direct output of internal state (x) { x = x;
run();
finalize();
}
else
pass();
out();
The output indicates true if the input value System-Init-Code Run Code No library function available. Block A library function is not
changes from true to false is implemented as manual C-code. proposed, since it must be
x = 0; if (R) available for all data types and
Port I/O Description { a separate internal storage
u In Source signal (boolean) x = IV; must be implemented for all
R In Resets to IV while 1 } incidences.
IV In Initial value set upon reset y = (x && !u);
x_in In Direct input of internal state (x) x = u; Enable input removed
x_out Out Direct output of internal state (x) according to ASAM MBFS
y Out Edge pulse V1.0 standard
Valid for >= V.6.x

EdgeRising
The output indicates true if the input value System-Init-Code reset(): No library function available. Block A library function is not
changes from false to true. x = 0; x = IV; is implemented as manual C-code. proposed, since it must be
IV In Initial value set upon reset finalize(): Attention:
u In Source signal (boolean) CLC_FC y = (!x && u); If signal u is constant "1", a
Valid till V.5.x y Out Edge pulse if (R) x = u; rising edge is detected at
optional ports: { enable.
R_FC In System reset request reset(); out(): Use Reset to avoid this!
CLC_FC In System calculation request finalize(); y = y;
x_in In Direct input of internal state (x) } In MSR there is no Enable
x_out Out Direct output of internal state (x) else if (E) pass(): defined.
{ x = x; -> Behavior when !E is not
run(); defined.
finalize(); Enable should not be used.
}
else
pass();
out();
The output indicates true if the input value System-Init-Code Run Code No library function available. Block A library function is not
changes from false to true. x = 0; is implemented as manual C-code. proposed, since it must be
if (R) available for all data types and
Port I/O Description { a separate internal storage
u In Source signal (boolean) x = IV; must be implemented for all
R In Resets to IV while 1 } incidences.
IV In Initial value set upon reset y = (!x && u);
x_in In Direct input of internal state (x) x = u; Attention:
x_out Out Direct output of internal state (x) If signal u is constant "1", a
y Out Edge pulse rising edge is detected at
Valid for >= V.6.x enable.
Use Reset to avoid this!
Enable input removed

V1.0 standard

SampleAndHold_RE
Sample and hold or just a simple memory System-Init-Code reset(): No library function available. Block
block with enable and reset ports. x = 0; x = IV; is implemented as standard code.
y = 0;
Port I/O Description run(): The usage of the variable "x" can
E In 0: Suppress block calc. R_FC x = u; be avoided in SW implementation,
R In 1: Resets to init values reset(); if R_FC is not used. Use y instead!
IV In Initial value finalize():
u In Source signal (real) CLC_FC -
Valid till V.5.x y Out Captured signal if (R) {
B_max Out True if upper limitation active reset(); out():
B_min Out True if lower limitation active finalize(); y = x;
optional ports: }
R_FC In System reset request else if (E) { pass():
CLC_FC In System calculation request run(); x = x;
x_in In Direct input of internal state (x) finalize();
else pass();
out();
Sample and hold or just a simple memory System-Init-Code Run Code No library function available. Block
block with enable and reset ports. x = 0.0; is implemented as standard code.
if (R)
Port I/O Description { The usage of a separate variable
u In Source signal (real) x = IV; for "x" can be avoided in SW
E In 0: Suppress block calc. } implementation. Use y instead to
R In 1: Resets to init values else if (E) store the value!
IV In Initial value {
x_in In Direct input of internal state (x) x = u;
Valid for >= V.6.x y Out True if lower limitation active y = x;

RSFlipFlop
An RS flip-flop. The second input (reset) System-Init-Code reset(): No library function available. Block In some cases (e.g. only
dominates the first input (set). x = 0; x = IV; is implemented as standard code. output Q is used ) the internal
Q = 0; storage x is not necessary!.
Port I/O Description ~Q = 0; run(): The usage of the variable "x" can
SET In Set while 1 if (RST) be avoided in SW implementation,
RST In Reset while 1 R_FC { if R_FC is not used. Use Q
Q Out Output reset(); x = 0; instead!
~Q Out Inverted Output }
CLC_FC else if (SET)
Valid till V.5.x if (R)
{ {
reset(); x = 1;
finalize(); }
} finalize():
else if (E) -
{
run(); out():
finalize(); Q = x;
} ~Q = !x;
else pass():
pass(); x = x;
out();
An RS flip-flop. The second input (reset) System-Init-Code Run Code No library function available. Block
dominates the first input (set). x = 0; is implemented as standard code.
if (RST)
SET In Set while 1 x = 0; for "x" can be avoided in SW
RST In Reset while 1 } implementation. Use Q instead to
x_in In Direct input of internal state (x) else if (SET) store the value!
Q Out Output x = 1;
Q = x;
Valid for: V.6.0 – ~Q = !x;
V.6.3
Functional:
In RS FF: Untill the reset input is active, the set condition is not at all checked, and when reset is not active and at same time set is also not active output state is retained (no change in output state). In case when reset is not
active and set condition is active output of RS FF is set. Its otherway round in SR FF, where SET conditipn is dominant.
Example :
If the cruise control OFF state is given as input to RST, it will first check for RST condition and in case if OFF is not true then it will check for SET condition and cruise condition ON state is linked to SET. If the cruise is ON, the
cruise control function is enabled.

An RS flip-flop. The second input (reset) System-Init-Code Run Code No library function available. Block
dominates the first input (set). x = 0; is implemented as standard code.
if (RST)
SET Q Port I/O Description { The usage of a separate variable
RST
~Q Q Out Output else if (SET) store the value!
Q_in ~Q Out Inverted Output {
x = 1;
V. 6.7
}
Q = x;
~Q = !x;
Valid for >= V.6.4
SRFlipFlop
An SR flip-flop. The first input (set) System-Init-Code reset(): No library function available. Block In some cases (e.g. only
dominates the second input (reset). x = 0; x = IV; is implemented as standard code. output Q is used ) the internal
Q = 0; storage x is not necessary!.
Port I/O Description ~Q = 0; run():
SET In Set while 1 if (SET) The usage of the variable "x" can
RST In Reset while 1 R_FC { be avoided in SW implementation,
Q Out Output reset(); x = 1; if R_FC is not used. Use Q
~Q Out Inverted Output } instead!
CLC_FC else if (RST)
Valid till V.5.x if (R) {
{ x = 0;
reset(); }
finalize(); finalize():
} -
else if (E) out():
{ Q = x;
run(); ~Q = !x;
finalize();
} pass():
else pass(); x = x;
out();

An SR flip-flop. The first input (set) System-Init-Code Run Code No library function available. Block
dominates the second input (reset). x = 0; is implemented as standard code.
if (SET)
x_in In Direct input of internal state (x) else if (RST) store the value!
Q Out Output x = 0;
Q = x;
Valid for: V.6.0 – ~Q = !x;
V.6.2
An SR flip-flop. The first input (set) System-Init-Code Run Code No library function available. Block
SET dominates the second input (reset). x = 0; is implemented as standard code.
Q if (SET)
RST Port I/O Description { The usage of a separate variable
Q_in ~Q RST In Reset while 1 } implementation. Use Q instead to
Q Out Output else if (RST) store the value!
V. 6.6 ~Q Out Inverted Output {
x = 0;
Valid for >= V.6.3 }
Q = x;
~Q = !x;

NonLinear Blocks
Abs

The Abs block generates as output the System-Init-Code  u16_abs_s16

absolute value of the input y = 0;  s16_abs_s16
 u8_abs_s8
Port I/O Description Run code :  s8_abs_s8
Valid till V.5.x u In Input signal  u32_abs_s32
y Out Output signal if (u >= 0)  s32_abs_s32
{  u16_abs_sub_s16_s16
Parameter Description y = u;
 u16_abs_sub_u16_u16
Saturate Saturate on integer overflow }
 u8_abs_sub_u8_u8
else
{  u32_abs_sub_u32_u32
y = -u;  s32_abs_sub_s32_s32
}  f32_abs_f32
Valid for >= V.6.x
DeadBand

Returns zero, if the input value is between System-Init-Code No library function available. Block is not used very often,
UMIN and UMAX. Otherwise the output y = 0; Block is implemented as therefore a Matlib
signal is the input signal reduced by the standard C-code. implementation is not
input limits: Run Code proposed for the moment.
if (u >= UMAX )
Port I/O Description {
UMAX In Dead band upper limit y = u- UMAX;
Valid for >= V.5.x UMIN In band lower limit }
u In Source signal (real) else if (u <= UMIN )
y Out Output signal (real) { y = u- UMIN;
}
else {
y = 0;
}
DifferenceLimiter
The output value is limited in its difference to System-Init-Code reset(): s8_limitnew_up_s8_s8_u8 B_min and B_max are not
the last input value. x = 0; x = IV; s8_limitnew_down_s8_s8_u8 covered by the SW-lib
The maximum valid difference is LU, the y = 0; s8_limitnew_s8_s8_u8 functions and must be
u8_limitnew_up_u8_u8_u8
minimum valid difference is LD. run(): u8_limitnew_down_u8_u8_u8
implemented manually if
R_FC if ( (u - x)> LU ) u8_limitnew_u8_u8_u8 required.
Port I/O Description reset(); { s16_limitnew_up_s16_s16_u16 No separate implementation of
E In Suppress calculation while 0 x = x+ LU; s16_limitnew_down_s16_s16_u16 upper and lower limit available
R In Resets to IV while 1 CLC_FC B_min = 0; s16_limitnew_s16_s16_u16 in SW-Lib. -> Implement
IV In Initial value set upon reset if (R) B_max = 1; u16_limitnew_up_u16_u16_u16 manually if required.
u In Source signal (real) { } u16_limitnew_down_u16_u16_u16
Valid till V.5.x u16_limitnew_u16_u16_u16
LU In Upper limit of difference (real) reset(); else if ( (u - x)< LD ) u32_limitnew_u32_u32_u32
Attention:
LD In Lower limit of difference (real) finalize(); { u32_limitnew_up_u32_u32_u32 If both LU and LD are
y Out Limited signal (real) } x = x+ LD; u32_limitnew_down_u32_u32_u32 positive, or both are
B_min Out Lower limit exceeded (boolean) else if (E) B_min = 1; u32_limitnew_u32_u32_u16 negative, the outport y can
B_max Out Upper limit exceeded (boolean) { B_max = 0; u32_limitnew_up_u32_u32_u16 only raise or ony fall!
optional ports: run(); } u32_limitnew_down_u32_u32_u16
R_FC In System reset request finalize(); Else s32_limitnew_s32_s32_u32 Standard usage:
s32_limitnew_up_s32_s32_u32
CLC_FC In System calculation request } { s32_limitnew_down_s32_s32_u32
LU > 0
x_in In Direct input of internal state (x) else pass(); x = u; s32_limitnew_s32_s32_u16 LD < 0
x_out Out Direct output of internal state (x) out(); B_min = 0; s32_limitnew_up_s32_s32_u16
B_max = 0; s32_limitnew_down_s32_s32_u16 The usage of the variable "x"
LU >0 } can be avoided in SW
LD <0 If limitnew_down is used, the implementation, if R_FC is not
finalize(): limit is positive -> "–LU"! used. Use y instead!
-
out():
y = x;
pass():
x = x;

The output value is limited in its difference to System-Init-Code Run code s8_limitnew_up_s8_s8_u8 B_min and B_max are not
the last input value. x = 0.0; s8_limitnew_down_s8_s8_u8 covered by the SW-lib
The maximum valid difference is LU, the if (R) s8_limitnew_s8_s8_u8 functions and must be
u8_limitnew_up_u8_u8_u8
minimum valid difference is LD. { u8_limitnew_down_u8_u8_u8
implemented manually if
x = IV; u8_limitnew_u8_u8_u8 required.
Port I/O Description } s16_limitnew_up_s16_s16_u16 No separate implementation of
u In Source signal (real) else if (E) { s16_limitnew_down_s16_s16_u16 upper and lower limit available
LU In Upper limit of difference (real) if ( (u - x) > LU ) s16_limitnew_s16_s16_u16 in SW-Lib. -> Implement
LD In Lower limit of difference (real) { u16_limitnew_up_u16_u16_u16 manually if required.
E In Suppress calculation while 0 x = x + LU; u16_limitnew_down_u16_u16_u16
u16_limitnew_u16_u16_u16
R In Resets to IV while 1 B_min = 0; u32_limitnew_u32_u32_u32
Attention:
IV In Initial value set upon reset B_max = 1; u32_limitnew_up_u32_u32_u32 If both LU and LD are
Valid for >= V.6.x x_in In Direct input of internal state (x) } u32_limitnew_down_u32_u32_u32 positive, or both are
x_out Out Direct output of internal state (x) else if ( (u - x) < LD ) u32_limitnew_u32_u32_u16 negative, the outport y can
y Out Limited signal (real) { u32_limitnew_up_u32_u32_u16 only raise or only fall!
B_min Out Lower limit exceeded (boolean) x = x + LD; u32_limitnew_down_u32_u32_u16
B_max Out Upper limit exceeded (boolean) B_min = 1; s32_limitnew_s32_s32_u32 Standard usage:
s32_limitnew_up_s32_s32_u32
B_max = 0; s32_limitnew_down_s32_s32_u32
LU > 0
LU >0 } LD < 0
s32_limitnew_s32_s32_u16
LD <0 else s32_limitnew_up_s32_s32_u16
{ s32_limitnew_down_s32_s32_u16
x = u; f32_limitnew_up_f32_f32_f32
B_min = 0; f32_limitnew_down_f32_f32_f32
B_max = 0;
}
} If limitnew_down is used, the
else limit is positive -> "–LU"!
{
B_min = 0; The usage of a separate
B_max = 0; variable for "x" can be avoided
} in SW implementation. Use y
instead to store the value!
y = x;

GradientLimiter
The output value is limited in its gradient to System-Init-Code reset(): No library function available. If this block is used: dT must
the last input value. The maximum valid x = 0; x = IV; Block is implemented as be given externally.
difference is dLU; the minimum valid y = 0; standard C-code.
difference is dLD. run(): Use implementation of
dLD and dLU have to be given per second. R_FC if ( (u - x) > dLU * dT The usage of the variable "x" DifferenceLimiter with:
For a sampling time of 1s this block behaves reset(); ){ can be avoided in SW LU = dLU*dT
like a DifferenceLimiter. x = x+ dLU * dT; implementation, if R_FC is not LD = dLD*dT
CLC_FC B_min = 0; used. Use y instead!
Port I/O Description if (R) B_max = 1;
E In Suppress calculation while 0 { } If both dLU and dLD are
Valid till V.5.x R In Resets to IV while 1 reset(); else if ( (u - x) < dLD positive, or both are
IV In Initial value set upon reset finalize(); * dT ) { negative, the outport y can
U In Source signal (real) } x = x+ dLD * dT; only raise or ony fall!
dLU In Upper gradient [unit(u)/s] (real) else if (E) B_min = 1;
dLD In Lower gradient [unit(u)/s] (real) { B_max = 0; Standard usage:
dT In sample time run(); } dLU > 0
y Out Limited signal (real) finalize(); else { dLD < 0
B_min Out Lower limit exceeded (boolean) } x = u;
B_max Out Upper limit exceeded (boolean) else B_min = 0;
optional ports: pass(); B_max = 0;
R_FC In System reset request out(); }
CLC_FC In System calculation request
x_in In Direct input of internal state (x) finalize():
x_out Out Direct output of internal state (x) -
dT In Sample time
out():
Standard usage: y = x;
dLU >0
dLD <0 pass():
x = x;

The output value is limited in its gradient to System-Init- Run code No library function available. If this block is used: dT must
the last input value. The maximum valid Code Block is implemented as be given externally.
difference is LU; the minimum valid x = 0.0; if (R) standard C-code.
difference is LD. { Use implementation of
LD and LU have to be given per second. x = IV; The usage of a separate DifferenceLimiter with:
For a sampling time of 1s this block behaves } variable for "x" can be avoided LU = dLU*dT
like a DifferenceLimiter. else if (E) in SW implementation. Use y LD = dLD*dT
{ instead to store the value!
Port I/O Description if ( (u - x) > LU * dT )
u In Source signal (real) { If both dLU and dLD are
LU In Upper gradient [unit(u)/s] (real) x = x + LU * dT; positive, or both are
LD In Lower gradient [unit(u)/s] (real) B_min = 0; negative, the outport y can
E In Suppress calculation while 0 B_max = 1; only raise or ony fall!
Valid for >= V.6.x R In Resets to IV while 1 }
IV In Initial value set upon reset else if ( u - x < LD* dT ) Standard usage:
x_in In Direct input of internal state (x) { dLU > 0
x_out Out Direct output of internal state (x) x = x + LD* dT; dLD < 0
y Out Limited signal (real) B_min = 1;
B_min Out Lower limit exceeded (boolean) B_max = 0;
B_max Out Upper limit exceeded (boolean }
else
optional ports: {
dT In Sample time x = u;
B_min = 0;
Standard usage: B_max = 0;
LU >0 }
LD <0 }
else
{
B_min = 0;
B_max = 0;
}
y = x;

Example:
If Engine speed set-point changes suddenly due to an accessory applied suddenly (e.g. air conditioning turned ON), the change in the set-point will be ramped up/down instead of a direct step up/down.
Say for example if the gradient upper/lower limit is 50 rpm/ 10 ms, and current idle speed is 800 rpm. If due to AC ON the rpm is set to 1000 rpm. Change is 200 rpm which is beyond 50 rpm/ 10ms. So for every 10ms only 50 rpm
increment is done. Hence the rpm slowly ramp ups to 1000 rpm linearly after 40ms.
In case where rpm is set to 840 rpm due to AC ON then it is directly set to 840rpm in next recurrence (in 10 ms) from 800rpm, since change is only 40rpm and it is less than 50rpm/10ms.
Fig: Change in RPM v/s Time. Y - axis: Engine speed in ‘rpm’, X - axis: time duration in ‘ms’

Hysteresis
Hysteresis - Schmitt trigger: System-Init-Code reset(): No library function available. The output y is supposed to be
The Output of this block is a logical 1 if the x = 0; x = IV; Block is implemented as a logical value (LV_...).
input value is greater than the RSP and y = 0; manual C-code.
logical 0 if the input is below the LSP. run(): In MSR there is no Enable
R_FC x = x; The usage of the variable "x" defined.
Port I/O Description reset(); can be avoided in SW -> Behavior when !E is not
E In Suppress calculation while 0 finalize(): implementation, if R_FC is not defined.
R In Resets to IV while 1 CLC_FC if (u > RSP) { used. Use y instead! Enable should not be used.
IV In Initial value set upon reset if (R) x = 1;
u In Source signal (real) { }
Valid till V.5.x
RSP In Upper threshold (real) reset(); else if (u < LSP) {
LSP In Lower threshold (real) finalize(); x = 0;
y Out Hysteresis signal (boolean) } }
optional ports: else if (E)
R_FC In System reset request { out():
CLC_FCI n System calculation request run(); y = x;
x_in In Direct input of internal state (x) finalize();
x_out Out Direct output of internal state (x) } pass():
else pass(); x = x;
out();
Hysteresis - Schmitt trigger: System-Init-Code Run code No library function available. The output y is supposed to be
The Output of this block is a logical 1 if the Block is implemented as a logical value (LV_...).
input value is greater than the RSP and x = 0; if (R) manual C-code.
logical 0 if the input is below the LSP. { Enable input removed
x = IV; The usage of a separate according to ASAM MBFS
Port I/O Description } variable for "x" can be avoided V1.0 standard
u In Source signal (real) if (u > RSP) in SW implementation. Use y
RSP In Upper threshold (real) { instead to store the value!
LSP In Lower threshold (real) x = 1;
R In Resets to IV while 1 }
IV In Initial value set upon reset else if (u < LSP)
Valid for >= V.6.x x_in In Direct input of internal state (x) {
x_out Out Direct output of internal state (x) x = 0;
y Out Hysteresis signal (boolean) }
y = x;
Example: To switch on AC based on engine speed is >3000 rpm. If engine speed is varying around 3000 rpm, then AC will switch ON and OFF frequently. To avoid frequent switching, we need hysteresis block. Using hysteresis it
will allow to switch AC (ON/OFF) only when RPM goes above (3000+50) or below threshold (3000-50).

Limit
The output value is the limited input value: System-Init-Code  s8_min_max_s8_s8 B_min and B_max are not
y = 0.0;  s8_min_max_s8_s8_s8 covered by the SW-lib
Port I/O Description B_min = 0  s16_min_max_s16_s16 functions; use manual C-code
MX In Upper limit (real) B_max = 0  s16_min_max_s16_s16_s16 to implement them.
MN In Lower limit (real)  u8_min_max_u8_u8_u8
 u16_min_max_u16_u16_u16
u In Source signal (real) CLC_FC
y Out Limited output signal (real) if ( u > MX )
 s32_min_max_s32_s32_s32
Valid till V.5.x B_max Out Input > MX (boolean) {  s32_min_max_s32_s32
B_minOut Input < MN (boolean) y = MX;  s16_lim_hys_s16_u16
B_min = 0;
B_max = 1;
}
else if ( u < MN)
{
y = MN;
B_min = 1;
B_max = 0;
}
else
{
y = u;
B_min = 0;
B_max = 0;
}

The output value is the limited input value:  s8_min_max_s8_s8 B_min and B_max are not
Run Code :  s8_min_max_s8_s8_s8 covered by the SW-lib
Port I/O Description if (u > MX)  s16_min_max_s16_s16 functions; use manual C-code
MX In Upper limit (real) {  s16_min_max_s16_s16_s16 to implement them.
MN In Lower limit (real) y = MX;  u8_min_max_u8_u8_u8
u In Source signal (real) B max = 1;
y Out Limited output signal (real) B min = 0;
 s32_min_max_s32_s32_s32
B_max Out Input > MX (boolean) }  s32_min_max_s32_s32
B_minOut Input < MN (boolean) else if (u < MN)  s16_lim_hys_s16_u16
{  f32_min_max_f32_f32
Valid for >= V.6.x y = MN;
B max = 0;
B min = 1;
}
else
{
y = u;
B max = 0;
B min = 0;
}
Max
Returns the maximum of all the input values: System-Init-Code Library functions are available For more than 2 inputs, a
If the input is a vector signal, the maximum y = 0; for 2 inputs: manual C-code
of all vector elements is returned. implementation is required.
Run Code:  u8_max_u8_u8
Port I/O Description y = max (u1,u2,...,un);  s8_max_s8_s8
u In Source signal (real)  u16_max_u16_u16
y Out Maximum (real)  s16_max_s16_s16
Valid for >= V.5.x  u32_max_u32_u32
 s32_max_s32_s32
 u8_max_tab_u16p_u8
 f32_max_f32_f32
MaxLog_RE

The output value is the maximum value of all System-Init-Code reset(): No separate library function A separate library
occurred input values u with respect to the x = 0; x = IV; available. Implementation of implementation is not planned.
initial value IV. Bmax = 0; Bmax = 0; "Max"-Block can be used, if
y = 0; B_max is not required.
Port I/O Description B_max = 0; run(): Otherwise block is
E In Suppress calculation while 0 if (u > x) { implemented as manual C-
R In Resets to initial values while 1 R_FC x = u; code.
IV In Initial value set upon reset reset(); Bmax = 1;
Valid till V.5.x u In Source signal (real) } The usage of the variables "x"
y Out Maximum value CLC_FC else { and Bmax can be avoided in
B_max Out Current input is new max. if (R) Bmax = 0 SW implementation, if R_FC is
(boolean) { } not used. Use y and B_max
optional ports: reset(); instead!
R_FC In System reset request finalize(); finalize():
CLC_FC In System calculation request } -
x_in In Direct input of internal state (x) else if (E) {
x_out Out Direct output of internal state (x) run(); out():
finalize(); y = x;
} B_max = Bmax;
else pass();
out(); pass():
x = x;
The output value is the maximum value of all System-Init-Code Run code No separate library function A separate library
occurred input values u with respect to the available. Implementation of implementation is not planned.
initial value IV. x = 0.0; B_max = 0; "Max"-Block can be used, if
if (R) B_max is not required.
Port I/O Description { Otherwise block is
E In Suppress calculation while 0 x = IV; implemented as manual C-
R In Resets to initial values while 1 } code.
u In Source signal (real) { The usage of a separate
y Out Maximum value if (u > x) variable for "x" can be avoided
B_max Out Current input is new max. { in SW implementation. Use y
Valid for >= V.6.x
(boolean) x = u; instead to store the value!
x_in In Direct input of internal state (x) B_max = 1;
}
y = x;
Min

Returns the minimum of all the input values: System-Init-Code Library functions are available For more than 2 inputs, a
If the input is a vector signal, the maximum y = 0; for 2 inputs: manual C-code
of all vector elements is returned. implementation is required.
Run Code:  u8_min_u8_u8
Port I/O Description y = min (u1,u2,...,un);  s8_min_s8_s8
U In Source signal (real)  u16_min_u16_u16
Valid for >= V.5.x y Out Minimum (real)  s16_min_s16_s16
 u32_min_u32_u32
 s32_min_s32_s32
 f32_min_f32_f32
MinLog_RE

The output value is the minimum value of all System-Init-Code reset(): No separate library function A separate library
occurred input values u with respect to the x = 0; x = IV; available. Implementation of implementation is not planned.
initial value IV. Bmin = 0; Bmin = 0; "Min"-Block can be used, if
y = 0; Bmin is not required.
Port I/O Description B_min = 0; run(): Otherwise block is
E In Suppress calculation while 0 if (u < x) { implemented as manual C-
R In Resets to initial values while 1 R_FC x = u; code.
IV In Initial value set upon reset reset(); Bmin = 0
u In Source signal (real) } The usage of the variables "x"
Valid till V.5.x y Out Minimum value CLC_FC else { and Bmax can be avoided in
B_min Out Current input is new min. if (R) { Bmin = 0 SW implementation, if R_FC is
(boolean) reset(); } not used. Use y and B_max
optional ports: finalize(); instead!
R_FC In System reset request } finalize():
CLC_FC In else if (E) { - System calculation request
x_in In Direct input of internal state (x) run(); out():
x_out Out Direct output of internal state finalize(); y = x;
(x) } B_min = Bmin;
else pass();
out(); pass():
x = x;
The output value is the minimum value of all System-Init-Code Run code No separate library function A separate library
occurred input values u with respect to the available. Implementation of implementation is not planned.
initial value IV. x = 0.0; B_min = 0; "Min"-Block can be used, if
if (R) Bmin is not required.
Port I/O Description { Otherwise block is
E In Suppress calculation while 0 x = IV; implemented as manual C-
R In Resets to initial values while 1 } code.
u In Source signal (real) { The usage of a separate
y Out Minimum value if (u < x) variable for "x" can be avoided
B_min Out Current input is new min. { in SW implementation. Use y
Valid for >= V.6.x
(boolean) x = u; instead to store the value!
x_in In Direct input of internal state (x) B_min = 1;
x_out Out Direct output of internal state }
(x) }
y = x;
Sign

The Sign block indicates the sign of the input System-Init-Code No library function available. If only 2 branches are used,
(+1, 0, -1) y = 0; Block is implemented as use Standard comparison
standard C-code operators instead.
Port I/O Description Run Code: .
u In Input signal Library functions are available
y Out Output signal if (u > 0.0) { for datat type f32:
Valid for >= V.5.x
y = 1;
}  s8_sgn_f32
else if (u == 0.0) { y = 0;
}
else { y = -1;
}
MeanValueT_RE
The output value y is the mean value of all System-Init-Code Run code
occurred input values u with respect to the
initial value IV. for(i = 0; i < k; i++) if (R)
{ {
Port I/O Description x[i] = 0.0; for(i = 0; i < k; i++)
E In Suppress calculation while 0 } {
R In Resets to initial values while 1 mean = 0; x[i] = IV;
IV In Initial value set upon reset }
u In Source signal (real) mean = IV;
y Out Mean value }
else if (E)
Valid for >= V.5.x {
optional ports : for(i = k-1; i > 0; i--)
x_out Out Direct output of internal state x[i] = x[i-1];
(x) }
mean_in In Direct input of internal mean = 0;
state (mean). x[0]=u;
mean_out Out Direct output of internal state for(i = 0; i < k; i++)
(mean) {
mean = mean+x[i];
}
mean = mean/k;
}
y = mean;

Nonlinear
Modulo
Modulo – Operator (rest of division System-Init-Code No library function available. Error in description of CLC_FC Use only for positive values.
y = 0; (Version 5.10) corrected.
in1/in2)
Run Code
Port I/O Description y= in1 % in2
in1 In Dividend (non-negative)
Valid for >= V.5.x in2 In divisor (non-negative)
y Out Output signal
Functional Need: used to repeat certain action (operation). For example, repeat cylinder firing sequence.
Example: To change CAM profiles: In case of 4 cylinder engine. In each of the cylinder, cylinder firing happens in sequence (1, 3, 2, and 4). Total firing angle would be 720 degree. Every piston undergoes Intake, Compression,
Power and Exhaust phase, each taking 180 degree. The angles are w.r.t. flywheel position. At each stroke the flywheel rotates by 180 degree. And the cycle repeats after 720 degree. In such scenario modulo 720º operation is
used to detect crank shaft angle with respect to each cylinder.
There are two CAM profiles; one would create a slight opening of inlet value and other one a little more. In order to change the CAM profile to the inlet valve, we have to detect no contact of CAM shaft with inlet valve. For this
purpose the controller needs to know in which stroke each cylinder is. Modulo 720 the crank angle would give the info about the exact position of each cylinder.
Crank angles: 0, 180, 360, 540, 0, 180……..

MultiPort Switch
The first (top) input is the control input and System-Init-Code No library function available. There is a difference between
the other inputs are data inputs. The value y = 0; Block is implemented as SDA behaviour and "SWITCH
of the control input determines which data standard "SWITCH - CASE" - STATE" statement:
input to pass through to the output port. Run Code: (0-based indexing off!!) statement. In SDA, all branches are
Truncates the value the value of u1 to the switch ( trunc(uc)) { (possible problems, see calculated and only the result
nearest integer case 1: comment!) of one branch is taken.
y = u1; Effect: If there is a storage
Port I/O Description break; element (e.g. counter,…) in
uc In Control input case 2: the non active branch, it is
u1 In first input signal y = u2; always calculated inSDA!
u2 In second input signal break;
y Out Output signal default : This must be taken into
} acount, when designing C-
Parameter Description code.
0-based indexing on: index starts with 0

Quantizer
The Quantizer block passes its input signal System-Init-Code No library function available. This block has no multirate
through a stair-step function so that many y = 0; Block is implemented as implementation.
neighbouring points on the input axis are standard C-code.
mapped to one point on the output axis. The R_FC Since the block in not in the
effect is to quantize a smooth signal into a Not implemented Automotive blockset, the
stair-step output. The output is computed usage shall be avoided!
using the round-to-nearest method, which CLC_FC
Obsolete with SDA produces an output that is symmetric about y = quant * trunc (u/quant + 0.5)
6.0 zero

u In Input signal
y Out Output signal
Parameter Description
quant Quantization interval parameter
Saturation
The Saturation block imposes upper and System-Init-Code No library function available. This block has no
lower bounds on a signal. When the y = 0; Block is implemented as
multirate
input signal is within the range specified standard C-code.
by the Lower limit and Upper limit R_FC implementation.
parameters, the input signal passes not implemented
through unchanged. When the input
Obsolete since SDA signal is outside these bounds, the CLC_FC
5.2 signal is clipped to the upper or lower if ( u > MAX ) {
bound. y = MAX;
}
When the parameters are set to the else if ( u < MIN) {
same value, the block outputs that y = MIN;
value. }
Port I/O Description else {
u In Input signal y = u;
y Out Output signal }
MAX In Upper limit (real)
MIN In Lower limit (real)

Switch
The Switch block propagates one of two System-Init-Code No library function available. There is a difference between
inputs to its output depending on the value y = 0; Block is implemented as SDA behaviour and "IF"
of a third input, called the control input. standard "IF" statement. statement:
Run Code (possible problems, see In SDA, both branches are
Port I/O Description If (u2 >= threshold) { comment!) calculated and only the result
u1 In first input signal y = u1; of one branch is taken.
u2 In Control input } Effect: If there is a storage
u3 In second input signal else { element (e.g. counter,…) in
Valid till V5..x y Out Output signal y = u3; the non active branch, it is
} always calculated inSDA!
threshold decision threshold (e.g.: 0.5) This must
Width be taken into
of lash
acount, when designing C-
code.
The Switch block propagates one Run Code: Threshold: No library function available. There is a difference between
Block is implemented as SDA behaviour and "IF"
of two inputs to its output
if (I >= threshold) standard "IF" statement. statement:
depending on the value of a third { In SDA, both branches are
input, called the control input. (possible problems, see
y = u1; calculated and only the result
} comment!) of one branch is taken.
threshold: 0.5 Port I/O Description else Effect: If there is a storage
V. 6.2 u1 In first input signal { element (e.g. counter,…) in
l In Control input y = u2; the non active branch, it is
u2 In second input signal } always calculated inSDA!
y Out Output signal
Run Code: "Check ~= 0" This must be taken into
acount, when designing C-
if ( I != 0) code.
Check ~= 0 threshold: decision threshold (e.g.: 0.5)
{
V. 6.2 "Check ~= 0" option: instead of threshold,
y = u1;
control input is checked for condition
}
"different from zero".
else
Valid for >= V.6.x {
y = u2;
}

Signals & systems

ForIteratorSubsystem
This block is a Subsystem block that is See "For Iterator" No library function available.
preconfigured to serve as a starting Block is implemented as
point for creating a subsystem that standard C-code.
executes repeatedly during one
simulation time step. It contains the For
Iterator block.
ln1 In Any input signal of subsystem
Out1 Out Any output data of subsystem
ForIterator
The "For Iterator" block, when placed in a System init code: No library function available. The number of iterations must
subsystem, implements a C-like for control i = 0.0; Block is implemented as be given externally!
flow statement in Simulink. All blocks within standard C-code.
the subsystem are executed "number of Run Code (1-based): The iteration can start from the
iterations" times within one time step! For (i=1; i<=N; i++) beginning, or continue with the
{ last value.
Port I/O Description ....
N In Number of iterations }; Watch-out:
Indices in "Matlab" can start
Optional ports: with "1" or "0" in (default
Next_i In Next iteration value set ext. "1").
i Out Iteration counter (0:N-1 or 1:N) Indices in "C" start with "0"!
If an index starts with 0 , this
Parameter Description has to be indicated in the
Held/Reset Start iteration at next block icon!
reccurance with the old
counter value or 0
(Default: reset)
Index-Mode 0-based, 1-based

WhileIteratorsubsystem
This block is a Subsystem block that is See "While Iterator" No library function available. Parameter Max shall always
preconfigured to serve as a starting Block is implemented as be set to -1 (no maximum),
point for creating a subsystem that standard C-code. since the value of Max is not
executes repeatedly while a condition is visble in the specification.
satisfied during a simulation time step. It
contains the While Iterator block.
ln1 In Any input signal
IC In Initial condition
Out1 Out Any output signal
Max Maximum of iterations
WhileIterator
The "While Iterator" block, when placed in a System init code: No library function available. Parameter Max shall always
subsystem, implements a C-like for control y = 0; Block is implemented as be set to -1 (no maximum),
flow statement in Simulink. tmp_cond =0; standard C-code. since the value of Max is not
All blocks within the subsystem are visble in the specification.
executed within one time step as long as Run Code:
the input condition is true. The iteration tmp_cond = IC; Watch-out:
starts with the counter value 1! While (tmp_cond != 0) Indices in "Matlab" can start
If the initial condition (IC) is not true, the { with "1" or "0" in (default
blocks in the subsystem are not executed at y = y +1; "1").
all. ... /* here are the blocks to be repeated */ Indices in "C" start with "0"!
Port I/O Description if ( !cond or (y>=MAX) ) If y is used to acces arrays,
cond In While condition { this must be taken into
IC In Initial condition tmp_cond = 0; account!
}
Optional ports: }
y Out Iteration counter
MAX Maximum of iterations
Held/Reset Start iteration at next
reccurance with the old
counter value or 0 (Default:
reset)

DoWhileIteratorSubsystem
This block is a Subsystem block that is See "Do-While Iterator" No library function available. Parameter Max shall always
preconfigured to serve as a starting Block is implemented as be set to -1 (no maximum),
point for creating a subsystem that standard C-code. since the value of Max is not
executes a do-while loop during a visble in the specification.
simulation time step. It contains the Do-
While Iterator block.
ln1 In Any input signal
Out1 Out Any output signal
Max Maximum of iterations
DoWhileIterator
The "Do While Iterator" block, when placed System init code: No library function available. Parameter Max shall always
in a subsystem, implements a C-like for y = 0.0; Block is implemented as be set to -1 (no maximum),
control flow statement in Simulink. All blocks standard C-code. since the value of Max is not
within the subsystem are executed within Run Code: visble in the specification.
one time step as long as the input condition do {
is true. The iteration starts with the counter y = y +1; Watch-out:
value 1! ... Indices in Matlab start with
} while ( cond and (y<=MAX) ); "1", indices in "C" start with
Port I/O Description "0"!
cond In Do While condition If y is used to acces arrays,
y Out Iteration counter this must be taken into
account!
MAX Maximum of iterations (set
always to -1!)
BusCreator
The Bus Creator block combines a set of No library function available.
signals into a bus, i.e., a group of signals Block has no SW-relevance.
represented by a single line in a block _
diagram. The Bus Creator block, when used
in conjunction with the Bus Selector block,
reduces number of lines required to route
signals from one part of a diagram to
another.

BusSelector
The bus selector is used to select signals No library function available.
from an incoming bus. Block has no SW-relevance.
If you check Muxed output, then the signals _
are combined at the output port and there is
only one output port; otherwise, there is one
output port for each selected signal.
Mux
Combine several input signals into a vector No library function available.
or bus output signal Block has no SW-relevance.
_
DeMux
Extract and output the elements of a bus or No library function available.
vector signal. The block accepts either Block has no SW-relevance.
vector (1-D array) signals or bus signals. _
Ground
The Ground block can be used to connect No library function available.
blocks whose input ports are not connected Block has no SW-relevance.
to other blocks. _
Terminator
The Terminator block can be used to cap No library function available.
blocks whose output ports are not Block has no SW-relevance.
connected to other blocks. If you run a _
simulation with blocks having unconnected
output ports, Simulink issues warning
messages. Using Terminator blocks to cap
those blocks avoids warning messages.

SwitchCaseActionSubsystem
This block is a Subsystem block that is No library function available.
preconfigured to serve as a starting point for Block is implemented as
creating a subsystem whose execution is standard C-code.
triggered by a Switch Case block. It contains
the input "Action", that is connected to a
signal from a switch case block:
This Input is no "ACTION", but a function
trigger!
In1 In Input signal
Action In Function trigger
Out1 Out Output signal

AT_EXTENDED_LIB


PIControllerK_RE & PIControllerK_RTE

PI-Controller. System-Init-Code reset(): No library function available. Not Supported for ACG
xi = xp = 0.0; { Block is implemented as
Port I/O Description /* internal storage xp = 0; standard code.
R/RT In Resets to IV */ xi = IV;
E In Suppress calculation while 0 RT_1 = 0; /* RT }
IV In Initial integrator value set at only*/
reset y = y_i = y_p = finalize():
MX In Maximum 0.0; {
MN In MInimum B_max = B_min = if (xi > IMX)
KP In proportional factor 0; {
KI In integral factor ihi =1;
u In Source signal (real) ilo = 0;
dT In acquisition time R_FC xi = IMX;
y Out Output signal (real) reset(); }
B_max Out Upper limit of integrator finalize(); else if (xi < IMN)
B_min Out Lower limit of integrator RT_1 = 0; /* RT {
y_p Out Output signal proportional only*/ ihi = 0;
y_i Out Output signal integral ilo = 1;
CLC_FC (RE) xi = IMN;
optional ports: if (R) }
R_FC In System reset request { else
CLC_FC In System calculation request reset(); {
} ihi = 0;
else if (E) ilo = 0;
{ }
run(); }
}
finalize(); run():
out(); {
xp = u * KP;
CLC_FC (RTE) xi[n] = xi[n-1] + KI * u
if (RT && !RT_1) *dT;
{ }
reset();
} out():
else if (E) {
{ B_min = ilo;
Valid for: V.5.x run(); B_max = ihi;
} y_p = xp;
finalize(); y_i = xi;
out(); y = y_p + y_i;
RT_1 = RT; }

PIControllerT_RE & PIControllerT_RTE

Port I/O Description System-Init-Code reset(): No library function available. Not Supported for ACG
R/RT In Resets to IV xi = xp = 0.0; { xp = 0; Block is implemented as
E In Suppress calculation while 0 /* internal storage xi = IV; standard code.
IV In Initial integrator value set at */ }
reset RT_1 = 0; /* RT finalize():
MX In Maximum only*/ {if (xi > IMX)
MN In MInimum y = y_i = y_p = { ihi =1;
KR In proportional factor 0.0; ilo = 0;
TN In Time constant integrator B_max = B_min = xi = IMX;
TV In Time constant derivative 0; }
T1 In Time constant derivative else if (xi < IMN)
u In Source signal (real) { ihi = 0;
dT In acquisition time R_FC ilo = 1;
y Out Output signal (real) reset(); xi = IMN;
B_max Out Upper limit of integrator finalize(); }
B_min Out Lower limit of integrator RT_1 = 0; /* RT else
y_p Out Output signal proportional only*/ { ihi = 0;
y_i Out Output signal integral ilo = 0;
y_d Out Output signal derivative CLC_FC (RE) }
optional ports: if (R) { }
R_FC In System reset request reset(); run():
CLC_FC In System calculation request } { if (TN < TNmax)
else if (E) { { if (TN > dT)
Parameter Description run(); { temp1 = (KR*u) / TN;
TNmax Maximum TN } }
finalize(); else
out(); { temp1 = (KR * u);
}
else
CLC_FC (RTE) { temp1 = 0;
if (RT && !RT_1) }
{ xi[n] = xi[n-1] +
reset(); temp1*dT;
} if (TN > dT) { xp = KR *
else if (E) u;
{ }
run(); else { xp = 0; }
} }
Valid for: V.5.x finalize(); out():
out(); {
RT_1 = RT; B_min = ilo;
B_max = ihi;
y_p = xp;
y_i = xi;
y = y_p + y_i;
}

PIDControllerT_RE
PID-Controller. System-Init-Code run(): No library function Not Supported for ACG
xi = xp = 0; /* internal { if (TN < TNmax) available. Block is
Port I/O Description storage */ { implemented as
xd =x1=x2=x3=0; /* if (TN > dT)
R/RT In Resets to IV internal storage */ { temp1 = (KR*u) / TN;
standard code.
E In Suppress calculation while 0 y = 0; }
IV In Initial integrator value set at RT_1 = 0; /* RT else { temp1 = KR * u;
reset only*/ }
MX In Maximum y =y_i =y_p=y_d = 0; else { temp1 = 0; }
MN In MInimum B_max = B_min = 0; xi[n] = xi[n-1] + temp1*dT;
KR In proportional factor if (TN > dT)
R_FC { xp = KR * u; }
TN In Time constant integrator reset(); else{ xp = 0; }
TV In Time constant derivative finalize(); xd[n] = (x2*(u-x1) –dT*xd[n-1]) / x3
T1 In Time constant derivative RT_1 = 0; /* RT + xd[n-1];
u In Source signal (real) only*/ x1 = u;
dT In acquisition time x2 = KR * TV;
y Out Output signal (real) CLC_FC (RE) x3 = T1;}
B_max Out Upper limit of integrator if (R) out():
{ { y = xp + xi + xd;
B_min Out Lower limit of integrator reset(); if (y > IMX)
y_p Out Output signal proportional } { B_max =1;
y_i Out Output signal integral else if (E) B_min = 0;
y_d Out Output signal derivative { y = IMX;
optional ports: run(); }
R_FC In System reset request } else if (y < IMN)
CLC_FC In finalize(); { B_max= 0; System calculation request
out(); B_min = 1;
y = IMN;}
Parameter Description CLC_FC (RTE) else{
TNmax Maximum TN if (RT && !RT_1) B_max = 0;
{ B_min = 0;}
reset(); y_p = y – xi - xd;
} y_i = xi;
else if (E) y_d = xd;
{ }
run(); finalize():
} if (xi > IMX)
finalize(); { xi = IMX; }
out(); else if (xi < IMN)
RT_1 = RT; { xi = IMN;
}
reset(): if (xd > IMX)
{ xp = 0; { xd = IMX; }
xi = IV; else if (xd < IMN)
xd = 0; { xd = IMN;
Valid for: V.5.x x1 = 0; }
x2 = KR * TV; }
x3 = T1;
}

Basic Algorithms
DT1_Element
DT1 element: System-Init-Code No library function available. Internal constant Teff not
This block should be used for situations y = 0.0; Block is implemented as allowed.
where the sampling time is not constant (e.g. standard C-code.
segment synchronous). In cases where the Init-Code (R_FC) Possible future SW-lib
sampling time is constant, use Highpass! Not implemented imlementation (not planned
yet):
Port I/O Description Run-Code y_dt1_yold_deltaU_t_teff_fac1
u In input signal z1[n] = (u*K/T); s16_dt1_s16_s16_u16_u16_fac1
Valid till V.5.x K In amplification factor z2[n] = z2[n-1]+ ( Teff / (T+Teff))*(z1[n] - s32_dt1_s32_s32_u16_u16_fac1
T In time constant z2[n-1]); Not proposed due to
y Out filtered signal y[n] = z1[n] - z2[n]; saturation problems or 64Bit
intermediate result:
Parameter Description or (only if K and T are constant) u16_dt1_u16_u16_u16_u8_fac1
Sample time "dT" recurrance of the block s16_dt1_s16_s16_s16_u16_fac1
Sample time Teff sampling time of Be aware, that this formula is not correct, u32_dt1_u32_u32_u32_u16_fac1
s32_dt1_s32_s32_u32_u16_fac1
simulation (should always be -1: if K is calculated or output of a map.
Implementation as library
inherited)
proposed:
y[n] = (T/(T+Teff) *y[n-1] + K/(T+Teff) * (u[n]–  without initialization
Internal constant Teff not allowed. u[n-1])  with “K = 1 (a factor K might be
applied to deltaU)”
 with “resolution of Teff = 4s
(T_SEG_AV)”
 with “resolution of T = 128s
(0…8,38848s)”
resulting formula of library

function:
y[n] = ( 1/(T+Teff) * [ T* y[n-1] + K * (u[n]
– u[n-1]) ]

DT1 element: System-Init-Code No library function available. Possible future SW-lib

This block should be used for situations y = 0.0; Block is implemented as imlementation (not planned
where the sampling time is not constant (e.g. standard C-code. yet):
segment synchronous). In cases where the Run-Code y_dt1_yold_deltaU_t_teff_fac1
sampling time is constant, use Highpass! z1[n] = (u*K/T); s16_dt1_s16_s16_u16_u16_fac1
z2[n] = z2[n-1]+ ( Teff / (T+Teff))*(z1[n] - s32_dt1_s32_s32_u16_u16_fac1
Port I/O Description z2[n-1]);
u In input signal y[n] = z1[n] - z2[n]; Not proposed due to
K In amplification factor saturation problems or 64Bit
T In time constant or (only if K and T are constant) intermediate result:
Valid for >= V.6.x y Out filtered signal u16_dt1_u16_u16_u16_u8_fac1
s16_dt1_s16_s16_s16_u16_fac1
Be aware, that this formula is not correct, u32_dt1_u32_u32_u32_u16_fac1
Parameter Description if K is calculated or output of a map. s32_dt1_s32_s32_u32_u16_fac1
Teff sampling time of simulation
(should always be -1: inherited) y[n] = (T/(T+Teff) *y[n-1] + K/(T+Teff) * (u[n]– Implementation as library
u[n-1]) proposed:
 without initialization
 with “K = 1 (a factor K might
be applied to deltaU)”
 with “resolution of Teff =
4s (T_SEG_AV)”
 with “resolution of T =
128s (0…8,38848s)”
resulting formula of library

function:
y[n] = ( 1/(T+Teff) * [ T* y[n-1]
+ K * (u[n] – u[n-1]) ]

Usage: To improve the dynamic controlling of the PI controller, when there is a dynamically varying set point. D-control anticipates the process conditions by analyzing the change in error. It functions to minimize the change of
error, thus keeping the system at a consistent setting. The primary benefit of D controllers is to resist change in the system, the most important of these being oscillations. The control output is calculated based on the rate of
change of the error with time. The larger the rate of the change in error, the more pronounced the controller response will be.
c(t) = controller output

Td = derivative time constant
de = change in error
dt = change in time
Fig: D-Controller output for Step input.
D-controls measure only the change in error. D-controls do not know where the set-point is, so it is usually used in conjunction with another method of control, such as P-only or a PI combination control. D-control is usually used
for processes with rapidly changing process outputs.
During the transient phase of the output signal the ‘D controller’ action would be high. Derivative action predicts system behavior and thus improves settling time and stability of the system by reducing magnitude of overshoots and
undershoots.
Examples of Dynamic set point: Fuel set point, Air set point, Engine Speed set point. The PID controller action would be to maintain the set point at desired value. When there is dynamically varying set-point.

Mean_Value
Mean Value of a vector System-Init-Code
y = 0.0;
u In input vector Run-Code
Valid till V.5.x y Out mean value N =size(u)
y = Sum[u(1)...u(N)] / N;
Valid for: V.6.x

Mean Value of a vector System-Init-Code
y = 0.0;
u In input vector Run-Code
U y Out mean value
------------ N =size(u)
size(U) y = Sum[u(1)...u(N)] / N;
size: [ 2 ] size input-width (automatic detection of
input-width is disabled)
V. 7.6
Valid for >= V.7.x
Fading
The output of this block "fades" between two System-Init-Code
input values. y = 0.0;
Y = A*(1-F) + B*F Run-Code

y = A*(1-F) + B*F
Valid till V.5.x A In Input 1
B In Input 2
F In fading factor
Y Out output
Valid for >= V.6.x

Example: During fault systems due to failure of sensors like crank sensors, “Limp-Home” condition will be active in vehicle. In order to reduce vehicle speed, speed limited to set point, the vehicle should ramp down from current
vehicle speed (say 200kmph) to limitation speed (100kmph).
Following graph shows how the speed (200kmph) is gradually reaching the set point (100kmph) in case of faulty sensor situation. Fading factor would be a varying as shown in example below, depending on whether it is fading In
or fading Out.
Fading factor: Example: “IP_FAC_RATE_HEAT_IM_INI” varies from 0  1.9921875.
Fig: Output fades between B to A or A to B vise-versa. y-axis: Speed (kmph), x-axis: time in ‘ms’

Calibration Data Handling

Constant
Generates a constant Pseudo code
y = NC_CYL_NR;
y out constant
Valid for >= V.5.x 1D interpret vector parameters as 1D
From_Data_Definition
Outputs the data definition of a variable,
constant or map.

Phys_min out physical min value physical min value
Phys_max out physical max value
resolution out Resolution
phys_min
phys_max
resolution
Dataname
V. 6.7
Valid for >= V.5.x
To_Resolution

Round data to a resolution.

If the resolution is not input, it will be taken
from a data definition

in In input
out Out output value
optional ports:
res In Resolution
Round meth.: Round
Floor
Ceil
Resolution: Resolution as value or from
another data definition
Valid for >= V.5.x
ID_Lookup

Axis index search and Lookup the value in a SDA < 6.2 Axis must always be Automatic selection of correct SW-
map or curve (1 dimensional map).  U8_ID_PTR_U8 unsigned in SW Routine
 U8_ID_PTR_U16
Port I/O Description  U16_ID_PTR_U8
x_val In x-value  U16_ID_PTR_U16
y_val In y-value  S8_IDS_PTR_U8
ID-val Out Result if look-up  S8_IDS_PTR_U16
 S16_IDS_PTR_U8
optional ports:  S16_IDS_PTR_U16
idx_x In Index1 for an array of maps  U8_ID_PTR_U8_U8
idx_y In Index2 for an array of maps  U8_ID_PTR_U8_U16
idx_z In Index3 for an array of maps  U8_ID_PTR_U16_U8
ID_MAP_ARRAY  U8_ID_PTR_U16_U16 Name of imported/exported map
 U16_ID_PTR_U8_U8
Parameter Description  U16_ID_PTR_U8_U16
MAP/CURVE  U16_ID_PTR_U16_U8 Map – name
mode local: map only used in this block  U16_ID_PTR_U16_U16
exported: Map is exported  S8_IDS_PTR_U8_U8
imported: Maps is imported  S8_IDS_PTR_U8_U16
vectorize no: Only one scalar ID_val (one  S8_IDS_PTR_U16_U8
map is selected, one result for this  S8_IDS_PTR_U16_U16
map)  S16_IDS_PTR_U8_U8
scalar: x/y values are scalars  S16_IDS_PTR_U8_U16
(same pair of x/y for each map),  S16_IDS_PTR_U16_U8
ID_val is a vector with all maps  S16_IDS_PTR_U16_U16
results at once. SDA >= 6.2
array: x/y values are vectors  FDPS_PTR_U16
(different pair of x/y for each  FDPS_PTR_U8
map), ID_val is a vector with all  UIDS_U8
maps results at once.  UIDS_U16
index-search  SIDS_S8 internal: the block does a index search
external: the block re-uses an  SIDS_S16
external index search  U8_ID1D_U8
last indexoff: index search starts with 1st  U16_ID1D_U16
elem.  U8_ID2D_U8
Valid for >= V.5.x on: index search uses the last  U16_ID2D_U16
search result  S8_ID1D_S8
 S16_ID1D_S16
 S8_ID2D_S8
 S16_ID2D_S16

Axis index search and Lookup the value in a Automatic selection of correct SW-
map or curve (1 dimensional map). Routine
Example for an array of maps
Valid for >= V.5.x

Axis index search and Lookup the value in a Automatic selection of correct SW-
map or curve (1 dimensional map). Routine
Example for exported and imported

maps/curves
Valid for >= V.5.x

Lookup the value in a map or curve without Automatic selection of correct SW-
index search. Routine
The search result is imported.

x_frac In search result x (index and
fraction)
y_frac In search result y (index and
fraction)
ID-val Out Result if look-up
optional ports:
ID_MAP_ARRAY Name of
imported/exported map
MAP/CURVE Map – name
mode local: map only used in this block
exported: Map is exported
Valid for >= V.5.x imported: Maps is imported
vectorize no: Only one scalar ID_val (one
map is selected, one result for this
map)
scalar: x/y values are scalars
(same pair of x/y for each map),
ID_val is a vector with all maps
results at once.
array: x/y values are vectors
(different pair of x/y for each
map), ID_val is a vector with all
maps results at once.
index-search external

Inverse_Lookup_x
Inverse index search and interpolation of a No Library implemenation A library function will be Not Supported for ACG
map. available. implemented in the future.

y_val In Y-Value
IP-val In map
x_val Out X-Value
MAP Map – name
mode local, map only used in this block
Valid for >= V.5.x Imported: Maps is imported
Inverse_Lookup_y
Inverse index search and interpolation of a No Library implemenation A library function will be Not Supported for ACG
map. available. implemented in the future.

x_val Out X-Value
IP-val In map
y_val out Y-Value
MAP Map – name
mode local, map only used in this block
Valid for >= V.5.x Imported: Maps is imported

IP_Lookup
Axis index search and interpolation of a SDA < 6.2 Special data pointer Automatic selection of correct SW-
value in a map or curve (1 dimentional map).  U8_IP_PTR_U8_U8 definition required! Routine
 U8_IP_PTR_U8_U16 Only unsigned maps are
 U8_IP_PTR_U16_U8
Port I/O Description  U8_IP_PTR_U16_U16
supported –signed
x_val In x-value  U16_IP_PTR_U8_U8 interpolation could be
y_val In y-value  U16_IP_PTR_U8_U16 implemented (as Macro)
ID-val Out Result if look-up  U16_IP_PTR_U16_U8 Axes must always be
 U16_IP_PTR_U16_U16 unsigned
optional ports:  U8_IP_REL_PTR_U8_IDXP
idx_x In Index1 for an array of maps  U8_IP_REL_PTR_U16_IDXP
 U16_IP_REL_PTR_U8_IDXP
idx_y In Index2 for an array of maps  U16_IP_REL_PTR_U16_IDXP
idx_z In Index3 for an array of maps  U8_IP_PTR_U8
ID_MAP_ARRAY  U8_IP_PTR_U16 Name of imported / exported map
 U16_IP_PTR_U8
Parameter Description  U16_IP_PTR_U16
MAP/CURVE SDA >= 6.2 Map – name
mode local: map only used in this block  FDPS_PTR_F32
 F32_PTR_IP1D
 F32_U16PTR_IP1D
imported: Maps is imported  F32_PTR_IP2D
vectorize no: Only one scalar ID_val (one  F32_U16PTR_IP2D
map is selected, one result for this  F32_U8PTR_IP2D
map)  UDPS_U8
scalar: x/y values are scalars  UDPS_U16
(same pair of x/y for each map),  UDPS_U32
 SDPS_S8
ID_val is a vector with all maps
 SDPS_S16
results at once.  SDPS_S32
array: x/y values are vectors  U8_IP1D_U8
(different pair of x/y for each  U16_IP1D_U16
map), ID_val is a vector with all  U32_IP1D_U32
maps results at once.  U8_IP2D_U8
index-search  U16_IP2D_U16 internal: the block does a index search
 U32_IP2D_U32
external: the block re-uses an
 S8_IP1D_S8
external index search  S16_IP1D_S16
last indexoff: index search starts with 1st  S32_IP1D_S32
elem.  S8_IP2D_S8
on: index search uses the last  S16_IP2D_S16
search result  S32_IP2D_S32
Valid for >= V.5.x Internal calculation method  U16_IP1D_U8
 U16_IP2D_U8
Standard: standard resolution for
 S16_IP1D_S8
calculation  S16_IP2D_S8
F32: F32 calculation  U32_IP1D_U16
HiRes: Calculation with higher  U32_IP2D_U16
resolution  S32_IP1D_S16
 S32_IP2D_S16

Axis index search and interpolation of a Automatic selection of correct SW-

value in a map or curve. Routine
Example for an array of maps
Valid for >= V.5.x
Axis index search and interpolation of a Automatic selection of correct SW-

value in a map or curve. Routine
Example for exported and imported maps
Valid for >= V.5.x

Automatic selection of correct SW-

Routine
Valid for >= V.5.x
Interpolation of a value in a map or curve SDA < 6.2 Automatic selection of correct SW-
without index search.  U8_IP1D_PTR_U8 Routine
The search result is imported.  U16_IP1D_PTR_U16
 U8_IP2D_PTR_U8
Port I/O Description  U16_IP2D_PTR_U16
x_frac In search result x (index and  U8_IP1DA_PTR_U8
fraction)  U8_IP2DA_PTR_U8
y_frac In search result y (index and SDA >= 6.2
fraction)  U8_IP1D_U8
ID-val Out Result if look-up  U16_IP1D_U16
 U8_IP2D_U8
optional ports:  U16_IP2D_U16
ID_MAP_ARRAY  F32_U16PTR_IP1D Name of imported/exported map
 U32_IP1D_U16
Parameter Description  U32_IP2D_U16
MAP/CURVE  S32_IP1D_S16 Map – name
mode local: map only used in this block  S32_IP2D_S16
imported: Maps is imported
Valid for >= V.5.x vectorize no: Only one scalar ID_val (one
map is selected, one result for this
map)
(map array) scalar: x/y values are scalars (same pair of x/y for each map), ID_val i
array: x/y values are vectors
(different pair of x/y for each
map), ID_val is a vector with all
index-search external

Indexsearch
Index search of map / curve. SDA > 6.2 Automatic selection of correct SW-
Port I/O Description  IDINDX_PTR_U8_U8 Routine
In1 In input value (x or y -axis)  IDINDX_PTR_U16_U16
Out1 Out index + factor for interpolation  IDINDY_PTR_U8_U8
 IDINDY_PTR_U16_U16
Axis Axis – name SDA >= 6.2
last index no: Search starts from 0  FDPS_PTR_F32
yes: Search starts from last  FDPS_PTR_U16
index0  FDPS_PTR_U8
vectorize no: Only one scalar ID_val (one  UDPS_U8
map is selected, one result for this  UDPS_U16
map)  UDPS_U32
scalar: x/y values are scalars  SDPS_S8
(same pair of x/y for each map),  SDPS_S16
Valid till V.5.x ID_val is a vector with all maps  SDPS_S32
results at once.  UIDS_U8
array: x/y values are vectors  UIDS_U16
(different pair of x/y for each  SIDS_S8
map), ID_val is a vector with all  SIDS_S16
Index search of map / curve. SDA > 6.2 Following Parameters where Automatic selection of correct SW-
Port I/O Description  IDINDX_PTR_U8_U8 removed: Routine
In1 In input value (x or y -axis)  IDINDX_PTR_U16_U16
Out1 Out index + factor for interpolation  IDINDY_PTR_U8_U8 - vectorization-modes
IndexSearch  IDINDY_PTR_U16_U16 - last-index search
Axis: Axisname
Axis Axis – name SDA >= 6.2
V. 6.8
 FDPS_PTR_F32
Internal calculation method:  FDPS_PTR_U16
Valid for >= V.6.x Standard: Calculation with  FDPS_PTR_U8
input/output data type  UDPS_U8
F32: Calculation with F32  UDPS_U16
 UDPS_U32
 SDPS_S8
 SDPS_S16
 SDPS_S32
 UIDS_U8
 UIDS_U16
 SIDS_S8
 SIDS_S16

Get_Curve_Index
Index Search.  IDINDX_PTR_U8_U8 Only index search, no
Outputs the next smallest index to the input  IDINDX_PTR_U16_U16 preparation of interpolation.
value of the axis of a curve.  Check, if SW is compatible
Port I/O Description with SW - Developer
In In Input value
out Out Index
Obsolete since Parameter Description
SDA 5.2 Curve name Name of curve
Same functionality
than
get_map_index
Get_Map_Index
Index Search. SDA > 6.2 Only index search, no Automatic selection of correct SW-
Outputs the next smallest index to the input  IDINDX_PTR_U8_U8 preparation of interpolation. Routine
value of the axis of a map.  IDINDX_PTR_U16_U16 Check, if SW is compatible
Port I/O Description  IDINDY_PTR_U8_U8 with SW - Developer
In In Input value  IDINDY_PTR_U16_U16
index Out Index
Parameter Description SDA >= 6.2
Map Name Name of map  FDPS_PTR_F32
Index to get x_axis or to get y_axis  FDPS_PTR_U16
 FDPS_PTR_U8
 UDPS_U8
 UDPS_U16
 UDPS_U32
Get index  SDPS_S8
in  SDPS_S16
x_axis
 SDPS_S32
IP_MAP_COR_AMP_DIF_PF  UIDS_U8
V. 7.0  UIDS_U16
Get index  SIDS_S8
in
y_axis  SIDS_S16
IP_MAP_COR_AMP_DIF_PF
V. 7.0
Valid for >= V.5.x

Write_Map_Array
Write data to an array of calibration maps Not supported for ACG

x_index In array index of map
Map array In Calibration map (e.g.
from get_map_array)
Map In Array with values, that
should be written
map_array_out Out new Map
Map Array Name of map array
Valid for >= V.5.x
Read_Map_Array
Select one Map out of an array of maps Not supported for ACG

x_index In Map array index (1st
dimension)
Map_array In Map array
map_array_out Out Map
Optional ports:
y_index in index 2nd array dimension
z_index in index 3rd array dimension
Valid for >= V.5.x Parameter Description

Map Array Name of map array

Get_Curve_Array
Generates a signal line with the properties of Example see
a map definition in the workspace. "Write_Map_Array"

out Out Map properties
Obsolete since
SDA 5.2 Parameter Description
Map Name Name of map
Same functionality
than get_map_array
Get_Map_Array
Generates a signal line with the properties of Not supported for ACG
a map definition in the workspace.

out Out Map properties
Map Name Name of map
Valid for >= V.5.x

Control Structures
Compiler_Switch
Conditional triggering of subsystems.

cond_if In condition
#if Out function call
Valid till: V.5.x #else Out function call

Implements a compiler switch in code.
Condition which is dependent on system
constant is calculated in mask parameter of
block

in In system constant
#if Out function call
Optional Port :
#else Out function call
Valid for >= V.6.x
Compiler_Switch_if


cond_if In condition
#if Out function call function call
Obsolete since
SDA 5.2
Same functionality
than Compiler_Switch
If_then_else
Conditional call of subsystems. Run Code:
if (cond_if == 1) {
Port I/O Description if (fcn_call)
cond_if In condition }
if Out function call Elseif (cond_if == 0){
else Out function call else (fcn_call)
}
Valid till V.5.x Else{
}
if (cond_if) {
if Out function call else{
else Out function call else (fcn_call)
}
Valid for >= V.6.x
If_then
if (cond_if == 1) {
if Out function call else{
Valid till V.5.x }

if (cond_if) {
if Out function call
Valid for >= V.6.x
Sequencer
Generates a sequence of function calls.

fcnt_call_x Out function call
Optional ports:
In In logical input
Valid till V.5.x
triggered not
function call
logical: if the input is different to 0
Generates a sequence of function calls.

fcnt_call_x Out function call
triggered not
function call
Valid for >= V.6.x

Do_while_loop
Call System function in "do while loop". System init code:
i = 0.0;
Port I/O Description Run Code:

condition In condition do {
while Out subsystem trigger i = i +1;
Obsolete since ...
SDA 5.2 Optional ports: } while ( condition and (i<=MAX)
i Out Iteration number );
while_loop
Call System function in "while loop". System init code:
i = 0;
tmp_cond =0;
condition In condition Init-Code (R_FC)
while Out subsystem trigger Not implemented
Obsolete since Optional ports: Run Code:
SDA 5.2 i Out Iteration number tmp_cond = condition;
While (tmp_cond != 0)
Parameter Description {
MAX Maximum of iterations y = y +1;
... /* here are the blocks to be repeated
*/
if ( !condition or (y>=MAX) )
{
tmp_cond = 0;
}
}

for_loop
Call System function in "while loop". System init code:
i = 0;
Port I/O Description Init-Code (R_FC)

N In Number of iterations Not implemented
for Out subsystem trigger
Run Code:
Optional ports: For (i=1; i<=N; i++)
Obsolete since i Out Iteration number {
....
SDA 5.2 Parameter Description };
triggeroutport_2_logical
Converts a trigger to a logical value.
The output is "one", if the input is different to
0.
Obsolete since Port I/O Description

SDA 5.2 trig_outpu t In Trigger input
logical_value Out logical value

triggeroutport_2_fcn_call
Converts a trigger to a function call.

trig_output In Trigger input
fcnt_call Out function call
Obsolete since
SDA 5.2
if
If: IF expression
Run the Subsystem connected to 1st
output port
ELSEIF expression
Run the Subsystem connected to 2nd
output port
ELSE
Run the Subsystem connected to last
output port
END

ui In Input value
#if Out subsystem trigger
#else Out subsystem trigger
Signal Types

From_data
Input of global data into specification. A separate SW-
Use procedural interface! Implementation is not required
No change in block
Goto_data
Output of global data out of specification. A separate SW-
Supply procedural interface Implementation is not required
No change in block
From_fct_call
This block shows the name of a function, A separate SW-
which calls a sub-function (signal line is Implementation is not required
input to sub-model)
No change in block
Goto_fct_call
This block shows the name of a function, A separate SW-
which calls a sub-function (signal line leaves Implementation is not required
sub-model)
No change in block
From_trig
Name of a trigger A separate SW-
(signal line is input to sub-model) Implementation is not required
No change in block
Goto_trig
Name of a trigger A separate SW-
(signal line leaves sub-model) Implementation is not required
No change in block

From_visible
Describes visible data (Mode “V” in A separate SW-
specification) Implementation is not required
(signal line is input to sub-model)
No change in block
Goto_visible
Describes visible data (Mode “V” in A separate SW-
specification) Implementation is not required
(signal line leaves sub-model)
No change in block
Goto & From
From and Goto blocks allow to pass a signal A separate SW-
from one block to another without Implementation is not required
connecting them by a line.
Only local scope allowed!
 A local tag name is enclosed in
square brackets ([]).
 A scoped tag name is enclosed in
No change in block braces ({}).
 A global tag name appears without
additional characters.
Signals

Branch
Split up a signal line.

in In input signal
Valid for >= V.5.x out_x Out output signals
BusMerge
Merging busses.
Creates a bus with all the signals of the
input busses. If an input signal belongs to
more than one input bus, the related output
bus signal is updated, any time any input
signal is updated.
Valid for >= V.5.x Port I/O Description
In_x In input bus
out Out output bus
Constant_value
Generate a constant based on a calculation;
show the formula as Icon and the result of
the calculation.

Y out constant
Valid for >= V.5.x

Case_multiport_switch
The "Case_multiport_switch" block creates System-Init-Code Should be in Chapter
an output signal with values depending on a y = 0.0; "NonLinear"
condition "switch".
Init-Code (R_FC)
Port I/O Description not implemented
switch In input control signal Run Code:
case [switch] In input signal(s) for certain switch (switch)
values of "switch" { case 1:
default In input signal(s) for default case 3:
value of "switch" z = case: [1 3];
Valid for >= V.5.x z out output signal break;
case 2:
z = case: 2;
break;
default:
z = default;
break;
}
Feedthrough
The Feed through block outputs (out) the System init code: No library function available. This block can be used to
input value (in) if the function call (Trigger ()) y = 0.0; Block is implemented as build an "IF-THEN-ELSE"
occurs. The output maintains its last standard "IF" statement. statement, that behaves the
changed value. Run Code: same than in target SW.
If (trigger)
Port I/O Description {
Valid for >= V.5.x in In input signal y = in;
trigger In function call }
y Out output signal
Merge
The Merge block combines its inputs into a No library function available.
single output line whose value at any time is Block has no SW-relevance
equal to the most recently computed output
of its driving blocks. The Merge block often
is used to merge a "normal" operate signal
with a reset signal, i.e. calculations of the
same data executed in different system
events.

in1 In 1st input
in2 In 2nd input
out Out merged signal


Fixed(ScaledFloat)
Respects the physical limits and the
resolution of a variable defined in ADD
during simulation.

In In float data
y Out float data with integer limitations
Valid for >= V.5.x
Selector
The Selector block generates as output a
vector/matrix with selected elements of an
input vector/matrix.
Different variants are:
 Internal element selection of a vector
 External element selection of a vector
 Internal selection of elements of a
matrix
 External selection of elements of a
matrix
 External selection of a row of a matrix
 External selection of a column of a
matrix
Port I/O Descripción

U In input vector/matrix
U[..] Out output vector/matrix
Optional ports:
E In Element indices
R In Row indices
C In Column indices
Input Type vector/matrix
Index mode 0 – based -> "[ ]" brackets
1 – based -> "( )" brackets
Index source Element internal/external
Row internal/external
Column internal/external

SignalManager
The signal manger mergers all input busses
to one "feedback" bus.
Placed on the top level of an element, output
data of this block are defined as output data
of the module and are automatically
synchronized with ADD
Valid for >= V.5.x
Logical_value
Generates a constant with the value "1" in
case of "true" and with the value "0" in case
of false.

Y Out constant value (0 or 1)
Valid for >= V.5.x
Switch_Case

The "Switch Case" block triggers sub- System-Init-Code No library function available.
systems depending on the input value. y = 0.0; Block is implemented as
standard "SWITCH - CASE"
Run Code: statement.
Port I/O Description switch (u1)
u1 In input signal {
case [u1] Out subsystem trigger case 1:
No change in block default Out subsystem trigger body_1;
break;
case 2:
case 3:
body_23;
break;
default:
body_default;
break;
}
DataTypeConversion(DTC)
The Data Type Conversion block converts No library function available.
an input signal to the data type specified on Block is implemented as
the block. standard type cast, if required.
The Data Type Conversion block (DTC) No library function available.

converts an input signal to the data type Block is implemented as
specified on the block. standard type cast, if required.
Input and Output
to have equal: -Stored Integer value
Valid for >= V.6.x - Physical Value
Round Integer
Calculation to : - Zero
- Nearest
- Ceiling
- Floor

The Data Type Conversion F32 block F32-Math If SW-Lib is selected in

converts from or to single precision data  'u8_f32' ACG-Tab on Block-Mask
type.  'S8_f32'
Conversion from f32 -> FXP: Use of F32- the following routines can
 'u16_f32'
Math library functions.
 's16_f32'
be used:
Valid for >= V.6.x Conversion from FXP -> f32: Use of
 'u32_f32'
standard type cast.  'u8_f32'
 's32_f32'
 'S8_f32'
Unit conversion mode
 'u16_f32'
Off: Unit conversion disabled
 's16_f32'
Display->SI: convert from Display to
 'u32_f32'
SI unit
SI->Display: convert SI unit to  's32_f32'
Display unit
SigSpec
The signal specification block does not No library function available.
SigSpec convert data types but specifies a data type Block is implemented as
for a signal. standard type cast, if required.
V. 6.0 The propagation of the data type is in both
directions, backward and forward from the
Valid for >= V.6.x block.
SignalSpecification
The SignalSpecification block specifies the No library function available.
desired dimensions, sample time, data type, Block is implemented as
inherit
numeric type, and other attributes of a standard type cast, if required.
signal.
D:2
In SDA this block is mainly used to specify a
signal-dimension if Simulink can not resolve
it automatically.
Reshape
The Reshape block changes the No library function available.
U( : ) dimensionality of the input signal to a Block is implemented as
dimensionality that you specify, using the standard type cast, if required.
block's Output dimensionality parameter. For
example, you can use the block to change
an N-element vector to a 1-by-N or N-by-1
matrix signal, and vice versa.
Reshape NOTE: In SDA, this block shall only be used

as workarround for dimension-problems in
Simulink.

Simulation data handling

From_List_Input
Outputs an input signal vector over time No SW relevance!
defined in the MATLAB workspace.
(From_List_Input2 is event triggered)
The input consists of a time axis and signal
data.
Required for: Importing Stimuli
Valid for >= V.5.x
To_List_Output
Saves the input signal over time to the No SW relevance!
MATLAB workspace (To_List_Output2 is
event triggered).
data
Required for storing result of simulation.

Saves the input signal over time to the

list_output
MATLAB workspace (To_List_Output2 is
V. 6.1 event triggered).
Valid for >= V.5.x data
Required for storing result of simulation.
Use unique time axis for stored signal:
On/Off
Use time axis identification as prefix followed
by signal name :
On/Off
Interpret Vector Parameters as 1-D:

On/Off
Sim_in
Allows selection of signals source between
model and workspace.

In In Input signal
Out Out Output signal
Optional ports:
Ini In Input Signal i >= 1
Block Mode : -feed through signal

-read signals from WS
-write signals to WS
Select Input Mode: -Single
-Multiple
Use WS Select : On/Off
Update/Create output signal: On/Off
Set same block mode to all
sim_in blocks : On/Off
Valid for >= V.5.x

Vectors and Matrices

Assignment
This block assigns values of U2 to the System-Init-Code No library function available. The 2nd variant of this block
vector/matrix Y[E]. The other elements are Y = 0; Block is implemented as defines the selection "E"
assigned with U1. standard code. internally as mask parameter.
Run Code This internal definition of E is
E-input: external definition, which elements Y = U1; The SW implementation can not allowed: It is not visible in
shall be selected and shall be stored to which Y[E] = U2[E]; be a loop (matrix: 2 loops) that specification
position within Y! reads out the positions from E
This block exists for matrix assignment as and assigns all wanted
well. elements to the output Y.
In this case E becomes 2 dimensional C
(column) an R (row)
Note: Vectors can be created by using a
constant blocks and a MUX.
Y0 Port I/O Description

U A Y E In Element Selector
Idx1 1 U1 In Values of not selected elements
U2 In Values of selected elements
Y Out Result vector or Matrix
OR:

Idx1 In Element Selector
Y0 In Values of not selected elements
U In Values of selected elements
Y Out Result vector or Matrix

DirectLookUp
Read an element, vector or matrix out of a No library function available. This block allows numerous
matrix or vector. Block is implemented as variations. Unfortunately the
standard code. Map name can be given
internally without being printed
Port I/O Description in the specification!
K In Input indices (c: column, r: row, ..) Use read_array instead of
Y Out Matrix, Vector or element this block
Optional ports:
T In input Matrix or vector
Table dim. Table dimension
selection element
vector
2D matrix
Obsolete since
SDA 5.2

Read_array
Read a selected cell, column or row of an No library function available. Until V5.6, this block does not
array. Block is implemented as display the starting index (0 or
standard code. 1-based) in the block icon,
Port I/O Description when the indices are given
Out Out cell, column or row value internally.
Therefore indices should be
Optional ports: given externally for the time
[..] In input array being!
C1 In column index
R1 In row index
Mode - single value
- row
- column
column index internal
- external
row index internal
- external
Valid till V.5.x 0-based index
- yes/no
Read a selected cell, column or row of an No library function available.
C1
array. Block is implemented as
R1 standard code.
[..] Port I/O Description
Out Out cell, column or row value
V. 6.9
R1 Optional ports:
[..] In input array
[..] C1 In column index
R1 In row index
V. 6.9
C1 Mode - single value
- row
[..] - column
- read value 1 D
V. 6.9 column index internal
- external
C1 row index internal
- external
[..] 0-based index
- yes/no
V. 6.9
Valid for >= V.6.x

Write_array
Write input value to a selected cell, column or No library function available. Until V5.6, this block does not
row of an array. Block is implemented as display the starting index (0 or
standard code. 1-based) in the block icon,
Port I/O Description when the indices are given
U In cell, column or row value internally.
Out out output array Therefore idices should be
given externally for the time
Optional ports: being!
[..] In input array
C1 In column index
R1 In row index
Mode - single value
- row
- column

- external
row index internal
- external
Valid till V.5.x 0-based index
- yes/no

Write input value to a selected cell, column or No library function available.

C0
row of an array. Block is implemented as
R0 standard code.
[..] Port I/O Description
u u In cell, column or row value
Out out output array
V. 7.9
R0 Optional ports:
[..] [..] In input array
C1 In column index
u
R1 In row index
V. 7.9
C0 Parameter Description
Mode - single value
[..] - row
u - column
V. 7.9 - write value 1 D
C0
[..] - external
u row index internal
- external
V. 7.9
0-based index
Valid for >= V.6.x - yes/no
MatrixConcatenation
Concatenation of vectors or matrices to a
matrix

u1 In input matrix
u2 In input matrix
y Out output matrix
method horizontal: u1=4*4, u2=4*2 ->
y=4*6
vertical: u1=4*4, u2=2*4 -> y=6*6

Concatenation of vectors or matrices to a

matrix
2
u1 In input matrix
u2 In input matrix
y Out output matrix
1
method horizontal: u1=4*4, u2=4*2 ->
y=4*6
vertical: u1=4*4, u2=2*4 -> y=6*6
Vector: all input signals must be
either vectors or row vectors [1xM
matrices] or column vectors [Mx1
matrices] or a combination of
vectors and either row or column
vectors
Get_Bit
Reads a bit out of a number. System init code: Be aware of 0/1-based
bits = 0; indexing!
bit_sel 0
GET BIT bits Port I/O Description Run Code (for 0-based indexing):
num_dec V. 7.0 num_dec In input number bits = num_dec.bit_sel;
bits Out output bit (0 or 1)
num_dec GET BIT bits Optional ports:

V. 7.0 bit_sel In Number of selected Bit
Index Base: 0
bit_sel = 0 Parameter Description
0-based indexing: on / off (0 / 1 in icon)
Valid for >= V.5.x

Write_Bit / Set_Bit / Reset_Bit

bit_sel 0 Sets, or resets a bit in a number. Be aware of 0/1-based
indexing!
num_dec WRITE BIT y
V. 7.0 Port I /O Description
bit
Y Out output number
bit_sel 1
RESET BIT y Optional ports:
num_dec V. 7.0 num_dec In input number
bit_sel In Number of selected Bit
bit In 1: to set the bit
num_dec SET BIT y 0: to reset the bit
V. 7.0
Index Base: 0 Parameter Description
bit_sel = 0 0-based indexing on / off (0 / 1 in icon)
Valid for >= V.5.x Bit_value set / reset
Bin_2_dec
The block Bin_2_Dec converts a Bit-vector Run-Code: No library function available. Attention:
(8-Bit, 16-Bit, 32-Bit, or 64 Bit) into an num_dec = 0; Block is implemented as The Bit-order of this block
integer. for ( i=0; i<no_bits; i++) standard code. different to SDA3.1.
{ For consistency reasons, use
Port I/O Description num_dec = num_dec + bit_vector[no_bits-i] Bit set/read blocks of SDA 5.x!
bit_vector In vector (int) with 8|16|32|64 * 2^i;
elem. }
num_dec Out int
Obsolete with SDA no_bits Number of Bits (8|16|32|64)
5.3
Dec_2_bin
Dec_2_Bin block converts a decimal number Run-Code No library function available. Attention:
(8-Bit, 16-Bit, 32-Bit, or 64 Bit Integer) to a for ( i=0; i<no_bits; i++) Block is implemented as The Bit-order of this block
binary vector. { standard code. different to SDA3.1 and
bit_vector[no_bits - i] = num_dec.i; identical to SDA_4.0.
Port I/O Description } For consistency reasons, use
num_dec In decimal number Bit set/read blocks of SDA 5.x!
bit_vector Out vector (int) with 8|16|32|64
elem.
Obsolete with SDA Parameter Description

no_bits Number of Bits (8|16|32|64)
5.3

Width
Returns the number of elements of the input Not supported for ACG
data.
Only for U8 variables, this is equal to the
number of bytes.

Valid for >= V.5.x In In input data (scalar, vector, matrix)
Y Out number of elements
Set_array
Outputs an array with given size and value.

array Out output array
Optional ports:
init In initial value
Initial value (if init is no input)
Size from data definition:
use the array size definition from
an existing data definition
Annotation reduced (yes or no)

NC_ROW Number of rows
NC_COL Number of columns
Valid for >= V.5.x

Write_Matrix
Reads, or writes a Matrix to/from Workspace.
This block is used to implement NVMY
accesses.
There are 2 variants of the block: STORE
and READ/INIT. Depending on this variant,
the block will automatically be triggered by
the event NVMSTO or NVMRES/INI. If an
error is supposed to be simulated, the
READ/INIT will be triggered by NVMINI,
otherwise by NVMRES
Additionally, it is possible to initialize the
output data by a logical condition in case of
trigger by NVMRES.

Valid for >= V.5.x
Out Out matrix
Optional ports:
in In input matrix values (only for
store variant)
cond In (only for READ/INIT)
0: use stored data
1: initialize data to "init"
init init value
Matrix-Name Name of Matrix (e.g.
IP_LAMB_BAS_0)
is used to determine the matrix
size
Access-mode store: write matrix to
Workspace
read/init: read matrix from Workspace

SDA SW Block Description

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SDA SW-Block Description Version of Description: 5.

SDA SW-Block Description "AT Basic Blocks", "AT_LIB"

Purpose of this document is

Reference: SDA-Release 8.0

SDA_SW_Block_Description.Docx, 21.02.14 Page: 1/149

General remarks for all block versions:

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General remarks for block version 5.x (SDA_5.0 not SDA_5.2!):

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General remarks for block version 6.x:

 No change in functional behaviour of blocks from V.5.0 to V.5.2!

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General remarks for block version 7.x:

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y = u1 *u2  s16_mul_s16_u16 If SW-Lib is selected in ACG-Tab

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Y =u1 / u2  s16_mul_s16_u16 If SW-Lib is selected in ACG-Tab

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Obsolete with SDA

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EQ: Implementation as standard C-code No Library necessary

Valid for >= V.5.x

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If ((MN < u)&&(u <= MX))

RIGHT OPEN INTERVAL:

If ((MN <= u)&&(u < MX))

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Obsolete with SDA example: 2z

Use *_lsl_* for z>0 and

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Valid for >= V.6.x

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For all other use cases the block

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Note: 1) Turn ON delay works other way round.

Use _lsl_ for z>0 and