Department of Information Technology

CO-KEC302.4: Implement the Design procedure of Synchronous & Asynchronous

Sequential Circuits.
Subject: Digital Electronics. Subject Code:KOE-039
Session : 2022-23 Branch: IT/ 2nd. Year/B,C & D
Date of submission: 31/01/2023
ASSIGNMENT CUM TUTORIAL-4 [Unit-4]

Qns 1 A sequential circuit with two D flip-flops A and B and an input X and output Y. The circuit is
described by the following next state and output equations.
𝑨(𝒕 + 𝟏) = 𝑨𝑿 + 𝑩𝑿
̅𝑿
𝑩(𝒕 + 𝟏) = 𝑨
̅
𝒀 = (𝑨 + 𝑩)𝑿
(i) Derive the state table
(ii) Draw the logic diagram of the circuit
(iii) Derive the state diagram
Qns 2 Design a clocked sequential circuit whose state diagram is given in figure using JK flip-flop.
Qns 3 Draw the reduced state table and reduced state diagram for the state diagram given below.

Qns 4 Derive the state table and state diagram for given sequential circuits
(i)
(ii)

Qns 5 Derive the transition table for the asynchronous sequential circuit shown in given figure. Determine the
sequence of internal states Y1Y2 for the following sequence of inputs x1x2: 00,10,11,01,11,10,00.

Qns 6 A sequential circuit has one flip-flop Q, two inputs x and y, and one output S. It consists of a full-adder
circuit connected to a D flip-flop, as shown in given figure. Derive the state table and state diagram of the
sequential circuit. What does this circuit represent?
Qns 7 Design a primitive state diagram and state table for a circuit with two asynchronous inputs (X and Y) and
one output Z. This circuit is to be designed so that if any change takes place on X and Y, Z is to change states.
Assume initially that the two inputs never change simultaneously.

Qns 8 Distinguish between static and dynamic hazard. How will you determine hazard in combinational
circuits?

Qns 9 Distinguish between critical and non-critical race condition. How will you determine race conditions in
circuits and how we can reduce it from the circuits?

Qns 10 Derive the transition table for the asynchronous sequential circuit as shown in figure
Qns 11 Design a gated latch circuit with two inputs G (gate) and D (data) and one output Q. Binary
information present at the D input is transferred to the Q output when G is equal to 1. The Q output will follow
the D input as long as G = 1. When G goes to 0, the information that was present at the D input at the time the
transition occurred is retained at the Q output. The gated latch is a memory element that accepts the value of D
when G = 1 and retains this value after G goes to 0. Once G = 0, a change in D does not change the value of the
output Q.

Qns 12 Design an asynchronous sequential circuit with two input x1 and x2 and one output z. initially both
inputs are equal to zero. When x1 or x2 becomes 1', the output z becomes 1. When the second input also
becomes 1, the output changes to 0. the output says at 0 until the circuit goes back to the initial state.

Qns 13 (i)Distinguish between static and dynamic hazard. How will you determine hazard in combinational
circuits? (ii)Draw the logic diagram of the product-of-sums expression Y= (x1+x2’) (x2+x3) Show that there is
a static 0-hazard when x1 and x3 are equal to 0 and x2 goes from 0 to 1. Find a way to remove the hazard by
adding one more OR gate. [AKTU 2021-22, KOE-039,Qns 6b]