“The 2004 IEEE Asia-Pacific Conference on ‘Creuits and Systems, December 69,2008, AMULTI-MODE LDO-BASED LI-ION BATTERY CHARGER IN 0.354M. (CMOS TECHNOLOGY CChia-Chun Tsai, Chin-Yen Lin, Yub-Shyan Hwang, Wen-Ta Lee and Trong-Yen Lee ce4@len aut edu.t,cylin@visen.ntut edutw, bys@en ntut edu.tw, wtleeen.ntt.edu.t, tylee@en.mtutedu.tw Institute of Computer, Communication and Control [National Taipei University of Technology, Tai ABSTRACT ‘The paper designs a CMOS Li-lon battery charge that ‘uses milimode low dropout (LDO) voltage regulator associated with current sense circuit to supply tickle ‘curent, large constant curent and constant voltage. The ‘hole circuits have been approved by HSPICE with ‘TSMC 0.35um 2P4M CMOS process. The simulation results provide the trickle current of 150mA, the maximum charging current of 312mA and charging voltage of 4.2V at input volage of 4.5V. The power efficiency of 72.3% is acceptable under the power of 128W. INTRODUCTION Currently, the number of portable personal communication systems such as mobile phones and laptop computers has grown explosively. These developments have resulted in massive demand for Lisfon batteries. Since the quality of battery should be classified inthe charging process, the accuracy of Lifon battery charger is very important. Several Li-on battery chargers based on BJT and BiCMOS charging IC had been proposed (1-4) In this paper, we design a CMOS charging IC that includes charging circuit, temperature sense circuit, charging contol cireuit and current sense circuit on a chip. In charging circuit, we propose multi-mode low dropout (LDO) voltage regulator associated with the ccurent sense circuit, The mult-mede LDO can supply available constant voltage 42V, constant current 312mA and tickle current to battery charging. A. dynamic biasing technique is used to the multi-mode LDO that achieves stability [5]. This LDO is designed to work with both tantalum and ceramic output capacitors. Simulation results have also approved by HSPICE with TSMC (035m 2P4M CMOS process. Section 2 introduces the system overview of LDO-based Li-lon charger. The circuit design for our system architecture is presented in details in Section 3. Section 4 shows the simulation results. Finally, the conclusion is made in Section 5 2. SYSTEM OVERVIEW Figure 1 shows the system architecture of our Lison battery charger thet consists of multimode LDO, 0-7803-8660-104/520.00 62004 IEEE 49 , Taiwan, RO.C. charging control block, sleep mode and over voltage protection block, temperature sense block, current sense Dlock, reverse Voltage protection, over curent and charging stop block, timer and oscillator, The multi-mode LDO can Support trickle current, constant ccurent and constant voltage to charge a Lision batter. ‘Charging control block is operated to control multi-mode LO Jin different states of trickle curent, constant current and constant voltage. When Voo was removed, the voltage atthe negative terminal of comparator ul was less than the voltage Vaar of Liclon battery and the battery charging system would be tumed off. On the ‘other hand, when Vase was higher than Vo, then ul should prevent the system in the state of over voltage ‘The reverse voltage protective circuit i utilized to avoid large leakage current problem in the CMOS process. We modify the ciruit in [6] as our reverse voltage protection. ‘The temperature sense block, over current and charging stop block and charging timer are required to avoid causing damage to battery pack and charging circuit Fig. 1 The system architecture of our Li-fon battery charger According to the typical Lion battery charging profile [7] shown in Fig 2, ifthe battery voltage is lower than the threshold voltage Vet, the battery capacity is Viewed as empty completely. In this case we cannot use large current for charging to the battery that may cause the possible short-circuit condition. Thus, the charger precharges with a low current (It) initially. When the battery is charged up to Vet, the charger applied a fixed ‘current (Ie) to the battery. This operation state is ealedconstant curent charging state. The battery voltage rises uring this sat. The charger will transfer to the constant ‘voltage state if the battery voltage arrives about Vew. The state wll decrease the charging current while the battery voltage keeps Vev. Battery charging would stop when the charging current decreased to Teutof [8], that is, the battery was charged to full eapacity Fig. 2 The charging profile of Licfon battery 3. CIRCUIT DESIGN Due to the space limitation, we concentrate on the circuit design of temperature sense and proposed ‘multi-mode LD inthe following subsections 3.1 Temperature Sense Circuit Figure 3 shows the typical circuit to sense a battery temperature. The circuit employs @ window-voltage comparator associated with a thermistor of negative temperature coefficient (NTC). Fig 4 shows the resistance-temperature characteristic of the measured [NTC thermistor. The thermistor i highly non-linear. ou =| Fig. 4 The characteristic of measured NTC thermistor 30 In temperature sense circuit, if the thermistor temperature is above 50” C or below 0° C, the OR-gate ‘output is high and let charging contol circuit to disable ‘multi-mode LDO. Thus, the operation of charging Li-lon batery pack would disable. That is, the charger can ‘works inthe range of 0" C to 50° C. 3.2 Proposed Multi-mode LDO ‘A multi-mode LDO for portable systems has been presented in [9]. We designed another multimode LDO associated with current sense circuit for Li-lon battery charger shown in Fig. . From the figure, there are high power driver (HPD) and low power driver (LPD) stages. ‘The LPD stage must have high bandwidth and a large output swing. The LPD stage output must be referred to the positive supply and the bias current of LPD stage ‘must be minimized, The HPD stage must have elevated bandwidth and the large slew current and output swing. The bias current of HPD stage must be minimized too. ‘The pass devices in the multi-mode LDO are controlled such that only one driver is active at any time. The charging control circuit is used to contol either LPD or HPD-mode LDO. Fig. $ Proposed multi-mode LDO ‘The multi-mode LDO supports two charging curents and one charging voltage. First, ifthe voltage of battery was lower than 2.9V (Vet), the charging control circuit would tum the MSI off andthe MS2 on. The LPD-mode LDO was acted. LPD-mode LDO works as @ trickle current source that gives 1S0mA (lt) curent to the battery. The voltage was reached 2.9V that caused MS2 off and MSI on, and then HPD-mode LDO was run that offered 312mA (lec) steady current to charging batery ‘The battery voltage rises during constant curent sae. ‘The state continues until the battery reached the charge regulation voltage 42V (Vev). The multi-mode system supplied a constant voltage 42V to the battery Meanvhile, the internal current sense circuit would reasure the charging curent. Battery charging was finished when current sense circuit detects the charging current decline to leutofT. It means thatthe Litton battery ‘was to approach fll capacity ‘An example ofthe detailed circuit of HPD-mode LDO is shown in Fig, 6 derived fom Fig, 5. Transistors(MIMS are constructed to single stage diferential error amplifier connected tothe input of HPD stage. R&D! and RMB act as a voltage divider to produce a feedback voltage VB. Re and Ce ae for Miller compensation, M6 and MIO-MI4 are formed as dynamic current sense, Since the pass device M7 has « large gate capacitance that is for the load of the differential amplifier, we use the HPD to drive to pass device. The slew rate atthe node pgate is limited in low power regultor and that can De expressed as: Slew rate = AVpgate/ At Idrive/Cpgate (1) where Cpgate isthe input capacitance ofthe pass device M7 and Idrive is the output current of HPD that may charge or discharge Cpeate. The HPD is required high bandwidth ro modulate the curent flow through the pass device quickly to maintain the output voltage under various loads, The HPD slew current must be large enough to drive the Cpgate. For a large Idrive, the AVppeate would be changed as fast as possible. In order to have good transient response and high current efficiency, the dynamic feedback technique is used [5] Loading curent is sensed continuously. MIO misrors a ratio of ouput current and the mirrared current Im flows through MII and M12. Then M6 is dynamic feedback a ratio of Im, By choosing an accurate feedback ratio, good current efficiency and transient response can be obtained ‘The current flowing inthe differential amplifier ean be expressed as: lamp > Ibias + * Tout @ where Ibis isthe constant curent in MS contalled by \VBI. lout is the loading curent atthe node VOUT and k is feedback ratio determined by the ratio between M6, M7, MIO and MI2, lamp is directly proportional to Idrive and is the total bias curent of the error amplifier. ‘The LDO current efficiency can be defined as following ° where fq is the quiescent current ofthe regulator. Since Iq is always smaller enough than lout, the current efficiency can be as high 3s 99%, ‘The performance parameter of load regulation is a measurement of LDO’s ability to maintain its output voltage under various loading conditions and is defined (Current efficiency = lout (Igtlout ) Load Regulation = AVoat/ Alou ® ‘The simulation result for the load regulation of our HPD-mode LDO is 38ppnvma, ‘The other measure parameter is line regulation that isa measurement of LDO’s ability to maintain its output voltage under various input voltage and i represented as: © The simulation result for the Hine regulation of our LHPD-mode LDO is 0.1996/V. Line Regulation ~ AVose/ AVin st Fig. 6 The detailed cireuit of our HPD-mode LDO ‘The curent sense circuit is used to detect the ouput current of HPD-mode LDO and Vesnest see is applied to detect the case of over curent and charging stop. The current sense circuit is modified from the transresistance amplifier [10] that consists of transistors M13 and M14 and a current source Is. The circuit converts Im into ‘Veuest seas. The input current Im is applied to the drain ‘of M13 and the output voltage is obtained at the source of MI4. When charging curent is over the battery capacity, the output voltage of the transresistance circuit reaches the upper bound voltage and battery charging cycle will be stopped. Then the charging current arrives. al Jeutoff, the transresistance circuit transfers leutoff o a charging completed volage and the battery is to approach fll capacity. The Wansresistance circuits more linear in both single ended and balanced configurations and has a wide range of transresistance gain achieved by varying the WIL ratio of ML3. In order fo maintain the feedbeck ratio as accurate as possible, the voltage at node NI is forced t0 be equal to the output voluge by contvolling the gate voltage VB2 of MII 4, SIMULATION RESULTS ‘The simulation results to the whole cireuits have been approved by HSPICE. Fig. 7(a) shows the input vs. ‘output characteristic of our HPD-mode LDO batery charging circuit. The HPD-mode charger begins dropping at 45V of input voltage and the range of dropout region is between 1V and 4.5 of input voltages. ‘The dropout voltage of the HPD-mode LDO is 300mV, and the output voltage is 4.2V. Fig, 1b) presents the settling time of HPD-mode LDO. The HPD-mode LD ‘output voltage is unstable between Ius and 2.32. After 232s, the charging voltage is stable in 4.2V. The setting time is 1.32us. Ithas a smaller setting time than that of [5]. Fig. 7(c) illustrates the input voltage vs. ‘tpt current characteristic of the HPD-mode LDO. The ‘maximum output current is 312mA when the input voltage is over 2.SV. The current always keep constant that is very suitable for charging to Li-lon batteries. Fig. 8 shows the transfer characteristic ofthe ouput current sense in HPD-mode LDO. Over charging euent would occur in charging current of up to 1000mA and it‘charging has completed kes Veurent sine 2.37, thus the charging would be Table terminated. When Veurent see is 1.96V, the batlery Simulation results for proposed CMOS battery charger Process Technology [0.35pm CMOS q F q Power Suppl 45v i i ‘Output voltage 42v ‘Maximum charging current 312mA. ‘Load regulation 38ppmimna, Line regulation 0.1 Power efficiency 72.3% Power dissipation 128 W Settling time: 132us ACKNOWLEDGMENT © Fig. 7 (a) The characteristic of Vin vs. Vout, (b) the settling time and (6) the Vin ws Tout of the HPD-mode LDO Bw VB ae 26 is Ig SPM PK PEI HS > ies caring care (2) Fig. 8 The transfer characteristic ofthe output current sense in HPD-made LDO 5. CONCLUSION ‘A CMOS Liclon battery charger has been proposed with the TSMC 035m CMOS process, The charging circuit allows input voltage of 48Y, charging voltage of 42N, trickle current of 1SOmA and large constant current fof 312mA. The thermal protection and over charging ceutent and volage protection ae suitable to provide the end user with a safety battery. Table I summaries the specification of our CMOS Li-fon battery charger. The power efficiency of 72.3% is acceptable under the power of 128 W, 32 ‘The authors would like to thank the National Science Council of Taiwan R.OLC. for the financial supporting. ‘The work was sponsored by NSC-92-2220-E-027.001 and NSC-92-2213-E-027-048. REFERENCES {1] Sang-tiva Jung, Young-in Woo, Nam-in Kim and Gyu-iyeong Cho, “Analog-digis! switching mixed mode low ripple high efficiency Liion battery charger,” IEEE Thirg-Sith IAS Arua Meeting, pp. 2473-2477, Oct 2001 ‘Texas Instrument Ine,, BQ2057 data sheet, 2002 V.L. Teofilo, LV. Mert and R. P. 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