Data Sheet No.

PD60018-L

IR2121
CURRENT LIMITING LOW SIDE DRIVER
Features Product Summary
• Gate drive supply range from 12 to 18V
• Undervoltage lockout VOFFSET 5V max.
• Current detection and limiting loop to limit driven
power transistor current IO+/- 1A / 2A
• Error lead indicates fault conditions and programs
shutdown time VOUT 12 - 18V
• Output in phase with input
• 2.5V, 5V and 15V input logic compatible VCSth 230 mV

Description ton/off (typ.) 150 & 150 ns

The IR2121 is a high speed power MOSFET and
IGBT driver with over-current limiting protection cir- Package
cuitry. Latch immune CMOS technology enables rug-
gedized monolithic construction. Logic inputs are
compatible with standard CMOS or LSTTL outputs,
down to 2.5V logic. The output driver features a
high pulse current buffer stage designed for mini-
mum cross-conduction. The protection circuitry de-
tects over-current in the driven power transistor and
limits the gate drive voltage. Cycle-by-cycle shut-
down is programmed by an external capacitor which 8-Lead PDIP
directly controls the time interval between detection
of the over-current limiting condition and latched shutdown. The output can be used to drive an N-channel
power MOSFET or IGBT in the low side configuration.

Typical Connection
TO
LOAD

VCC VCC VCC

IN IN OUT
ERR CS
COM VS

(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

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IR2121
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Parameter Value
Symbol Definition Min. Max. Units
VCC Fixed Supply Voltage -0.3 25
VS Gate Drive Return Voltage VCC - 25 VCC + 0.3
VO Output Voltage VS - 0.3 VCC + 0.3
V
VIN Logic Input Voltage -0.3 VCC + 0.3
VERR Error Signal Voltage -0.3 VCC + 0.3
VCS Current Sense Voltage VS - 0.3 VCC + 0.3
PD Package Power Dissipation @ TA ≤ +25°C — 1.0 W
RthJA Thermal Resistance, Junction to Ambient — 125 °C/W
TJ Junction Temperature — 150
TS Storage Temperature -55 150 °C
TL Lead Temperature (Soldering, 10 seconds) — 300

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.

Parameter Value
Symbol Definition Min. Max. Units
VCC Fixed Supply Voltage VS + 12 VS + 18
VS Gate Drive Return Voltage -5 5
VO Output Voltage VS VCC
V
VIN Logic Input Voltage 0 VCC
VERR Error Signal Voltage 0 VCC
VCS Current Sense Signal Voltage VS VCC
TA Ambient Temperature -40 125 °C

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 IR2121
Dynamic Electrical Characteristics
VBIAS (VCC) = 15V, CL = 3300 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics are
defined in Figures 2 through 5.

Parameter Value
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
ton Turn-On Propagation Delay 7 — 150 200
ns VIN = 0 & 5V
toff Turn-Off Propagation Delay 8 — 200 250
tsd ERR Shutdown Propagation Delay 9 — 1.7 2.2 µs
tr Turn-On Rise Time 10 — 43 60
ns
tf Turn-Off Fall Time 11 — 26 35
tcs CS Shutdown Propagation Delay 12 — 0.7 1.2
µs
terr CS to ERR Pull-Up Propagation Delay 13 — 9.0 12 CERR = 270 pF

Static Electrical Characteristics

VBIAS (VCC) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM.
The VO and IO parameters are referenced to VS .

Parameter Value
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
VIH Logic “1” Input Voltage 14 2.2 — —
V
VIL Logic “0” Input Voltage 15 — — 0.8
VCSTH+ CS Input Positive Going Threshold 16 150 230 320
VCSTH- CS Input Negative Going Threshold 17 130 210 300
mV
VOH High Level Output Voltage, VBIAS - VO 18 — — 100 IO = 0A
VOL Low Level Output Voltage, VO 19 — — 100 IO = 0A
IQCC Quiescent VCC Supply Current 20 — 1.1 2.2 mA VIN = VCS = 0V or 5V
IIN+ Logic “1” Input Bias Current 21 — 4.5 10 VIN = 5V
IIN- Logic “0” Input Bias Current 22 — — 1.0 VIN = 0V
µA
ICS+ “High” CS Bias Current 23 — 4.5 10 VCS = 3V or 5V
ICS- “Low” CS Bias Current 24 — — 1.0 VCS = 0V
VCCUV+ VCC Supply Undervoltage Positive Going 25 8.3 8.9 9.6
Threshold
V
VCCUV- VCC Supply Undervoltage Negative Going 26 7.3 8.0 8.7
Threshold
IERR ERR Timing Charge Current 27 65 100 130 VIN = 5V, VCS = 3V
µA
ERR < VERR+
IERR+ ERR Pull-Up Current 28 8.0 15 — VIN = 5V, VCS = 3V
mA ERR > VERR+
IERR- ERR Pull-Down Current 29 16 30 — VIN = 0V
IO+ Output High Short Circuit Pulsed Current 30 1.0 1.6 — VO = 0V, VIN = 5V
PW ≤ 10 µs
A
IO- Output Low Short Circuit Pulsed Current 31 2.0 3.3 — VO = 15V, VIN = 0V
PW ≤ 10 µs

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IR2121
Functional Block Diagram

V CC V CC

UV
DETECT
BUFFER OUT

IN PRE
DRIVER
VS
1.8V
0.23V
-
ERROR
TIMING + CS

ERR AMPLIFER

500 ns
1.8V BLANK

COM COMPARATOR

Lead Definitions
Lead
Symbol Description
VCC Logic and gate drive supply
IN Logic input for gate driver output (OUT), in phase with OUT
ERR Serves multiple functions; status reporting, linear mode timing and cycle by cycle logic
shutdown
COM Logic ground
OUT Gate drive output
VS Gate drive supply return
CS Current sense input to current sense comparator

Lead Assignments

8 Lead PDIP

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 IR2121

IN

CS

ERR

OUT

Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Test Circuit

50% 50%
50%
IN
CS
ton tr toff tf
t cs
90% 90% OUT 90%

OUT 10% 10%

Figure 3. Switching Time Waveform Definitions Figure 4. ERR Shutdown Waveform Definitions

50%
CS
50%
terr
CS
tcs 50%
HO 90% 1.8V
ERR

dt

dV 1.8V
dt = C × =C×
IERR 100 uA

Figure 5. CS Shutdown Waveform Definitions Figure 6. CS to ERR Waveform Definitions

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IR2121
500 500

400 400
Turn-On Delay Time (ns)

Turn-On Time (ns)

300 300
Max.

200 200 Typ.

Max.

Typ.
100 100

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. Voltage

500 500

400 400
Turn-Off Delay Time (ns)

Turn-Off Time (ns)

300 300

Max.
200 200
Typ.
Max.
Typ.
100 100

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 8A. Turn-Off Time vs. Temperature Figure 8B. Turn-Off Time vs. Voltage

5.00 5.00
ERR to Output Shutdown Delay Time (µs)

ERR to Output Shutdown Delay Time (µs)

4.00 4.00

3.00 3.00

Max.

2.00 Typ. 2.00

Max.

1.00 1.00 Typ.

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 9A. ERR to Output Shutdown vs. Temperature Figure 9B. ERR to Output Shutdown vs. Voltage

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100 100

80 80
Max.
Turn-On Rise Time (ns)

Turn-On Rise Time (ns)

60 Max. 60
Typ.

40 Typ. 40

20 20

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 10A. Turn-On Rise Time vs. Temperature Figure 10B. Turn-On Rise Time vs. Voltage

100 100

80 80
Turn-Off Fall Time (ns)

Turn-Off Fall Time (ns)

60 60

Max.

40 40
Max. Typ.

Typ.
20 20

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 11A. Turn-Off Fall Time vs. Temperature Figure 11B. Turn-Off Fall Time vs. Voltage

2.00 2.00
CS to Output Shutdown Delay Time (µs)
CS to Output Shutdown Delay Time (µs)

1.60 1.60
Max.

1.20 Max. 1.20

Typ.
0.80 0.80
Typ.

0.40 0.40

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 12A. CS to Output Shutdown vs. Temperature Figure 12B. CS to Output Shutdown vs. Voltage

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IR2121
20.0 20.0

16.0 16.0
CS to ERR Pull-Up Delay Time (µs)

CS to ERR Pull-Up Delay Time (µs)

Max.
12.0 12.0
M ax.

Typ.
Typ.
8.0 8.0

4.0 4.0

0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 13A. CS to ERR Pull-Up vs. Temperature Figure 13B. CS to ERR Pull-Up vs. Voltage

5.00 5.00

4.00 4.00
Logic "1" Input Threshold (V)

Logic "1" Input Threshold (V)

3.00 3.00

Min. Min.

2.00 2.00

1.00 1.00

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)

Figure 14A. Logic “1” Input Threshold vs. Temperature Figure 14B. Logic “1” Input Threshold vs. Voltage

5.00 5.00

4.00 4.00
Logic "0" Input Threshold (V)
Logic "0" Input Threshold (V)

3.00 3.00

2.00 2.00

1.00 Max. 1.00 Max.

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)

Figure 15A. Logic “0” Input Threshold vs. Temperature Figure 15B. Logic “0” Input Threshold vs. Voltage

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 IR2121
500 500
CS Input Positive Going Threshold (mV)

CS Input Positive Going Threshold (mV)

400 400

Max. Max.

300 300

Typ. Typ.

200 200
Min. Min.

100 100

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 16A. CS Input Threshold (+) vs. Temperature Figure 16B. CS Input Threshold (+) vs. Voltage

500 500
CS Input Negative Going Threshold (mV)

CS Input Negative Going Threshold (mV)

400 400

300 300
Max. Max.

Typ. Typ.
200 200

Min. Min.

100 100

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 17A. CS Input Threshold (-) vs. Temperature Figure 17B. CS Input Threshold (-) vs. Voltage

1.00 1.00

0.80 0.80
High Level Output Voltage (V)

High Level Output Voltage (V)

0.60 0.60

0.40 0.40

0.20 0.20
Max. Max.

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 18A. High Level Output vs. Temperature Figure 18B. High Level Output vs. Voltage

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IR2121
1.00 1.00

0.80 0.80
Low Level Output Voltage (V)

Low Level Output Voltage (V)

0.60 0.60

0.40 0.40

0.20 0.20
Max. Max.

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 19A. Low Level Output vs. Temperature Figure 19B. Low Level Output vs. Voltage

5.00 5.00

4.00 4.00
VCC Supply Current (mA)

VCC Supply Current (mA)

3.00 3.00

Max.
2.00 2.00 Max.

1.00 Typ. 1.00 Typ.

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Supply Voltage (V)

Figure 20A. VCC Supply Current vs. Temperature Figure 20B. VCC Supply Current vs. Voltage

25 25

20 20
Logic "1" Input Bias Current (µA)

Logic "1" Input Bias Current (µA)

15 15

Max.
10 10

Max.
Typ.
5 5
Typ.

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)

Figure 21A. Logic “1” Input Current vs. Temperature Figure 21B. Logic “1” Input Current vs. Voltage

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5.00 5.00

4.00 4.00
Logic "0" Input Bias Current (µA)

Logic "0" Input Bias Current (µA)

3.00 3.00

2.00 2.00

Max. Max.
1.00 1.00

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)

Figure 22A. Logic “0” Input Current vs. Temperature Figure 22B. Logic “0” Input Current vs. Voltage

25.0 25.0

20.0 20.0
"High" CS Bias Current (µA)

"High" CS Bias Current (µA)

15.0 15.0

Max.
10.0 10.0
Max.
Typ.
Typ.
5.0 5.0

0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 23A. “High” CS Bias Current vs. Temperature Figure 23B. “High” CS Bias Current vs. Voltage

5.00 5.00

4.00 4.00
"Low" CS Bias Current (µA)

"Low" CS Bias Current (µA)

3.00 3.00

2.00 2.00

Max. Max.
1.00 1.00

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 24A. “Low” CS Bias Current vs. Temperature Figure 24B. “Low” CS Bias Current vs. Voltage

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IR2121
11.0 11.0

10.0 10.0
Max.
VCC Undervoltage Lockout + (V)

VCC Undervoltage Lockout - (V)

Typ.
9.0 9.0
Max.

Min.
Typ.
8.0 8.0

Min.

7.0 7.0

6.0 6.0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Figure 25. VCC Undervoltage (+) vs. Temperature Figure 26. VCC Undervoltage (-) vs. Temperature

250 250

200 200
ERR Timing Charge Current (µA)

ERR Timing Charge Current (µA)

150 150
Max. Max.

Typ.
Typ.
100 100
Min.
Min.

50 50

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Logic Supply Voltage (V)

Figure 27A. ERR Timing Charge Current vs. Temperature Figure 27B. ERR Timing Charge Current vs. Voltage

25.0 25.0

20.0 20.0
ERR Pull-Up Current (mA)
ERR Pull-Up Current (mA)

Typ.

15.0 15.0

Typ.

10.0 Min. 10.0

Min.

5.0 5.0

0.0 0.0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20

Temperature (°C) VCC Logic Supply Voltage (V)

Figure 28A. ERR Pull-Up Current vs. Temperature Figure 28B. ERR Pull-Up Current vs. Voltage

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 IR2121
50 50

40 40

ERR Pull-Down Current (mA)

ERR Pull-Down Current (mA)

Typ.

30 30

Typ.
20 Min. 20

Max.
10 10

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) V CC Logic Supply Voltage (V)

Figure 29A. ERR Pull-Down Current vs.Temperature Figure 29B. ERR Pull-Down Current vs. Voltage

2.50 2.50

2.00 Typ. 2.00

Output Source Current (A)

Output Source Current (A)

1.50 1.50

Min.
Typ.
1.00 1.00

Min.
0.50 0.50

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 30A. Output Source Current vs.Temperature Figure 30B. Output Source Current vs. Voltage

5.00 5.00

4.00 Typ. 4.00

Output Sink Current (A)

Output Sink Current (A)

3.00 3.00

Min.
Typ.
2.00 2.00

Min.
1.00 1.00

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 31A. Output Sink Current vs.Temperature Figure 31B. Output Sink Current vs. Voltage

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IR2121

300 300

250 250
Max.
200
Turn-On Delay Time (ns)

Turn-Off Delay Time (ns)

200

150 150

100 100
Typ.
50 50

0 0
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
Input Voltage (V) Input Voltage (V)

Figure 32A. Turn-On Time vs. Input Voltage Figure 32B. Turn-Off Time vs. Input Voltage

0.00

-3.00
Typ.
VS Offset Supply Voltage (V)

-6.00

-9.00

-12.00

-15.00
10 12 14 16 18 20
VBS Floating Supply Voltage (V)

Figure 33. Maximum VS Negative Offset vs. Supply

Voltage

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Case outline

01-6014
8-Lead PDIP 01-3003 01 (MS-001AB)

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 10/6/2003

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