ADVANCED MICROPROCESSORS

Session IV Prof. S. Jagannathan, HOD Department of Electronics and Communication Engineering, R.V. College of Engineering, Bangalore

Contents
Control signals indicating actions in 8086 Real mode memory addressing

The control signals indicated below govern all the actions of the pertinent blocks. The queue status signals indicate what is the present status of the queue.

Queue Status
QS1 0 0 1 1 QS0 0 1 0 1 Indication No operation First byte of the opcode from the queue Empty queue Subsequent byte from the queue

The memory in 8086 is organized into odd and even blocks of bytes of data. The memory manufacturers never make the memory registers of size 16 bits or 32 bits etc. Normally, byte size registers are present in memory. For example, 256 X 8 type of memories are available indicating 256 bytes can be stored in such a memory chip. These memory blocks can be divided into odd group as well as even group of memory.

In order to access even group of memory i.e. the addresses will end in 0, 2, 4, 6, 8, etc. (the LSB is A0=0), all that one has to do is to output the address. On the other hand in order to access odd group of memory i.e. the addresses will end in 1, 3, 5,7,9 (the LSB is A0 1) we have to send bus high enable ( BHE ) signal for chip select.

Bus High Enable / Status

BHE 0 0 1 1

A0 0 1 0 1

Indications Whole word Upper byte from or to odd address Lower byte from or to even address none

Now there are 8 status signals in 8086 as compared to only 2 in 8085. The signals and their functions are as given below.

Status Details
S2
0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1
S
1

Indication Interrupt Acknowledge Read I/O port Write I/O port Halt Code access Read memory Write memory Passive

0 1 0 1 0 1 0 1

S4 0 0 1 1

S3 0 1 0 1

Indications Alternate data Stack Code or none Data

S5
S6

----- Value of Interrupt Enable flag ----- Always low (logical) indicating 8086 is on the bus. If it is tristated another bus master has taken control of the system bus. ----- Used by 8087 numeric coprocessor to determine whether the CPU is a 8086 or 8088

S7

Real mode memory addressing

The segment registers have contents of 16-bits. Hence, 216 = 64Kb of memory can be addressed by segment registers. Normally, the segment base register contains three zeroes, so that each segment can start from say E0000 to EFFFF. The segments namely code segment, data segment, stack segment and extra segment for a particular program can be contiguous, separate or in case of small programs overlapping even.

For example, code segment is supposed to have 64Kb and in case of small programs data segment may be within the code segment. To give you an example of the segment base and offset, we can consider the telephone numbers. For example, 23322651 is a telephone number out of which, 2 is an universal code, 332 is the area code, and 2651 is the offset in that area. In other words, the area telephone numbers can occupy 23320000 to 23329999.

One way four 64-Kbyte segment might be positioned within the 1-Mbyte address space of an 8086
FFFFFH 7FFFFH PHYSICAL ADDRESS MEMORY HIGHEST ADDRESS TOP OF EXTRA SEGMENT EXTRA SEGMENT BASE ES=7000H TOP OF STACK SEGMENT 64K 50000H 4489FH 64K 348A0H 2FFFFH 64K 20000H BOTTOM OF DATA SEGMENT CODE SEGMENT BASE CS=348AH TOP OF DATA SEGMENT STACK SEGMENT BASE SS=5000H TOP OF CODE SEGMENT

64K 70000H 5FFFFH

Addition of IP to CS to produce the physical address of the code byte

PHYSICAL ADDRESS MEMORY TOP OF CODE SEGMENT

4489FH

38AB4H IP=4214H 348A0H

CODE BYTE START OF CODE SEGMENT CS=348AH

Segmentation
The 8086 microprocessor has 20 bit address pins. These are capable of addressing 220 = 1Mega Byte memory. To generate this 20 bit physical address from 2 sixteen bit registers, the following procedure is adopted. The 20 bit address is generated from two 16-bit registers. The first 16-bit register is called the segment base register. These are code segment registers to hold programs, data segment register to keep data, stack segment register for stack operations and extra segment register to keep strings of data.

The contents of the segment registers are shifted left four times with zeroes (0s) filling on the right hand side. This is similar to multiplying four hex numbers by the base 16. This multiplication process takes place in the adder and thus a 20 bit number is generated. This is called the base address. To this a 16-bit offset is added to generate the 20bit physical address.

Segmentation helps in the following way. The program is stored in code segment area. The data is stored in data segment area. In many cases the program is optimized and kept unaltered for the specific application. Normally the data is variable.

So in order to test the program with a different set of data, one need not change the program but only have to alter the data. Same is the case with stack and extra segments also, which are only different type of data storage facilities.

Generally, the program does not know the exact physical address of an instruction. The assembler, a software which converts the Assembly Language Program (MOV, ADD etc.) into machine code (3EH, 4CH etc) takes care of address generation and location.

Today we saw the Control signals indicating actions in 8086, Real mode memory addressing