Kalinga University

Department of Computer Science

Subject- MCA Sem-1st

Course- Computer Organization Architecture
Subject Code: MCA105

Unit 5

Input/Output
Peripheral Device
Input or output devices that are connected to computer are called peripheral devices. These devices are designed
to read information into or out of the memory unit upon command from the CPU and are considered to be the
part of computer system. These devices are also called peripherals.
For example: Keyboards, display units and printers are common peripheral devices.
There are three types of peripherals:
1. Input peripherals : Allows user input, from the outside world to the computer. Example: Keyboard, Mouse
etc.
2. Output peripherals: Allows information output, from the computer to the outside world. Example: Printer,
Monitor etc
3. Input-Output peripherals: Allows both input(from outside world to computer) as well as, output(from
computer to the outside world). Example: Touch screen etc.
Interfaces
Interface is a shared boundary between two separate components of the computer system which can be used to
attach two or more components to the system for communication purposes.
There are two types of interface:
1. CPU Interface
2. I/O Interface
I/O Interface
Peripherals connected to a computer need special communication links for interfacing with CPU. In computer
system, there are special hardware components between the CPU and peripherals to control or manage the input-
output transfers. These components are called input-output interface units because they provide communication
links between processor bus and peripherals. They provide a method for transferring information between
internal system and input-output devices.
The Input/output Interface is required because there are exists many differences between the central computer
and each peripheral while transferring information. Some major differences are:
1. Peripherals are electromechanical and electromagnetic devices and their manner of operation is different from
the operation of CPU and memory, which are electronic device. Therefore, a conversion of signal values may be
required.
2. The data transfer rate of peripherals is usually slower than the transfer rate of CPU, and consequently a
synchronization mechanism is needed.
3. Data codes and formats in peripherals differ from the word format in the CPU and Memory.
4. The operating modes of peripherals are differ from each other and each must be controlled so as not to disturb
the operation of other peripherals connected to CPU.
These differences are resolved through input-output interface.As input-output interface(Interface Unit) contain
various components, each of which performs one or more vital function for smooth transforming of information
between CPU and Peripherals.

I/O Ports
A connection point that acts as interface between the computer and external devices like mouse, printer, modem,
etc. is called port. Ports are of two types −
Internal port − It connects the motherboard to internal devices like hard disk drive, CD drive, internal modem,
etc.
External port − It connects the motherboard to external devices like modem, mouse, printer, flash drives, etc. or
more vital function for smooth transforming of information between CPU and Peripherals.
Serial Port
Serial ports transmit data sequentially one bit at a time. So they need only one wire to transmit 8 bits. However it
also makes them slower. Serial ports are usually 9-pin or 25-pin male connectors. They are also known as COM
(communication) ports or RS323C ports.

Parallel Port
Parallel ports can send or receive 8 bits or 1 byte at a time. Parallel ports come in form of 25-pin female pins and
are used to connect printer, scanner, external hard disk drive, etc.

USB Port
USB stands for Universal Serial Bus. It is the industry standard for short distance digital data connection. USB
port is a standardized port to connect a variety of devices like printer, camera, keyboard, speaker, etc.

PS-2 Port
PS/2 stands for Personal System/2. It is a female 6-pin port standard that connects to the male mini-DIN cable.
PS/2 was introduced by IBM to connect mouse and keyboard to personal computers. This port is now mostly
obsolete, though some systems compatible with IBM may have this port.
Infrared Port
Infrared port is a port that enables wireless exchange of data within a radius of 10m. Two devices that have
infrared ports are placed facing each other so that beams of infrared lights can be used to share data.
Bluetooth Port
Bluetooth is a telecommunication specification that facilitates wireless connection between phones, computers
and other digital devices over short range wireless connection. Bluetooth port enables synchronization between
Bluetooth-enabled devices. There are two types of Bluetooth ports −
Incoming − It is used to receive connection from Bluetooth devices.
Outgoing − It is used to request connection to other Bluetooth devices.
FireWire Port
FireWire is Apple Computer’s interface standard for enabling high speed communication using serial bus. It is
also called IEEE 1394 and used mostly for audio and video devices like digital camcorders.

Interrupts
Interrupt Hardware
An interrupt is a signal to the processor emitted by hardware or software indicating an event that needs
immediate attention. Whenever an interrupt occurs, the controller completes the execution of the current
instruction and starts the execution of an Interrupt Service Routine (ISR) or Interrupt Handler. ISR tells the
processor or controller what to do when the interrupt occurs. The interrupts can be either hardware interrupts or
software interrupts.
Hardware Interrupt
A hardware interrupt is an electronic alerting signal sent to the processor from an external device, like a disk
controller or an external peripheral. For example, when we press a key on the keyboard or move the mouse, they
trigger hardware interrupts which cause the processor to read the keystroke or mouse position.

Types of Interrupts & Exception

Interrupt
Interrupt is a signal which has highest priority from hardware or software which processor should process its
signal immediately.
Types of Interrupts:
Although interrupts have highest priority than other signals, there are many type of interrupts but basic type of
interrupts are
1. Hardware Interrupts
2. Software Interrupts

1. Hardware Interrupts: If the signal for the processor is from external device or hardware is called
hardware interrupts. Example: from keyboard we will press the key to do some action this pressing of
key in keyboard will generate a signal which is given to the processor to do action, such interrupts are
called hardware interrupts. Hardware interrupts can be classified into two types they are
• Maskable Interrupt: The hardware interrupts which can be delayed when a much highest priority
interrupt has occurred to the processor.
• Non Maskable Interrupt: The hardware which cannot be delayed and should process by the
processor immediately.

2. Software Interrupts: Software interrupt can also divided in to two types. They are
1. Normal Interrupts: the interrupts which are caused by the software instructions are called
software instructions.
2. Exception: unplanned interrupts while executing a program is called Exception. For example:
while executing a program if we got a value which should be divided by zero is called a
exception.

Exception
Exception is a software interrupt, which can be identified as a special handler routine. Exception can be
identified as an automatically occurring trap. Generally, there are no specific instructions associated with
exceptions (traps are generated using a specific instruction). So, an exception occurs due to an “exceptional”
condition that occurs during program execution.
relevant to the current process
• Faults, arithmetic traps, and synchronous traps
• Invoke software on behalf of the currently executing process

Arithmetic overflow occurs during the execution of an add, addi, or sub instruction. If the result of the
computation is too large or too small to hold in the result register, the Overflow output of the ALU will become
high during the execute state. This event triggers an exception.
Undefined instruction occurs when an unknown instruction is fetched. This exception is caused by an
instruction in the IR that has an unknown opcode or an R-type instruction that has an unknown function code.
System call occurs when the processor executes a syscall instruction. Syscall instructions are used to implement
operating system services (functions).

Modes of Data Transfer

Programmed I/O
The binary information that is received from an external device is usually stored in the memory unit. The
information that is transferred from the CPU to the external device is originated from the memory unit. CPU
merely processes the information but the source and target is always the memory unit. Data transfer between
CPU and the I/O devices may be done in different modes.
Data transfer to and from the peripherals may be done in any of the three possible ways
1. Programmed I/O.
2. Interrupt- initiated I/O.
3. Direct memory Access( DMA).
Programmed I/O: It is due to the result of the I/O instructions that are written in the computer program. Each
data item transfer is initiated by an instruction in the program. Usually the transfer is from a CPU register and
memory. In this case it requires constant monitoring by the CPU of the peripheral devices.

Example of Programmed I/O: In this case, the I/O device does not have direct access to the memory unit. A
transfer from I/O device to memory requires the execution of several instructions by the CPU, including an input
instruction to transfer the data from device to the CPU and store instruction to transfer the data from CPU to
memory. In programmed I/O, the CPU stays in the program loop until the I/O unit indicates that it is ready for
data transfer. This is a time consuming process since it needlessly keeps the CPU busy. This situation can be
avoided by using an interrupt facility.

Interrupts Initiated I/O

Interrupt- initiated I/O: Since in the above case we saw the CPU is kept busy unnecessarily. This situation can
very well be avoided by using an interrupt driven method for data transfer. By using interrupt facility and special
commands to inform the interface to issue an interrupt request signal whenever data is available from any
device. In the meantime the CPU can proceed for any other program execution. The interface meanwhile keeps
monitoring the device. Whenever it is determined that the device is ready for data transfer it initiates an interrupt
request signal to the computer. Upon detection of an external interrupt signal the CPU stops momentarily the
task that it was already performing, branches to the service program to process the I/O transfer, and then return
to the task it was originally performing.
Note: Both the methods programmed I/O and Interrupt-driven I/O require the active intervention of the
processor to transfer data between memory and the I/O module, and any data transfer must transverse a path
through the processor. Thus both these forms of I/O suffer from two inherent drawbacks.
1. The I/O transfer rate is limited by the speed with which the processor can test and service a device.
2. The processor is tied up in managing an I/O transfer; a number of instructions must be executed for each
I/O transfer.
Direct Memory Access

Direct Memory Access: The data transfer between a fast storage media such as magnetic disk and memory unit
is limited by the speed of the CPU. Thus we can allow the peripherals directly communicate with each other
using the memory buses, removing the intervention of the CPU. This type of data transfer technique is known as
DMA or direct memory access. During DMA the CPU is idle and it has no control over the memory buses. The
DMA controller takes over the buses to manage the transfer directly between the I/O devices and the memory
unit.
Bus Request : It is used by the DMA controller to request the CPU to relinquish the control of the buses.

Bus Grant : It is activated by the CPU to Inform the external DMA controller that the buses are in high
impedance state and the requesting DMA can take control of the buses. Once the DMA has taken the control of
the buses it transfers the data. This transfer can take place in many ways.

Types of DMA transfer using DMA controller:

Burst Transfer : DMA returns the bus after complete data transfer. A register is used as a byte count, being
decremented for each byte transfer, and upon the byte count reaching zero, the DMAC will release the bus.
When the DMAC operates in burst mode, the CPU is halted for the duration of the data transfer.

Steps involved are:

1. Bus grant request time.

2. Transfer the entire block of data at transfer rate of device because the device is usually slow than the
speed at which the data can be transferred to CPU.

3. Release the control of the bus back to CPU So, total time taken to transfer the N bytes = Bus grant
request time + (N) * (memory transfer rate) + Bus release control time

Where,

X µsec =data transfer time or preparation time (words/block)

Y µsec =memory cycle time or cycle time or transfer time (words/block)

% CPU idle (Blocked)=(Y/X+Y)*100

% CPU Busy=(X/X+Y)*100

DMA Function

• DMA module on system bus used to mimic the processor.

• DMA module only uses system bus when processor does not need it.

• DMA module may temporarily force processor to suspend operations – cycle stealing.

DMA Operation

• The processor issues a command to DMA module

1. Read or write

2. I/O device address using data lines

3. Starting memory address using data lines – stored in address register

Number of words to be transferred using data lines – stored in data register

• The processor then continues with other work

• DMA module transfers the entire block of data – one word at a time – directly to or from memory without
going through the processor

• DMA module sends an interrupt to the processor when complete

DMA and Interrupt Breakpoints during Instruction Cycle

• The processor is suspended just before it needs to use the bus.

• The DMA module transfers one word and returns control to the processor.

• Since this is not an interrupt the processor does not have to save context.

• The processor executes more slowly, but this is still far more efficient that either programmed or interrupt-
driven I/O.

DMA Configurations

Single bus – detached DMA module

• Each transfer uses bus twice – I/O to DMA, DMA to memory

• Processor suspended twice

Single bus – integrated DMA module

• Module may support more than one device

• Each transfer uses bus once – DMA to memory

• Processor suspended once

Separate I/O bus

• Bus supports all DMA enabled devices
• Each transfer uses bus once – DMA to memory
• Processor suspended once
I/O Channels & Processors
The Evolution of the I/O Function
1. Processor directly controls peripheral device
2. Addition of a controller or I/O module – programmed I/O
3. Same as 2 – interrupts added
4. I/O module direct access to memory using DMA
5. I/O module enhanced to become processor like – I/O channel
6. I/O module has local memory of its own – computer like – I/O processor
• More and more the I/O function is performed without processor involvement.
• The processor is increasingly relieved of I/O related tasks – improved performance.

Characteristics of I/O Channels

• Extension of the DMA concept
• Ability to execute I/O instructions – special-purpose processor on I/O channel – complete control over I/O
operations
• Processor does not execute I/O instructions itself – processor initiates I/O transfer by instructing the I/O
channel to execute a program in memory
• Program specifies o Device or devices o Area or areas of memory o Priority o Error condition actions
Two type of I/O channels
• Selector channel
1. Controls multiple high-speed devices
2. Dedicated to the transfer of data with one of the devices
3. Each device handled by a controller, or I/O module
4. I/O channel controls these I/O controllers
• Multiplexor channel
1. Can handle multiple devices at the same time
2. Byte multiplexor – used for low-speed devices
3. Block multiplexor – interleaves blocks of data from several devices.
 Serial Communication
Synchronous & Asynchronous Communication
Synchronous Communication
• In synchronous transmission, data moves in a completely paired approach, in the form of chunks or
frames. Synchronisation between the source and target is required so that the source knows where the
new byte begins, since there are no spaces included between the data.
• Synchronous transmission is effective, dependable, and often utilised for transmitting a large amount of
data. It offers real-time communication between linked devices.

• An example of synchronous transmission would be the transfer of a large text file. Before the file is
transmitted, it is first dissected into blocks of sentences. The blocks are then transferred over the
communication link to the target location.
• Because there are no beginning and end bits, the data transfer rate is quicker but there’s an increased
possibility of errors occurring. Over time, the clocks will get out of sync, and the target device would
have the incorrect time, so some bytes could become damaged on account of lost bits. To resolve this
issue, it’s necessary to regularly re-synchronise the clocks, as well as to make use of check digits to
ensure that the bytes are correctly received and translated.

Characteristics of Synchronous Transmission

• There are no spaces in between characters being sent.
• Timing is provided by modems or other devices at the end of the transmission.
• Special ’syn’ characters goes before the data being sent.
• The syn characters are included between chunks of data for timing functions.
Examples of Synchronous Transmission
• Chatrooms
• Video conferencing
• Telephonic conversations
• Face-to-face interactions

Asynchronous Communication
 • In asynchronous transmission, data moves in a half-paired approach, 1 byte or 1 character at a time. It
sends the data in a constant current of bytes. The size of a character transmitted is 8 bits, with a parity bit
added both at the beginning and at the end, making it a total of 10 bits. It doesn’t need a clock for
integration—rather, it utilises the parity bits to tell the receiver how to translate the data.
• It is straightforward, quick, cost-effective, and doesn’t need 2-way communication to function.
Characteristics of Asynchronous Transmission
• Each character is headed by a beginning bit and concluded with one or more end bits.
• There may be gaps or spaces in between characters.

Examples of Asynchronous Transmission

• Emails
• Forums
• Letters
• Radios
• Televisions

Standard Communication Interface

• The processor bus is the bus defined by the signals on the processor chip itself. Devices that require a
very high speed connection to the processor, such as the main memory, may be connected directly to this
bus
• The motherboard usually provides another bus that can support more devices.
• The two buses are interconnected by a circuit, which we called a bridge, that translates the signals and
protocols of one bus into those of the other
• It is impossible to define a uniform standards for the processor bus. The structure of this bus is closely
tied to the architecture of the processor.
• The expansion bus is not subject to these limitations, and therefore it can use a standardized signaling
structure

Peripheral Component Interconnect Bus

Use of a PCI bus in a computer system
Peripheral Component Interconnect Bus
• The bus support three independent address spaces: memory, I/O, and configuration.
• The I/O address space is intended for use with processors, such Pentium, that have a separate I/O address
space.
• However, the system designer may choose to use memory-mapped I/O even when a separate I/O address
space is available
• The configuration space is intended to give the PCI its plug-and-play capability.
1. A 4-bit command that accompanies the address identifies which of the three spaces is being used
in a given data transfer operation