Chapter 5

5.17 An NMOS transistor having 1 V is operated in the

triode region with small. With 1.5 V, it is found to
have a resistance of 1 kΩ. What value of is required to
obtain ? Find the corresponding resistance values
obtained with a device having twice the value of W.

5.19 A particular n-channel enhancement MOSFET is measured

to have a drain current of 0.4 mA at and of 0.1 mA

at . What are the values of and for this device?

5.28 The NMOS transistor in Fig. P5.28 has and

. Sketch and clearly label versus with

varying in the range 0 to +1.8V. Give equations for the various

portions of the resulting graph.

Fig. P5.28
D 5.53 Using an enhancement-type PMOS transistor with
 , , and λ = 0, design a circuit

that resembles that in Fig. 5.24(a). Using a 10-V supply,

design for a gate voltage of +6 V, a drain current of 0.5 mA,

and a drain voltage of +5 V. Find the values of and .

5.57 For each of the circuits shown in Fig. P5.57, find the

labeled node voltages. The NMOS transistors have

and .

Fig. P5.57
5.83 An alternative equivalent circuit of an amplifier fed
with a signal source and connected to a load

is shown in Fig. P5.83. Here is the open-circuit overall

voltage gain,

and is the output resistance with set to zero. This is

different than . Show that

Where
Also show that the overall voltage gain is

Fig. P5.83

5.90 A MOSFET connected in the CS configuration has a

transconductance When a resistance is
connected in the source lead, the effective transconductance

is reduced to 1 mA/V. What do you estimate the value of

to be?

5.93 A CG amplifier using an NMOS transistor for which

has a 5-kΩ drain resistance and a 5-kΩ load

resistance . The amplifier is driven by a voltage source having

a 500Ω resistance. What is the input resistance of the amplifier?

What is the overall voltage gain ?By what factor must the bias
current of the MOSFET be changed so that matches ?

D 5.98 Consider the classical biasing scheme shown in Fig.

5.52(c), using a 9-V supply. For the MOSFET, ,λ = 0, and

 . Arrange that the drain current is 1 mA, with about

one-third of the supply voltage across each of and . Use 22

MΩ for the larger of and . What are the values of , ,
, and that you have chosen? Specify them to two

significant digits. For your design, how far is the drain voltage
from the edge of saturation?

Fig. 5.52(c)

5.106 For the circuit in Fig. 5.55(a) with I = 0.2 mA, ,

, and , consider the behavior in each of
the following two cases. In each case, find the voltages ,
, and that result.
(a) and
(b) and

5.125 For the two circuits in Problem 5.124 (shown in Fig.

P5.124), we wish to consider their dc bias design. Since has
a zero dc component, we short-circuit its generator.For NMOS

transistors with , find , , and to bias each

device at and to obtain the values of and
specified in Problem 5.124: namely, and . For
, ,and , find the required value of .

Fig. P5.124