LOADERS AND LINKERS

CE – TE – SPCC
Mrs. Anindita Achint Khade
Assistant Professor,
Dept. of Computer Engg.,
SIES Graduate School of Technology

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TXT CARDS

Card Type Count Address Contents

0 2 4000 RR

0 4 4002 RX

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Transfer Vector

• A transfer vector consists of addresses containing names of the subroutines referenced by

the source program.
• if a Square Root Routine (SQRT) was referenced and was the first subroutine called, the first
location in the transfer vector could contain the symbolic name SQRT.
• The statement calling SQRT would be translated into a branch to the location of the transfer
vector associated with SQRT

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Transfer Cards

Card Type Count Address Contents

1 0 Location from where execution

would begin

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The loader
• loads the text and the transfer vector
• loads each subroutine identified in the transfer vector.
• place a transfer instruction to the corresponding subroutine in each entry in the transfer vector.
The execution of the call SQRT statement result in a branch to the first location in the
transfer vector which contains a branch to the location of SQRT.

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Example

MAIN START LC r/s/e

EXTRN SORT 0 00 SORT
EXTRN ERR4 4 00 ERR
L 1,=F9 8 01 L 1,24
BAL 14,SQRT C 01 BAL 14, 0
C 1,=F3 10 01 C 1,28
BNE ERR 14 01 BNE 4
BR 14 18 00 BCR 14,
END 24 00 0009
28 00 0003

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After Loading

Program Length
28bytes
Transfer vector
8 bytes

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Disadvantages

1. the transfer vector increases the size of the object program in memory
2. the loader does not facilitate access to data segments that can be shared
– the transfer vector linkage is only useful for transfers or BSRs
– not well suited for loading or storing external data (data located in another procedure
segment)

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Direct Linking Loader

The assembler provides

1. The length of segment
2. A list of all entries and their relative location within the segment
3. A list of all external symbols
4. Information as to where address constants are loaded in the segment and a description
of how to revise their values.
5. The machine code translation of the source program and the relative addresses
assigned

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Example
Source card Relative address Labels Program
1 0 PG1 START
2 ENTRY A,B
3 EXTRN PG2,C

4 20 A
5 30 B
6 40 A(A)
7 44 A(B+10)
8 48 A(C-PG2)
9 52 END

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Example
Source card Relative address Labels Program
1 0 PG2 START
2 ENTRY C
3 EXTRN A,B

4 16 C
5 24 A(A)
6 28 A(B+20)
7 32 END

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Assembler records
• External Symbol Dictionary (ESD) record: Entries and Externals
• (TXT) records control the actual object code translated version of the source program.
• The Relocation and Linkage Directory (RLD) records relocation information
• The END record specifies the starting address for execution

• RLD - Relocation & Linkage Directory. – contains information about those locations in the
program whose contents depends on the address at which the program is placed.
• These information are::
• Location of each constant that needs to be changed due to relocation.
• By what it has to be changed.
• The operation to be performed.

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For program 1

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ESD

Symbol type ID Rel Addr Length

PG1 SD 1 0 52
A LD 20
B LD 30
PG2 ER 2
C ER 3

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TXT CARDS

Source card ref number TXT cards Contents

6 24-27 0
7 28-31 0
8 48 0

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RLD

ESD-ID Length Flag Rel address

1 4 + 40

1 4 + 44

3 4 + 48

2 4 - 48

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For program 2

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ESD

Symbol type ID Rel Addr Length

PG2 SD 1 0 32
C LD 16
A ER 2
B ER 3

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TXT CARDS

Source card ref number TXT cards Contents

5 24-27 0
6 28-31 20

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RLD

ESD-ID Length Flag Rel address

2 4 + 24

3 4 + 28

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GEST and LESA

GEST: Prepared by pass 1.This table stores all external symbols and their
corresponding address.

LESA: It is used to establish correspondence between core addresses of

symbols and their ID’s used in ESD card of object deck

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Pass 1:GEST

Symbol Address

PG1 104

A 124(104+20)

B 134(104+30)

PG2 156(104+32)

C 172(156+16)

IPLA=104

ILA=104+52==156
= 156+32
188

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Pass 2 : LESA for PG1 and PG2

ID Value

1 104

2 156

3 172

ID Value

1 156

2 124

3 134

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Example

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ESD and RLD
SD: Segment Definition
LD: Local Definition
ER: External Reference

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 ADVANTAGES:
1)It allows the programmer multiple procedure & data segments.
2)Complete freedom for the programmer to refer the data in other segments.
3)Provides flexibility in intersegment referencing & accessing ability.
4)Allows independent translations of the programs.
DISADVATAGES:
1)It is necessary to allocate, relocate, link & load all of the subroutines each time in
order to execute a program.
2)These loading are Time-consuming.
3)Although loader is smaller than assembler, it occupies some memory space.

Dividing the loading process into two separate programs a binder and a module loader can solve
these problems.

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Design of Direct Linking Loader

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10/21/2007 Mrs. Anindita Khade Object Deck program for PGA 30
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Object Deck program for PGB
Algorithm

• Pass 1
• Allocate Segments
• Initial Program Load Address (IPLA)
• Assign each segment the next table location after the preceding segment.
• Define Symbols
• SD
• LD
• ER?!

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PASS 1
1. Input object deck
2. Initial Program Load Address(IPLA)
3. Program Load Address(PLA) counter
4. Global External Symbol Table(GEST)
5. A copy of the input (TXT card)
6. RLD ( Relocation & Linkage Directory)
7. END card

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PASS 2

1. copy of object program

2. IPLA parameter (Initial Program Load Address) supplied by the OS or programmer to
specify the address to load the first segment
3. PLA counter (Program Load address ) to keep track of each segment location
4. GEST (Global external symbol table) to store each external symbol and its corresponding
assigned core address
5. Local External Symbol Array(LESA) to establish correspondence between ESD ID used in
ESD & RLD cards
6. ESD (external symbol dictionary)

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Formats of Data Bases

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This is used to save space and also increases the processing speed

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Allocate Segments
and Define
Symbols

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Monther Aldwairi 38
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Pass 2: load text and relocate/link

• ESD record types is processed differently.

• SD The LENGTH of the segment is temporarily saved in the variable SLENGTH.
• LD does not require any processing during pass 2.
• ER The Global External Symbol Table (GEST) is searched for match with the ER symbol
• If found in the GEST, Substitute value
• If it is not found  error
• TXT: the text is copied from the record to the relocated core location (PLA + ADDR).
• RLD: The value to be used for relocation and linking is extracted from the GEST
• If Flag is Plus the value is added, if Flag is minus the value is subtracted from the address
constant
• The relocated address of the address constant is the sum of the PLA and the ADDR field
specified on the RLD record.

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Load address and relocate/link
address constants

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Pass 2
• END: The execution start address is relocated by the PLA
• The Program Load Address is incremented by the length of the segment and saved in
SLENGTH, becoming the PLA for the next segment.
• LDT/E0F record
• The loader transfers control to the loaded program at the address specified by current
contents of the execution, address variable (EXADDR)

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Drawbacks
1) The transfer vector linkage is only useful for transfers & is not well ituated for loading or storing
external data(data located in another procedure segments).
2) The transfer vector increases the size of the object program in memory

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OTHER LOADING SCHEMES
These includes Binders, linking loaders, Overlays & Dynamic loaders.
• Binders:: - A Binder is a program that performs the same functions as that of a direct-
linking
• loader in binding subroutines together, but rather than placing the relocated & linked text
directly into memory, it outputs the text as a file or a card deck.
• This o/p file to be loaded is called as “load-module”.
The functions of binders are :
Allocation, Relocation, Linking & Loading.
There are 2 major classes of Binders::
Core – image module.( fast & simple)
Linkage Editor.(complex)

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Dynamic Loading overlays

• Each of the previous loader schemes assume that all of the subroutines are
loaded into core at the same time.
• It the total amount of memory available is less than memory required by all needed
subroutines, then there will be trouble

• Usually different subroutines are needed at different times. E.g. PASS1 & PASS2 of
assembler are mutually exclusive.
• Both can be loaded one after another, need not to be loaded at the same time.
• By determining which subroutines call another, which are exclusive , we can produce an
overlay structure, that will help to use memory economically.

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Thank You!
(aninditak@sies.edu.in)

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