Low Cost Electronic Ballast with Buck

Converter as PFC Stage

Li Xiangrong, Xu Dianguo and Zhang Xiangjun
Department of Electrical Engineering, Harbin Inst of Tech, Harbin, P. R. China
leekoei@hotmail.com

Abstract—In this paper, a low cost buck converter was discussed in section 4 and the related testing results are
selected as the PFC stage of the electronic ballast for a 70W given in section 5.
metal halide lamp. In this way, several advantages could be
obtained, such as simple circuit topology, easy control II. BUCK STAGE
strategy, especially decreased cost and low requirements for
The popular electronic ballast topology is divided into
circuit components. All circuit parameters should be
two stages: the first stage converts the power line voltage
designed to ensure that the buck converter was operated in
into DC bus voltage and also performs the function of
DCM. This paper presented the design of both the main
PFC; the second stage applies a HF inverter to generate
circuit and control loop, analyzed the stability of buck
high frequency AC square wave to deliver power to MH
converter, and discussed the function of PFC stage. Finally,
lamp. Currently, there are many mature topologies of the
the results of both simulation and experiment were given to
first stage, for instance, the boost and buck-boost
testify the effectiveness of PFC.
converters. The boost PFC circuit has the merits of low
Keywords-electronic ballast; PFC stage; buck converter; THD and high efficiency, but it generates high DC bus
DCM voltage, thus puts too much pressure on the power
components and other passive components of the whole
I. INTRODUCTION circuit. For the buck-boost circuit, though it has perfect
performance as PFC stage, ordinary one-switch buck-
Along with the increasing demands for higher lighting
boost circuit also puts high voltage stress on circuit
quality, traditional incandescent and fluorescent lamps
components, thus increases the overall costs of the ballast.
can not meet these needs. Since the new generation of
Consequently, a buck converter is chosen as the PFC
light sources, such as metal halide (MH) lamps and high
stage of this design. It can achieve:
pressure sodium (HPS) lamps, have high efficiency and
long lifespan, they can be perfect alternatives for (a) No instable pole and zero points in open loop
traditional lamps. Due to the negative resistance transfer function
characteristic of MH lamps, they must be operated with (b) Easy design and thus lowered cost of control loop;
proper electronic ballast to work effectively as (c) Low DC bus voltage and low voltage stress on
demonstrated in Ref. [1]. Nowadays, the worldwide circuit components as stated in Ref. [1] [2].
researches on high quality ballast are intensive, but A brief layout of the PFC stage is shown in Fig. 1.
because of some factors such as costs and reliability,
In order to obtain constant DC bus voltage while retain
most achievements are still in experimental stage. In
low cost, the control circuit is a voltage feedback loop
order to popularizing MH lamps, electronic ballast must
containing 555 and amplifiers. The scheme of control
have low costs and high reliability. This paper sets a 70W
loop is shown in Fig. 2.
MH lamp as the object, designs an electronic ballast and
concentrates on the analysis of using buck converter as
the PFC stage. Although the traditional passive PFC
AC
topology is more economical, they have intrinsic
problems of crest factor and harmonic components,
220V vg L vo Load
which can have negative effects on the power line. R
Therefore, a buck converter operated in DCM could be an D C
option to settle the contradiction between costs and
performance.
Control MOSFET
In section 2, the built prototype will be presented. The Signal
stability of the buck converter is analyzed in section 3.
The function of this converter as the PFC stage is Figure 1. A brief layout of Buck PFC stage

1-4244-0449-5/06/$20.00 ©2006 IEEE IPEMC 2006

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 C
ig i
R1 R4
L
+ Switch
R3
vo _ 555
Square wave
+
vg D C R vo
_ UREF + Generator
R2 vgs
_
Figure 3. Scheme of buck converter and relative parameters

Figure 2. Scheme of control loop
In steady stage, R1 and R2 sample the DC bus voltage
and serve as a voltage divider. Then, after compared with
DC reference voltage and amplified by a PI regulator, the
Based on the assumptions mentioned above, we can
obtain the expressions of the input voltage, input current,
inductor current, capacitor voltage as well as the duty
ratio by superimposing small signal turbulences on the
^ ^

resulted differential voltage is delivered into the input end steady values respectively: v g = Vg + v g , i g = I g + ig ,
of the 555 square-wave generator. This generator ^ ^ ^

operates in PFM to adjust the frequency as well as the i = I + i , vo = Vo + vo , d = D + d . The parameters with
duty ratio of the output control signal Vgs . Finally, this superscripts are superimposed small signal components.
signal is sent to the gate of the MOSFET to form a The general scheme of buck converter is shown in Fig. 3
complete voltage feedback loop. for the sake of easy analysis.

Actually, there is an EMI filter between the power line
and the PFC stage to eliminate the high frequency
harmonic components superimposed on the input current,
which is generated by the switching operation of power
components. Furthermore, this filter can also keep the
disturbance signal from passing in and out the ballast,
which acts as an electromagnetic isolator.
III. STABILITY OF BUCK CONVERTER
In order to completely discuss the stability of Buck
converter, a mathematic model of it must be established
first. Since the transient time of the proposed ballast is
relatively short, most emphasis is put on the steady state
of the circuit. Therefore, the variation of the DC
components in the circuit can be considered constant. In
this paper, the small signal model of general buck
In continuous conducting mode (CCM), the Kirchhoff
equations of buck converter can be obtained in reference
to Fig 3. Then, substitute the small signal expressions of
these parameters into the equations. In steady state, the
DC components in both sides of each equation can be
counteracted, and after ignoring the high-order items, the
simplified version of circuit equations is obtained as (1).
To change the equations into small signal model, we
can simply consider the small signal components in the
equations as dependent and independent voltage sources
as well as current sources, the scheme of the small signal
model can be plotted as shown in Fig. 4. Then, after
transforming all parameters into s domain, the transfer
function of buck converter can be calculated.
^ ^ ^

converter is deduced. Then the transfer function and thus

ig (t ) = D i (t ) + I d (t )
 ^
the relative analysis can be obtained easily as in Ref. [3].
 d i(t ) ^ ^ ^

Before any analysis, some important assumptions must L = D v g (t ) − vo (t ) + Vg d (t ) (1)

be made:  dt
 ^ ^

(a) To ignore the influence from input side, assume C d v ( t ) ^

v (t )
o
= i(t ) − o
that the input voltage of the converter is constant  dt R
(b) Suppose that in steady state, the duty ratio of the
control signal is fixed; First, suppose the duty ratio to be constant and thus the
^

(c) The amplitude of the small signal is far less than small signal component d ( s ) is equal to zero. We can get
the fundamental components of all parameters; the transfer function Gvg ( s ) defined as the input voltage
(d) Assume the load is a constant resistor; ^ ^

v g ( s ) versus the output voltage vo ( s ) :

(e) Set the average value of all circuit parameters over
one switching period as the instantaneous value of that
period.

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 be chosen to achieve acceptable power factor and other
^
^ requirements. In this design, a buck converter operated in
i(t ) Vg d (t ) DCM is chosen to perform the PFC function of the
L proposed ballast in reference with Ref. [4]. Since the
C R ^ major part of the control circuit is a voltage feedback
^ ^ ^ ^ vo (t ) loop, this circuit is easy to design, install and debug. The
vg (t ) I d (t ) Di (t ) Dvg (t )
following discussion will focus on the PFC function of
buck converter.
Figure 4. The small signal equivalent circuit of a buck converter Also, some presumptions must be made first:
operated in CCM
(a) The main circuit is in steady state.
^

vo ( s ) 1 (b) All the components are ideal without any

Gvg ( s ) = ^
| ^
= Ggo 2
(2) distributed parameters.
d ( s )=0 s s
vg ( s ) 1+ +
Qωo ω o2 (c) The filter capacitor is large enough that the output
voltage can be considered constant.
C 1
Where Ggo = D , Q = R and ωo = (d) The rectified voltage after the bridge can be
L LC considered constant in a given switching period. That is
Similarly, we again assume the input voltage to be to say, the switching frequency is far higher than the line
constant and get the transfer function Gvd ( s ) as the duty frequency.
^ ^ Under these assumptions, we can get the waveforms of
ratio d ( s ) versus the output voltage vo ( s ) : inductor current I L and the current after the bridge I g
^ over a switching period as shown in Fig. 5.
vo ( s ) 1
Gvd ( s ) = ^
| ^
= Gdo 2
(3) In Fig. 5, it can be easily seen that when the
vg ( s ) = 0 s s
d ( s) 1+ + instantaneous value of the rectified voltage U g is greater
Qω o ωo2
than the DC bus voltage U o , the operation of the buck
Where Gdo = Vg and the other two parameters are the
converter during a switching period can be divided into
same as (2). three stages:
I: In this stage, the switch MOSFET is on. The
In the similar method, the equivalent forms of these
rectified voltage charges the inductor and capacitor while
transfer functions in DCM can also be obtained. When
supply the load at the same time. The current through the
operated in this mode, the two transfer functions above
inductor is the same as the rectified current, and they rise
change into first-order and the numerators of which turn
linearly as time flows. The following equation can be
into constants. The specific approach of deduction is
obtained:
omitted here.
In consideration of the linear voltage feedback loop, Ug −Uo
i L (t ) =
t (4)
the open loop transfer function of a buck converter is a L
second-order system in CCM but a first-order system in And iL (t ) reaches its maximum value I L max at DTS .
DCM. By properly setting circuit parameters, any small
signal disturbance can be quickly eliminated. Therefore, IL
with proper configuration of the circuit components, the
I II III
stability of buck converter can be guaranteed. I L m ax

IV. PFC FUNCTION OF BUCK CONVERTER

Currently, there are many choices of PFC topologies t
for electronic ballast, and the most mentioned one may be Ig
the active boost converter PFC circuit. By applying buck- I L m ax
boost converter, a power factor closed to 1 can be easily
obtained. However, in order to operate buck-boost
converter properly, additional control chips and relative
ancillary circuit are needed, which certainly increases the t
overall costs of the ballast. Actually, in low wattage D TS D TS + ∆ t TS
applications, the requirement of power factor is usually Figure 5. The waveform of inductor current IL and the current after
not so strict. Accordingly, a simple circuit topology can the bridge Ig over a switching period

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 II: The switch MOSFET is shut off in this stage; the loss will increase, causing the decrease in overall
magnetic energy stored in the inductor begins to charge efficiency. In conclusion, in the whole course of
the capacitor and supplies the load. Meanwhile, there is designing, the converter must be guaranteed to operate in
no input current to the converter and the diode D starts to DCM.
offer channel for the inductor current. The inductor
V. EXPERIMENTAL AND SIMULATION RESULTS
current decreases linearly:
According to the requirements of a Philips MHN-TD
Uo 70W lamp, the input side of the PFC stage is the rectified
iL (t ) = I L max − (t − DTS ) (5)
L 220V AC voltage, while the output of this stage is a 120V
III: The energy stored in the inductor is expired, and DC bus voltage with low ripples.
the capacitor begins to supply the load. In this stage, both After carefully adjusting the simulation parameter,
the inductor current and the rectified current are equal to some simulated results, which are very close to the
zero. practically tested ones, are obtained. Fig. 7 shows the
Averaging the rectified current in a switching period, waveforms of input voltage and current, from which we
we can get: can see that the voltage and the current are in phase so
that the power factor can be relatively high. Also in Fig. 8,
1
DTS
1
DTS
U g − Uo 2
D TS the Fourier analysis of the input current is made to show
Ig =
TS
∫ i (t )dt = T ∫
g
L
tdt =
2L
(U g − U o ) (6)
that the high order harmonics are small in amplitude
0 S 0
comparing with the fundamental wave.
According to (6), we can get the theoretical waveform
of rectified voltage and current as shown in Fig. 6.
From the waveform below, when the rectified voltage
U g is greater than the output DC bus voltage U o , the
buck converter functions normally, and the rectified
current I g is in proportion with (U g − U o ) . During this
time period, the input voltage and current of the ballast
are in-phase. On the other hand, when U g is lower
than U o , which means that the input voltage of the buck
converter is lower than its output voltage, though the
control signal is still available, the converter stops
working. Since in this stage, the rectifiers in the bridge
are reversely biased, the input current is in dead-zone.
It must be emphasized that only when operating in
DCM could the buck converter achieve PFC function.
Conversely, if operated in CCM, at the beginning of each
switching period, the inline current is not equal to zero. In
this case, averaging the current over a switching period Figure 7. The simulated waveform of input voltage versus current in
can not get a linear expression of current versus voltage, steady state
thus the PFC function could not be obtained. Moreover, if
buck converter always works in CCM, the inductor
current may be reversed in light load, and the on-state

Ug

Uo

Ig t/s

0.01 0.02 t / s
Figure 6. The waveform of rectified voltage and current Figure 8. The Fourier analysis of the input current

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 relatively high, which directly have passive influence on
the power factor. Moreover, in the input current dead-
zone, the input energy is cut from the converter, and the
capacitor discharges to supply the load. In this way, the
voltage across the capacitor will inevitably decrease with
time, which gives reason to the ripples in bus voltage.
Although by increasing the filter capacitor and raising the
switching frequency can lower the ripples to some extent,
the ripples in the DC bus voltage can not be eliminated
thoroughly since the input dead-zone is inevitable.

VI. CONCLUSION
The PFC stage of an electronic ballast for MH lamp is
presented in this paper. With simple circuit topology and
easy control strategy, the buck converter operated in
Figure 9. The waveform of input voltage versus current in steady state DCM can achieve acceptable power factor, and the
overall cost of the ballast is low. Specifically, the major
TABLE I. advantages of this design are listed as below:
STATISTICS OF CIRCUIT PERFORMANCE WITH VARYING INPUT VOLTAGE
Input Output Power factor Output voltage (v)
(a) Easy construction of both main circuit and control
voltage (V) power (W) circuit. No specific PFC chip was used thus the
180.1 75.9 0.967 119.2 overall costs can be kept low.
190.8 75.8 0.969 119.1
(b) Low DC bus voltage comparing with boost and
201.1 75.4 0.970 118.7
buck-boost topologies. Lowered requirements on
210.3 75.2 0.973 118.4
220.5 75.6 0.972 118.5
circuit components.
230.8 73.9 0.974 117.0 (c) Although the input current dead-zone is inevitable,
240.6 73.9 0.976 117.0 through careful configuration of circuit parameter,
250.1 74.0 0.978 117.1
a relatively high power factor can be obtained.

A Tektronix TDS3032B oscilloscope was used here to REFERENCES

get both the input voltage and current when the whole
circuit was in steady state, as shown in Fig. 9.
From the figure above, the input voltage is in phase
with the input current, which is in accordance with the
simulation result, and the measured power factor is
fluctuating between 0.96~0.98. Moreover, due to the
function of the DC bus voltage feedback loop, when the
input voltage changes from 180V to 250V, the power
factor, output power as well as the bus voltage change
slightly, as listed in Table 1.
[1] Garcia. J, Cardesin. J, and Alonso. M, “New HF Square-waveform
Ballast for Low Wattage Metal Halide Lamps Free of Acoustic
Resonance,” in Conference Record of the 2004 IEEE 39th IAS
Annual Meeting, 2004.
[2] Rico-Secades. M, Corominas. E. L, and Alonso. J. M, “Complete
Low Cost Two-stage Electronic Ballast for 70W High Pressure
Sodium Vapor Lamp Based on Current-mode-controlled Buck-
boost Inverter,” in Conference Record of IEEE 37th IAS Annual
Meeting, 13-18 Oct. 2002, pp. 1841-1846.

Since there is no filter capacitor between the rectifier
and the buck converter, when the rectified voltage is
lower than the DC bus voltage, the converter actually
fails to operate, which can cause the dead-zone in the
input current. In this case, although the input current and
voltage is still in phase over the whole line period, due to
the input current dead-zone, the THD of input current is
[3] Erickson, Robert. W, Fundamentals of Power Electronics. 2nd ed.
Kluwer Academic Publishers. 2000, Chap. 8, pp. 266-350
[4] Ned Mohan, Tore M. Undeland, William P. Robbins, Power
Electronics: Converters, Applications, and Design, 3rd ed. John
Wiley & Sons, Inc. 2003, Chap. 7, pp. 162-171.

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