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    The document discusses the process of manufacturing silicon wafers for use in integrated circuits. It describes how quartz is purified to create metallurgical grade silicon (MGS), which is further purified to create electronic grade silicon (EGS). EGS is used to grow single crystal silicon ingots using the Czochralski crystal growth technique. The ingots are sliced into wafers about 450 mm in diameter and polished. Wafers include features like primary and secondary flats for orientation and identification. The basic fabrication operations that will be performed on the wafers are layering, patterning, doping, and heat treatment.

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    VLSI Lecture 5

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    The document discusses the process of manufacturing silicon wafers for use in integrated circuits. It describes how quartz is purified to create metallurgical grade silicon (MGS), which is further purified to create electronic grade silicon (EGS). EGS is used to grow single crystal silicon ingots using the Czochralski crystal growth technique. The ingots are sliced into wafers about 450 mm in diameter and polished. Wafers include features like primary and secondary flats for orientation and identification. The basic fabrication operations that will be performed on the wafers are layering, patterning, doping, and heat treatment.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    17 views21 pages

    Lecture 5

    Uploaded by

    J.V.'S CLASS
    The document discusses the process of manufacturing silicon wafers for use in integrated circuits. It describes how quartz is purified to create metallurgical grade silicon (MGS), which is further purified to create electronic grade silicon (EGS). EGS is used to grow single crystal silicon ingots using the Czochralski crystal growth technique. The ingots are sliced into wafers about 450 mm in diameter and polished. Wafers include features like primary and secondary flats for orientation and identification. The basic fabrication operations that will be performed on the wafers are layering, patterning, doping, and heat treatment.

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    of 21

    VLSI Technology

    Lecture 5

    Wafer Process

    Dr. Brajendra Singh Sengar (PhD, IIT Indore)


    Assistant Professor
    Department of Electronics and Communication Engineering
    National Institute of Technology Srinagar
    Email id: brajendra.singh@nitsri.ac.in
    Specs of a typical 300 mm wafer used in the fabrication
    Quartz to MGS (98% pure)
    Impurities in MGS, after the submerged arc electrode process.
    Further Purification in MGS
    Impurities EGS, after purification from MGS.

    EGS same pure as wafer but polycrystalline.


    Single crystal Si manufacture

    Czochralski crystal growth technique

    1. Furnace
    2. Crystal pulling mechanism
    3. Ambient control - atmosphere
    4. Control system
    1. Crucible is made of SiO2.
    2. Furnace heated at 1500 C.
    3. Si Melting point 1412 C
    4. A small seed crystal, with the desired orientation of the final wafer,
    A 450 mm wafer ( 800 kg)
    Wafer manufacturing
    1. Primary flat - this is ground relative to a specific crystal direction. This acts as a visual reference
    to the orientation of the wafer.
    2. Secondary flat - this used for identification of the wafer, dopant type and orientation.
    Wafers and Chips
    Schematic of various components of a wafer. (1) Chip (2) Scribe line (3) Test
    die (4) Edge chips (5) Wafer crystal plane (6) Flats/notches.
    The basic fab operations (processing steps)

    1. Layering
    2. Patterning
    3. Doping
    4. Heat treatment
    Layering
    Thanks

    21

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