No, ; _SM-E3318-04 Date: _1989= 12 [FURUN® "SERVICE MANUAL ae MARINE RADAR : FR=80500 (DA | FR-B100D (DA) MovEL'-FR—6250D D eo G FURUNO ELECTRIC CO, LTD: NISHINOMIYA, JAPAN 8912007 (8912, tuyu) revo a— Furuno —— ne e ee CONTENTS OF SCHEMATIC DIAGRAMS fe ee Tye ieosbbyeab tbe rane roonaraesovqareaor | Pose] T | Interconnectton Disgran of ofofo]o]o fs 2 | Display Unit QO}]C};O;O}]O0] O |s2 Em 7 7 c 7 Board, Ptu-7538 }O |] O lOO] al oa |ss3 7 A [Interface Tospssn [OT OFOlTOTLO|o Is i Panel Board 0277531 |O|O};O;oO[O]| oO {ss: ‘ tr |O3P7S3: it (Encoder) Board 0377533 | |O}O!10)0]}.0 |s6 103P 7535, es 7 [CRT Display. us-rzs0sFR] O | O|]0} 0 ]0]0 |s7 ; B|TX HV Board — jaHv-7130 |. O | O | O} O S-8a |aHv-7130 . © | O | s-8}° e@ 9 |Scanner Unit QO °O S9a oe ° S-9b of S-9¢ ©. [s-s4 110 | STC Board lastc-6995 | © oO. O° s-10 i lsstc-6995 Cc, TO Oo TT SIF Amplifier 7 = 7 Board jBIF-4879 | C Oo oO S-1L ‘ [e1F-5668 oO Oo O- fst 4 ' i * The schematic diagram of Processor board (0397529) is confidential and is not contained in this manual. 7porroven| | eS yD ARB cveareo | TRANSCE! VER MODULE ‘we.no. €3307-033-8 -8050/81000\ ie FReiBos/1enoDIN | momRREBS 1-7 ORD TRANSCEIVER MODULE |ows.no. €3307-036-B =F aoe Raw FR-82500(A) FR. 15250(A)SCANNER UNIT J lint Sb BORO B VempaliarS —_ C3276-012-8 35 FURUNO ELECTRIC CO. LTD.SCANNER UNIT €3290-005-C ANTENNA 78> inf PRBS RO Hesg, EI TY or FURUNO ELECTRIC CO. LTD. Sunk | ee [Bod"The simplified block diagram 45 shown below. when the.STBY/T touchpad ‘on’ the INTRODUCTION : : : : reas The FR-8000 series are stand-alone daylight radars.. “The. seriés comprises six 7 mode1s;"FR-8050D, FR-B050DA, FR-8100D, FR-BLOODA,-FR-82500 and FR-8250DA." The system consists of the display and scanner units and operates directly from ’ 12(only for FR-8050/8100)/24/32V0C ship's mains.»-For operation from 100/110) “p, : “115/220/240VAC, an additional, rectifier unit is required. te Front ‘panel is depressed approximately 3 minutes after turning on the radar, the TX trigger pulses are generated at the PROCESSOR board’ (03P7529) .to fire’! the Transmitter’ in the scanner unit, and 9410MHz microwave pulses.are ° generated and emitted from the antenna. ae The reflected echo signal from the’ target is received by the Same antenna and amplified atthe, Receiver. ‘Then the amplified signal:(video signal). is A-D ~\* converted ‘and:stored in the memory of the PROCESSOR board.'. The X-Y coordinate address is generated by using both, the range data (time ‘elapsed: from , transmission) ‘and the bearing: date (@ data.generated at the, BEARING SIGNAL GEN. board in.the scanner unit). nae Read-out of the’ video data in the menory is performed:by the hor./ver. address | | i. counters at the PROCESSOR board and sent to the CRT Display circuit ina manner similar to an ordinary TV display system, that is, the video-data is. successively converted into analog signal and sent. to the CRT Display circuit’ «+. i." in synchronism with the horizontal/vertical synchro pulses derived from the ny PROCESSOR board snd iisplayed on: the screen, ew AY The Characters, Heading Wark,"North Mark,. Fixed Range Rings, EBL and VRM data are produced in-the PROCESSOR board and displayed on the, screen thru, the CRT: Display circuit in the’ same manner as the video data. "|? : ‘ SCANNER UNIT’ DISPLAY UNIT thee 4 Synchro Pulses => Vide g “veo onta os ° a. oH (2 Chanacter/ -* ark bate : A PioceSSon‘Boare | ME SH#) I RT Display Fateana }—{ Transmitter p— recat whe ~ ne . He ' Trigger 1 Beating Data ' Eee : ey ‘— FURUNAD —_ —!_ DISPLAY UNITGENERAL INFORMATION CHAPTER 1. BLOCK DESCRIPTION 1-1. Power Supply 1-2. Signal Processor 1-3. CRT Display CHAPTER 2. ADJUSTMENT CHAPTER 3. PARTS LOCATION Page O-1 1-1 to 1-22 del 1-4 1-18 2e1 to 2-3 el to 3-3GENERAL INFORMATION The display unit contains the following p.c.boards. Most of them, except for the POWER SUPPLY, FILTER and TX HV boards, are changeable among models. Table 0-1 P.C.Board Convertibility [Brock zc. Board WodeT TR Now Wane Type. Cade No ES 050A 34] 25kW, 24V, | 008-225-960) XNGA Sera (0) | (od ‘BPTU-7534] 10kW,24V, |008~225-959} XN4A. (0) (0) ‘BPTU-7534} OKW, 24/| 32V, other | 008-225-940 than XNA, (0) {o) 182 | POWER SUPPLY|~BPTU-7534) 10kW,12V,, other ‘than XN4A\ 008-225-930) (0) (0) ‘APTU=7534 5/25kW, 24/32V, |008-225-920} other than XN4A\ (0) (0) (0) | (0) ‘APTU-7534 Sku, 12¥_ [008-225-910 (0) (0) FIL-6983. |oq3-776-4 uv 008-226-690} (0) (0) (0) (0) (0) | (0) 183 | FILTER FIL-6963 2ajapvde {008-226-760 (o) (0) (0) (0) (0) | (0) 18a [Tx HV Aiv=7130 (008-226-720 HV-7130 {008-226-7701 es [processor |" 03P7529_[008-226-590) - [86 | INTERFACE | 037530 1008=226-700) 187 [PANEL (03°7531 |008-226-660] 188_| TOUCHPAD KEY| 0357535 [000-115-112] [igo TiLLuMi/vRM ["03P7532_ |008-226-670 1810) EBL, '03P7533 |008-226-680| [A811] CRT _ASSEMBLY| MG-1250SFR [000-100-079] o}olelelolo FLECEECE EEEEEEE joo }o|o}o}olo|o 100 jolojololoCHAPTER 1, BLOCK DESCRIPTION 1-1. Power Supply The power supply circuit consists of a PHM (Pulse-Width Modulation) inverter, rectifier, power failure detector and +10V regulator and pro- tector as shown below. ae Transformer ov PWM Inverter Tine - Teen Ing [reer ‘mpl iF ter fp [Rectifier f=} +9v Regulator 1301 & 01302_|t ae Hav Control 7 435 un302 i THY. ate [Error Ano Tit ter uw 1 F12V output FOV Troteetar © Power Ship's_| Regulator| | Failure Detector | +i2v, +5v, +9V Mains “) 01305 U1 to US, uiz01 [TX RV. v1301 Fig.1-1 Block Diagram of Power Supply Circuit Pull Inverter The PWM inverter is composed of a switching regulator control, power amplifier and error amplifier. The function of the PWM inverter is as follows. When +12V output voltage increases at the secondary winding of Tl, the amount of current flowing into photo coupler U1 increases and the voitage at pin #2-of U1302 goes higher than 2.5V, causing the slice level for the reference oscillator output (sawtooth waveform) to move upward as shown in Fig.1-2. As a result, the output pulsewidth of comparator(2) becomes narrower. A narrower pulsewidth will cause the de output voltage to decrease. To the contrary, when +12V Tine voltage decreases, the slice Tevel goes ‘down and the output pulsewidth cones wider to increase the de output voltage. ae un02 rt wt Sisenentia. To. gutes t te isda From vio: 413 wm rigid ‘gureur os 1 OmPaRTomanProtector The protector circuit operates to disable inverter oscillation when either of the following conditions occurs. (1) When overcurrent ‘flows into the scanner motor. (2) When overcurrent flows into one of the dc lines (-12V, +5V, +9V, #12V and TX HAV.) se od “ asec on ote. 7 Ga oO Pe Gse) | 0 gayle a Fig.1-3 If overcurrent flows through the antenna motor, US and in turn 01307 conduct,, resulting that the SCR and in turn ql (in 1301) conduct. This makes the voltage at pin #13 of U1301 high. Then, the voltage at pin #1 U1302 (Fig.1-2) goes higher than 2.5V, and the output of comparator(1) goes positive. Since the positive voltage is higher than the amplitude of the sawtooth waveforn from the reference oscillator, the output of comparator(2) is held “H" at all times. Consequently the voltages at pins #8 and #10 of U1302 are kept low, causing the inverter to stop oscillating. NOTE: SCR CRI4 and the associated components form a starter circuit. Immediately after turning on antenna switch $1352, CR14 is cut off and the motor is driven through R25. A few seconds later, (R14 conducts and the motor is driven with full power. This arrangement prevents rush current into the motor which may cause malfunction (conduction) of US. e@ 1-28If overcurrent flows though the -12V, +5V, +9¥ or TX HV line, the photo coupler (current detector K1 in case of #5V line) on the voltage Tine conducts and the switching regulator stops oscillation in the same sequence as the antenna motor overcurrent. 1-28 :Power Failure Detector If the ship's mains suddenly drops to zero, #12V output Tine also drops, which increases the voltage at pin. #3 of U1301 and decreases the output voltage of comparator(1) inside U1301. Then, ql inside U1301 turns off and U113 at PROCESSOR p.c.board turns off. The collector potential of photo transistor U113, therefore, goes up and interruption to the CPU in RP-3 is performed +#10V- Regulator Regulated +10V is derived at the collector of Q1305 and applied to switching regulator control-U1302 #11. Fig.1-5 shows the series regula- tor circuit. $1351 Q1305 TP3, ship's mains | Persia,1-2. Signal Processor General The PROCESSOR board 03P7529 is the heart of the display unit, and con- tains various circuits. .Each circuit is separately explained in detail. The simplified block diagram of the PROCESSOR board is shown on next page. The analogue IF output signal (video signal) coming from the scanner unit is applied to the A/C rain (FTC) circuit to reduce the rain clutter and to the echo stretch circuit to magnify the signal length- wise for better distinction on operator's demand. Then, the video signal is converted into 8-bit data (gradations). These data are led to the gate array and encoded into 3-bit data depending on its grada- tion. Each data for one sweep 1s temporarily stored into S-RAM. The 3-bit data read-out from S-RAM's are led to the EAV (echo average) cir- cuit that the stable echoes, e.g., ships or land, are extracted from the unstable echo, e.g., sea clutter. . After above signal processing, the data for one scan are stored into the video RAM for echo. There are three kinds of video RAM'S, i.e., for echo, plot and mark/character. Output from these RAM's are mixed and applied to the INTERFACE board, where the digital data is converted into analogue signal to display on the CRT. On the other hand, Z-80 CPU and asso- ciated circuit is provided to control most of the circuit. FTC, Echo Stretch, A/D Conv. Fre cn) fo Eetdreu | {tow >t ae om 1 = #—_ WADE cen! | a 1 s to See? ==) co waa fas Ls Sie creon | ent) LH Rus Sa eens SCANNER) ee ket n Ditferentiated 5 (UR) Cireuit CON) Frew ney-Re Fig.1-6 The video signal derived fron the scanner unit is first sent to the FTC circuit composed of R117/R113, C73/C72, CR29/CR30/CR31, etc to suppress the Clutter components such as rain or snow clutter. See Fig.1-6. When the FIC switch is pulled out, #12V is applied to the FTC circuit and the video signal passes through CR30 and CR31. The signal is integrated by R117/C73 to reduce noise and differentiated by C72/R113 to activate FIC effect. To the contrary, -12V is applied to allow the signal to bypass the FTC circuit, i.e., pass through CR29, when pushing-in the switch. Then, the signal is magnified lengthwise about twice at U122 on 3 n.m. range or over when the ECHO STRETCH touchpad is depressed and A/D con- verted into 8-bit data (gradations) by U125. 1-4Fig.1-7 Simplified Block Diagram of PRUCESSOR BoardVideo Input Buffer Memory From a/0 conv. —&—t4l excover Af suigr (Ser Pera) ee S-RAN + Dion 2 ote U2 bit SHIFT |(Pare~ser.) ts a conrecaTor| [sane CORRELATOR une: 7 7 euo DATA ALARM para (801/273) level "5" or wors) Fig.1-8 The A/D converted 8-bit data is led to the gate array U116, which has various functions. Some of then are shown in Fig.1-8. Each bit of the encoded 3-bit data is pushed into a 4-bit shift register, and the shift register content is parallel-transferred into a static RAM whenever the shift register becomes full, Three S-RAM's (1 word '= 4 bits) store Do (LSB, 2°), Di(2*) and De(MSB, 2) bits respectively. The purpdse of the buffer memory is to improve picture quatity on middle 2 and long ranges. Since the pulse repetition rate on both ranges is Tower than that on short and middle 1 ranges, there exists a gap between two neighboring transmissions. Interpolation, therefore, is effective to fill the gap by repeatedly reading out the same data stored in the buffer memory until the next transmission starts. The data read-out from S-RAM's are seriallized into the original 3-bit data string and applied to two correlators to eliminate unwanted signal, noise, interference, etc.; one for 3-bit new echo data (ND1/2/3) and the other for I-bit alarm data. 1-6— FURUNO —_——_ EAV (Echo Averaging) The purpose of echo averaging is to correlate (compensate) the echo presented at near the own ship. The sweep line is rotated clockwise by @ (360°/4096) clock pulses, and hits each pixel. The number of the sweep line hit each pixel differs, depending on the X-Y address of the pixel, i.e, a pixel located near the Sweep center is hit by more sweep lines than that located far from the center of the screen as iMustrated below. Pixel B is hit by sweep line Ones and drawn by the data contained on sweep Tine Ques. To the contrary, pixel A is hit by five sweep lines Ow thru Ones, and drawn by the data contained on sweep Tine Bxssonly since sweep line Oneg is the latest sweep at pixel A. The data contained on sweep line 6 thru Bw are ignored. Echo averaging technique has been introduced to effectively use al] the pixel data offered by several sweep lines which hit a pixel. Rotate by clock pulse Pixel A Note: Size of pixel is exaggarated for ‘Sweep center: explanation.The "new" echo data NDI to ND3 are applied to the address input of P-ROM U49, and: the following things occur in order. (1) When "new" echo data are delivered from the S-RAM, 3-bit data stored at the relevant X-Y address of the video RAN read out. ‘The data are temporarily latched into U3B, and applied to the other address input of U49 as the “old” echo data. (2) Being addressed by both the new data and old data (Tatch content), ROM U49 outputs 4-bit data. Ud9 is a kind of correlator. The output data are similar to the new data, but modified a little bit by the old data. U49 contains such data for all the possible combinations of new and old data. (3) The correlated data (ROM output) are stored into the same X-Y address of the video RAM from which tne old data was read: in step (2), i-e., the video RAM content is updated: When the above-mentioned process (1) to (3) is applied to every new data after @ transmission, the pixels (address locations) for one sweep line are updated, and after one scan (one rotation of the antenna) completion, the pixels for one complete plane are updated. Note 1. ROM is divided into four ‘areas, and each area contains a different correlation data. ‘The ECHO AVG status (OFF, EAVI, EAV2, EAV3) “is coded into 2-bit data (DM1, ON2) and applied to the address input of U0 "for selection of the designated area. 2. When the sweep line hits a pixel for the first time, the new data are corralated with the pixel data which were written one scan before. Khen the sweep line hits the pixel for the second time and later, the new data are correlated with the pixel data which were written one sweep before. The first hitting and the second (and later) hittings are identified by U55, U90/91 and U106 for each pixel, and different areas (different correlation data) of the ROM are used between the two cases. USS (Custom 1 AcAsdr. "Counter ‘ros (Raa AST SuEEP | H Aue 1 ate teu eiectat = fe ls fr) Fig.1-10 EAV Function 1-8Video RAM Control Refer to Fig.1-12 on page 1-11. There are three menory blocks; for echo (Ul4 to U21), plot (U2 to U29) and marks/characters (U4 to U11) data. Each video RAM has a capacity of 256K x 4 bits to cover the entire screen (512 dots x 1024 dots), taking the off-center function into account. The dynamic RAM's used for echo and plot are so called “Dual Port RAM", which has a serial output port in addition to the conven- tional parallel 1/0 port. By using this type of RAM, the memory circuit comes to be simple. On the other hand, the D-RAM used for marks/characters is the conventional one. The shift resisters, therefore, are required in order to change the paraliel output data to serial one. The 3-bit echo data and 1-bit alarm area data are: applied to the parallel 1/0 port of U14 through U21 and stored into each address assigned by the memory address controller Ua6. Polar coordinates (r, 6) to X-Y coordinates conver- sion is done at U46, i-e., X= rx sin@ and Y= r x cos®. The 4-bit plot data coming from P-ROM U39 are stored into U22 through U29. See the block diagram below. PLOT DATA (3 oF more! a i ; iz VRAM : : uneus__| ae Fig.1-11 ‘Plotting Function When the sweep line hits a pixel for the first time, the following things occur in order. (1) If the tevel of the new data (ND1 - ND3) is 5 or more, logical ONE is applied to the address input of the ROM as “new" plot data (NPD hereafter). If the level is below 5, NPD is ZERO, (2) The pixel at the relevant X-Y address in the video RAM for plotting is read out and latched into U38. The pixel is 4-bit, but the MSB is not used (not latched). (3) Being addressed by both the NPD (1 bit) and the latch content (3 bits; "old" plot data), ROM U39 outputs 4-bit data. U39 is a kind of calculator, and outputs an answer as DATA output, depending on the input (ADDRESS) data. The "answer" for every possible ADDR input is preprogrammed in the ROM. (4) The 4-bit output (answer) from the ROM is stored at the same X-Y address in the video RAM, i.e., the pixel is updated. 1-9The ROM outputs such 4-bit data as below; © The lower 3 bits are calculation results, and they circulate; [CRAM LATCH > ROM > If NPD is logical ONE (the pixel is covered by a target), the ROM sets all the 3 bits (HHH). If NPD is logical ZERO (the pixel is not covered by a target), the ROM decreases the 3-bit value by ONE. The 3-bit value, there- fore, returns to zero if NPD keeps zero for the consecutive 7 times of calculations. The MSB of the 4-bit data is determined by the.above-mentioned 3-bit value, and is cleared if the 3-bit value is zero, and is set if the 3 bits are non- zero value. If this bit is set, the pixel is illuminated for plotting. Thanks to the above-mentioned arrangement, a pixel is kept lighting for a while (for 7-time down counting) after the target has gone from the pixel position. The following marks/characters data sent from GOC (Graphic Display Controller) U3 are applied to U4 through U11 respectively. circle frame on, the CRT characters range rings, EBL, VAM heading mark The GDC has the following functions. (1) Produces the read address data (horizontal/vertical) for the video RAM. (2) Produces the marks/characters data. (3) Generates the horizontal and vertital synchro pulses for the CRT. Output data from each D-RAM are: latched by UG1 and U5O at the same dot clock timing, and'mixed by P-ROM U64. The 3-bit mixed data are led to . INTERFACE boadrd 03P7530 and converted into analogue data by D/A converter Ul. - After then, the data are-derived to the CRT with the horizontal and vertical synchronization signals. 1-10It il sour . of ALARM AREA wuum eho Dats {rom ROM U8 {tom ROM U3 Fige1-12 24, 63636 un wewony CONTROL, I ms) 1, f+ cas! p-rawsBP (Bearing Pulse) & HP (Heading Pulse) Control us varerorn cru ata aus RESHAPE (TO CPU NM 2 1 Yow 8 saseern D FROM BP. ——w eee ‘SCAN Scanner | Georre s| un [7 we Pu bs , (ae sate Array um }[uno }4 serecceeasie {we} ae ua jue teiains + PANEL FCB. bath oun = 170 akan ALON C2 5.6) e Fig.1-13 Bearing pulse BP (360 pulses/rotation) cones from the BEARING SIG. GEN. board MP-3795 inside the scanner unit. The BP is reshaped by U97 and the one output from U97 is applied to PLL U109. Gate array U45 contains a frequency divider and outputs 4096 pulses per rotation. This signal is called "Scan", and is utilized to detect the antenna direction with high resolution. It means that the radar screen (360° full circle) “is divided into 4096 equal sectors (every 0.088-degree). The scan’ signal is led to the NMI (Non Maskable Interrupt) terminal of CPU U44 and the CPU counts up the pulses in order to calculate sin8/cos®. The other output from U97 is led to the inhi~ bit terminal of PLL U109 via U110 to stop PLL operation when no bearing pulses come in, The heading pulse also comes from the BEARING SIG. GEN. board inside the scanner unit. The HP is reshaped by U97 and sent to the retriggerable one~ shot multivibrator U110 in order to eliminate chattering which usually follows the heading pulse. ‘Then, the heading signal is led to the CPU via PPI (Programmable Peripheral Interface) U74. By referring to this bit, the CPU can recognize the heading signal, and it clears the NMI count. (In reality, the count is not cleared. The CPU reads 4-bit HEADING ALIGN data through U74 and presets the count with the SCAN pulse number which corresponds to the DIP switch value.) 112TX Trig. & Echo Sampling Trig. Refer to Fig.1-15 on next page. When the STBY/TX touchpad is depressed three minutes after turning on the POWER switch, the negative going pulses called “INTT (INTernal Trigger)* come out from the gate array U116. Its pulse repetition rate varies in accordance with the range data which are sent to U116 from the CPU. The internal _trigger clears O-type flip-flop U67 and the potential at U82 Q turns to “H". This positive going pulse actuates retriggerable one-shot multivibrator U108 and @ negative going pulse comes out at Q terminal. This pulse is inverted by OR gate U96 and turns on transistor Q7. As a result, @ positive going TX trigger pulse shown below is obtained at the emitter of Q7, and delivered to the MOD. TRIGGER board of the scanner unit. ba 3.8 to 1008 Fig.1-14 z Note: The internal trigger slightly fluctuates, i.e., the pulse repetition rate changes slightly on every transmission, $0 as to avoid inter- ference among radars operating in the field. 77.7Miz oscillator U4? is used to get the sampling clock pulse called "SCK". 77.JMiz is divided by 2 or 3 at counter UBB depending on the range setting, and applied to gate array Ul16 as a sampling clock pulse. This clock pulse is furthermore divided at the gate array in accordance with: the range date coming from the CPU. On the other hand, the sampling start trigger pulse Called "SMPL (SaMPLing)" is required in order to start the write operation (echo sampling). This pulse comes from D-type flip-flop U69 as shown in Fig.1-15. The clock pulse for U69 originates from the output Q of U67 and its timing i$ adjusted by potentiometer VR12 located on the PANEL board so as to compensate the time lag of transmission timing. The read pulse (1.789MHz) for the S-RAM's is called “DCLK". This pulse is obtained by dividing the oscillation frequency of U78, 28.63636MHz, by 16. 1-13ott ose. note Ut16Gate Array ia courrer }— 1.199 OCLE 23. 63636un2 ory DATA ‘cours Fig. 1-15 1. tus (e/jamins) PANEL PCB 3P7531 mac. (70 SCANHER) enn PMP —— FURUNO Refer to Fig.1-18 on page 1-17. 1-80 CPU and its associated parts shown below are used to control almost cir- cuit. ceu (uaa) uPD70008AC-6 ROM (U2) MBN27C512-25 RAM (U102) uPD4464~-15L. 1/0 (U74, U93) : uPO71055C Programmable Peripheral Interface Timer (Ui) : uPD7LO54C Programmable Interval Timer The CPU accepts the following interrupt request (TNT), i.e., gyro, timer and power failure interruptions. The latest gyro data is fetched to get true bearing. The periodical timer interruption is caused by the OCLK (1.789MHz) clock pulse to read/write a device which cannot issue an interrupt request, such as the touchpad keyboard. As for power failure interruption, see page 1-3. Another interruption to the CPU is NMI (Non Maskable Interrupt), which has a higher priority than INT., The "Scan" signal explained on page 1-12 is applied to the RMT terminal in order to know the antenna direction. U?4 and U93 are 1/0 ports, which contains three stages of parallel ports and ‘one control register. When viewed from CPU U44, the three ports are read/write ports and the control register is a write-only-register. They are accessed from the CPU by using two LS8's of the address bus. Fig.1-16 shows the input/ output data at each port. They are individually referred to Fig.1-6, 1-10, 1-12, 1-13 and 1-18. Address bus Heading, etc. Tune Ind., ete. OGATE(Alarm Bearing), etc. v Port 0.[—-MBL(Mark Bril.), HOBL (Heading Bril.), etc. Port 1 }— ES(Echo Stretch), PW(Pulse Width)1/2, etc. Data bus + Port 2 |= DIP Switch Si Fig.1-16 The key closure status of the touchpad keyboard is read by the CPU through 8-1 data selectors U73/66/54. 1-15The gyro serial data and its shift clock pulse (synchro pulse) coming fron optional Gyro Converter GC-1 (or AD-10S) are applied to photo couplers UIL1 and UL2, respectively. Output data from U111 is pushed into: shift resisters ULI7 and'UL18 in this order. When 16-bit gyro data are shifted into the resisters, the shift clock supply stops for a while and the retriggerable one- shot aultivibrator (U71) output goes down. This causes an interrupt for the CPU to fetch the data. Fig.1-17 shows the gyro data fetch timing. shift Clock (Hw) TULL OV (GC-1 side) egemazze i pn Eo ceersaey ese ped Gyro Data (H) { OV (G1 side) +5 UL12 Output JNU UL ov (processor side) _ SLA | ULL] Output» i OV (Processor side) ‘U71 Output ee eee ae (nterruption to crv Fig.1-17 As for alarm, presentation-of an alarm area and generation of alarm sound are required. The alarm range and bearing signals are NAND-gated by U79 in order to draw the alarm area’on the screen. Then, the alarm area data is sent to D-RAM's for echo (U14 through U21). On the other hand, the alarm data (*5* or more in level) is necessary to sound alarm. The 1-bit data, therefore, come from selector U116 (see Fig.1-8), and are NAND-gated with the alarm range signal by U79 at first. In the next place, since the bearing data is also necessary, its output and the bearing signal are led to one-shot multivibrator U71. Output from U71 actuates an alarm buzzer mounted on the PANEL board. 1-16wwe seuscron cru ow 3 use| ove nae [uw roveuran be aot ay wr Les sure one, ENCE | owes ivbntsny _ PANEL PR sf funds vn | fin! Proto | SulFT ROM UM ALARA BUZZER covrtee REG 21 Baan +] uns | eantnc | 10 ener om ——[um]} fa a row oc eye ne «Gyr0 at ce oun i “ BUz2ER) mn] wor = = BACK-UP YOU op POWER FAILURE ————. Dera > 6 pee > en) To COUNTER (4096ppr) 7} ee }> PRR } SCANNER “ i conv. c. vee covT. uit bet sat cot. — vio bp [ese s[eyeye To. Ua fey | yuo om fe[wie fa [Jeti ee pr }ujujuyR om nel 2 oun —! Fig.1-181-3. CRT Display Fig.1-19 shows the signal flow of the video signal, horizontal /vertical synchro pulses and +12V line. BH —b 222d oon wR —$32—k3du bate wor “553i ks¢~ boot vam Sere ¢ —__bs: Pome Sit fond e |e Cn ot ba>i—k2 PI Preah i Seated Gary ventas Fig.1-19 The 3-bit video data, i.e., USP 80, DSP BI and DSP BZ, are converted into analogue signal by D/A converter Ui at the INTERFACE board. The con- verted video signal’ passes through VR5 (BRIL. Cont.) on the PANEL boar and is sent to the CRT assembly through the INTERFACE board. Then, thé video signal is amplified up to the level enough to drive the CRT, and delivered to the cathode of the CRT. The horizontal and vertical synchro pulses are generated by the Graphic Display Controller at the PROCESSOR board and are sent to the CRT assembly via the INTERFACE board to produce raster on the CRT in synchro nism with the video signal. Fig.1-20 shows the timing chart between the horizontat/vertical synchro pulses and video signal. 1-18— FURUNO The CRT display circuit consists of the DEFLECTION board, CRT and the associated components. See Fi DEFLECTION Board Video Repl fier Video sion cr a mt Thali ala i (CONTRAST=1)- | caunece Tarr), BTN a Hortaontet Synchro wertce” Js scr ter Koes Pulse Ue - (iczo1) (ic202) (Q201) (9202) Nor{zontal ! Deflection Coit Polarity |,[vereical _, [Vertical Butter,” [24 Ogct tator (24 Oveput Vere tea? (iceo2) (9401/0402) Deflection Coil Vertical Synchro Wise yaar Un (acea) Fig.1-20 Block Diagram of DEFLECTION Board ‘The DEFLECTION board needs three kinds of the signals; Video Signal, Horizontal Synchro Pulse and Vertical Synchro Pulse as shown above. (Since the CRT is arranged vertically in this equipment unlike the ordi- nary TV set, "Horizontal" and "Vertical" designated on the DEFLECTION board correspond to "Vertical" and "Horizontal" respectively.) ‘The video signal passes through the CRT brilliance preset pot. RV101 (CONTRAST-1) and is amplified in the video amplifier Q101/Q103/0106 up to the level enough to drive the CRT, then delivered to the cathode of the CRT to present the display data-on the screen. 1-19The horizontal and vertical shnchro pulses are generated by the Graphic Display Controller in the MEMORY board and are sent to pins #6 and.#9 on the DEFLECTION board respectively to produce raster on the CRT in synchronism with the video signal. Fig.1-21 shows the timing chart bet- ween the horizontal/vertical synchro pulses and the video signal. 5.59us Hort zontal Synchro 5v Pulse ov 63.7us ——+t kK-46.7us iu J ‘44.7us ea (a) Timing Chart between Horizontal Synchro Pulse and Video Signal +0.57ns 16.71s ———1 f+| 0.835 ae ov Vertical Synchro — sv Pulse || : — (b) Timing Chart between Vertical Synchro Pulse and Video Signal Fig.1-21 Synchro Pulses and Video Signal 1-20The DEFLECTION board can be operated irrespective of the polarity of the input horizontal and vertical: synchro pulses. For instance, the horizon- tal and vertical synchro pulses are fed to the polarity buffer circuits (exclusive OR) IC201, and they produce the positive going pulses as shown below. +5V rezor 7 Ly ot Horizontal (and Vertical Mortaonta, (nd Vertical) Synchro Pulse : 7 a Leading © tive or @ “Threshold Level or of Iczo1 © i i ae we oceania): e Fig.1-22 : Of the two output pulses (positive going pulses), only the former one is employed to activate the next stage of the horizontal (and vertical) ; oscillator, that is, each horizontal and vertical oscillator becomes active at the leading edges of the horizontal and vertical synchro pulses, respectively. The output of the horizontal oscillator is fed from pin #10 of 1C202 to the horizontal drive circuit (the base of Q201), and amplified up to an amplitude enough to drive the horizontal output transistor 0202 via the drive transformer 7201. Q202 is turned on and off alternately by the pulse voltage from T201 and as a result, the voltage is produced across ‘the hoizontal deflection coil as shown in Fig.2-23. : —5v an ouartee e/a a cee 202 coNector [is0ve-» seen carat AA SAT Tite Voltage across. fl Deflection Cott LI L Fig.1-23 e 1-21The output of the vertical oscillator is fed from pin #2 of 1C202 to the vertical output circuit (Q401/0402) to be amplified, and then sent to the vertical deflection coil. See Fig.1-24.. 402 base —L 1 IM nk Period) Fig.1-24 CONTROL PANF!. Board (03P5553) - Nine (FR-8050) or Ten (FR-8100/8250) kinds of range signals from the e RANGE switch are coded to 4 bit data by the encoder Ul. See Fig.1-25 and Table 1-2. When the RANGE switch is set at 0.25 nim., al input pins are high. Therefore all output pins become high, and these outputs (RANGE 1/2/3/4) are sent to the CPU board (03P7529) as a control signal via the MOTHER board. Table 1-1 Tange Tae tnt}, oa TP plelslep els lolele|a] + ozs [ww fulm]e]e]efele [ale] a |e oe |e Uwtafala fale tala ada pate : os [x lelnfalalm tial Pade ti | us [xlalelwtala yaya te fw aye fe : SUSI C IMIR IM iy Pde LL eal Aa ie pM lala le [atcha re a ae ARV RIAU CII Pde fe Ls me adexlafx{e(e(mim fate (e de Moo FAURE UE LAL EK /C|m [em] te geo AeA Lada det [edad le m4 Range 14) 1 Range 200) 4 mq) 1) To CPU Board Range 300) Range 4.) e . O03P5553 . . 1-22 Fig.1-25— FURUNO — CHAPTER 2, ADJUSTMENT Measurement Laie Ratings pt. Board | Point | Adjuster & Condition +12V Regu- 11.9 to 12.1¥ POWER SUPPLYI® J402 #6 | Adjust VR1 on POWER [tates volt. PTU7536 ‘3402 #2 | SUPPLY pcb. Overvoltage | 40.1 to 45.0V FILTER |@ DTB-I #1)Gradually increase Protection | (24/32V mains) [036983 |@ DTB-1 #2|ship's mains and check the voltage when 17.0 to 19.0V operation stops. (12V mains) +5V Line 4.75 to 5.25¥ INTERFACE \® J2 #4 Transmit on 48nm range Volt. '03P7530 © Jz #2 and confirm each line ; voltage. +12 Line | 11.9 to 12.1 I@ v2 #6 Volt. 1© 32 #2 “12V Line | -11.4 to -12.6¥ @ 02 #1 Volt. loz #2 #35V Line | 30 to.34.5V (@ 92 47 Volt. iO J2 #2 ‘+9V Heater 8.4 to 9.4V I@ J3 #4 Volt. 10.33 #5 Motor Volt. | 22.8 to 25.2Vdc 193 #1 (123/200en Ant.) iO 03 #3 2avde mains (240cm Ant.) TX High Volt.| 250 to 270 Rear chassis @ OTB-II ({FR-8050D/DA) Chassis 230 to 310V (FR-B1000/08) 0 to z (R-82500/08) Pulse Rep. | 1995 to 21252 [PROCESSOR |TP5 (Confirmation only. Rate (spe, mip") _|03P7529 to T240Hz (UMP) al z Lp") feo to S15 — (on 96nm range)Weel gem resid Measurenent. — Ratings = PC. Board] Point | Adjuster & Condition Tk Trigger lprocessor | TPs Confirmation only. Kaveforn | f -12v [037529 3.5-10us TK Timing | cH Jprocessor | TPS (ch.1)|Use dual-trace oscillo-| (Sample 1) | (TP5) [7 Jo3P7529 | TPA (Ch.2)|scope and confirm *T* i by turning ¥R12 on cH PANEL pcb. cay L_ 10.605 (vri2: fully Cow T21.4uS (vez! futly cH) GAIN Preset | 5.5 + 0.5V PANEL @GAIN [Set to Zan range, ST- 37531 |@ GND | BY and turn GATW control fully CW. [Adjust VR10 on PANEL eb. STC Preset | 4.5 + 0.5V ANE, @sic [Set to 2anm range, St- (BA-type) © GND [BY and’ turn A/C SEA Hees bv —— control fully CW. (D-type) [Adjust VR9 on PAWEL pcb. FTC Preset | 6.3 + 0.5V PANEL @FIC [Set to 2dnm range, ST 37531 |OGND —_—*|BY and turn A/C RAIN control fully CCH. JAdjust VRB on PANEL peb. Focus Range rings and [ORT Turn PANEL DIM control characters can fully CW, and adjust be seen clearly. VR203 on DEFLECTION pcb For CRT. Picture Size RT Turn_on RANGE RING touchpad, and adjust fvRa02 (V.SIZE) and R403 (V.LINEARITY) on DEFLECTION peb for CRT. 22— FURUNO Neasurenent Ttem Ratings [PC Board] Point. | Adjuster & Condition Tuning Tuned at mid- {CRT Set TUNE contro} to travel of TUNE center position and control. transmit on 48nm range. ‘Adjust VRI3.on PANEL peb for best tuning. Tuning Four tuning [CRT Transmit on maxtmun Indicator [markers Tight up range and tune. Sensitivity Jwith the fifth Adjust VR11 on” PANEL marker b1inking pcb. when tuned. Echo Stretch [Noise level [CRT Transmit on 24nm range should be sane and adjust GAIN contro} when turning so that speckled back- ECHO STRETCH ground noise is just touchpad on/off. Visible. Adjust VR1_on| : PROCESSOR pcb. OscitTation [1.77 to 1.8imiz [processor [TP Confirmation only. Frequency | (OCLK) 037529 67.9 to 78.5MHz | -- TPe (SHPL_CLK)a — FURUNO CHAPTER 3. PARTS LOCATION * Pane? 03P7531, Keyboard 111unination/VRM 037532 W Pate No.2 Fig. 3:1 Display Unit Front View Tne location of the preset potentiometers on the PANEL board is shown below. Pry off the panel cover with a small screwdriver. VR7 VRE VRQ VRIO YRIL yriz fret IND. Oo OOS SL Cover 3h25x12 %. Front Pane? 2 “11 1nmi./VRM Board im 037532 Keyboard Exploded View of Front Panel crt Fan Motor: CRT Anode Cap (81) CRT Board Deflection Board Power Supply. Board PTU-7534 Filter Assy. Interface Board 03°7530 Rett TX HY Board HY-7130 eat Fig. 3-3 Display unit Top View 362RoM(u2) we waikeg’ ~~ Processor Board 1 Phan sane eer Fig. 3-4 Display Unit Side View Connector for Cable from 8 Scanner Unit (DJ=1) Interface Board 03P7530 Connector for Cable from DTB-1 Scanner Unit (Video Line) | (9201) ( ‘DTB=2, (for TX HV) Fuse rere Mains 5A (for 12vDC) 71351 {ion (For 24/32¥0C) Fuse for TX HV FI (0.54) Fuse for Scanner ‘Motor 1352 (5A) nw rrocnenor Fige 3:5 Display Unit Rear View with Rear Cover Removed 33SCANNER UNITGENERAL INFORMATION CHAPTER 1. 1-1. 1-2. 1-3, 1-4. 1-5. 1-6. CHAPTER 2. CHAPTER 3. BLOCK DESCRIPTION Modulator Trigger © Modulator Duplexer and Mixer IF Amplifier STC Bearing ‘Signal Generator ADJUSTMENT PARTS LOCATION 3-1 to 3-3— FURUNO GENERAL INFORMATION The scanner unit contains the following p.c.boards. Most of them, except for the BEARING SIG. GEN. board, are different among models. Table O-1 P.C.Board Convertibility FC. Board Wedel 7 ag tle Cade Wo. | SOEOD|BOSOOAT ETON [ BEARING STEN BERaNOR P3795 ae o]o | ol o | o 035686 | 008-311-Io| 9 | o [oo MODULATOR MD-5145 | 008-200-160) o[-3 MOD. TRIGGER -Bogasid-090t of of o je ft 008-103-180] 0 8 IF AMPLIFIER / pic eee 008-103-190] ° ° ° ASTC~6995 The following table shows the major components used for the scanner unit. Table 0-2 Major Components Item ode FR-8050D | FR-B050DA | FR-8100D FR-810008| FR-8250D FR-82500A | a aeseeTver | arR-013 | aTR-O13K | ATR-O14 | ATR-O14A | ATR-O15 | RTR-O15A Antenna | Radistor XN2,XN3 or KN3A XN2, XN3, XN3A or XNGA Magnetron, ‘BHEO2/ESE26 ‘oH602 WS1G7(F) Cor SH752)_ Diode Limiter 'NO7028-1 Tor S-LX58) 3=LXSB MIC 307% Circulator RC=3686 [Pulse Trans. RIAL RY=A037-A Choke Coil RL-3772-3, Ri-4036-2 SCR. —SHBJI2U_Q1_ pc.) SHI6JIZU (2 pcs. | | Scanner Rotor DaG-516 OW DCA Fan Notor Not provided FBP-OBB24LZ 0-1CHAPTER 1. BLOCK DESCRIPTION 1-1. muse Wi Modulator Trigger 03P5732 for FR-805OD(DA) and FR-8100D(DA) See Fig.1-1. The modulator trigger circuit, consisting of 0850, 0854, 0853 and U850, generates pulses that fire the modulator SCR (CRB13). To Relays Modulator SCR_ stv, (801 /K802/K803) fn t Modulator Trigger aa HERP aie Qin oa Tuooer i Gera yeeourar, ‘iee_Yeataone O3P5732 Fig.1-1 Modulator Trigger (03P5732) Normally the circuit is stable with Q850/0853 off. 850 turns on upon receiving the TX trigger from the display unit and this causes, a negative going pulse: to be produced at its collector. Then, a positive going pulse is produced at pin #6 of U850 and sent to 0854, and then a negative going pulse is generated at the collector of 0854. The negative going pulseris differentiated by C866 and R865, and then only a negative going differentiated waveform is applied to the base of Q853 as shown in Fig.1-2. As a result, a positive going putse (Modulator Trigger Pulse) is produced at the collector of 0853 and delivered to the gate of modula- tor SCR CR813.The circuit made up of UB5O and Q854 prevents the modulator from being fired by noise. The first stage of the one-shot multivibrator U850 operates immediately after the Tk trigger pulse, and next the second stage of U850 operates. The output (#9) of U850 is applied to the reset terminal (#3) of the first stage of U850. . In this manner, the level at pin #6 of UB50 is kept "L" while the level at pin #9 of UB50 is "L". Therefore, even if noise appears after the Tx trigger pulse, Q853 1s kept off. TK Trigger Pulse—— -——_____[1— (53 Base 7 9853 Collector 7 tl (Modutator Trigger Pulse) Fige1-2 The circuit made up of U852, U853, Q8B0, Q881 and Qe82 operates as a decoder to drive the relays for changing the TX pulselength depending on the settings of the RANGE and PULSE touchpads. Refer to the truth table 1-1 shown below. Table 1-1 Truth Table eared Pulselength sf omy mete PULSE WZ. (oe PULSE M1 Leer ee Relay K801 OFF | on | ON | ON Relay K802 orr | ore | on | on [retay 803 OFF } OFF | OFF | ON 12RF-5144 for FR-8250D(DA) This board consists of the modulator trigger circuit and the switching circuit for the magnetron heater voltage. Since the operation of the modulator trigger circuit is -the same as FR-1505/1510D(DA), only the circuit description of the switching circuit for the magnetron heater voltage is mentioned here. See Fig.1-3. Mag. (+) To Magnetron Heater Fig.l-3 Switching Circuit On short ranges, Q812 is cut off since the level at pin #9 of U853 is kept low. Therefore, relay K804 is not activated, and the voltage of "9V HOT" is passed through R812/K804 and applied to thé magnetron as a magnetron heater voltage. On the contrary, Q812 becomes conductive on middle/long ranges sirice the both levels at pins #8 and #9 of U853 go high under transmission condition, causing the voltage of "9V HOT" to pass through R812/R811/K804 in order. As the result, the less magnetron heater voltage is applied to the magnetron. 1-31-2. Modulator 03°5686 for FR-805OD(DA) and FR-81000(DA) The modulator circuit produces a narrow high tension pulse that drives the magnetron. It is composed of a line-type-pulser as shown in Fig.1-4. High Voltage es poked edutatar Feignee Fig.1-4 Modulator (03P5686) L801 is the charging choke, which forms a series resonant circuit with the pulse forming network (PFN) consisting of C811 thru C816, C819 and L811. The TX high voltage in the input is doubled by the electromotive force of this coil and the PFN is charged up to twice the input voltage. The time taken for full charge is roughly calculated by the equation T=2 LxC, where L and C represent L801 and capacitors of the PFN. The PFN is a concentrated constant L-C circuit, which is an application of parallel two-line circuits with an open end. The modulation pulse that drives the magnetron develops when the energy stored in the PFN is discharged through CR813. Duration of the pulse is equal to the time required for the voltage wave to go and return in the L-C network, and it is given by duration t= 2N Lx C, where N is the number of sections of the L-C network. CR8O1 prevents the energy stored in the PFN from discharging to the input Tine. The advantage of employing CR801 is to allow a wide choice of CR813 Firing timings and to get efficient utilization of stored energy; (R813 can be fired at any time after the PFN is charged to peak and fluc- tuation of trigger timing does not affect the amplitude of the pulse. The pulse transformer T801 boosts up the pulse produced by the PFK. Since the characteristic impedance of the PFN and the input impedance of TRO) match (about three ohms), a pulse with half of the network voltage is developed across T801's primary winding. 801 boosts up this pulse by 25 times and applies the resultant output to the magnetron,, which oscillates at 9410MHz. 1-4Voltage — Thee Tiger Fi, SL rime ‘seer Fig1-5 L802 holds doun the rising soead of CRAL3 current below a certain level in order to minimize energy loss wasted by heat. CR802 and R615 absorb the counter electromotive force that develops at the moment CR813 turns off, protecting CRB13 from damage. CR804 and CRBIS absorb ringing of pulse in the secondary of T801. C804 decouples the pulse energy that is lable to occur across the magnetron heater when T801 secondary windings are unbalanced or the load is asymmetric. Fig.1-6 Resorbed by ‘cra04/cReis MD-5145 for FR-8250D(DA) ‘The modulator circuit is shown in Fig.i-?. The operation of this circuit is basically same as FR-1505/1510D(DA) with the following exceptions. [Page Teen FR-8050/8100D(DA) FR-B250D(0A)__] T801 boosts up this TeOL 1-4 | Paragraph 5 | ulse by 25 times =. by 18 tines susNour 33 Stig MODULATOR MO=s1a5 OTS Ee Ee ERE | Hee. F ee lar eavtator Trigger Fig.1-7 Modulator (MD-5145) 1-5Duplexer and Mixer Since the radar system uses a single antenna for transmission and recep- tion, an efficient device is required for switching the transmitter and the receiver. This radar employs circulator NYBOL for this purpose. See 1g.1-8. To Asteme Magnetron circutator Diode Limiter mic Fig.1-8 The circulator HY801 is a passive directional coupler with three ports. Tt contains a permanent magnet and a core of ferrite material and bends the electromagnetic wave in a specific direction. In Fig.1-8, the micro~ wave energy produced by the magnetron enters the circulator from port 1 (1x), In is bent in the specific direction and energes from port 2 (ANTENNA) with TittTe loss, port 3 (RX) being isolated. In the sane manner, the received signal entering into port 2 is transferred to port 3, ‘isolating’ port 1. This operation of the circulator protects the receiver @ during. transmission and minimizes loss of the received signal during reception. ; ‘The diode limiter is @ self-activating switch made of two PIN diodes.’ Its function is to attenuate the strong transmission signals from the magnetron and fron other boat radars through the antenna and to protect the MIC (Microwave IC) U801. The PIN diode nas certain characteristics as shown in Fig.1-9 and conducts at a certain level of microwave power. When the diode is in the cut-off state, the input impedance of the diode Vimiter matches the impedance of the waveguide, and the microwave energy is delivered to the MIC. khen the diode is put into a conductive state, the waveguide is short-circuited and most of the input energy is reflected back to the transmitter side. The strong signal is, thus weakened down to about 50nh by the diode limiter. at Reception Transmission Output Power: : Input Power Fig.1-8 U801 is a NIC incorporating a local oscillator and mixer diodes. The ! received microwave signal of 9410MHz coming from the diode limiter is @ mixed with the local oscillation signal at the mixer diodes and con- . verted into IF signal of 6OHHz.1-4, IF Amplifier BIF-4879 for FR-80500/81000/82500 See Fig.1-10. The IF signal of 60MHz coming from the MIC is amplified ‘and converted into video signal, which is delivered to the display unit. ae POLY Lo tnpee tra RICThe IF amplifier is composed of five major circuits; linear amplifier (9601/9602, U601/U602), video amplifier (Q603 thru 0605), bandpass selector (7603, CR6O1/CR603/CRE10), tuning indicator circuit (U604, 0606) and voltage regulator (U605). A signal applied to the base of Q601 is amplified by Q601-and Q602 in cascade, and sent to U601 via T602. Then, a signal amplified by U6OL is furthermore amplified by U602 and detected by U603, and then amplified by Q603 thru Q605 and delivered to the display unit. The IF amplifier operates in either narrow or wide bandwidth mode depending on the settings of the RANGE and PULSE touchpads. On short ranges, the impedance at the secondary winding of 603 decreases. since CR6O1/CR610 are conductive and CR603 is cut off, resulting in selection of wide bandwidth (13MHz). On the contrary, CR601/CR610 are off and CR6O3 is on, selecting narrow bandwidth (3Miz) on middele/long ranges. The IF signal of 60MHz amplified by Q601/0602/U604 is detected by CRE06. The detected signal is: amplified in current by 0606 and applied to the tuning indicator circuit in the display unit U605 produces the +5V regulated voltage for the MIC. CR607 is employed to protect against overvoltage. BIF-5668 for FR-80SODA/8100DA/8250DA See Fig.1-11. The IF signal of 6OMHz coming from the MIC is amplified and converted into video signal, which is delivered to the display unit. The IF amplifier is composed of five major circuits; linear amplifier (9601/0602, U601 thru U604), video amplifier (Q604/Q605), bandpass selector (1602, CR6O1/CR60Z/CRE13), tuning indicator circuit (U605/U606, 0606) and voltage regulator (U607). A signal applied to the base of Q601 is.amplified by Q601 and Q602 in cascade, and sent to U601 via 7602. Then, the signal amplified by U601 is amplified by U602 thru U604 and sent to 0604/0605 where it is further- more amplified, and then delivered to the display unit. ‘The IF amplifier operates in either narrow or wide bandwidth mode depending on the settings of the RANGE and PULSE touchpads. On short ranges, the impedance at the secondary winding of 7602 decreases since CREOL is conductive and CR60Z/CR613 are cut off, resulting in selection of wide bandwidth (7MHz), On the contrary, CR6O1 is off and CR602/CR613 are on, selecting narrow bandwidth (3MHz) on middle/Tong ranges. The IF signal of 60MHz coming from the MIC is amplified by U605/U606 and detected by CR607. The detected signal is amplified in current by 06065 and applied to the tuning indicator circuit in the display unit. U607 produces the +5V regulated voltage for the MIC. CR610 is employed @ to protect against overvoltage. 1-8TF input from WIC 1 HE 7 Os 1 output to Display Figsl-11 1915. STC BSTC-6995 for FR-80500/81000/82500 | ASTC-6995 for FR-8050DA/81000A/825008 Fig.1-13 shows the STC circuit. The differences between ASTC and BSTC- 6995 p.c.boards are listed below. Table 1-2 ea a [Stes so [5 | oo | am [ana | mal x0 | — |or| anc [cor ese [| me | wo lomo | xo | co | om [mor] — | — The STC circuit contains MBS/STC/FTC waveform generator Ul. The TX trigger from the display unit is sent to pin #1 of U1, where two kinds of waveforms are generated; one is an MBS waveform at pin #9 (Fig.1-12(b)) and the other is an STC/FTC waveform at pins #16 and #17 (Fig.1-12(c)). ‘Both waveforms are mixed and controlled at IF Amplifier p.c.board, and the resultant waveform shown in Fig.1-12(d) is obtained to suppress the main bang and gain just after the transmission trigger. VR1 is provided to take MBS timing as shown in Fig.1-12(b). fa) UL ot (tx TRIG) ! igre : Bowen AFTEMUA TION wba “IN (HBS waveroRs) (STC WAVEFORN] — 270 10s tc) Ul 016/017 (sTc/eTe SS a "WAVEFORM aes waavrave (6) COMPOSITIVE I WAVEFORM OF wieich Fig.l-12 110Te Tehg from Clsplay One (eat-a) cot day SH on Figs1-13 aa1-6. Bearing Signal Generator Tne bearing signal generator produces the square wave signal that synchronizes the sweep rotation with the antenna rotation. "BEARING SIGNAL GEN, “Wear Taran Fige1-14 U901 1s the photo-interrupter composed of a light emitting diode and a photo transistor. It has a configuration in the shape of “U". The light emitting diode is mounted in one wall of "U" shape and the photo transistor in the other wall. There is a slit between the walls, where the timing disc rotates. 60 slits are arranged along the circumference of the timing disc at regular intervals. The timing disc is fitted on the scanner motor shaft and rotates at speed of 14érpn. The photo transistor receives light emitted by the light emitting diode thru the slit of the timing disc and converts it into electric current. The output of the photo transistor across R903 represents the hal f- rectified sine wave with frequency of 144Hz. This signal is amplified, reshaped and then sent to the display unit as the bearing signal. 1-12CHAPTER 2. ADJUSTMENT : Neasurenent on Retiade: Theck Point ‘Adjuster & Condition Magnetron | 7.0 to 7.6V__|RF Module @ Poi #12 | set to 0.25nm range, Heater Volt. |(FR-B050/8100) © Pal #11 | ST-BY and adjust Raiz fon RF module. 1 TE t0 7.7V (FR-8250;"SP") 3,5 to SV Transmit on éBnn range| FR-8250; *M1P*, and adjust R811 on RF wae", HP" nodule. Diode Nonitor| 1-4 to 4.2V [RF Module @ P6O1 #2 | Set to 0.25 nm range, Vort. © P01 #10 | ST-BY and confirm OI monitor voltage. Magnetron | 1.8 to 4.00 [RF Module @ Pa01 413 | Transmit on each range Current R-8050; *SP*) © P81 #5 | and confirm each -——__ | voltage. 2.0 to 4.0V so ma, e wee, LPH 2.5 to 5.0V : FR-si00; SP") 3.0 to 5.0V Fao; mie) “wap, LPH 5.0 to 7.0V (FR-82503 "SP") 6.0 to 8.0¥ FR-82503 "MIP", _ oe bape Wain Bang (Approx. 60.014nm [CRT Transmit on 0.25nm and Suppression [black hole should adjust VRI on STC pcb. appear at center screen. ao} 2-1— FuRUXO CHAPTER 3 PARTS LOCATION 7 Orive Gear ($801) Ps Bearing Pulse Generator Board (mP-3795) Antenna Turning Gear —7 [Terminal Board (RTB801) Scanner Motor e (8801) Motor Brush (2 pcs.) Housing Cover_renoved Scanner Unit with Scant 31Nareaare Circulator BIF=4879 ator BIF -5668 (HY801 ;RC-3686) Diode Limiter STC Board (CR810;S-LX58) ASTC~6995 BSTC-6995 Modulator Trigger Board (03P5732) RB12 Wi Phte nao Fig. 3-2°Transceiver Module for FR-8050/81000(A) e- ae veo, 9¥502/E3526 ~~ FR-B050D(A) 9602 ~~ FR-81000(A) SCR (CRB135SH5I120) Pulse’ Transformer (7801 ;RT-8427) Modulator Board (03P5686) pee nome Fig. 3-3 Transceiver Module Botton View with Shield Cover removed (for FR-8050/81000(A)) 32IF pmp. Assy. BIF-4879 --- D-type BIF-5668 ~-- DA-type Circulator (HY801;RC~3686) e Filter Assy. ‘STC Board ASTC-6995 --- DA-type BSTC-6995 --- D-type _—Diode Limiter 7 (CRB10; S-LX5B) MIC (vB01 ;RU-5072) \Cnodulator Trigger Board 3801 (RF-5144) Rell Wheto Ne.21 Ran2 Fig. 3-4 Transceiver Module for FR-82050(A: Nagnetron Pulse Transformer vB01; 94752 or (780 ;RT-4037) 45187(F) scr (cRei3) Fan Motor (802) Modulator Board 1 thts Noa) (M0-5145) Fig Transceiver Module Bottom View with Shield Cover. removed anil eMAINTENANCE, REPLACEMENT & TROUBLESHOOTINGCHAPTER 1. CHAPTER 2. MAINTENANCE & REPLACEMENT OF MAJOR COMPONENTS General Cleaning and Lubrication Replacement of Major Compoments in Display Unit Removal and Replacement of Major Components in Scanner Unit TROUBLESHOOTING— FURUNO ——— OO eff CHAPTER 1 MAINTENANCE & REPLACEMENT OF MAJOR COMPONANTS 1.1 General The radar system should maintain optimum performance for a reasonably long period of time. Factory adjustment or alignment of circuits does not require frequent readjustments and realignments. However, con= tinued performance can not be expected without periodic inspection and maintenance Periodically, @ thorough inspection of the equipment should be made. Cable connections at terminal boards and connectors should be kept Clean and tight. Be sure all ground connections are secure and pro~ perly grounded. Arrange all wires and cables in orderly manner to prevent the possibility of arc-over or short. Replace all wires that show signs of corrosion, cracking or deterioration. Al] units of the equipment should be kept clean and free from corro~ sion. Replace all missing knobs and defective or droken parts. Housing, shields, covers and other protective devices should be at their proper place and secured. 1,2 Cleaning and Lubrication e@ Cleaning lengthens the operating life of the equipment. Dirt on com~ * ponents can result in shortcircuits. Ary, soft cloth and soft bristled brush are recommended for removing dirt from the outside of the unit. Dirt on the inside of the unit should be renoved with a soft- bristled brush and removed by using an electric cleaner. Hardened dirt should be removed by using a mild detergent and water solution on a cotton-tipped swab or a soft clotn. Avoid excessive use of water. Do not allow water to penetrate any parts. Avoid the use of abrasives and chemical agents. Corroded areas should be cleaned with a neutralizing solution of 2% borax and water to prevent further corrosion. CAUTION: After cleaning, the sets should be carefully inspected for defects such as poor connections, damaged parts and loosened mechanical parts. Keep all moving parts properly lubricated using a cleaning-type Tubri- cant on shaft bushings. Do not overlubricate. wh— FURUNO Lubricate ball bearing, turning shafts and screw threads with a slight amount of grease. Do not overlubricate. Interval] Tten Check/Measures Remarks 3to6 | Exposed bolts | Check for corroded or ‘Sealing compound may months | and nuts on | loosened bolts/nuts. be used instead of scanner unit | If necessary, clean then | paint. up and repaint thickly. Replace them with new “Put slight amount of | ones if heavily corroded. grease if bolts and | huts are replaced, Scanner Check for dirt or crack *o not use plastic 7 | radiator ‘on the radiator surface, solvent (thinners or ! "| Thick dint should be acetone) for cleaning. 1 wiped off by using a soft | cloth immersed in fresh When removing ice on | water. If any crack 1s the scanner unit, | found, apply slight use wooden nanmet or amount of sealing plastic-head hanmer. ~ | compound or adhesive as Crack on the scanner e i | first-aid treatment, then | unit will cause + | call for repair. Permanent ‘damage to the internal circuitry due to : water leakage. Terminal Remove scanner covers (or | ‘when putting cover(s) boards and open scannér cover) to back in position, plugs in check terminal board/plug | do not pinch flying scanner unit | connections inside. Also | wires. check if the O-ring or gasket for the cover is in good order. CRT screen Dirt on this creates *Use soft cloth with | symptom identical to poor | slight anount of sensitivity. Clean up anti-stat ic-charge CRT surface using special | spray. Never apply care not to scratch then., | plastic solvent. 6 months) Scanner motor | Check and clean up carton | *Under normal use, the tol brushes and commutator. carbon brush will last : year If brushes have worn out | approximately 2000 to 6mm or less, replace hours. ‘them with new ones. e (New brush is lnm’ Tong.) : Continued— SHEERS EERE Set eee EE Eo Seca eeaeeeeceeeeeeee FURUNO Interval Item Check/Measures Remarks 6 months | CRT anode and | High tension on CRT If any crack is found tol approach attracts dust in environ- | on rubber cap or wire year ment, and moist dust will | sheath, replace it cause poor insulation. with new one. Clean up high voltage parts as follows. “Always make sure to put anode cap back on 1, Turn off radar. CRT after cleaning. 2. Pull out anode cap and touch its nipple to chassis (discharging). 3. Clean up CRT side and anode cap/lead by using soft dry cloth. | Terminal Check for loose con~ | boards. nections. Polish up sockets and | contacts or replace plug, plugs if necessary. | HECRT Scanner Motor Brush (Motor Cover is removed. Fig. 1-2 Scanner Unit 14 CRT Anode Cap CAUTION "HIGH VOLTAGE" Motor Cover1.3 Replacement of Major Components is Display Unit Power Supply Module (including Power Supply board PTU-7534) 1) Remove the Top Cover by loosening the six M4x10 cosmetic screws. 2) Disconnect al] the connectors on the Power Supply board (PTU-7534) 3) Remove the Power Supply Module by loosening the six Max12 screws and the five M3x8 screws shown below. 6-Max12Processor Board (03°7529) 1) Remove the Top Cover by loosening the six Max10 cosmetic screws. 2) Disconnect all the connectors from the Processor Board (03P7529). 3) Remove the Processor Board by loosening the nine M3x8 screws. Top Cover S-M4x10 Display Unit —| Processor Board 0397529 Panel Board Assy. (03°7531)/EBL Board (03P7533)/I!lumination RM Board (03°7532) Keyboard sTRet er to-Fige1e5 -Veserceceseea eres aera eee 1) Remove the Top Cover by loosening the six Maxl0 cosmetic screws. 2) Remove the Front Panel Assy. by loosening the four MSx12 screws. 3) Separate the Front Panel Assy. from Display main chassis by discon- necting all the connectors from the I!lumination/VRM board (03P7532), Panel board (03°7531), EBL board (03P7533). 1-64) Remove the eight knobs as shown in Fig.1-5. 5) Remove the Panel board Assy. (037531) by loosening the four M3x8 screws and disconnecting the connectors. 6) Remove the EBL board (03P7533) by loosening the two M3x8 screws and disconnecting the connector. 7) Remave the I}lumination/VRN board (03°7532) by loosening the four M3x8 screws and disconnecting the connectors. 8) Remove the Keyboard by loosening the four M3x8 screws and connectors. 5-Max10 ¢ Top Cover aN SF Ny \ I1lumi. /VRM Board XN 03°7532 eras ceydoard 2-M3x8, 1-7Deflection Board/CRT Board/CRT Assy. 1) Remove the Top Gover by loosening the six N4x10 cosmetic screws. e 2) Remove the Front panel Assy. referring to step 3 on page 1-6. 3) To discharge high voltage on.the Anode cap, connect between the Anode cap and Display Chassis by handing the two screw drivers. Refer to Fig.1-7. Screw Driver (8) Contact the screw driver (B)] to the CRT anode cap CRT Anode Cap 1-8 K3) Contact the two drivers Screw Oriver (A)4) Disconnect the connector coming from Interface board (03P7530). 5) Disconnect the wires and connectors connected to the CRT. 6) Pull out the CRT socket on the CRT board. 7) Remove the CRT Assy. by loosening the four MSx12 screws. ) Remove the Deflection board with the CRT board by loosening the six M3x8 screw. 4S? of \eflection Board Fig. 1-9— FURUNO —_——— Oe 1.4 Removel and Replacement of Major Components in Scanner Unit Transceiver Module Wihen checking or replacement of components in the transceiver module is required, take out the transceiver module from the scanner housing in the following steps. 1) Switch off the radar. 2) Open the ‘stern side scanner housing cover by loosening four bolts. 3) Loosen two Max25 bolts (for FR-8050/81000(A)) or four M8x25 bolts (for FR-8250D(A)) securing the trsnsceiver module to the chassis. See Fig.1-9. 4) Disconnect two multi-connectors P601 and PBOl. 5) Loosert the wing nut and remove the grounding wire (inner shield of multicore cable.) ' 6) Take out the transceiver module. NOTE: To prevent demagnetization of magnetron, the transceiver module e should not be placed in 2 proximity of ferro-magenetic materials and stray magnetic field. If working desk is made of steel, place the module upside-down. Scanner Housing Transceiver Kodule Transceiver Module + Fixing Bolts Fixing Bolts (4 pes.) (2 pcs.) Scanner Housing Cover e (a) Scanner Unit for FR-8050/81000(A) (b) Scanner Unit for. FR-8250D(A) i 1-10Magnetron 1) Make sure the radar system is turned off. 2) Take out the transceiver module in the way mentioned on page-1-10. 3) Remove the shield cover by loosening six fixing screws. 4) Unsolder two magnetron heater lead wires from the pulse transformer. 5) Using 2 non-magnetic scredriver, renove six fixing bolts securing the magnetron to the module and carefully lift out the magenetron. CAUTION: As the magnetron has a strong magnetic force, the wrist watch should be removed while replacing the magnetron to preserve the watch from damage. In the case of FR-8050/8100D(A) type radar, the heater voltage must always be kept between 7.0 and 7.6V0C. For FR-15250(A) type radar, the heater voltage must be kept 7.2 and 7.7¥OC in short range, between 5.5 and 5.7V0C in middle or long range. The higher voltage shortens the life of the magnetron. When a new magnetron is fitted, allow at least 15 to 29 minute pre-heating under ST-BY, and depress the ST-BY/TX touchpad about 10 times. The magnetron must not be stored in a proximity of ferro-magnetic materials and magnetic field to prevent deterioration due to de- magnetization. sats Pulse Transformer Magnetron Magnetron Heater Fixing Bolts (6 pcs.) - ea Lead Wires C ‘=O fread wire -- terminal of the 1 ae nan wise transformer yellow == (#6) green =~ (#4) | Fig.1-10_Transciver Module Bottom View with Shield Cover removed @IF_Amp. Case/STC Board/MIC/Limiter 1) Loosen two N4x8 screws securing the STC board to the IF amp. case. See Fig. 1-11. 2) Loosen three M4x8 screws securing the IF amp. case and two Méxl0 screws Securing the MIC to the chassis, lifting up the STC board. 3) Loosen four M4x10 screws ‘shown in Fig. 1-11 securing the limiter with Filter to the circulator. 4) Disconnect J601, and the IF Amp. Case/STC Board/MIC/Limiter assembly comes free. Nax8 Screws Nax8 Screws, (2 pes) tax8 Screws (3 pcs-) (2 pes.) STC Board axe serews \ (2 pes.) WAG, Guide Maxl0 Screws (3 pes.) 1-12Circulator 1) Take out the IF Ap. Case/STC Board/MIC/Limiter assenble as nenttoned above. 2) Loosen four fixing screws securing the magnetron to the circulator. 3) Detach the circulator from the chassis by loosening four fixing nuts. See Fig. 1-11. 4) Separate the W.G. Guide from the Circurator by. loosening the two M3x8 screw. MIC Assy. /Limiter/Filter Wave Guide ‘Tihis replacement must be done inside a building shore to protect the MIC from exposure to radar waves transmitted by other ships.) A. FR-8050/81000(A) 1) Take out the IF Amp. Case/STC Board/MIC/Limiter assemble in the way mentioned above. 2) Remove the IF amp. case cover by loosening four M3x8 screws and discon nect P605 (or P608) from the IF AMP board. 3) Separate the MIC with limiter from the IF amp. case by loosening four ~ e Max12 screws shown in Fig.1-12. ° 4) Remove the MIC Fixing plate by loosening the two M4x12 screws. 5) Separate the Diode Limiter, Filter Wave Guide .2. and Window from MIC Assy. by loosening the four’M& nuts. B. FR-8250D(A) 1) 2)}Same as the mentioned about FR-8050/81000(A) . 3 4) Remove the Filter Wave Guide Assy. by loosening the four N4x15 screws. 5) Remove the MIC Fixing plate by loosening the two N4x12 screws. 6) Separate the Diode Limitter from the MIC Assy. by loosening the four M& nuts. 1-13Filter Wave -“w Guide ai FR-8050/81000(A)) 3-30 Screws AT (8 pcs.) 1 Z For FR-$250D(A)) Nax20 Screws (4 pes.) Maxi2 Screws Max12 Screws Plate (4 pes.) IF Amp. Assy. BEARING SIGNAL GENERATOR Board (MP~3795, 1) Open: the bow side scanner housing cover by loosening four fixing bolts. See Fig. 1-13. 2) Disconnect two plugs (P901 and P902) ‘from the board. 3) Loosen two M3x6 screws securing the board to the motor fixing plate and take out the board. Scanner Motor 1) Remove the BEARING SIGNAL GENERATOR board (MP~3795) as mentioned above. 2) Loosen four M6x12 bolts "A" and remove the scanner motor together with the motor fixing plate. See Fig. 1-13. 3) Remove the circlip and remove the antenna drive gear. 4) Disconnect the lead wires of the scanner motor. 5) Separate the motor fromthe motor fixing plate by loosening four Méxl2 bolts "BY. iidAntenna Orive Circlip Gear Néxl2 Bolts “AY (4 pcs.) M6x12 Bolts ~\ (4 pes.) 7 Motor Fixing Plate Scanner Cover (bow side) Scanner Housing 3x6 Screws (2 pes.) Fixing Bolts: (4 pcs.) “bearing Signal Generator Board (up-3739) : @ Motor Cover Fig. 1-13 115,CHAPTER 2. TROUBLESHOOTING Note: This troubleshooting is applied to the radar display and scanner units only. That is, trouble due to outside factors, e.g. ship's mains, cable disconnection, wrong operation and so on, is not taken into account. Check steps Isyaptoms 1 2 3 [Power is not [Main fuse POWER SUPPLY FILTER PCB lappl ied. F351 pce PTU-7534 | FIL-6983 lScanner does Scanner fuse POWER SUPPLY Scanner motor, Inot rotate. |F1352 pce pru-7534 | B801 Nothing ICRT ASSY. POWER SUPPLY : appears on. 2A fuse, etc. |PCB PTU-7534 ithe screen. +12V line Marks/legends |PROCESSOR PCB te ldo not appear. |03°7529 U3, lus - ull, ete, : Neither echo |IF AMP PCB INTERFACE PCB |PROCESSOR PCB nor noise | BIF-4879 or _ 03P7530 ‘03P7529 jappears. BIF-5668 ul jOnly echo TX fuse FL Magnetron V801 |MOD. TRIG. PCB |MODULATOR PCB \does not TX HV PCB 03P5732 or _103P5685 or lappear. Hv-7130 SCR cRal3 RF-5144 ugs0, |MD-5145 (CR814) }0850/853/854 } Echo appears Magnetron V801 |MIC U801, Diode limiter’ |PANEL PCB i but poor Et CRB10 }03P7531 ' it lsensitivity. VR13, VRI, vR10 Bearing does BEARING SIGNAL PROCESSOR PCB INTERFACE PCB lnot synchro- |GEN. PCB 03°7529 03P7530 Inize with mp-3795 S801, |U109, U110, lantenna. Timing disk "97, "etc. labnormat PANEL PCB PROCESSOR PCB : lbearing of — /03P7531 037529 picture st 4 : 7 . i Iabnormal syn~ |CRT ASSY. PROCESSOR PCB | INTERFACE PCB lchronization |Rv202 03°7529 03P7530, ' lof picture U3, U45, ‘etc. No STC effect |STC PCB PANEL PCB INTERFACE PCB STC-6995 03P7531 }03°7530 ui VRE, VRO 2-1— FuRUNO Check steps Symptons ' 2 3 4 No FTC effect {PROCESSOR PCB [PANEL PCB STC PCB INTERFACE PCB 03P7529 03P7531 STC-6995. 03P7530 (CR29 - CR31 VRS uL EBL does not EBL PCB PROCESSOR PCB operate. (03°7533 037529 Sl - S3 U101/93/4 RM does not | VRM PCB PROCESSOR PCB. loperate. \03P753z (03°7529 sl u102/93/4 FLAT KEYBOARD {PROCESSOR PCB | ILLUMINATION (—} (Ae ]}o3e7s3s 037529 PCB 03P7532 54/88/93, FLAT KEYBOARD |PROCESSOR PCB |MODULATOR PCB |MOD TRIGGRER fe 037535 037529 }03P5685 or NO- |PCB 03°5732 or 1US4/93/124 5145 K1/2/3 |RF-5144 FLAT KEYBOARD | PROCESSOR PCB "| ILLUMINATION rar. }03P7535 }03P7529 PCB 03P7532 An : = us6 2 -——_ |FLAT KEYBOARD PROCESSOR PCB | ILLUMINATION e [swer| |03P7535 }03P7529 PCB 03P7532 4 LJ jU54/46/3 a =, |FLAT KEYBOARO |PROCESSOR PCB [ILLUMINATION 8 (2) [03P7535 103P7529 PCB 03°7532, Fee si u54 2 il ——, |FLAT KEYBOARD PROCESSOR PCB | ILLUMINATION B| (©) |osevsas. _ [037529 PCB 037532 2| we 1054/8/9 i £ ——, |FLAT KEYBOARD |PROCESSOR PCB | ILLUMINATION (QJ j03P7535 1037529 PCB 03P7532 54/10/11 4 -——, |FLAT KEYBOARD |PROCESSOR PCB | ILLUMINATION fusne| |03P7535 037529 PCB 03P7532 Lenn) 1u66/60/93 FLAT KEYBOARD |PROCESSOR PCB ILLUMINATION erm| [03P7535 103° 7529 PCB 03P7532 1u66 /60/93 2 2Check steos \symptons : 2 3 7 [FLAT KEYBOARO [PROCESSOR PCB [ILLUMINATION (03P7535 1037529 PCB 03P7532 lv66/116 J03P7535 10397529 PCB 03P7532 Ju66, many IC's IFLAT KEYBOARD [PROCESSOR PCB {ILLUMINATION lo3P7532 103°7529 PCB 03P7532 v6 /122/93, | IFLAT KEYBOARD |PROCESSOR PCB ILLUMINATION fs Touchpad key does not function. FLAT KEYBOARD |PROCESSOR PCB | ILLUMINATION (03P7535 1037529 PCB 03P7532 1y66/49/93 FLAT KEYBOARD |PROCESSOR PCB {ILLUMINATION (03P7535, 1037529 [PCB 03P7532 1v66/39 FLAT KEYBOARD |PROCESSOR PCB ILLUMINATION l03P7535, 1037529 PCB 0307532 e@ 073/96/3 [FLAT KEYBOARD PROCESSOR PCB |ILLUMINATION l03P7535 1037529 pce 03°7532 u73 2-37 wricmemToNe ze 8 eseFURUNO reo Trea eORE as 28Perens ooVitae wren Ge SenHs nm Rae eaeTreEwicnTONs GOOE no. _ 8 ore 8 8Fresosoo(o) FURUNO FRCE1000{0R) OLSPLAY UNIT —_—, Fkce7500(08) pale SYMBOL PARTS NAME ‘TYPE/DWG. NO. ‘CODE NO. REMARKS es wae nem s a-ree os Refer to Mechanical Parts Exploded View Dag. RO. CS314-014-A. A opz02 cosmetic screw ne xan dur-erms90# cs feogee Coven Dseosteunzieo Toecogsceos A bozos Sotto vLaTr Dscusecansice Lgrcogsooin A bogce kane ease deelasancie? seg-aa4-017 feozcs — Rouwrias. cwaace neceicteact Serciaa-ray foease = Ueeet Bsreticansice RETERS810 raat toe thet 0 a3eeri-aes2=0 Besaaecs2n AULRMLAD 4 voz? Fag" caver asrasenatoi=t Joornyscney voces Strecee erusey OSrunend tao feocnsccnse A doses Sticnee Chie vat tact eeteissenen Forctoeaie 4 oie ov Pus-1059-9 Jeneage-son extend & boat Uae FLATNG SLATE Docokerdilt=t Lormogs-ner goat cease bsconaatisea Bon-az1-151 & s0ea5 pute Dgcunacat ised soa-aii-iee & bodte Cate suvmoptra (2) dazbndee050-1 Raacazacsoy a ooess tie tudstore-o Soncedntes CTL A vatle FRONT clasts Bsmosenaa sto Yon=098-000 Roo? achr cusses tsronecdiso-n fanseys-o76 Aadeis Lert chngsis Osroseraiss-3 Joo-ngs-nse Rooey Mean Cnassis, pdcanscdigeed honanessnoy a cogzy PAGEL Fradns PLATE os-asennisse0 pon-a05-190 hgoe2i Foust pane o3raseed 21-0 doncngs-126 Abode, PaeL cove osraseri 207-1 foncngs-t2 fags BASEL COVER pACCING. o3ederi208-1 goncnosot52 fakes tases Sur 3n034-17 04-0 borceas-tan fo0eas TOuenean KEY agate assaserd7s=? boerenscise A ooze Stand guert a3cuserdz08=0 $oo=098-100 A bos? Lau" suze o3easeca7or=0 Lbe-aasei74 A e826 CSO Fon nbcnoamanosee Sooceancage 2 G02 ENGR estate nirunendneee? Bonceinonan @ N yozsy — KxR CaP asqangcagos-o son-cr0-660 fbe2sl kustew” musi cn Osunendze2=b Hansan2=226 209982 Pacrins For CPT o3aze-17 06-1 donco7e=2a1 3 boss Shanive Sus nycaps-dp09-0 doacare-aze fbosse 0 va suecr ce nssonara25z—0 Loe=e93-100 Recess noun. oseuserd6ot-t don=#95-201 200258. Soon erxtns seve b3cvrema602-0 hon=o$0-170 Koog? 7 Racers Foe aecasn stot n3core-s202—" toesarentyo Bonds | cave meave sautten bor-resmeie Roos | SPace?" es nsnenaze boosros-nze A oazey spacer? ser20 von-fo1-s50 3 PCS WARS Roar — Ficter Bsr084e9601-0 Tonaso 460--s0s00(08) ® FURUNO O55 Bat _ oa REMARKS Hl SvMBOL PARTE WAME PE OWE. NO. OBE WO. ee oa t Bem f a-res a. Refer fo mechanical Parts Explodes Wew Owp. + €3290-005-8 for FR-82600(04). A 001010 KADIATUR ASSEVOLY «arte prrseri For szeres cooesre3i0 L2H RADIATOR ASstweC? KaSenoL Opeesain260 210m RAIATGR ASS¥,. CosSFTD Ansan Bereseens3 Lon Bho tator Asstsu.tr ana boncszeci30 Paw A oo1os — wavEOUIDe CLAMP TRSULAIN€ ——RSBe2u08e0 See-e20-080 FOR 2.0" A obLbda FELGEE davecuive ASsErety —e.3Fte tnsenon Boscasicese FOr an Agoiss| suc. Cuan BS-2000"1 Sencezacoo1 FOR 2.0% A obtu7a —AATEMSA RADIATOR ASSES! Y ——-KH2=AUOy 123¢i soscoszs20 | Len ante FEDER as ANTEWMA RADIATOR ASSEPALY——XNSEHOLS 8.5°T poresas-aso. Pe0m AMT Féeoet 4s ANTESIA RADIATOR ASSEESLY KSA noneszensoo 220" ANT FEeveR vs ANTCSHA RADIATANE ASSEVSLY HAA wanesziano 224m ANTE FEepea as A ooing FELD vaveouroe Fazer ean-n79-008 FoW 22 fObtosA korany JuINT ASsereey CapPeaNTeNaH bancszo-s20 Avoiae MELO setvcn oun Psko7i08—1 senrazi-pe Sood Catveecimcuie Lean [A XOSTIAL S45 doaragaesoe Agate Noroe rinse ovate Ssronisiesi-e Son-ase-si6 Roots scansew cove oS-uol=szei-2 So0-132-612 A ogg? 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