IE LAB Manual

Integrated Electronics and Simulation Lab IV Semester, B.
Tech(Mechatronics)
MTE 2262: INTEGRATED ELECTRONICS LAB
FOURTH SEMESTER
DEPARTMENT OF MECHATRONICS
Prepared By Ms. Dolly Sharma

(Assistant Professor)
Ms. Maithri M
(Lab-coordinator)
Approved By Dr. Chandrashekar Bhat

(HoD - Department of
Mechatronics)
MIT, Manipal Page 1

Integrated Electronics and Simulation Lab IV Semester, B.Tech(Mechatronics)
MTE 2262: INTEGRATED ELECTRONICS LAB

FOURTH SEMESTER
NAME:
REG NO:
ROLL NO:
DEPARTMENT OF MECHATRONICS
MIT, Manipal Page 2

VISION OF MAHE
Global leadership in human development, excellence in education and healthcare.
MISSION OF MAHE
Be the most preferred choice of students, faculty, and industry. Be in the top 10 in every
discipline of education health sciences, engineering, and management.
VISION OF MIT
Excellence in Technical Education through Innovation and Teamwork.
MISSION OF MIT
Educate students professionally to face societal challenges by providing a healthy learning environment
grounded well in the principles of engineering, promoting creativity, and nurturingteamwork.
VISION OF THE MECHATRONICS DEPARTMENT
Excellence in Mechatronics Education through Innovation and Teamwork.
MISSION OF THE MECHATRONICS DEPARTMENT
Educate students professionally to face societal challenges by providing a healthy

learning environment grounded well in the principles of Mechatronics engineering,
promoting creativity, and nurturing teamwork.
MIT, Manipal Page 3

NBA PROGRAM EDUCATIONAL OUTCOMES OF THE

MECHATRONICS ENGINEERING DEPARTMENT (PEOs)
The graduates:
PEO1: Are expected to apply analytical skills and modelling methodologies to
recognize, analyze, synthesize, and implement operational solutions to engineering
problems, product design and development, and manufacturing.
PEO2: Will be able to work in national and international companies as engineers who
can contribute to research and development and solve technical problems by taking
an initiative to develop and execute projects and collaborate with others in a team.
PEO3: Shall be capable of pursuing higher education in globally reputed universities by

conducting original research in related disciplines or interdisciplinary topics, ultimately
contributing to the scientific community with novel research findings.
PEO4: Are envisioned to become technology leaders by starting high – tech companies
based on social demands and national needs.
PEO5: Shall develop flexibility to unlearn and relearn by being in pursuit of research and
development, evolving technologies and changing societal needs thus keeping themselves
professionally relevant.
MIT, Manipal Page 4

NBA PROGRAM OUTCOMES (PO)
The POs are exemplars of the attributes expected of a graduate of an accredited

programme:
PO1- Apply the knowledge of mathematics, science, engineering fundamentals, and an

engineering specialization to the solution of complex engineering problems.
PO2- Identify, formulate, research literature, and analyze complex engineering problems
reaching substantiated conclusions using first principles of mathematics, natural sciences,
and engineering sciences.
PO3- Design solutions for complex engineering problems and design system components
or processes that meet t h e specified needs with appropriate consideration for the public
health and safety, and the cultural, societal, and environmental considerations.
PO4- Use research-based knowledge and research methods including design of

experiments, analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
PO5- Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modelling to complex engineering
activities with an understanding of the limitations.
PO6- Apply reasoning informed by the contextual knowledge to assess societal, health,
safety, legal, and cultural issues, and the consequent responsibilities relevant to the
professional engineering practice.
PO7- Understand the impact of the professional engineering solutions in societal and
environmental contexts, and demonstrate the knowledge of, and need for sustainable
development.
PO8- Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
MIT, Manipal Page 5

PO9- Function effectively as an individual, and as a member or leader in diverse teams,

and in multidisciplinary settings.
PO10- Communicate effectively on complex engineering activities with the engineering

community and with society at large, such as, being able to comprehend and write
effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
PO11- Demonstrate knowledge and understanding of the engineering and management

principles and apply these to one’s own work, as a member and leader in a team, to
manage projects and in multidisciplinary environments.
PO12- Recognize the need for and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.
MIT, Manipal Page 6

NBA PROGRAM SPECIFIC OUTCOMES OF THE

MECHATRONICS ENGINEERING DEPARTMENT (PSO’S)
At the end of the course the student will be able to:
PSO1: Able to apply the knowledge of sensors, drives, actuators, controls, robotics and
modern software tool to integrate a system to perform specified tasks.
PSO2: Able to design, model, analyze, and testing of intelligent products, systems, and
controllers
using appropriate technology and software tools.
PSO3: Able to interface devices and elements to a central system having the capability of
real time
data sharing, storage, retrieval, analysis, decision making with global connectivity
features for
visibility and intervention.
MIT, Manipal Page 7

IET LEARNING OUTCOMES (LO)
C1. Apply knowledge of mathematics, statistics, and natural science and engineering
principles to the solution of complex problems. Some of the knowledge will be at the
forefront of the particular subject of study.
C2. Analyse complex problems to reach substantiated conclusions using first principles
of mathematics, statistics, natural science, and engineering principles.
C3. Select and apply appropriate computational and analytical techniques to model
complex problems, recognising the limitations of the techniques employed.
C4. Select and evaluate technical literature and other sources of information to address
complex problems.
C5. Design solutions for complex problems that meet a combination of societal, user,
business and customer needs as appropriate. This will involve consideration of applicable
health & safety, diversity, inclusion, cultural, societal, environmental and commercial
matters, codes of practice and industry standards.
C6. Apply an integrated or systems approach to the solution of complex problems.
C7. Evaluate the environmental and societal impact of solutions to complex problems and
minimise adverse impacts.
C8. Identify and analyse ethical concerns and make reasoned ethical choices informed by
professional codes of conduct.
C9. Use a risk management process to identify, evaluate and mitigate risks (the effects of
uncertainty) associated with a particular project or activity.
C10. Adopt a holistic and proportionate approach to the mitigation of security risks.
C11. Adopt an inclusive approach to engineering practice and recognise the

responsibilities, benefits and importance of supporting equality, diversity and inclusion.
MIT, Manipal Page 8

C12. Use practical laboratory and workshop skills to investigate complex problems.
C13. Select and apply appropriate materials, equipment, engineering technologies and
processes, recognising their limitations.
C14. Discuss the role of quality management systems and continuous improvement in the
context of complex problems.
C15. Apply knowledge of engineering management principles, commercial context,

project and change management, and relevant legal matters including intellectual
property rights.
C16. Function effectively as an individual, and as a member or leader of a team.
C17. Communicate effectively on complex engineering matters with technical and non-
technical audiences.
C18. Plan and record self-learning and development as the foundation for lifelong
learning/CPD.
MIT, Manipal Page 9

COURSE LEARNING OUTCOMES

CO1: Analyze and design linear and non-linear applications of Op-Amp using 741 IC.
CO2:Design Timer circuits using 555 IC and voltage regulator using 78xx, and
LM317 ICs
CO3. Design combinational and sequential logic circuits using deigtal ICs
CO4.
S. Course Outcome Learning Program Outcomes

No Outcomes
1 Analyze and design linear and non-linear
applications of Op-Amp using 741 IC 1,2,3,16 1, 2, 3, 4, 9
2 Design Timer circuits using 555 IC and

1,2,3,16 1, 2, 3, 4, 9
voltage regulator using 78xx, and LM317 ICs
3 Design combinational and sequential logic
1,2,3,16 1, 2, 3, 4, 9
circuits using deigtal ICs
4
MIT, Manipal Page 10

List of Experiments
Learning Program
S.No Experiments
Outcome Outcomes
1 Linear applications of OP-AMP 1,2,3,16 1, 2, 3, 4, 9
Half wave and full wave precision rectifiers using

2 1,2,3,16 1, 2, 3, 4, 9
op-amp
3 555 timer ic applications 1,2,3,16 1, 2, 3, 4, 9
4 Non-Linear applications of OPAMP 1,2,3,16 1, 2, 3, 4, 9
5 Design and study of ic regulations 1,2,3,16 1, 2, 3, 4, 9
6 Logic gates 1,2,3,16 1, 2, 3, 4, 9
7 Code conversion circuits 1,2,3,16 1, 2, 3, 4, 9
8 Multiplexers and demultiplexers 1,2,3,16 1, 2, 3, 4, 9
9 Decoders 1,2,3,16 1, 2, 3, 4, 9
10 Counters 1,2,3,16 1, 2, 3, 4, 9

BASIC ELECTRONIC COMPONENTS

COLOUR CODING OF RESISTOR
Colour Codes are used to identify the value of resistor. The numbers to the Colour are
identified in the following sequence which is remembered as BBROY GREAT BRITAN
VERY GOOD WIFE (BBROYGBVGW) and their assignment is listed in following
table.
Black Brown Red Orange Yellow Green Blue Violet Grey White
0 1 2 3 4 5 6 7 8 9
Table1: Colour codes of resistor

First find the tolerance band, it will typically be gold ( 5%) and sometimes
silver (10%).
Starting from the other end, identify the first band - write down the number
associated with that color
Now read the next color, so write down a its value next to the first value.
Now read the third or 'multiplier exponent' band and write down that as
the number of zeros.
If the 'multiplier exponent' band is Gold move the decimal point one to the
left. If the 'multiplier exponent' band is Silver move the decimal point
two places to the left. If the resistor has one more band past the tolerance
band it is a quality band.
Read the number as the '% Failure rate per 1000 hour' This is rated
assuming full wattage being applied to the resistors. (To get better failure
rates, resistors are typically specified to have twice the needed wattage
dissipation that the circuit produces). Some resistors use this band for
temco information. 1% resistors have three bands to read digits to the
left of the multiplier. They have a different temperature coefficient in order
to provide the 1% tolerance. At 1% the temperature coefficient starts to
become an important factor. at +/-200 ppm a change in temperature of 25
Deg C causes a value change of up to 1%
Table 2: Procedure to find the value of resistor using colour codes

COLOUR CODING OF CAPACITORS
An electrical device capable of storing electrical energy. In general, a capacitor consists

of two metal plates insulated from each other by a dielectric. The capacitance of a
capacitor depends primarily upon its shape and size and upon the relative permittivity εr
of the medium between the plates. In vacuum, in air, and in most gases, εr ranges from
one to several hundred.
One classification of capacitors comes from the physical state of their dielectrics,
which may be gas (or vacuum), liquid, solid, or a combination of these. Each of these
classifications may be subdivided according to the specific dielectric used. Capacitors may
be further classified by their ability to be used in alternating-current (ac) or direct- current
(dc) circuits with various current levels.
 Capacitor Identification Codes: There are no international agreements in

place to standardize capacitor identification. Most plastic film types (Figure1) have
printed values and are normally in microfarads or if the symbol is n, Nanofarads. Working
voltage is easily identified. Tolerances are upper case letters: M = 20%, K = 10%, J = 5%,
H = 2.5% and F = ± 1pF.
Figure 1: Plastic Film Types

A more difficult scheme is shown in Figure 2 where K is used for indicating

Picofarads. The unit is picofarads and the third number is a multiplier. A capacitor coded
474K63 means 47 × 10000 pF which is equivalent to 470000 pF or 0.47 microfarads. K
indicates 10% tolerance. 50, 63 and 100 are working volts.
Figure 2: Pico farads Representation
Ceramic disk capacitors have many marking schemes. Capacitance, tolerance, working
voltage and temperature coefficient may be found which is as shown in figure 3.
Capacitance values are given as number without any identification as to units. (uF, nF,
pF) Whole numbers usually indicate pF and decimal numbers such as 0.1 or 0.47 are
microfarads. Odd looking numbers such as 473 is the previously explained system and
means 47nf.
Figure 3: Ceramic Disk Capacitor

COLOUR CODING OF INDUCTORS
Inductor is just coil wound which provides more reactance for high frequencies and low
reactance for low frequencies.
Molded inductors follow the same scheme except the units are usually micro henries. A
brown-black-red inductor is most likely a 1000 uH. Sometimes a silver or gold band is
used as a decimal point. So a red-gold-violet inductor would be a 2.7 uH. Also expect to
see a wide silver or gold band before the first value band and a thin tolerance band at the
end. The typical Colour codes and their values are shown in Figure 4.
1000uH (1millihenry), 2%
6.8 uH, 5%
Figure 4: Typical inductors colour coding and their values.

STUDY OF CRO
An oscilloscope is a test instrument which allows us to look at the 'shape' of electrical
signals by displaying a graph of voltage against time on its screen. It is like a voltmeter
with the valuable extra function of showing how the voltage varies with time. A graticule
with a 1cm grid enables us to take measurements of voltage and time from the screen.
The graph, usually called the trace, is drawn by a beam of electrons striking the
phosphor coating of the screen making it emit light, usually green or blue. This is similar
to the way a television picture is produced.
Oscilloscopes contain a vacuum tube with a cathode (negative electrode) at one end to
emit electrons and an anode (positive electrode) to accelerate them so they move rapidly
down the tube to the screen. This arrangement is called an electron gun. The tube also
contains electrodes to deflect the electron beam up/down and left/right.
The electrons are called cathode rays because they are emitted by the cathode and this
gives the oscilloscope its full name of cathode ray oscilloscope or CRO.
A dual trace oscilloscope can display two traces on the screen, allowing us to easily
compare the input and output of an amplifier for example. It is well worth paying the
modest extra cost to have this facility.
Figure 5: Front Panel of CRO

BASIC OPERATION

Setting up an oscilloscope:
Oscilloscopes are complex instruments with many controls and they require some care
to set up and use successfully. It is quite easy to 'lose' the trace off the screen if controls
are set wrongly.
There is some variation in the arrangement and labeling of the many controls so the
following instructions may need to be adapted for this instrument.
1. Switch on the oscilloscope to warm up (it takes a minute or two).
2. Do not connect the input lead at this stage.
3. Set the AC/GND/DC switch (by the Y INPUT) to DC.
4. Set the SWP/X-Y switch to SWP (sweep).
5. Set Trigger Level to AUTO.
6. Set Trigger Source to INT (internal, the y input).
7. Set the Y AMPLIFIER to 5V/cm (a moderate value).

8. Set the TIMEBASE to 10ms/cm (a moderate speed).

9. Turn the time base VARIABLE control to 1 or CAL.
10. Adjust Y SHIFT (up/down) and X SHIFT (left/right) to give a trace across the
middle of the screen, like the picture.
11. Adjust INTENSITY (brightness) and FOCUS to give a bright, sharp trace.
The following type of trace is observed on CRO after setting up, when there is no input
signal connected.
Connecting an oscilloscope:
The Y INPUT lead to an oscilloscope should be a co-axial lead and the figure 4 shows
its construction. The central wire carries the signal and the screen is connected to earth
(0V) to shield the signal from electrical interference (usually called noise).
Most oscilloscopes have a BNC socket for the y input and the lead is connected with a
push and twist action, to disconnect we need to twist and pull. Professionals use a
specially designed lead and probes kit for best results with high frequency signals and
when testing high resistance circuits, but this is not essential for simpler work at audio
frequencies (up to 20 kHz).
Obtaining a clear and stable trace:
Once if we connect the oscilloscope to the circuit, it is necessary to adjust the controls
to obtain a clear and stable trace on the screen in order to test it.
The Y AMPLIFIER (VOLTS/CM) control determines the height of the

trace. Choose a setting so the trace occupies at least half the screen height, but does not
disappear off the screen.
The TIMEBASE (TIME/CM) control determines the rate at which the dot
sweeps across the screen. Choose a setting so the trace shows at least one cycle of the
signal across the screen. Note that a steady DC input signal gives a horizontal line trace
for which the time base setting is not critical.

The TRIGGER control is usually best left set to AUTO.
The trace of an AC signal with the oscilloscope controls correctly set is as shown in
Figure.
Measuring voltage and time period
The trace on an oscilloscope screen is a graph of voltage against time. The shape of this
graph is determined by the nature of the input signal. In addition to the properties labelled
on the graph, there is frequency which is the number of cycles per second.

 Amplitude is the maximum voltage reached by the signal. It is measured in

volts.
 Peak voltage is another name for amplitude.
 Peak-peak voltage is twice the peak voltage (amplitude). When reading an
oscilloscope trace it is usual to measure peak-peak voltage.
 Time period is the time taken for the signal to complete one cycle.It is
measured in seconds (s), but time periods tend to be short so milliseconds (ms)
and microseconds (µs) are often used. 1ms = 0.001s and 1µs =
0.000001s.Frequency is the number of cycles per second. It is measured in hertz
(Hz), but frequencies tend to be high so kilohertz (kHz) and megahertz (MHz) are
often used. 1kHz = 1000Hz and 1MHz = 1000000Hz.
Voltage: Voltage is shown on the vertical y-axis and the scale is determined by the Y
AMPLIFIER (VOLTS/CM) control. Usually peak-peak voltage is measured because it
can be read correctly even if the position of 0V is not known. The amplitude is half the
peak-peak voltage.
Voltage = distance in cm × volts/cm
Time period: Time is shown on the horizontal x-axis and the scale is determined by the
TIMEBASE (TIME/CM) control. The time period (often just called period) is the time
for one cycle of the signal. The frequency is the number of cycles per second, frequency =
1/time period.
Time = distance in cm × time/cm

STUDY OF FUNCTION GENERATOR

A function generator is a device that can produce various patterns of voltage at a
variety of frequencies and amplitudes. It is used to test the response of circuits to common
input signals. The electrical leads from the device are attached to the ground and signal
input terminals of the device under test.
Features and controls:

Most function generators allow the user to choose the shape of the output from a small
number of options.
 Square wave - The signal goes directly from high to low voltage.

The duty cycle of a signal refers to the ratio of high voltage to low voltage time in a
square wave signal.
 Sine wave - The signal curves like a sinusoid from high to low voltage.
 Triangle wave - The signal goes from high to low voltage at a fixed rate.
The amplitude control on a function generator varies the voltage difference between the
high and low voltage of the output signal. The direct current (DC) offset control on a
function generator varies the average voltage of a signal relative to the ground.
The frequency control of a function generator controls the rate at which output signal
oscillates. On some function generators, the frequency control is a combination of
different controls. One set of controls chooses the broad frequency range (order of

magnitude) and the other selects the precise frequency. This allows the function generator
to handle the enormous variation in frequency scale needed for signals.
How to use a function generator

After powering on the function generator, the output signal needs to be configured to
the desired shape. Typically, this means connecting the signal and ground leads to an
oscilloscope to check the controls. Adjust the function generator until the output signal is
correct, then attach the signal and ground leads from the function generator to the input
and ground of the device under test. For some applications, the negative lead of the
function generator should attach to a negative input of the device, but usually attaching to
ground is sufficient.

GUIDE TO ASSEMBLING YOUR CIRCUITS

In this section we describe the use of the breadboard and give basic hints about the
wiring process needed to power up and interconnect your circuits. Assembling circuits on
your breadboard is a fast and easy process once you get used to it. To assemble your
circuit first select the chips that you need, insert them in the breadboard, wire up the power
and ground connections as described in the next section and next wire the logic elements
according to the circuit connections that you obtained from the design process. Before you
insert a chip into the breadboard, make sure it is properly oriented (see Fig. 9 & 10), and
that when you press it down the pins of the chip actually enter the holes and do not bend
underneath the chip package. When wiring, be careful to hit the right hole needed in the
connection, because this is one of the most common mistakes found to cause an error in
your projects.
Breadboard Description
In order to assemble the lab experiments, every student should use his/her own
breadboard (similar to the one shown in Figure 6). The breadboard has 8 sets of rows (1)
and (2), consisting of 25 holes that are horizontally interconnected, and groups of columns
(3) and (4), consisting of 5 holes that are vertically interconnected. The rows and columns
are used to hold chips and wires, and interconnect them as shown in Figures.
Also, in Figures we show two typical ways to distribute power (1), and ground (2) signals
that are recommended in order to avoid noise in your circuit, and assure good
performance from the chips. The banana plugs (3), if available, can be used to connect
your breadboard to an external power supply (usually the Heathkit board).

Power
and
Ground Connection (method A)
Power and Ground Connection (method B)

Introduction to LTspice
• Simulation Program with Integrated Circuit Emphasis
• Developed in 1973 by Laurence Nagel at UC Berkeley’s Electronics Research
Laboratory
• Dependent on user defined device models
How Do You Get LTspice

‹Go to http://www.linear.com/LTspice, Left click on Download LTspice , Register for a
new MyLinear account to receive updates if you have not done so already.

Getting Started
Component to Menu Item Matchup
Net Label

By labelling nets you can avoid a giant mess of wires. Always use these for at least your
power supplies. When you start making large circuits, your power supplies will provide
energy all over your schematic.
Adding Other Components





Editing Components


Selecting Device Model


Simulation: Transient
Simulation: AC Simulation

EXPERIMENT -1
Linear applications of OP-AMP

Aim : To study the various linear applications of OPAMP
A. Inverting Amplifier
B. Non- inverting Amplifier
C. Summer(Adder)
D. Voltage Follower
E. Integrator
F. Differentiator
Equipments Required : Dual Power Supply, C.R.O., Function generator, DMM, μA
741 (OP AMP IC)
F IGURE 1: U A 741 OP AMP

A. Inverting Amplifier
Design: Let the gain be A = 10, ; Choose then
Input Output
Voltage Vs Voltage Vo
0.2 V
0.4 V
0.8 V
1.0 V
T ABLE 1: I NVERTING A MPLIFIER
F IGURE 2: I NVERTING A MPILFIER
Note : For inverting and Non-inverting amplifier use Sinusoidal signal as Vs = 0.5 V
and observe the output Vo using the CRO. Keep the input Vs< 1.2 V. DO NOT EXCEED
VS BEYOND THIS.
B. Non Inverting Amplifier:
Let the gain be A = 11, ; Choose then
Input Output
Voltage Vs Voltage Vo
0.2 V
0.4 V
0.8 V
1.0 V
F IGURE 3: N ON - I NVERTING A MPILFIER
T ABLE 2: N ON I NVERTING A MPLIFIER

C. Summer
Let the input voltages be , and ;
Choose
Input Voltages Output

V1 V2 Voltage
Vo
F IGURE 4 : S UMMER T ABLE 3 : S UMMER
Note : Keep V1 and V2 < 4 V, use DC voltages only

D. Voltage Follower
Input Voltages Output

Vs Voltage Vo
T ABLE 4: V OLTAGE FOLLOWER
F IGURE 5 : V OLTAGE F OLLOWER

E. Differentiator Circuit
Output of differentiator
Chose time constant, 0.1ms, Take
NB: Give square input to observe the waveform.

F IGURE 6 : D IFFERENTIATOR
E. Integrator Circuit
Output of differentiator ;
Chose time constant, 0.1ms, Take
F IGURE 7 : I NTEGRATOR
NB: Give square input to observe the waveform.

 Run simulation in LTSpice and analyze the results

EXPERIMENT-2
Half Wave And Full Wave Precision Rectifiers Using OP-AMP

Aim:
1) To design a Half wave precision rectifier using OPAMP to obtain an output of 5V for
given input of 0.5V peak sinusoidal signal.
2) To design a Full wave precision rectifier using OPAMP to obtain an output of 5V for
given input of 0.5V peak sinusoidal signal.
Equipment’s required: Dual Power Supply, CRO, μA741, IN4001, Resistors, AFO
Half Wave Precision Rectifier:
Circuit Diagram:
Design:
Vo=(R’/R)Vin
Given Vo =5V and Vin =0.5V
(R’/R)=( Vo/ Vin)=(5/0.5)=10
Let R=4.7kΩ then R’=47kΩ
Procedure:
1. Rig up the circuit as shown in circuit.
2. Apply 1KHz sinusoidal using AFO with a peak of 1V. (Positive peak=0.5V) and the
input and observe the output using CRO.
3. Note down the input and output voltage waveforms.
Expected output:

Full wave precision rectifier:

Circuit diagram:
Design:
Vo = (R’/R)Vin
Given Vo =5V and Vin=0.5V
(R’/R)= (Vo/Vin)= (5/0.5)=10
Let R=4.7kΩ then R’=10R=47kΩ.
Procedure:
1. Rig up the circuit as shown in the circuit.
2. Apply 1kHz sinusoidal using AFO with a peak to peak 1V. (Positive peak=0.5V) and the
input and observe the output using CRO.
3. Note down the input and output voltage waveforms.
Expected Output:

EXPERIMENT – 3
555 TIMER IC APPLICATIONS
Aim:
To design and test Astable Multivibrator (Square wave generator) and Monostable
Multivibrator (Pulse wave generator) circuits using IC 555.
Apparatus:
IC 555, Resistors, Capacitors, Diode IN4001, CRO, PS, AFO
1. Astable Multivibrator
Design:
Ton = C (RA+RB) ln 2
Let RA = RB = 10 kΩ; then C = 0.1 µF
Thus, Ton = 1.386 msec
Toff = ln2. RBC = 0.69 msec.
T = Ton + Toff
Duty Cycle = Ton / (Ton + Toff) = 66.67 %
NOTE: To design the circuit with 50% duty cycle (square wave generator), connect a
diode (IN 4001) between pins 7 and 2 of IC 555 and select RA = RB.
Procedure:
1. Rig up the circuit as shown in the figure.
2. Observe the output using CRO.
3. Also note down the voltage across the capacitor.
4. Calculate Ton, Toff and Duty cycle.
Circuit diagram:

Astable Multivibrator with 50% duty cycle:

2. Monostable Multivibrator Design:

Pulse width Tp = 1.1RC = 1.1 msec.
Let R = 10 kΩ; then C = 0.1 µF
Procedure:
1. Rig up the circuit as shown in the diagram.
2. Apply square wave trigger signal.
3. Observe the waveform at various points using a dual trace oscilloscope and measure the
amplitude and pulse width of the signals and compare them with the theoretical values.
Circuit diagram:
NOTE: Vary the frequency of the trigger input signal and observe the waveforms
at the various pins (Vx is measured at pin 2).


EXPERIMENT – 4
Non-Linear applications of OPAMP
Aim:
Analysis and design of
i) Schmitt trigger using OP-AMP
ii) Astable multivibrator using OP-AMP
iii) Monostable multivibrator using OP-AMP
i) SCHMITT TRIGGER
Aim: To design and test Schmitt Trigger Circuits using μA 741.

Equipment required: Dual Power supply, C.R.O., Function Generator, μA 741, DMM,
Resistors and capacitors.
Inverting Schmitt trigger:
Design:
To design an inverting Schmitt trigger circuit with UTP=+5V and LTP = -2V
VSAT = 12-1 =11V
UTP = 5V = VSATR2/(R1+R2)
Substituting VSAT in the above equation we get 5R1 = 6R2
UTP = 5V = IR2, Let IB(max)=500nA and I ≫ IB(max)
Let I = 100* IB(max) = 50μA
Hence R2= 5/I = 5/ 50μA =100KΩ.
R1= (6/5)*R2=120KΩ.
LTP= -2V = (-VSAT R2)/ (R11+R2)
Therefore 2R11=9R2 or R11= (9/2)R2=450KΩ

Circuit diagram:
Procedure:
1. Rig up an Inverting Schmitt Trigger circuit as shown below.
2. Apply an input sinusoidal signal of 1kHz using AFO
3. Observe the output waveform and note down the UTP and LTP values
4. Obtain Lissajious Figure using CRO’s X-Y mode.
Design:
To design a non-inverting Schmitt trigger circuit with UTP=+2V and LTP=-2V
VSAT = 12-1 =11V
UTP = +2V = VSAT * (R1/R2)
LTP = -2V = - VSAT * (R1/R2)
We get R1/R2 =2/11
UTP = 2V = IR1, Let I=50mA
Hence R1= 2/50mA=40KΩ.
R2= (11/2)*R1=220KΩ.

Procedure:
1. Rig up an Non-Inverting Schmitt Trigger circuit as shown below.
2. Apply an input sinusoidal signal of 1kHz using AFO
3. Observe the output waveform and note down the UTP and LTP values
4. Obtain Lissajious Figure using CRO’s X-Y mode

ASTABLE, MONOSTABLE MULTIVIBRATOR USING

OPAMP
1. Astable Multivibrators(Square Wave generators)
Aim: To design and test a Astable Multivibrator (Square Wave generator) using µA 741
to operate at a frequency fo=1kHz.
Equipments Required: Dual Power supply, CRO, Function Generator, µA 741, DMM,
discrete components.
Design:
T=2RC ln (1+β) / (1- β) where β = R2/(R1+R2)
Note: If R1=R2 then β=0.5
Let R1=R2=10KΩ then β=0.5. So T= 2 RC ln 3=2.2 RC
i.e. fo=1/T=1/(2.2 RC)
Let C=0.05µF, fo=1kHz
R=1/(2.2*1x *0.05* )=9.09kΩ (select 9.1KΩ)
Waveform:
Duty Cycle=TON/(TON+TOFF) = TON/TTOTAL

For the circuit shown above TON = TOFF= ln3*RC.
So D.C. = 50%
!!! NOTE:

Limiter: Output of the square wave generated can be limited using limiters. Zeners are
used for this purpose. Modify the circuit as shown in “Figure A” and verify the output
waveform.
To generate the square wave with a duty cycle other than 50%, modify the circuit as
shown in “Figure B” and verify TON=ln3*RAC and TOFF=ln3*RBC
Limiter Circuit:
Asymmetric Square Wave generator:

Exercise: Generate a square wave with a frequency of 1kHz and for the following duty
cycles
i) 40% ii) 60%

MONOSTABLE MULTIVIBRATOR USING OP-AMP

Aim: To design a circuit to have a pulsewith of 0.1ms
Design:
Pulse width Tp = 0.69RC = 0.1msec. If β = 0.5,
Let R1=R2 = 10KΩ, Let C= 0.05µF
Then = 2.89kΩ (select 3KΩ)
Waveforms:
Waveforms:
 Run simulation in PSpice and analyze the results.

EXPERIMENT – 5
DESIGN AND STUDY OF IC REGULATIONS
Aim:
1) To study the operation of a three terminal fixed voltage regulator IC 7805 by plotting its
input (line) and load regulation characteristics.
2) To study the operation of a 10V voltage regulator using 7805 IC and to plot its line and
load regulation characteristics.
3) To build a constant current regulator using 7805 IC and test the circuit.
4) To build a variable voltage regulator using LM317 IC and test the circuit.
Apparatus:
TPS, DMM, Rheostat, Resistors, IC7805.
1) TO STUDY THE OPERATION OF A THREE TERMINAL FIXED VOLTAGE
REGULATOR IC 7805 BY PLOTTING ITS INPUT (LINE) AND LOAD
REGULATION CHARACTERISTICS.
Circuit diagram:
Procedure:
1) Set up the circuit as shown
2) Switch on the power supply and adjust input voltage more than 7V
3) Adjust RL such that IL = 250 mA
4) Keeping IL=250 mA, vary Vin from 8V to 20V in step of 2V and note down the value of
Vout
5) Keep Vin=10 V fixed and RL such that IL varies from a low value(say 50mA) to 500 mA
and note down the corresponding Vout.

Tabular Column:
Line Regulation:
Vin(V) 8 10 12 14 16 18 20
Vout.(V)
Load Regulation: Vin = 10V

IL (V) 50 100 150 200 250 300 350
Vout.(V)
2) TO STUDY THE OPERATION OF A 10V VOLTAGE REGULATOR USING 7805

IC AND TO PLOT ITS LINE AND LOAD REGULATION CHARACTERISTICS.
Circuit diagram:
Procedure:
1) Rig up the circuit as shown in the circuit diagram.
2) Draw line regulator characteristic for IL =250 mA. Assume input variation of 13 to 20
3) Draw the load regulation characteristic for Vin=15V fixed.
Tabular column:
Line Regulation: Il=250mA
IL (V) 13 14 15 16 17 18 19
Vout.(V)
Load Regulation: Vin=15V
IL (V) 250 300 350 400 450 500 550
Vout.(V)

3) TO BUILD A CONSTANT CURRENT REGULATOR USING 7805 IC AND TEST

THE CIRCUIT
Circuit diagram:
Procedure:
1) Rig up the circuit as shown in the circuit diagram
2) Keep Vin=15V, measure IL for different setting of RL.
Note: IL=5V/R provided Vin ≥ 5V+ILRL
Tabular Column: Vin = 15 V

RL (Ω) 1 2 3 4 5 6 7
IL.(A)

4) TO BUILD A VARIABLE VOLTAGE REGULATOR TO OBTAIN AN OUTPUT

5V TO 12V USING LM 317 IC
Design:
Let IADJ=100μA, R1 = 240Ω
i) Then for V0=5V,the value of R2 is:
Where,
Or R2=0.71K
ii) Then for Vo =12V, the value of R2 is:
Or R2=2.01KΩ
The capacitor C2(select 1 to 1000μF) can be added to improve transient response and C3
to obtain very high ripple rejection ratio. With 10μF bypass capacitor(c3) 80db ripple
rejection is obtainable.

Circuit diagram:
Procedure:
1) Rig up the circuit as shown in the circuit diagram
2) Keep the value of R2 at 0.71K and note down the output voltage (V0=5V)
3) Adjust R2 value towards 2.01K (V0 varies from 5-12V)
 Run simulation in LTSpice and analyze the results.

Experiment No. 06
LOGIC GATES
Aim:
• To get familiarization with IC trainer kit.
• To verify the characteristics of NOT gate.
• To realize basic logic functions using universal gates.
• To construct and test simple combinational circuits.
Equipments and components required:
• ICs – 7400, 7402, 7408, 7432, 7486, 7404.
• IC trainer kit and patch chords.
• Multimeter and Power supply
Digital Logic IC’s:
7408: Quad 2-input AND gates 7432: Quad 2-input OR gates 7404: Hex inverters
7400: Quad 2-input NAND gates 7402: Quad 2-input NOR gates 7486: Quad 2-input XOR
gates
Note:
1. Refer to Appendix II/ data manuals for pin diagram and pin descriptions of the above
IC’s.
2. Refer to Appendix I for theory related to the experiment.
Procedure:
1. Ensure that power supply to IC trainer kit is switched off.
2. Insert the required logic IC into the appropriate ZIF socket.
3. Using connecting wires/patch chords make connections to Vcc & GND, inputs and
outputs
4. Switch ON the power to IC trainer kit.
5. Apply proper inputs to logic gate and observe the outputs.
6. Switch off the power to IC trainer kit and then remove the connecting wires and
IC’s.

A. Universality of NAND and NOR gates:
• Basic logic functions using NAND gates:
• Basic logic functions using NOR gates:
Compare the truth tables of above logic circuits with that of basic gates.

B. Construction of Combinational Circuits:
Problem: Design a logic circuit with 4 inputs A,B,C,D that will produce output ‘1’ only
whenever two adjacent input variables are 1’s. A and D should also be treated as
adjacent. Implement it using universal logic.
Truth Table
INPUT OUTPUT
A B C D F
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 1
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1
1 0 1 0 0
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
Logic Expression F= (A+C)(B+D)
Note: Get the expression in SOP form for the above function, implement the circuit and see the
result.

C. Full adder: Full adder adds two bits and also another bit called carry-in that is
propagated from the previous stage. In effect, a full adder adds three bits to give out two
outputs – sum and carry out. A,B and Cin are the three inputs, out of which Cin is to be
considered as carry propagated from the previous stage. S and Cout are the three outputs.

D. Full Subtractor:
Exercises:
1. Design a combinational circuit to produce 2’s compliment of a 4bit binary

number.
Design a circuit that can be built using AOI logic and outputs a 1 when a 4 bit
hexadecimal input is an odd number from 0 to 9.

Experiment No. 07
CODE CONVERSION CIRCUITS
Aim:
• To design and implement the following code converters:
(a) 4-bit Binary to Gray code
(b) BCD to Excess-3 code
(c) BCD to 7-segment code
Equipment’s & Components Required:
• ICs 7408, 7411, 7432, 7404, 7400, 7486, 7447, 7730

• IC trainer kit, Connecting wires
A. 4-bit Binary to Gray code:
Binary inputs Gray outputs

B3B2B1B0 G3G2G1G0
0000 0000
0001 0001
0010 0011
0011 0010
0100 0110
0101 0111
0110 0101
0111 0100
1000 1100
1001 1101
1010 1111
1011 1110
1100 1010
1101 1011
1110 1001
1111 1000
G3 = B3
G2 = B3 ⊕ B2
G1 = B2 ⊕ B1
G0 = B1 ⊕ B0
Implement the above circuit and verify the truth table

B. BCD to Excess-3 converter:
Excess-3 code is obtained by adding 3 to BCD number
First draw the truth table and then using K-map, get expression for each of Excess-3 bits
BCD Excess-3
ABCD WXYZ
0000 0011
0001 0100
0010 0101
0011 0110
0100 0111
0101 1000
0110 1001
0111 1010
1000 1011
1001 1100
W = A + BC + BD
X = BD + BC D + A BC
Y = C D +CD
Z=D
Implement the above expressions and verify the truth table
C. BCD to 7-segment code conversion:
A seven segment indicator is used for displaying

decimal digits 0 through 9.
IC 7447 is BCD to seven segment decoder/

driver
IC 7730 is seven segment display
Refer data sheet for LED type (Common cathode

or anode)

Exercises:
Design the following converters:

1. 4-bit Gray code to binary
2. 2421 BCD to 8421 BCD
3. BCD to seven segment code( using discrete gates )

Experiment No. 08
MULTIPLEXERS AND DEMULTIPLEXERS
MULTIPLEXERS – A multiplexer or data selector is a logic circuit that accepts several
data inputs and allows only one of them at a time to get through the output. The routing
of the desired data input to the output is controlled by SELECT inputs. The multiplexer
acts like a digitally controlled multi position switch. The digital code applied to the
SELECT inputs determines which data input to be switched to the output.
DEMULTIPLEXER – A demultiplexer or data distributaor is a circuit that receives

information on a single line and transmits this information on one of the 2n possible
output lines. The selection of a specific output line is controlled by n selection lines. A
decoder can function as demultiplexer if enable line is taken as data input.
Aim:
• To design and implement various multiplexer circuits and to generate logic
functions using multiplexers.
• To design and implement Demultiplexers
Components and Equipments Required:

• ICs 74151, 74153
• Basic gates, universal gates
• IC trainer kit, connecting wires
A. 4:1 Multiplexer using only NAND gates

Logic Symbol
4:1 MUX
Y = S1S0D0 + S1S0D1 + S1S0D2 + S1S0 D3

Truth Table
S1 S0 Y
0 0 D0
0 1 D1
1 0 D2
1 1 D3
74153 – Dual 4:1 Mux 74151 – 8:1 Mux 74157 – Quad 2:1 Mux
Note:
• Pin no.16 = Vcc, pin no.8 = GND for all the three ICs.
• For pin-details of the ICs, refer data manual.
• Test all the three ICs by giving appropriate inputs and observing the
corresponding outputs. Thus verify the functional tables of these ICs.

B. Implement f = ∑ m (0, 3, 5, 7, 8, 10, 14) using i) 8:1 MUX ii) 4:1 MUX and
additional gates
Using Using
A B C D F 8:1 MUX 4:1 MUX
0 0 0 0 1
0 0 0 1 0 I0 =D
0 0 1 0 0 I0 = C ⊕ D
I1 =D
0 0 1 1 1
0 1 0 0 0
I2 =D
0 1 0 1 1
0 1 1 0 0 I1 = D
I3 =D
0 1 1 1 1
1 0 0 0 1 I
1 0 0 1 0 4 =D
1 0 1 0 1 I2 = D
1 0 1 1 0 I5 =D
1 1 0 0 0
I6 =0
1 1 0 1 0 I
1 1 1 0 1 I 3 = CD
1 1 1 1 0 7 =D
using 8:1 MUX using 4:1 MUX

C. Design a 1 to 4 Demultiplexer using basic gates
Select lines Data Outputs

S1 S0 D Y0 Y1 Y2 Y3
0 0 0/1 D 0 0 0
0 1 0/1 0 D 0 0
1 0 0/1 0 0 D 0
1 1 0/1 0 0 0 D
Exercises:
1. Implement f (a, b, c) = ab +bc + abc using (i) 8:1 MUX (ii) 4:1 MUX
2. Implement full adder using 4:1 MUX and 8:1 MUX
3. Implement 8:1 MUX using 2:1 multiplexers
4. Design 3 bit binary to gray code converter using 4:1 MUX
5. Implement f = ∑ m ( 0,5,7,11,15,16,18,25,29 ) using two 8:1 and one 2:1 MUX
6. Construct 16:1 DEMUX using 74138 IC and additional gates if required.
7. Verify 16:1 DEMUX truth table using 74154 IC.

Experiment No. 09
DECODERS
DECODER – It is a logic circuit that converts an N-bit binary input code into M output
lines such that only one line is activated for each one of those possible combinations of
inputs.
Aim:
• To design and implement Decoders.

• ICs 74139, 74138, 74154, 74148
• Basic gates, universal gates
A. Design and implement 2 to 4 decoder using basic gates:
INPUTS OUTPUTS
A B D0 D1 D2 D3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
B. Design and implement 2 to 4 decoder with enable input using only NAND gates

Exercises:
1. Design and implement 4 to 16 decoder using two 74138 decoders.

2. Implement f = AB + ABC using 74138 and additional gate.
3. Implement one bit full adder using 74138 and additional gate
4. Implement f(A,B,C,D) = ∑ 0,3,5,9 using two 74138 ICs and additional gate
5. Implement the following multi output Combinational circuit using a 4 to 16 decoder:
F1(A, B, C, D) = ∑ (2, 4, 8, 13)
F2(A, B, C, D) = ∑ (5, 9, 11, 14)

Experiment No. 10
COUNTERS
Aim:
• To convert IC – 7473 to work as
i. Divide by two counter
ii. Divide by four counter
• To design shift registers.
To design and test the following Shift register topologies.
i. Serial-in Serial-out.
ii. Serial-in Parallel-out.
iii. Parallel-in Serial-out.
iv. Parallel-in Parallel-out.

• ICs 7408, 7473, 7474
• Cathode Ray Oscilloscope
• IC 7474 (2 Nos ), IC 7408,IC 7400, IC 7495, IC 74164
Note: Refer the IC data manual, draw the block & pin diagram of ICs 7473 & 7474.
A. Divide by 2 and divide by 4 counters using 7473

PROCEDURE :
A. FOR SISO,SIPO SHIFT REGISTER:
1. Connect the circuit as shown in the circuit diagram

2. Switch on & momentarily clear all the Flip-Flops by giving low to the make it
permanently logic1.
3. Enter any 4-bit serial input using clock pulse for every bit.
4. For example, to enter 1011
5. first make serial input =1, apply a clock pulse,
6. make serial input=1, again apply a clock pulse,
7. make serial input=0 ,again apply a clock pulse,
8. Make serial input =1, apply a clock pulse.
9. This ensures that the register has word 1011 stored in it.
10. Observe the data at the output of each shift register simultaneously.
11. This constitutes parallel output data.
12. To observe the output data in serial fashion, apply clock pulse by keeping
serial input data zero.

B. FOR PISO,PIPO SHIFT REGISTER:
1. Make the clear and parallel enable low i.e. CLR=0, PE=0.
2. To load the input data in parallel fashion, apply 4 bit data(D C B A) and make the
parallel enable PE=1.
3. To read the output data in parallel fashion, make parallel output enable =1 i.e PE=1.
4. To read the output data in serial fashion, make parallel output enable =0 i.e. PE=0
& CLR=1. Then apply clock pulse making serial input data=0. Data gets shifted from left
Flip-Flop to right Flip-Flop for each

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Integrated Electronics and Simulation Lab IV Semester, B.

MTE 2262: INTEGRATED ELECTRONICS LAB

Prepared By Ms. Dolly Sharma

Approved By Dr. Chandrashekar Bhat

MIT, Manipal Page 1

MTE 2262: INTEGRATED ELECTRONICS LAB

MIT, Manipal Page 2

Global leadership in human development, excellence in education and healthcare.

VISION OF THE MECHATRONICS DEPARTMENT

Excellence in Mechatronics Education through Innovation and Teamwork.

MISSION OF THE MECHATRONICS DEPARTMENT

Educate students professionally to face societal challenges by providing a healthy

MIT, Manipal Page 3

NBA PROGRAM EDUCATIONAL OUTCOMES OF THE

PEO3: Shall be capable of pursuing higher education in globally reputed universities by

MIT, Manipal Page 4

NBA PROGRAM OUTCOMES (PO)

The POs are exemplars of the attributes expected of a graduate of an accredited

PO1- Apply the knowledge of mathematics, science, engineering fundamentals, and an

PO4- Use research-based knowledge and research methods including design of

MIT, Manipal Page 5

PO9- Function effectively as an individual, and as a member or leader in diverse teams,

PO10- Communicate effectively on complex engineering activities with the engineering

PO11- Demonstrate knowledge and understanding of the engineering and management

MIT, Manipal Page 6

NBA PROGRAM SPECIFIC OUTCOMES OF THE

At the end of the course the student will be able to:

MIT, Manipal Page 7

IET LEARNING OUTCOMES (LO)

C6. Apply an integrated or systems approach to the solution of complex problems.

C11. Adopt an inclusive approach to engineering practice and recognise the

MIT, Manipal Page 8

C15. Apply knowledge of engineering management principles, commercial context,

C16. Function effectively as an individual, and as a member or leader of a team.

MIT, Manipal Page 9

COURSE LEARNING OUTCOMES

S. Course Outcome Learning Program Outcomes

2 Design Timer circuits using 555 IC and

MIT, Manipal Page 10

1 Linear applications of OP-AMP 1,2,3,16 1, 2, 3, 4, 9

Half wave and full wave precision rectifiers using

3 555 timer ic applications 1,2,3,16 1, 2, 3, 4, 9

4 Non-Linear applications of OPAMP 1,2,3,16 1, 2, 3, 4, 9

5 Design and study of ic regulations 1,2,3,16 1, 2, 3, 4, 9

6 Logic gates 1,2,3,16 1, 2, 3, 4, 9

7 Code conversion circuits 1,2,3,16 1, 2, 3, 4, 9

8 Multiplexers and demultiplexers 1,2,3,16 1, 2, 3, 4, 9

MIT, Manipal Page 11

BASIC ELECTRONIC COMPONENTS

Table1: Colour codes of resistor

Table 2: Procedure to find the value of resistor using colour codes

MIT, Manipal Page 12

COLOUR CODING OF CAPACITORS

An electrical device capable of storing electrical energy. In general, a capacitor consists

 Capacitor Identification Codes: There are no international agreements in

Figure 1: Plastic Film Types

MIT, Manipal Page 13

A more difficult scheme is shown in Figure 2 where K is used for indicating

Figure 2: Pico farads Representation

Figure 3: Ceramic Disk Capacitor

MIT, Manipal Page 14

COLOUR CODING OF INDUCTORS

Figure 4: Typical inductors colour coding and their values.