Implementation of Direct-Conversion Transceivers

Frank Op ‘t Eynde
Audax-Technologies Ltd.
Leuven - Belgium

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 History
 1919: superheterodyne receiver

 1932: homodyne (= zero-IF) receiver

 1991: zero-IF in GSM (Alcatel) [J. Sevenhans et al, 1991]

 1993: low-IF receiver (Philips Natlab) [Ehrhardt, D. et al, 1993]

 1995: IEEE 801.11 systems

 2000: single-chip Bluetooth transceiver [Op ‘t Eynde, F. et al, 2000]

 2002: single-chip 802.11 a/b/g transceiver [Rofougaran, 2002]

 2003: IQ autocalibration

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Heterodyne principle

Ceramic Filter LNA Mixer SAW Filter

fin
A/D DSP
fin fIF fIF
fLO

LO VCO DC
Image
RF IF

 well-known  two non-integrated filters

 No matching requirements  fIF > ~0.1. fRF
 Power Consumption
 3dB noise penalty

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Heterodyne: 3 dB noise penalty

Ceramic Filter Ceramic Filter Mixer SAW Filter

LNA
fin
fin fin fIF fIF
fLO

VCO
LO LO DC DC
Image
RF RF IF IF

noise in image band adds to noise in RF band

 3dB noise penalty

or
 additional post-LNA filter

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Image Reject Receivers
a a

demodulator
fIF
fRF

b
- fIF
fRF

b
90°
fIF
cos sin cos sin
90 90
0 0

fLO fLO

VCO VCO
 more complex
 path matching is important
 image band is attenuated / cancelled
 image noise is also cancelled

 ΔG / G + tg (Δθ ) 
Attenuation[dB] ≈ 20. log 
 2 

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Direct Conversion Receiver

demodulator
Ceramic Filter LNA A/D

VGA
fin
b
A/D
LO DC cos sin
90
0

fLO = fin
 IF is at DC (lowest possible frequency)
VCO  LPFs can be integrated
 analog BW requirements
 sampling rate requirements
 power consumption
 no 3dB noise penalty
 image band = signal band
 offset voltages
 1/f noise

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Direct Conversion = No Image ???
Q
LNA RF signal I + j.Q

cos sin
90 LO DC
0

 ΔG / G + tg (Δθ ) 
VCO Attenuation[dB] ≈ 20. log 
 2 
Q(t) (I,Q) is a vector  image rejection problem as bad as before
 image signal = wanted signal

I(t)

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Zero-IF vs. Low-IF

Zero-IF Low-IF
+60 dBr +60 dBr

0 dBr 0 dBr

-40 dBr -40 dBr

LO LO

Image rejection ≥ 40 dB Image rejection ≥ 100 dB

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 The Offset Problem

Mixer Response:
2 2
vout = a + b.v RF + c.v LO + d .v RF + e.v LO + f .v RF .v LO + ...

static RF feed- LO feed- HD2 & self- wanted

Offset through through IM2 mixing response

DC fRF fRF 2fRF 2fRF 2fRF

LF DC LF

Dynamic offset:
Proportional to ARF2

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Numerical example: signal levels

Ceramic Filter LNA A/D

VGA
fin
A/D

Gain: 20 dB 20 dB 74 dB

Signal: 1µVrms 10µVrms 100µVrms 500mVrms

Offset: <10µV <50mV

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Static Offset Removal: offset DACs
 Analog compensation to allow DC offset to pass the ADCs
 Final removal in the digital domain
 OFDM WLAN: no information at DC
D/A

demodulator
LNA A/D
VGA

+ A/D

90
0 D/A

VCO Maximum Static offset ≈ ±20 mV (component offset)

Maximum tolerable offset ≈ ±10 µV
Hence: 11-12 bit DACs
 Noise

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Static Offset Removal: CDS during guardband (1)
D/A

LNA + A/D
VGA
+ A/D

D/A

gm

A/D [Op ‘t Eynde (Alcatel),

LNA
ISSCC 2000]

A/D

gm

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Static Offset Removal: CDS during guardband (2)

I-Q vector

I and Q at ADC input

Bit pattern to receive

[Op ‘t Eynde (Alcatel), ISSCC 2000]

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Dynamic Offset: the IP2 concept
2 2
vout = a + b.v RF + c.v LO + d .v RF + e.v LO + f .v RF .v LO + ...

HD2 & IM2 wanted response

d can be easily measured via a 2nd-

order intermodulation measurement:
look to the response at ω2-ω1:

Pout f . ALO
IP 2 = ωLO A.cos(ω1t) A.cos(ω2t)
2.d

A.f.ALO/2
A2.d

1 2 A
IP2 DC ω2 -ω1

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Dynamic Offset: the IP2 concept
2 2
vout = a + b.v RF + c.v LO + d .v RF + e.v LO + f .v RF .v LO + ...
2
dynamic _ offset 0.5.d . ARF _ total
=
wanted _ Amplitude 0.5. f . ARF _ useful . ALO

dynamic _ offset
2
ARF _ total ωLO A.cos(ωt)
=
wanted _ Amplitude 2.IP 2. ARF _ useful
A.f.ALO/2
A2.d/2

DC
E.g.: LTE in FDD mode:
dynamic _ offset
≤ 10%
wanted _ Amplitude
IP 2 ≥ +60dBm
PRF _ total = +23dBm − 53dB
PRF _ useful = −106dBm

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Receiver Calibration for WLAN

 LTE requires sensitivity of -106 dBm  Static Offset < 10µV

[at mixer output]

 LTE requires a sensitivity of -106 dBm in FDD  IP2 > +60 dBm

 WiMax requires EVM of -32 dB  IQ imbalance < -40 dB

 Fortunately, WLAN does not use the zero-offset subcarrier

 in principle, a highpass filter could be used (≈ 10 kHz)
 but: settling time

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Receiver autocalibration: measurements

 Apply a test signal (could be thermal noise)

 Then calculate:
I 0 = I out (t )
offset
Q0 = Qout (t )

I 2 = (I out (t ) − I 0 )
2
squares of rms signal values
If unequal => IQ gain error
Q2 = (Qout (t ) − Q0 )
2

IQ = (I out (t ) − I 0 )* (Qout (t ) − Q0 ) “cos(φ)”

If not zero => IQ phase error
= I 2 .Q2 . cos(90° + Δφ )

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Receiver autocalibration: linear corrections
 Corrections in the digital domain

Ioffset 1 + 0.5*ΔG/G

Iin(t) Iout(t)
+ x +
x
tg(Δθ/2)

x
Qin(t) + x + Qout(t)

Qoffset 1 - 0.5*ΔG/G

Offset Gain Phase

Imbalance Imbalance
© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE
 IP2 calibration: tunable mismatch in mixers
 Include a tunable circuit mismatch
 Calibrate static offset out
BBp BBn
 Observe RX offset over time
[ via FFT in OFDM PHI]
 If necessary: change tuning

Calibration Coefficients

LOp LOn LOn LOp

 RFp RFn
Algorithm
Digital
Receiver


[Huang, ISSCC 2010]

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Direct Conversion Transmitters
Q(t)
D/A PA

modulator
Data -
+
I(t)
D/A

90
0
vout (t ) = A(t ). cos(ωc t + φ (t ))
VCO
= A(t ). cos(φ (t )). cos(ωc t ) − A(t ). sin(φ (t )). sin(ωc t )
= I (t ). cos(ωc t ) − Q (t ). sin(ωc t )

 I(t) and Q(t) come directly from OFDM PHI

 Timing accuracy less stringent than for polar TX
 HD2, HD3: mainly inside channel or adjacent
 offset voltages  carrier feedthrough
 IQ imbalance  image signals

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Transmitter calibration: linear corrections
 Corrections in the digital domain

1 + 0.5*ΔG/G Ioffset

Iin(t) + x + Iout(t)

x
tg(Δθ/2)

x
Qin(t)
+ x + Qout(t)

1 - 0.5*ΔG/G Qoffset

Phase Gain Offset

Imbalance Imbalance
© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE
 Autocalibration measurements: TX  RX loopback

 Impossible to separate
TX & RX offset Q(t)
D/A

modulator
 Idem for TX & RX image
TXdata
+
-
I(t)
D/A

 All calibrations are iterative 0

90

Attenuator
[2 dimensions]
VCO
demodulator

A/D LNA

A/D

90
0

VCO

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Solution 1: TX Power Detector (PD)
 First, calibrate Power Detector: Power
TX off measure PD offset Detector

 Correct TX Carrier feedthrough: Q(t)

D/A

modulator
TX on, Txdata off TXdata
+
-
measure PD output (DC)
I(t)
D/A
 Correct TX image signal:
Txdata = sinewave 90
0
 measure PD beat tone Attenuator
 Next, calibrate RX VCO
demodulator

A/D LNA

A/D

90
0

VCO

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Solution 2: separate Synthesizers
 If ωTX ≠ ωRX , imperfections of RX and TX can be separated
 Requires two independent synthesizers with good isolation
[Craninckx, 2003]
fundamental
TX image
TX carrier

DC ωBB ωRX ωTX-ωBB ωTX ωTX+ωBB

TX Data Input TX Output Spectrum

RX images RX carrier fundamental

TX image
TX carrier

ωRX-ωTX DC ωTX-ωRX
ωRX-ωTX-ωBB ωRX-ωTX+ωBB ωTX-ωRX-ωBB ωTX-ωRX+ωBB
RX Output Spectrum
© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE
 LO Pulling (1)

 Fundamental at ωLO+ωBB
Fundamental
 Image at ωLO-ωBB
???

 Carrier at ωLO 3rd Harmonic

Image

 3rd harmonic at ωLO-3ωBB

 ??? at ωLO+3ωBB LO

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 LO Pulling (2)
Q(t)
D/A PA

modulator
Data -
+
I(t)
D/A

÷2
2nd harmonic
crosstalk
VCO

ωLO ωLO+4ωBB 2ωLO 2ωLO+4ωBB ωLO ωLO+3ωBB

ωLO+2ωBB 2ωLO+2ωBB ωLO+ωBB ωLO+5ωBB
÷2 output Spectrum VCO output Spectrum PA output Spectrum

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 LO Pulling (3)

D/A PA
modulator

- +25 dBm
+
D/A

÷2 Isolation
< 30 dB

VCO

LNA

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Example: GSM 900 MHz

[Sevenhans (Alcatel), CICC 1991] [Haspeslagh (Alcatel), JSSC Dec.1990]

Bipolar 4.5 mm² 1.5µm CMOS 22mm²

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Example: DECT

[Op ‘t Eynde (Alcatel), ISSCC 2000]

0.35µm BiCMOS 18 mm²

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Example: Bluetooth

[Op ‘t Eynde (Alcatel), ISSCC 2001]

0.25µm CMOS 40 mm²

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Example: SDR

[Ingels (IMEC), JSSC Dec.2010] 40nm CMOS 5 mm²

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 What’s next: more digital
LNA VGA RXADC LNA RXADC

÷N PLL NCO Y Digital

PA Driver TXDAC RF-DAC

VGA, offset compensation and

IQ calibration: in the digital domain

RX: [Op ‘t Eynde, ISSCC 2010]

TX: [Luschas, JSSC 2004]
PLL: [Staszewski, JSSC 2004]

Analog RX: 40nm CMOS 0.04 mm²

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE

 Zero-IF transceivers: Conclusions

 IF is at DC (lowest possible frequency)

  filters can be integrated
  analog BW requirements are lowest possible
  sampling rate requirements are lowest possible
  power consumption is lowest possible
  TX harmonics are nearby (in-channel or adjacent channel)
 no 3dB noise penalty
 image band = signal band image requirements are relaxed
 offset voltages  offset calibration required
 image band = signal band
 IQ impairments impact EVM
 IQ imbalance calibration is required
 LO pulling
 VCO at double or quadruple frequency

© 2011 IEEE IEEE International Solid-State Circuits Conference © 2011 IEEE