Wistron Hellcat 13 Schematics

5 4 3 2 1
D D
Hellcat 13 Schematics
Tiger Lake - U/ LPPDR4X
C
2020-08-04 C
REV : A00
B B
A DY : None Installed <Variant Name> A
UMA: UMA only installed Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
OPS: DISCRTE OPTIMUS installed Title

Taipei Hsien 221, Taiwan, R.O.C.
Cover Page
Size Document Number Rev
A3
Hellcat 13'' TGL A00
Date: W ednesday, August 05, 2020 Sheet 1 of 105
5 4 3 2 1
5 4 3 2 1
Project code: 4PD0LB010001

Hellcat 13 CPU 15W Block Diagram PCB P/N: 19827
Revision: A00
LPDDR4X 4267MT/s DisplayPort to HDMI Converter

D LPDDR4X DDI Parade HDMI HDMI V2.0 D
8GB/16GB PS8409AQFN
12-13
Intel CPU 57 57
Tiger LAKE-U 4+2
13"
eDP
(FHD/UHD)
55 I2C TGL PCH-LP
Touch panel
4 TCSS Lanes
12 PCIe*3.0 Lanes (SATA*2, USB31*4)
71
1 PCIE4.0x4 Lanes
M.2 SSD 63 SATA/PCIex2(Optane)/PCIEx4 TCSS Re-Timer THUNDERBOLT
(KEY M) 10 USB2.0
BURNSIDE-BRIDGE
CNVi2.0
ESPI / SPI Type C Connector
HDA/SNDW USB 2.0
ALS I2C
CSI
73
(Remove SD/EMMC) CC control pin
C Proximity Sensor I2C USB2.0 USB2.0 LANE4
CCG6SF C
72
CAMERA(HD) USB2.0 x 1 USB2.0 Finger Print

USB2.0 LANE5
Free fall
INT2 Gsensor
ST
LNG2DM 70
Gyro+G
2-1 ST
LSM6DS3
I2C
E-compass
USB 3.1 Gen1
USB3.1 Gen1 USB3.1 Gen1
ST
USB3.0 LANE2 Re-driver
LIS2MDL PARADE USB3.1 Gen1 Port2
PS8719B IO Board
B USB2.0 USB2.0 LANE2
B
WLAN SIP USB2.0 LANE10

USB2.0
CardReader
(M.2 1216 Harrison peak2) SD 3.0
USB2.0 Micro SD Card Slot
CNVi GEN2 Realtak
RTS5144
DMIC
D-MIC 55
MIC_IN/GND
Bluetooth eSPI debug port eSPI BUS Universal Jack
Hellcat Pen 68
HDA HP_R/L
Thermal KBC
NUVOTON SMBUS MICROCHIP SPI
NCT7718W 26 MEC1515 HDA
2CH SPEAKER
24 CODEC (2CH 2W/4ohm)
Realtek
Fan Control ALC3254-VA3
A
I2C A
PWM 26 Flash ROM 27
16 + 8 MB
Quad Read 25
<Core Design>
Int. Touch PAD

FAN Image sensor Wistron Corporation
KB I2C 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
Block Diagram
Custom
Date: Wednesday, August 05, 2020 Sheet 2 of 105
5 4 3 2 1
5 4 3 2 1
D
Follow Hellcat15 Upsell TGL D
Follow Nakia Shuri N7

20191128(EVT) 20191128(EVT)
Follow Nakia Shuri N7 Modify
1D05V_VCCSTG
1D05V_VCCSTG_TERM
1
R311 1 2 100R2F-L1-GP-U XDP_TDO_CPU
R301
1KR2F-3-GP R308 1 2 51R2J-2-GP XDP_PREQ#
DY
2
EAR_N_TEST_NCTF
RN302
1 4 XDP_TDI
1
2 3 XDP_TMS
R309 XDP
1KR2J-1-GP
DY SRN51J-GP
XDP_TCLK R310 1 2 51R2J-2-GP
2
XDP
XDP_TRST# R312 1 2 51R2J-2-GP
C
DY C
24 PECI_CPU 1D05V_VCCSTG_TERM 20191210(EVT)
15 DBG_PMODE Change RN304 -> R312
Layout request
R302 1 2 1KR2F-3-GP PROCHOT#_CPU
22,24,44,46,72 PROCHOT#_CPU
1D05V_VCCST
24,65 TOUCH_PAD_INTR#
R304 1 2 1KR2F-3-GP THERMTRIP#_CPU
R307 1 2 1KR2F-3-GP CPU_CATERR
CPU_POPI_RCOMP R305 1 2 49D9R2F-GP
PCH_OPI_RCOMP R306 1 2 49D9R2F-GP
21 MEM_CONFIG4 CPU1U 21 OF 21
CPU_CATERR M7 K4 XDP_TRST# 1
55 TOUCH_PANEL_PD# CATERR# PROC_TRST# TP309
PECI_CPU BK9 B9 XDP_TMS 1
PROCHOT#_CPU PROCHOT#_CPU_R PECI PROC_TMS XDP_TDO_CPU TP310
R303 1 2 499R2F-2-GP E2 D12 1
THERMTRIP#_CPU PROCHOT# PROC_TDO XDP_TDI TP311
M5 A12 1
B THRMTRIP# PROC_TDI XDP_TCLK TP312 B
B6 1
CPU_POPI_RCOMP CT39 PROC_TCK TP313
PCH_OPI_RCOMP CB9 PROC_POPIRCOMP D8
CW12 PCH_OPIRCOMP PCH_JTAGX A9
CM39 TP#CW12
TP#CM39
PCH_TMS
PCH_TDO
E12 XDP
B12
DB42: TOUCH_PANEL_DET# DBG_PMODE DF4 PCH_TDI A7 PCH_TCK 1
DF8: TOUCH_PANEL_PD# DBG_PMODE PCH_TCK TP314
H4
DB42 PCH_TRST#
TOUCH_PAD_INTR# DB41 GPP_B4/CPU_GP3 C11 XDP_PREQ#
TOUCH_PANEL_PD# DF8 GPP_B3/CPU_GP2 PROC_PREQ# D11 XDP_PRDY# 1
GPP_E7/CPU_GP1 PROC_PRDY# TP302
DU5
GPP_E3/CPU_GP0 G1 EAR_N_TEST_NCTF
DF31 EAR_N/EAR_N_TEST_NCTF
DV32 GPP_H2 DT15
DW32 GPP_H1 GPP_F7 DR15 20191128(EVT)
GPP_H0 GPP_F9 DT14 Follow Nakia Shuri N7
MEM_CONFIG4 DJ27 GPP_F10 No GPU
GPP_H19/TIME_SYNC0
TGL-U-1-GP-U2
ZZ.00CPU.481
A A
<Core Design>
Wistron Corporation
Title
CPU (THML/JTAG)
A3
5 4 3 2 1
5 4 3 2 1
eDP
55 eDP_TX_CPU_N0
55 eDP_TX_CPU_P0
55 eDP_TX_CPU_N1
55
55
55
eDP_TX_CPU_P1
eDP_TX_CPU_N2
eDP_TX_CPU_P2
Follow Hellcat15 Upsell TGL
55 eDP_TX_CPU_N3
55 eDP_TX_CPU_P3
D 55 eDP_AUX_CPU_N D
55 eDP_AUX_CPU_P
55 EDP_HPD 1 OF 21
CPU1A
24 L_BKLT_EN
55 eDP_VDD_EN
55 L_BKLT_CTRL
eDP_TX_CPU_P3 AC2 AY2 USB1_TCSS_RX_P1
eDP_TX_CPU_N3 AC1 DDIA_TXP3 TCP0_TXRX_P1 AY1 USB1_TCSS_RX_N1
eDP_TX_CPU_P2 AD2 DDIA_TXN3 TCP0_TXRX_N1 BB1 USB1_TCSS_RX_P0
HDMI eDP_TX_CPU_N2 AD1 DDIA_TXP2
DDIA_TXN2
TCP0_TXRX_P0
TCP0_TXRX_N0
BB2 USB1_TCSS_RX_N0
eDP_TX_CPU_P1 AF1 AM5 USB1_TCSS_TX_P1
57 HDMI_DDI_TX_P3
eDP_TX_CPU_N1 AF2 DDIA_TXP1 TCP0_TX_P1 AM7 USB1_TCSS_TX_N1 TBT
57
57
HDMI_DDI_TX_N3
HDMI_DDI_TX_P0
eDP eDP_TX_CPU_P0 AG2 DDIA_TXN1
DDIA_TXP0
TCP0_TX_N1
TCP0_TX_P0
AT7 USB1_TCSS_TX_P0
eDP_TX_CPU_N0 AG1 AT5 USB1_TCSS_TX_N0
57 HDMI_DDI_TX_N0 DDIA_TXN0 TCP0_TX_N0 AP7 USB1_TCSS_AUX_P
57 HDMI_DDI_TX_P1 TCP0_AUX_P
eDP_AUX_CPU_P AJ2 AP5 USB1_TCSS_AUX_N
57 HDMI_DDI_TX_N1 DDIA_AUX_P TCP0_AUX_N
eDP_AUX_CPU_N AJ1
57 HDMI_DDI_TX_P2 DDIA_AUX_N
57 HDMI_DDI_TX_N2 AT2
DN4 TCP1_TXRX_P1 AT1
TP401 1GPP_E23 DT6 GPP_E22/DDPA_CTRLCLK/DNX_FORCE_RELOAD TCP1_TXRX_N1 AU1
57 CPU_DPB_CTRL_CLK GPP_E23/DDPA_CTRLDATA TCP1_TXRX_P0 AU2
57 CPU_DPB_CTRL_DATA EDP_HPD TCP1_TXRX_N0
DR5 AD5
57 CPU_DISP_HPDB
eDP GPP_E14/DDSP_HPDA/DISP_MISCA TCP1_TX_P1
TCP1_TX_N1
AD7
HDMI_DDI_TX_P3 T12 AH7
HDMI_DDI_TX_N3 T11 DDIB_TXP3 TCP1_TX_P0 AH5
HDMI_DDI_TX_P0 Y11 DDIB_TXN3 TCP1_TX_N0 AF7
HDMI_DDI_TX_N0 Y9 DDIB_TXP2 TCP1_AUX_P AF5
HDMI_DDI_TX_P1 T9 DDIB_TXN2 TCP1_AUX_N
C HDMI_DDI_TX_N1 P9 DDIB_TXP1 BF1 C
TBT HDMI_DDI_TX_P2 V11 DDIB_TXN1
DDIB_TXP0
TCP2_TXRX_P1
TCP2_TXRX_N1
BF2
HDMI_DDI_TX_N2 V9 BE2
71 USB1_TCSS_TX_N0 DDIB_TXN0 TCP2_TXRX_P0 BE1
71
71
USB1_TCSS_TX_P0
USB1_TCSS_TX_N1
HDMI AB9
DDIB_AUX_P
TCP2_TXRX_N0
TCP2_TX_P1
BD7
AD9 BD5
71 USB1_TCSS_TX_P1 DDIB_AUX_N TCP2_TX_N1 AY5
71 USB1_TCSS_RX_N0 CPU_DPB_CTRL_CLK TCP2_TX_P0
DM29 AY7
71 USB1_TCSS_RX_P0 CPU_DPB_CTRL_DATA GPP_H16/DDPB_CTRLCLK/PCIE_LNK_DOWN TCP2_TX_N0
DK27 BB5
71 USB1_TCSS_RX_N1 GPP_H17/DDPB_CTRLDATA TCP2_AUX_P BB7
71 USB1_TCSS_RX_P1 CPU_DISP_HPDB TCP2_AUX_N
DG43
GPP_A18/DDSP_HPDB/DISP_MISCB/I2S4_RXD BK1
DG47 TCP3_TXRX_P1 BK2
71 TBT_LSX0_TXD KB_DET# GPP_A21/DDPC_CTRLCLK/I2S5_TXD TCP3_TXRX_N1
DJ47 BJ2
15,71 TBT_LSX0_RXD GPP_A22/DDPC_CTRLDATA/I2S5_RXD TCP3_TXRX_P0 BJ1
TBT_LSX0_TXD DU8 TCP3_TXRX_N0 BM7
71
71
USB1_TCSS_AUX_P
USB1_TCSS_AUX_N
TBT TBT_LSX0_RXD DV8 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD
GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD
TCP3_TX_P1
TCP3_TX_N1
BM5
BH5
DF6 TCP3_TX_P0 BH7
GPP_E21 DD6 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP3_TX_N0 BK5
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD TCP3_AUX_P BK7
DN23 TCP3_AUX_N
GPP_D10 DM23 GPP_D9/ISH_SPI_CS#/DDP3_CTRLCLK/TBT_LSX2_TXD/GSPI2_CS0# AN2 TCSS_RCOMP_P
DN4: WWAN_GPO_PEREST# GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/TBT_LSX2_RXD/GSPI2_CLK TC_RCOMP_P AN1 TCSS_RCOMP_N R402 1 2 150R2F-1-GP
Other DT6: WWAN_CARD_PWR_OFF# DK23
GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/TBT_LSX3_TXD/GSPI2_MISO
TC_RCOMP_N
DG47: 3.3V_CAM_EN GPP_D12 DN21 M8
DF6: TBT_LSX1_TXD GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/TBT_LSX3_RXD/GSPI2_MOSI DSI_DE_TE_2
15 GPP_E21 DN23: SENSOR_DB_DET# DISP_RCOMP
DF43 AB1 R401 1 2 150R2F-1-GP
DD6: TBT_LSX1_RXD CPU_DISP_HPD1 DF45 GPP_A17/DISP_MISCC/I2S4_TXD DDI_RCOMP
B 15 GPP_D12 DK23: CPU_DDP4_CTRL_CLK TBT DF47 GPP_A19/DDSP_HPD1/DISP_MISC1/I2S5_SCLK
GPP_A20/DDSP_HPD2/DISP_MISC2/I2S5_SFRM DISP_UTILS/DSI_DE_TE_1
CE4 B
DN21: CPU_DDP4_CTRL_DATA
15 GPP_D10 DF47: CPU_DISP_HPD2 USB_OC1# DH52
DH52: USB_OC1# SOC_OC_FAULT DK45 GPP_A14/USB_OC1#/DDSP_HPD3/I2S3_RXD/DISP_MISC3/DMIC_CLK_B1
65 KB_DET# GPP_A15/USB_OC2#/DDSP_HPD4/DISP_MISC4/I2S4_SCLK
DK45: CPU_DISP_HPD4
eDP_VDD_EN DM8
72 SOC_OC_FAULT EDP_VDDEN
L_BKLT_EN DN8
16 USB_OC1#
eDP L_BKLT_CTRL DG10 EDP_BKLTEN
EDP_BKLTCTL
TGL-U-1-GP-U2
USB3.2 Type-A Port2 (IO) ZZ.00CPU.481
R404
2 1 CPU_DISP_HPD1
DY
100KR2J-1-GP
20191209(EVT)
3D3V_S0 Add R403 PU 10k
R403 1 2 10KR2J-3-GP KB_DET#
A A
<Core Design>
Wistron Corporation
Title
CPU (DDI/EDP/TBT)
A3
5 4 3 2 1
5 4 3 2 1
CPU1B 2 OF 21
LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD Flip
M_A_DQ7 CP53 BT42 M_B_CLK1
12 M_A_DQ[31:0] M_A_DQ0 13 M_C_DQ[31:0] M_C_DQ0 M_A_DQ6 DDR0_DQ0_7/DDR0_DQ0_7/DDR0_DQ0_7 DDR0_CLK_P1/DDR3_CLK_P/DDR3_CLK_P/DDR3_CLK_P M_B_CLK1#
CP52 BT41
M_A_DQ1 M_C_DQ1 M_A_DQ5 CP50 DDR0_DQ0_6/DDR0_DQ0_6/DDR0_DQ0_6 DDR0_CLK_N1/DDR3_CLK_N/DDR3_CLK_N/DDR3_CLK_N BP52 M_B_CLK0
M_A_DQ2 M_C_DQ2 M_A_DQ4 CP49 DDR0_DQ0_5/DDR0_DQ0_5/DDR0_DQ0_5 NC/DDR2_CLK_P/DDR2_CLK_P/DDR2_CLK_P BP53 M_B_CLK0#
M_A_DQ3
M_A_DQ4
M_C_DQ3
M_C_DQ4
M_A_DQ[7:0] M_A_DQ3
M_A_DQ2
CU53 DDR0_DQ0_4/DDR0_DQ0_4/DDR0_DQ0_4
DDR0_DQ0_3/DDR0_DQ0_3/DDR0_DQ0_3
NC/DDR2_CLK_N/DDR2_CLK_N/DDR2_CLK_N
NC/DDR1_CLK_P/DDR1_CLK_P/DDR1_CLK_P
CD42 M_A_CLK1
M_A_CLK1#
CU52 CD41
M_A_DQ5 M_C_DQ5 M_A_DQ1 CU50 DDR0_DQ0_2/DDR0_DQ0_2/DDR0_DQ0_2 NC/DDR1_CLK_N/DDR1_CLK_N/DDR1_CLK_N CC52 M_A_CLK0
M_A_DQ6 M_C_DQ6 M_A_DQ0 CU49 DDR0_DQ0_1/DDR0_DQ0_1/DDR0_DQ0_1 DDR0_CLK_P0/DDR0_CLK_P/DDR0_CLK_P/DDR0_CLK_P CC53 M_A_CLK0#
M_A_DQ7 M_C_DQ7 M_A_DQ15 CH53 DDR0_DQ0_0/DDR0_DQ0_0/DDR0_DQ0_0 DDR0_CLK_N0/DDR0_CLK_N/DDR0_CLK_N/DDR0_CLK_N
M_A_DQ8 M_C_DQ8 M_A_DQ14 CH52 DDR0_DQ1_7/DDR0_DQ1_7/DDR0_DQ1_7 BT45 M_B_CKE2
M_A_DQ9 M_C_DQ9 M_A_DQ13 CH50 DDR0_DQ1_6/DDR0_DQ1_6/DDR0_DQ1_6 NC/DDR3_CKE0/DDR3_WCK_P/DDR3_WCK_P BT47 M_B_CKE3
M_A_DQ10 M_C_DQ10 M_A_DQ12 CH49 DDR0_DQ1_5/DDR0_DQ1_5/DDR0_DQ1_5 NC/DDR3_CKE1/DDR3_WCK_N/DDR3_WCK_N BN51 M_B_CKE0
M_A_DQ11
M_A_DQ12
M_C_DQ11
M_C_DQ12
M_A_DQ[15:8] M_A_DQ11
M_A_DQ10
CL53 DDR0_DQ1_4/DDR0_DQ1_4/DDR0_DQ1_4
NC/DDR2_CKE0/DDR2_WCK_P/DDR2_WCK_P
NC/DDR2_CKE1/DDR2_WCK_N/DDR2_WCK_N
BN53 M_B_CKE1
M_A_CKE2
CL52 CD45
M_A_DQ13 M_C_DQ13 M_A_DQ9 CL50 DDR0_DQ1_2/DDR0_DQ1_2/DDR0_DQ1_2 NC/DDR1_CKE0/DDR1_WCK_P/DDR1_WCK_P CD47 M_A_CKE3
M_A_DQ14 M_C_DQ14 M_A_DQ8 CL49 DDR0_DQ1_1/DDR0_DQ1_1/DDR0_DQ1_1 NC/DDR1_CKE1/DDR1_WCK_N/DDR1_WCK_N CA51 M_A_CKE0
M_A_DQ15 M_C_DQ15 M_A_DQ23 CT47 DDR0_DQ1_0/DDR0_DQ1_0/DDR0_DQ1_0 NC/DDR0_CKE0/DDR0_WCK_P/DDR0_WCK_P CA53 M_A_CKE1
M_A_DQ16 M_C_DQ16 M_A_DQ22 CV47 DDR1_DQ0_7/DDR0_DQ2_7/DDR1_DQ0_7 NC/DDR0_CKE1/DDR0_WCK_N/DDR0_WCK_N
M_A_DQ17 M_C_DQ17 M_A_DQ21 CT45 DDR1_DQ0_6/DDR0_DQ2_6/DDR1_DQ0_6 BU52 M_B_A4
D D
M_A_DQ18 M_C_DQ18 M_A_DQ20 CV45 DDR1_DQ0_5/DDR0_DQ2_5/DDR1_DQ0_5 DDR0_CKE1/DDR2_CA4/DDR2_CA5/DDR2_CA1 BL50 M_B_A5
M_A_DQ19
M_A_DQ20
M_C_DQ19
M_C_DQ20
M_A_DQ[23:16] M_A_DQ19
M_A_DQ18
CT42 DDR1_DQ0_4/DDR0_DQ2_4/DDR1_DQ0_4
DDR0_CKE0/DDR2_CA5/DDR2_CA6/DDR2_CA0
M_A_B1
CV42 CF42
M_A_DQ21 M_C_DQ21 M_A_DQ17 CT41 DDR1_DQ0_2/DDR0_DQ2_2/DDR1_DQ0_2 DDR0_CS1/DDR1_CA1/DDR1_CA1/DDR1_CA5 CF47
M_A_DQ22 M_C_DQ22 M_A_DQ16 CV41 DDR1_DQ0_1/DDR0_DQ2_1/DDR1_DQ0_1 DDR0_CS0/NC/DDR1_CS1/DDR1_CA4
M_A_DQ23 M_C_DQ23 M_A_DQ31 CK47 DDR1_DQ0_0/DDR0_DQ2_0/DDR1_DQ0_0 CE53 M_A_A0
M_A_DQ24 M_C_DQ24 M_A_DQ30 CM47 DDR1_DQ1_7/DDR0_DQ3_7/DDR1_DQ1_7 NC/DDR0_CA0/DDR0_CA0/DDR0_CA6 CE50 M_A_A1
M_A_DQ25 M_C_DQ25 M_A_DQ29 CK45 DDR1_DQ1_6/DDR0_DQ3_6/DDR1_DQ1_6 NC/DDR0_CA1/DDR0_CA1/DDR0_CA5 BL53 M_B_CS#0
M_A_DQ26 M_C_DQ26 M_A_DQ28 CM45 DDR1_DQ1_5/DDR0_DQ3_5/DDR1_DQ1_5 NC/DDR2_CS0/DDR2_CA2/DDR2_CA2 BP47 M_B_B5
M_A_DQ27
M_A_DQ28
M_C_DQ27
M_C_DQ28
M_A_DQ[31:24] M_A_DQ27
M_A_DQ26
CK42 DDR1_DQ1_4/DDR0_DQ3_4/DDR1_DQ1_4
NC/DDR3_CA5/DDR3_CA6/DDR3_CA0
NC/DDR3_CA4/DDR3_CA5/DDR3_CA1
BP42 M_B_B4
M_B_B3
CM42 BP45
M_A_DQ29 M_C_DQ29 M_A_DQ25 CM41 DDR1_DQ1_2/DDR0_DQ3_2/DDR1_DQ1_2 NC/DDR3_CA3/DDR3_CA4/DDR3_CS1 BP44 M_B_B2
M_A_DQ30 M_C_DQ30 M_A_DQ24 CK41 DDR1_DQ1_1/DDR0_DQ3_1/DDR1_DQ1_1 NC/DDR3_CA2/DDR3_CA3/DDR3_CS0
M_A_DQ31 M_C_DQ31 M_B_DQ7 BF53 DDR1_DQ1_0/DDR0_DQ3_0/DDR1_DQ1_0 BB44 M_B_DQS_DP3
M_B_DQ6 BF52 DDR2_DQ0_7/DDR0_DQ4_7/DDR0_DQ2_7 DDR3_DQSP_1/DDR0_DQSP_7/DDR1_DQSP_3 BD44 M_B_DQS_DN3
M_B_DQ5 BF50 DDR2_DQ0_6/DDR0_DQ4_6/DDR0_DQ2_6 DDR3_DQSN_1/DDR0_DQSN_7/DDR1_DQSN_3 BK44 M_B_DQS_DP2
12 M_A_DQS_DN[3:0] M_A_DQS_DN0 13 M_C_DQS_DN[3:0] M_C_DQS_DN0 M_B_DQ4 DDR2_DQ0_5/DDR0_DQ4_5/DDR0_DQ2_5 DDR3_DQSP_0/DDR0_DQSP_6/DDR1_DQSP_2 M_B_DQS_DN2
BF49 BH44
M_A_DQS_DN1
M_A_DQS_DN2
M_C_DQS_DN1
M_C_DQS_DN2
M_B_DQ[7:0] M_B_DQ3
M_B_DQ2
BH53 DDR2_DQ0_4/DDR0_DQ4_4/DDR0_DQ2_4
DDR3_DQSN_0/DDR0_DQSN_6/DDR1_DQSN_2
DDR2_DQSP_1/DDR0_DQSP_5/DDR0_DQSP_3
BA51 M_B_DQS_DP1
M_B_DQS_DN1
BH52 BA50
M_A_DQS_DN3 M_C_DQS_DN3 M_B_DQ1 BH50 DDR2_DQ0_2/DDR0_DQ4_2/DDR0_DQ2_2 DDR2_DQSN_1/DDR0_DQSN_5/DDR0_DQSN_3 BG51 M_B_DQS_DP0
M_B_DQ0 BH49 DDR2_DQ0_1/DDR0_DQ4_1/DDR0_DQ2_1 DDR2_DQSP_0/DDR0_DQSP_4/DDR0_DQSP_2 BG50 M_B_DQS_DN0
M_B_DQ15 AY53 DDR2_DQ0_0/DDR0_DQ4_0/DDR0_DQ2_0 DDR2_DQSN_0/DDR0_DQSN_4/DDR0_DQSN_2 CK44 M_A_DQS_DP3
12 M_A_DQS_DP[3:0] M_A_DQS_DP0 13 M_C_DQS_DP[3:0] M_C_DQS_DP0 M_B_DQ14 DDR2_DQ1_7/DDR0_DQ5_7/DDR0_DQ3_7 DDR1_DQSP_1/DDR0_DQSP_3/DDR1_DQSP_1 M_A_DQS_DN3
AY52 CM44
M_A_DQS_DP1 M_C_DQS_DP1 M_B_DQ13 AY50 DDR2_DQ1_6/DDR0_DQ5_6/DDR0_DQ3_6 DDR1_DQSN_1/DDR0_DQSN_3/DDR1_DQSN_1 CT44 M_A_DQS_DP2
M_A_DQS_DP2 M_C_DQS_DP2 M_B_DQ12 AY49 DDR2_DQ1_5/DDR0_DQ5_5/DDR0_DQ3_5 DDR1_DQSP_0/DDR0_DQSP_2/DDR1_DQSP_0 CV44 M_A_DQS_DN2
M_A_DQS_DP3 M_C_DQS_DP3 M_B_DQ[15:8] M_B_DQ11
M_B_DQ10
BC53 DDR2_DQ1_4/DDR0_DQ5_4/DDR0_DQ3_4
CK51 M_A_DQS_DP1
M_A_DQS_DN1
BC52 CK50
M_B_DQ9 BC50 DDR2_DQ1_2/DDR0_DQ5_2/DDR0_DQ3_2 DDR0_DQSN_1/DDR0_DQSN_1/DDR0_DQSN_1 CR51 M_A_DQS_DP0
M_B_DQ8 BC49 DDR2_DQ1_1/DDR0_DQ5_1/DDR0_DQ3_1 DDR0_DQSP_0/DDR0_DQSP_0/DDR0_DQSP_0 CR50 M_A_DQS_DN0
12 M_A_CLK0# 13 M_C_CLK0# M_B_DQ23 BK47 DDR2_DQ1_0/DDR0_DQ5_0/DDR0_DQ3_0 DDR0_DQSN_0/DDR0_DQSN_0/DDR0_DQSN_0
12 M_A_CLK0 13 M_C_CLK0 M_B_DQ22 BK45 DDR3_DQ0_7/DDR0_DQ6_7/DDR1_DQ2_7 CF44 M_A_B0
12 M_A_CLK1# 13 M_C_CLK1# M_B_DQ21 DDR3_DQ0_6/DDR0_DQ6_6/DDR1_DQ2_6 DDR0_ODT1/DDR1_CA0/DDR1_CA0/DDR1_CA6 M_A_CS#2
BH47 CF45
12 M_A_CLK1 13 M_C_CLK1 M_B_DQ20 DDR3_DQ0_5/DDR0_DQ6_5/DDR1_DQ2_5 DDR1_ODT0/DDR1_CS0/DDR1_CA2/DDR1_CA2
BH45
12 M_A_CKE0 13 M_C_CKE0
M_B_DQ[23:16] M_B_DQ19
M_B_DQ18
BH42 DDR3_DQ0_4/DDR0_DQ6_4/DDR1_DQ2_4
DDR3_DQ0_3/DDR0_DQ6_3/DDR1_DQ2_3 DDR0_MA16/DDR1_CA4/DDR1_CA5/DDR1_CA1
CB47 M_A_B4
M_A_B3
BK42 CB44
12 M_A_CKE1 13 M_C_CKE1 M_B_DQ17 DDR3_DQ0_2/DDR0_DQ6_2/DDR1_DQ2_2 DDR0_MA15/DDR1_CA3/DDR1_CA4/DDR1_CS1 M_A_B2
BK41 CB45
12 M_A_CKE2 13 M_C_CKE2 M_B_DQ16 BH41 DDR3_DQ0_1/DDR0_DQ6_1/DDR1_DQ2_1 DDR0_MA14/DDR1_CA2/DDR1_CA3/DDR1_CS0 CF41 M_A_CS#3
12 M_A_CKE3 13 M_C_CKE3 M_B_DQ31 DDR3_DQ0_0/DDR0_DQ6_0/DDR1_DQ2_0 DDR0_MA13/DDR1_CS1/DDR1_CS0/DDR1_CA3 M_B_A1
BD47 BU53
M_B_DQ30 BB47 DDR3_DQ1_7/DDR0_DQ7_7/DDR1_DQ3_7 DDR0_MA12/DDR2_CA1/DDR2_CA1/DDR2_CA5 BT51
12 M_A_CS#0 13 M_C_CS#0 M_B_DQ29 DDR3_DQ1_6/DDR0_DQ7_6/DDR1_DQ3_6 DDR0_MA11/NC/DDR2_CS1/DDR2_CA4 M_B_B1
BD45 BV42
12 M_A_CS#1 13 M_C_CS#1 M_B_DQ28 BB45 DDR3_DQ1_5/DDR0_DQ7_5/DDR1_DQ3_5 DDR0_MA10/DDR3_CA1/DDR3_CA1/DDR3_CA5 BU50 M_B_A0
12
12
M_A_CS#2
M_A_CS#3
13
13
M_C_CS#2
M_C_CS#3
M_B_DQ[31:24] M_B_DQ27
M_B_DQ26
BB42 DDR3_DQ1_4/DDR0_DQ7_4/DDR1_DQ3_4
DDR0_MA9/DDR2_CA0/DDR2_CA0/DDR2_CA6
DDR0_MA8/DDR0_CA2/DDR0_CA3/DDR0_CS0
BY53 M_A_A2
M_A_A4
BB41 CA50
M_B_DQ25 BD42 DDR3_DQ1_2/DDR0_DQ7_2/DDR1_DQ3_2 DDR0_MA7/DDR0_CA4/DDR0_CA5/DDR0_CA1 BY52 M_A_A3
12 M_A_A0 13 M_C_A0 M_B_DQ24 DDR3_DQ1_1/DDR0_DQ7_1/DDR1_DQ3_1 DDR0_MA6/DDR0_CA3/DDR0_CA4/DDR0_CS1 M_A_A5
BD41 BY50
12 M_A_A1 13 M_C_A1 DDR3_DQ1_0/DDR0_DQ7_0/DDR1_DQ3_0 DDR0_MA5/DDR0_CA5/DDR0_CA6/DDR0_CA0 M_A_CS#0
CD51
12 M_A_A2 13 M_C_A2 DDR0_MA4/DDR0_CS0/DDR0_CA2/DDR0_CA2 M_A_CS#1
CD53
12 M_A_A3 13 M_C_A3 DDR0_MA3/DDR0_CS1/DDR0_CS0/DDR0_CA3 BV47 M_B_CS#2
C 12 M_A_A4 13 M_C_A4 DDR0_MA2/DDR3_CS0/DDR3_CA2/DDR3_CA2 CE52 C
12 M_A_A5 13 M_C_A5 DDR0_MA1/NC/DDR0_CS1/DDR0_CA4 BV41
DDR0_MA0/NC/DDR3_CS1/DDR3_CA4
12 M_A_B0 13 M_C_B0 M_B_A2
BN50
12 M_A_B1 13 M_C_B1 DDR0_BG1/DDR2_CA2/DDR2_CA3/DDR2_CS0 M_B_A3
BL52
12 M_A_B2 13 M_C_B2 DDR0_BG0/DDR2_CA3/DDR2_CA4/DDR2_CS1
12 M_A_B3 13 M_C_B3 CB42 M_A_B5
12 M_A_B4 13 M_C_B4 DDR0_BA1/DDR1_CA5/DDR1_CA6/DDR1_CA0 M_B_B0
BV44
12 M_A_B5 13 M_C_B5 DDR0_BA0/DDR3_CA0/DDR3_CA0/DDR3_CA6 1D1V_S3
BT53 M_B_CS#1
DDR0_ACT#/DDR2_CS1/DDR2_CS0/DDR2_CA3
1
BV45 M_B_CS#3 R503
DDR0_PAR/DDR3_CS1/DDR3_CS0/DDR3_CA3
12 M_B_DQ[31:0] M_B_DQ0 13 M_D_DQ[31:0] M_D_DQ0 M_A_ALERT_N
AU50 R501 1 2
M_B_DQ1 M_D_DQ1 DDR0_ALERT# AU49 0R0402-PAD-2-GP
M_B_DQ2 M_D_DQ2 DDR0_VREF_CA 470R2F-GP
2
M_B_DQ3 M_D_DQ3 E52
M_B_DQ4 M_D_DQ4 DDR_VTT_CTL DV47 SM_DRAMRST#_CPU R505 1 2 0R0402-PAD-2-GP SM_DRAMRST#
M_B_DQ5 M_D_DQ5 DRAM_RESET# C49 SM_RCOMP R502 1 2 100R2F-L1-GP-U
M_B_DQ6 M_D_DQ6 DDR_RCOMP
M_B_DQ7 M_D_DQ7
M_B_DQ8 M_D_DQ8 TGL-U-1-GP-U2
M_B_DQ9 M_D_DQ9
M_B_DQ10 M_D_DQ10 ZZ.00CPU.481
M_B_DQ11 M_D_DQ11
M_B_DQ12 M_D_DQ12
M_B_DQ13 M_D_DQ13
M_B_DQ14 M_D_DQ14
M_B_DQ15 M_D_DQ15 CPU1C 3 OF 21
M_B_DQ16 M_D_DQ16
M_B_DQ17 M_D_DQ17
M_B_DQ18 M_D_DQ18 LP4-LP5(NIL)/DDR4 (NIL)/DDR4 (IL) DDR4/LP4/LP5/LP5 CMD
M_C_DQ7 AL53 Flip R41 M_D_CLK1
M_B_DQ19 M_D_DQ19 DDR4_DQ0_7/DDR1_DQ0_7/DDR0_DQ4_7 DDR1_CLK_P1/DDR7_CLK_P/DDR7_CLK_P/DDR7_CLK_P
M_C_DQ6 AL52 R42 M_D_CLK1#
M_B_DQ20 M_D_DQ20 DDR4_DQ0_6/DDR1_DQ0_6/DDR0_DQ4_6 DDR1_CLK_N1/DDR7_CLK_N/DDR7_CLK_N/DDR7_CLK_N
M_C_DQ5 AL50 M52 M_D_CLK0
M_B_DQ21 M_D_DQ21 DDR4_DQ0_5/DDR1_DQ0_5/DDR0_DQ4_5 NC/DDR6_CLK_P/DDR6_CLK_P/DDR6_CLK_P
M_C_DQ4 AL49 M53 M_D_CLK0#
M_B_DQ22
M_B_DQ23
M_D_DQ22
M_D_DQ23
M_C_DQ[7:0] M_C_DQ3
M_C_DQ2
AP53 DDR4_DQ0_4/DDR1_DQ0_4/DDR0_DQ4_4
NC/DDR6_CLK_N/DDR6_CLK_N/DDR6_CLK_N
NC/DDR5_CLK_P/DDR5_CLK_P/DDR5_CLK_P
AC42 M_C_CLK1
M_C_CLK1#
M_B_DQ24 M_D_DQ24 AP52 AC41
M_C_DQ1 AP50 DDR4_DQ0_2/DDR1_DQ0_2/DDR0_DQ4_2 NC/DDR5_CLK_N/DDR5_CLK_N/DDR5_CLK_N Y52 M_C_CLK0
M_B_DQ25 M_D_DQ25 DDR4_DQ0_1/DDR1_DQ0_1/DDR0_DQ4_1 DDR1_CLK_P0/DDR4_CLK_P/DDR4_CLKP/DDR4_CLK_P
M_C_DQ0 AP49 Y53 M_C_CLK0#
M_B_DQ26 M_D_DQ26 DDR4_DQ0_0/DDR1_DQ0_0/DDR0_DQ4_0 DDR1_CLK_N0/DDR4_CLK_N/DDR4_CLK_N/DDR4_CLK_N
M_C_DQ15 AF53
M_B_DQ27 M_D_DQ27 DDR4_DQ1_7/DDR1_DQ1_7/DDR0_DQ5_7
M_C_DQ14 AF52 R47 M_D_CKE2
M_B_DQ28 M_D_DQ28 DDR4_DQ1_6/DDR1_DQ1_6/DDR0_DQ5_6 NC/DDR7_CKE0/DDR7_WCK_P/DDR7_WCK_P
M_C_DQ13 AF50 R45 M_D_CKE3
M_B_DQ29 M_D_DQ29 DDR4_DQ1_5/DDR1_DQ1_5/DDR0_DQ5_5 NC/DDR7_CKE1/DDR7_WCK_N/DDR7_WCK_N
M_C_DQ12 AF49 K51 M_D_CKE0
M_B_DQ30
M_B_DQ31
M_D_DQ30
M_D_DQ31
M_C_DQ[15:8] M_C_DQ11
M_C_DQ10
AH53 DDR4_DQ1_4/DDR1_DQ1_4/DDR0_DQ5_4
NC/DDR6_CKE0/DDR6_WCK_P/DDR6_WCK_P
NC/DDR6_CKE1/DDR6_WCK_N/DDR6_WCK_N
K53 M_D_CKE1
M_C_CKE2
AH52 AC47
M_C_DQ9 AH50 DDR4_DQ1_2/DDR1_DQ1_2/DDR0_DQ5_2 NC/DDR5_CKE0/DDR5_WCK_P/DDR5_WCK_P AC45 M_C_CKE3
12 M_B_DQS_DN[3:0] 13 M_D_DQS_DN[3:0] M_C_DQ8 AH49 DDR4_DQ1_1/DDR1_DQ1_1/DDR0_DQ5_1 NC/DDR5_CKE1/DDR5_WCK_N/DDR5_WCK_N W51 M_C_CKE0
M_B_DQS_DN0 M_D_DQS_DN0 DDR4_DQ1_0/DDR1_DQ1_0/DDR0_DQ5_0 NC/DDR4_CKE0/DDR4_WCK_P/DDR4_WCK_P
M_C_DQ23 AR41 W53 M_C_CKE1
M_B_DQS_DN1 M_D_DQS_DN1 DDR5_DQ0_7/DDR1_DQ2_7/DDR1_DQ4_7 NC/DDR4_CKE1/DDR4_WCK_N/DDR4_WCK_N
B M_C_DQ22 AV42 B
M_B_DQS_DN2 M_D_DQS_DN2 DDR5_DQ0_6/DDR1_DQ2_6/DDR1_DQ4_6
M_C_DQ21 AR42 P52 M_D_A4
M_B_DQS_DN3 M_D_DQS_DN3 DDR5_DQ0_5/DDR1_DQ2_5/DDR1_DQ4_5 DDR1_CKE1/DDR6_CA4/DDR6_CA5/DDR6_CA1
M_C_DQ20 AV41 J50 M_D_A5
M_C_DQ[23:16] M_C_DQ19
M_C_DQ18
AR45 DDR5_DQ0_4/DDR1_DQ2_4/DDR1_DQ4_4
DDR1_CKE0/DDR6_CA5/DDR6_CA6/DDR6_CA0
M_C_B1
12 M_B_DQS_DP[3:0] M_B_DQS_DP0 13 M_D_DQS_DP[3:0] M_D_DQS_DP0 AV45 AE42
M_C_DQ17 AR47 DDR5_DQ0_2/DDR1_DQ2_2/DDR1_DQ4_2 DDR1_CS1/DDR5_CA1/DDR5_CA1/DDR5_CA5 AE47
M_B_DQS_DP1 M_D_DQS_DP1 DDR5_DQ0_1/DDR1_DQ2_1/DDR1_DQ4_1 DDR1_CS0/NC/DDR5_CS1/DDR5_CA4
M_C_DQ16 AV47
M_B_DQS_DP2 M_D_DQS_DP2 DDR5_DQ0_0/DDR1_DQ2_0/DDR1_DQ4_0
M_C_DQ31 AJ41 N42 M_D_B5
M_B_DQS_DP3 M_D_DQS_DP3 DDR5_DQ1_7/DDR1_DQ3_7/DDR1_DQ5_7 NC/DDR7_CA5/DDR7_CA6/DDR7_CA0
M_C_DQ30 AJ42 N45 M_D_B4
M_C_DQ29 AL41 DDR5_DQ1_6/DDR1_DQ3_6/DDR1_DQ5_6 NC/DDR7_CA4/DDR7_CA5/DDR7_CA1 N44 M_D_B3
13 M_D_CLK0# M_C_DQ28 AL42 DDR5_DQ1_5/DDR1_DQ3_5/DDR1_DQ5_5 NC/DDR7_CA3/DDR7_CA4/DDR7_CS1 N47 M_D_B2
12 M_B_CLK0# 13 M_D_CLK0 M_C_DQ[31:24] M_C_DQ27
M_C_DQ26
AJ45 DDR5_DQ1_4/DDR1_DQ3_4/DDR1_DQ5_4
NC/DDR7_CA2/DDR7_CA3/DDR7_CS0
NC/DDR6_CS0/DDR6_CA2/DDR6_CA2
J53 M_D_CS#0
M_C_A1
12 M_B_CLK0 13 M_D_CLK1# AJ47 AC50
12 M_B_CLK1# 13 M_D_CLK1 M_C_DQ25 AL45 DDR5_DQ1_2/DDR1_DQ3_2/DDR1_DQ5_2 NC/DDR4_CA1/DDR4_CA1/DDR4_CA5 AC53 M_C_A0
12 M_B_CLK1 M_C_DQ24 AL47 DDR5_DQ1_1/DDR1_DQ3_1/DDR1_DQ5_1 NC/DDR4_CA0/DDR4_CA0/DDR4_CA6
13 M_D_CKE0 M_D_DQ7 A43 DDR5_DQ1_0/DDR1_DQ3_0/DDR1_DQ5_0 K36 M_D_DQS_DP3
12 M_B_CKE0 13 M_D_CKE1 M_D_DQ6 B43 DDR6_DQ0_7/DDR1_DQ4_7/DDR0_DQ6_7 DDR7_DQSP_1/DDR1_DQSP_7/DDR1_DQSP_7 K38 M_D_DQS_DN3
12 M_B_CKE1 13 M_D_CKE2 M_D_DQ5 D43 DDR6_DQ0_6/DDR1_DQ4_6/DDR0_DQ6_6 DDR7_DQSN_1/DDR1_DQSN_7/DDR1_DQSN_7 G44 M_D_DQS_DP2
12 M_B_CKE2 13 M_D_CKE3 M_D_DQ4 E44 DDR6_DQ0_5/DDR1_DQ4_5/DDR0_DQ6_5 DDR7_DQSP_0/DDR1_DQSP_6/DDR1_DQSP_6 J44 M_D_DQS_DN2
12 M_B_CKE3 M_D_DQ[7:0] M_D_DQ3
M_D_DQ2
A46 DDR6_DQ0_4/DDR1_DQ4_4/DDR0_DQ6_4
D39 M_D_DQS_DP1
M_D_DQS_DN1
13 M_D_CS#0 B46 C39
12 M_B_CS#0 13 M_D_CS#1 M_D_DQ1 D46 DDR6_DQ0_2/DDR1_DQ4_2/DDR0_DQ6_2 DDR6_DQSN_1/DDR1_DQSN_5/DDR0_DQSN_7 C45 M_D_DQS_DP0
12 M_B_CS#1 13 M_D_CS#2 M_D_DQ0 E47 DDR6_DQ0_1/DDR1_DQ4_1/DDR0_DQ6_1 DDR6_DQSP_0/DDR1_DQSP_4/DDR0_DQSP_6 D45 M_D_DQS_DN0
12 M_B_CS#2 13 M_D_CS#3 M_D_DQ15 E38 DDR6_DQ0_0/DDR1_DQ4_0/DDR0_DQ6_0 DDR6_DQSN_0/DDR1_DQSN_4/DDR0_DQSN_6 AJ44 M_C_DQS_DP3
12 M_B_CS#3 M_D_DQ14 D38 DDR6_DQ1_7/DDR1_DQ5_7/DDR0_DQ7_7 DDR5_DQSP_1/DDR1_DQSP_3/DDR1_DQSP_5 AL44 M_C_DQS_DN3
13 M_D_A0 M_D_DQ13 B38 DDR6_DQ1_6/DDR1_DQ5_6/DDR0_DQ7_6 DDR5_DQSN_1/DDR1_DQSN_3/DDR1_DQSN_5 AV44 M_C_DQS_DP2
12 M_B_A0 13 M_D_A1 M_D_DQ12 A38 DDR6_DQ1_5/DDR1_DQ5_5/DDR0_DQ7_5 DDR5_DQSP_0/DDR1_DQSP_2/DDR1_DQSP_4 AR44 M_C_DQS_DN2
12 M_B_A1 13 M_D_A2 M_D_DQ[15:8] M_D_DQ11
M_D_DQ10
E41 DDR6_DQ1_4/DDR1_DQ5_4/DDR0_DQ7_4
AG51 M_C_DQS_DP1
M_C_DQS_DN1
12 M_B_A2 13 M_D_A3 D40 AG50
12 M_B_A3 13 M_D_A4 M_D_DQ9 B40 DDR6_DQ1_2/DDR1_DQ5_2/DDR0_DQ7_2 DDR4_DQSN_1/DDR1_DQSN_1/DDR0_DQSN_5 AN51 M_C_DQS_DP0
12 M_B_A4 13 M_D_A5 M_D_DQ8 A40 DDR6_DQ1_1/DDR1_DQ5_1/DDR0_DQ7_1 DDR4_DQSP_0/DDR1_DQSP_0/DDR0_DQSP_4 AN50 M_C_DQS_DN0
12 M_B_A5 M_D_DQ23 G42 DDR6_DQ1_0/DDR1_DQ5_0/DDR0_DQ7_0 DDR4_DQSN_0/DDR1_DQSN_0/DDR0_DQSN_4
13 M_D_B0 M_D_DQ22 G41 DDR7_DQ0_7/DDR1_DQ6_7/DDR1_DQ6_7 AE44 M_C_B0
12 M_B_B0 13 M_D_B1 M_D_DQ21 J41 DDR7_DQ0_6/DDR1_DQ6_6/DDR1_DQ6_6 DDR1_ODT1/DDR5_CA0/DDR5_CA0/DDR5_CA6 AE45 M_C_CS#2
12 M_B_B1 13 M_D_B2 M_D_DQ20 J42 DDR7_DQ0_5/DDR1_DQ6_5/DDR1_DQ6_5 DDR1_ODT0/DDR5_CS0/DDR5_CA2/DDR5_CA2
12 M_B_B2 13 M_D_B3 M_D_DQ[23:16] M_D_DQ19
M_D_DQ18
G45 DDR7_DQ0_4/DDR1_DQ6_4/DDR1_DQ6_4
DDR7_DQ0_3/DDR1_DQ6_3/DDR1_DQ6_3 DDR1_MA16/DDR5_CA4/DDR5_CA5/DDR5_CA1
AA47 M_C_B4
M_C_B3
12 M_B_B3 13 M_D_B4 J45 AA44
12 M_B_B4 13 M_D_B5 M_D_DQ17 G47 DDR7_DQ0_2/DDR1_DQ6_2/DDR1_DQ6_2 DDR1_MA15/DDR5_CA3/DDR5_CA4/DDR5_CS1 AA45 M_C_B2
12 M_B_B5 M_D_DQ16 J47 DDR7_DQ0_1/DDR1_DQ6_1/DDR1_DQ6_1 DDR1_MA14/DDR5_CA2/DDR5_CA3/DDR5_CS0 AE41 M_C_CS#3
M_D_DQ31 G38 DDR7_DQ0_0/DDR1_DQ6_0/DDR1_DQ6_0 DDR1_MA13/DDR5_CS1/DDR5_CS0/DDR5_CA3 P53 M_D_A1
M_D_DQ30 G36 DDR7_DQ1_7/DDR1_DQ7_7/DDR1_DQ7_7 DDR1_MA12/DDR6_CA1/DDR6_CA1/DDR6_CA5 N51
M_D_DQ29 H36 DDR7_DQ1_6/DDR1_DQ7_6/DDR1_DQ7_6 DDR1_MA11/NC/DDR6_CS1/DDR6_CA4 U42 M_D_B1
M_D_DQ28 H38 DDR7_DQ1_5/DDR1_DQ7_5/DDR1_DQ7_5 DDR1_MA10/DDR7_CA1/DDR7_CA1/DDR7_CA5 P50 M_D_A0
M_D_DQ[31:24] M_D_DQ27
M_D_DQ26
N36 DDR7_DQ1_4/DDR1_DQ7_4/DDR1_DQ7_4
DDR1_MA9/DDR6_CA0/DDR6_CA0/DDR6_CA6
DDR1_MA8/DDR4_CA2/DDR4_CA3/DDR4_CS0
U53 M_C_A2
M_C_A4
L36 W50
M_D_DQ25 L38 DDR7_DQ1_2/DDR1_DQ7_2/DDR1_DQ7_2 DDR1_MA7/DDR4_CA4/DDR4_CA5/DDR4_CA1 U52 M_C_A3
M_D_DQ24 N38 DDR7_DQ1_1/DDR1_DQ7_1/DDR1_DQ7_1 DDR1_MA6/DDR4_CA3/DDR4_CA4/DDR4_CS1 U50 M_C_A5
DDR7_DQ1_0/DDR1_DQ7_0/DDR1_DQ7_0 DDR1_MA5/DDR4_CA5/DDR4_CA6/DDR4_CA0 AA51 M_C_CS#0
12,13 SM_DRAMRST# DDR1_MA4/DDR4_CS0/DDR4_CA2/DDR4_CA2 AA53 M_C_CS#1
A DDR1_MA3/DDR4_CS1/DDR4_CS0/DDR4_CA3 U47 M_D_CS#2 A
DDR1_MA2/DDR7_CS0/DDR7_CA2/DDR7_CA2 AC52
DDR1_MA1/NC/DDR4_CS1/DDR4_CA4 U41
DDR1_MA0/NC/DDR7_CS1/DDR7_CA4
K50 M_D_A2
DDR1_BG1/DDR6_CA2/DDR6_CA3/DDR6_CS0 J52 M_D_A3
DDR1_BG0/DDR6_CA3/DDR6_CA4/DDR6_CS1
AA42 M_C_B5
DDR1_BA1/DDR5_CA5/DDR5_CA6/DDR5_CA0 U44 M_D_B0
DDR1_BA0/DDR7_CA0/DDR7_CA0/DDR7_CA6
N53 M_D_CS#1 <Core Design>
DDR1_ACT#/DDR6_CS1/DDR6_CS0/DDR6_CA3
U45 M_D_CS#3
DDR1_PAR/DDR7_CS1/DDR7_CS0/DDR7_CA3
AU53 M_B_ALERT_N
Wistron Corporation
R504 1 2 0R0402-PAD-2-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR1_ALERT# AU52 Taipei Hsien 221, Taiwan, R.O.C.
DDR1_VREF_CA
Title
TGL-U-1-GP-U2 CPU (DDR)
ZZ.00CPU.481 Size Document Number Rev
Custom
5 4 3 2 1
5 4 3 2 1

CPU1T 20 OF 21
1D05V_VCCIO_OUT
T15 A51 TP_RSVD_A51 1 TP607

RN603 CFG14 V17 CFG15 RSVD_TP#A51 B51 TP_RSVD_B51 1 TP608
D D
1 4 BPM_N0 U15 CFG14 RSVD_TP#B51
2 3 BPM_N1 K11 CFG13 C1 TP_RSVD_C1 1 TP609
CFG11 K12 CFG12 RSVD_TP#C1 D2 TP_RSVD_D2 1 TP610 607872 Ver0.9 page350 recommend
SRN10KJ-5-GP CFG10 K9 CFG11 RSVD_TP#D2
CFG9 T17 CFG10 CP39
RN602 K7 CFG9 RSVD_TP#CP39 CU40
1 4 BPM_N2 CFG7 H7 CFG8 RSVD_TP#CU40 AK9
2 3 BPM_N3 K8 CFG7 RSVD#AK9
H9 CFG6 AH9
SRN10KJ-5-GP CFG4 E6 CFG5 RSVD#AH9
CFG3 H5 CFG4 DW6
CFG2 E9 CFG3 RSVD#DW6 DV6
CFG1 D9 CFG2 RSVD#DV6
E7 CFG1 DV4
CFG0 RSVD_TP#DV4 DW3 TP_RSVD_DW 3 1 TP606
CFG_RCOMP B5 RSVD_TP#DW3
CFG_RCOMP DU1
CFG_RCOMP R605 1 2 49D9R2F-GP TP613 1 CFG17 U17 RSVD_TP#DU1 DT2
TP614 1 CFG16 H11 CFG17 RSVD_TP#DT2
CFG16 DW2 TP_RSVD_DW 2 1 TP604
BPM_N3 Y1 RSVD_TP#DW2 DV2 TP_RSVD_DV2 1 TP605
BPM_N2 M4 BPM#_3 RSVD_TP#DV2
BPM_N1 AB4 BPM#_2 E1 TP_RSVD_E1 1 TP611
607872 Ver0.9 page350 Required TP601 1BPM_N0 Y2 BPM#_1 RSVD_TP#E1 F1 TP_RSVD_F1 1 TP612
BPM#_0 RSVD_TP#F1
A3 AB2
B3 RSVD#A3 RSVD#AB2
RSVD#B3 DR1
1D05V_VCCIO_OUT RSVD_TP#DR1
C 2 1 R611 TCP_MBIAS_RCOMP AR2 DR2 C
2K2R2F-5-GP AL10 RSVD_TP#AR2 RSVD_TP#DR2
AM12 RSVD_TP#AL10 DR53
AH12 RSVD_TP#AM12 RSVD_TP#DR53 DW5
10/09 Follw add R611 PD,Charon AJ10 RSVD_TP#AH12 RSVD_TP#DW5
R621 1 2 1KR2J-1-GP CFG11 RSVD_TP#AJ10
AR1 DV51
RSVD_TP#AR1 VSS DW52 TP_RSVD_DW 52 1 TP602
R634 1 2 1KR2J-1-GP CFG10 TP#DW52 TP_RSVD_DV53 1
BN10 DV53 TP603
BM12 RSVD#BN10 TP#DV53 W34
R622 1 2 1KR2J-1-GP CFG9 RSVD#BM12 RSVD#W34
DD13 V35
DF13 RSVD#DD13 RSVD#V35
R623 1 DY 2 1KR2J-1-GP CFG7 RSVD#DF13 D52
SKTOCC#
R625 1 2 1KR2J-1-GP CFG3
TGL-U-1-GP-U2
R626 1 2 1KR2J-1-GP CFG2
ZZ.00CPU.481
R627 1 2 1KR2J-1-GP CFG1
R601 1 DY 2 1KR2J-1-GP CFG14 20191203(EVT)

Follow PDG reserve
R602 2 1 1KR2J-1-GP CFG7
DY
R603 2 1 1KR2J-1-GP CFG14
DY
R606 2 1 1KR2J-1-GP CFG4
B B
A A
<Core Design>
Wistron Corporation
Title
CPU (CFG/IST)
A3
5 4 3 2 1
5 4 3 2 1
46 VCCCORE_SENSE Follow Hellcat15 Upsell TGL

46 VSSCORE_SENSE 13 OF 21
CPU1M
VCCIN VCCIN
46 SVID_ALERT#_CPU
46 SVID_CLK_CPU 1D05V_VCCST
A24 G32
D A26 VCCIN VCCIN H24 D
46 SVID_DATA_CPU VCCIN VCCIN
A29 H26
A30 VCCIN VCCIN H30 R703 1 2 100R2F-L1-GP-U SVID_DATA_CPU
A33 VCCIN VCCIN H32
A35 VCCIN VCCIN J1 R701 1 2 56R2J-4-GP SVID_ALERT#_CPU
VCCIN VCCIN
20200218(DVT1)
AY39 J2 Change R701 to 56.2 ohm
B24 VCCIN VCCIN K1 R707 1 2 56R2J-4-GP SVID_CLK_CPU
B26 VCCIN VCCIN K2
DY Reverse R707
B29 VCCIN VCCIN K24
B30 VCCIN VCCIN K26
B33 VCCIN VCCIN K30 Layout note:
B35 VCCIN VCCIN K32 3.Length matchin 25mil, and close SOC in 2inch "
BA10 VCCIN VCCIN L24
BA40 VCCIN VCCIN L26
BB39 VCCIN VCCIN L30
BB9 VCCIN VCCIN L32
BC10 VCCIN VCCIN N24 Layout Note:
BC40 VCCIN VCCIN N26
BD39 VCCIN VCCIN N30
BD9 VCCIN VCCIN N32
VCCIN VCCIN
1. Place close to CPU within 2"
C BE10 P24 2. VCC_SENSE/ VSS_SENSE C
BE40 VCCIN VCCIN P26
BF9 VCCIN VCCIN P28 impedance=50 ohm
BG10 VCCIN VCCIN P30 3. Length match<25mil
BG40 VCCIN VCCIN P32 VCCIN
BH12 VCCIN VCCIN T21
BH39 VCCIN VCCIN T23
BH9 VCCIN VCCIN T25 R704 1 2 100R2F-L1-GP-U VCCCORE_SENSE
BJ10 VCCIN VCCIN T27 R705 1 2 100R2F-L1-GP-U VSSCORE_SENSE
BJ40 VCCIN VCCIN T31
BK39 VCCIN VCCIN U23
BL10 VCCIN VCCIN U27
BL40 VCCIN VCCIN U29
BM39 VCCIN VCCIN U31
BN40 VCCIN VCCIN U33
BP12 VCCIN VCCIN V23
BP39 VCCIN VCCIN V25
BR10 VCCIN VCCIN V27
BR40 VCCIN VCCIN V29
BT12 VCCIN VCCIN V31
BT39 VCCIN VCCIN V33
B B
BU10 VCCIN VCCIN W22
BU40 VCCIN VCCIN W24
BV12 VCCIN VCCIN W28
BY12 VCCIN VCCIN W32
CA10 VCCIN VCCIN
CB12 VCCIN R38 VCCCORE_SENSE
D24 VCCIN VCCIN_SENSE R37 VSSCORE_SENSE
D26 VCCIN VSSIN_SENSE
VCCIN
20191203(EVT)
D29 M12 SVID_DATA_CPU Follow Nakia shuri N7
D30 VCCIN VIDSOUT M11 SVID_CLK_CPU
D33 VCCIN VIDSCK P12 SVID_ALERT#_CPU_R R706 1 2 0R0402-PAD-2-GP SVID_ALERT#_CPU
D35 VCCIN VIDALERT#
E24 VCCIN
E26 VCCIN
E27 VCCIN
E29 VCCIN
E30 VCCIN <Core Design>
E32 VCCIN
VCCIN
A
E33
G2 VCCIN Wistron Corporation A
G24 VCCIN 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
G26 VCCIN Taipei Hsien 221, Taiwan, R.O.C.
G30 VCCIN
VCCIN Title
CPU (VCCIN/VID)
TGL-U-1-GP-U2
ZZ.00CPU.481 A4
5 4 3 2 1
5 4 3 2 1

(1.5A) CPU1O 15 OF 21
1D1V_S3
output
AA39 AF9
VDD2 VCCSTG_OUT 1D05V_VCCSTG_OUT
D AB40 AF12 D
AC39 VDD2 VCCSTG AD12
VDD2 VCCSTG input
AD40
AD51 VDD2 AN10 1D05V_VCCSTG_OUT_R R801 1 2
AD52 VDD2 VCCSTG_OUT AM9 0R0402-PAD-2-GP
AE39 VDD2 VCCSTG_OUT AG10
VDD2 VCCSTG_OUT 1D05V_VCCSTG_OUT_R
AF40
AG39 VDD2 V15
VDD2 VCCION_OUT 1D05V_VCCIO_OUT output
AH40
AJ39 VDD2 M9
VDD2 VCCSTG_OUT_LGC 1D05V_VCCSTG_TERM output
AK40
AK51 VDD2 BT2
VDD2 VCCST 1D05V_VCCST (1200mA)
AK52 BT1
AL39 VDD2 VCCST BT4
AM40 VDD2 VCCST
AN39 VDD2 BP2
VDD2 VCCSTG 1D05V_VCCSTG (300mA)
AP40 BP1
AR39 VDD2 VCCSTG BP4
AT52 VDD2 VCCSTG
AU40 VDD2
C AW40 VDD2 C
AW51 VDD2
AW52 VDD2 1D05V_VCCSTG 1D05V_VCCST 1D05V_VCCSTG_OUT_R
BD51 VDD2
BD52 VDD2
BK51 VDD2 C803 C804
VDD2
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
BK52
BV51 VDD2
VDD2
1
BV52 C802 C801
VDD2
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
CA40 DY
CC40 VDD2
2
CC49 VDD2
CC50 VDD2
CE40 VDD2
CG40 VDD2
CH39 VDD2
CJ40 VDD2
CL40 VDD2
CN40 VDD2
VDD2 C803 close to pin AN10, AM9
CP47 C804 close to pin AF12, AD12
CR40 VDD2
B B
D50 VDD2
E51 VDD2
F49 VDD2
T51 VDD2
T52 VDD2
VDD2
TGL-U-1-GP-U2
ZZ.00CPU.481
Lack of VCCPLL_OC / VCC1P8A / VCCPLL
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Title
CPU (VDDQ/VCCST/VCCSTG)
A4
5 4 3 2 1
5 4 3 2 1
D D
CPU1S 19 OF 21
DF53 C53 1D05V_S5_OUT

RSVD#DF53 RSVD#C53 T35
DF52 RSVD#T35 E53
20190430_Byron
RSVD#DF52 RSVD#E53 CF39
1 PCH_IST_TP1 DT52 RSVD#CF39 U35 CPU1D 4 OF 21
TP901 PCH_IST_TP1 RSVD#U35
1
607872 Ver0.9 page350 Optional 1 PCH_IST_TP0 DU53 F53
TP902 PCH_IST_TP0 RSVD#F53 B53 R901
DF50 RSVD#B53 AP9
C
DF49 RSVD#DF50 RSVD#AP9 A52
DY 24D9R2F-L-GP DV24
C
1D8V_ES1_ONLY RSVD#DF49 RSVD#A52 DW47 RSVD#DV24
2
CY30 BF12 DW49 RSVD#DW47
R902 1 2 0R2J-2-GP 1D8V_S5_ES1_CY15 CY15 RSVD_TP#CY30 RSVD_TP#BF12 V21 DP_COMP A48 RSVD#DW49
DY RSVD_TP#CY15 RSVD_TP#V21 W20 RSVD#A48
D4 RSVD_TP#W20 U37
20191203(EVT) RSVD_TP#D4 RSVD_TP#U37
Follow Nakia Shuri N7 20190430_Byron CD39 TGL-U-1-GP-U2
1 IST_TP1 A6 RSVD_TP#CD39 U21
607872 Ver0.9 page350 recommend TP903
1 IST_TP0 A4 IST_TP1 RSVD_TP#U21 CB39 ZZ.00CPU.481
TP904 IST_TP0 RSVD#CB39 BB12
RSVD_TP#BB12 W37
RSVD_TP#W37 AY12
RSVD_TP#AY12 W38 1D8V_ES1_ONLY
RSVD_TP#W38 U38
RSVD_TP#U38 CY28 1D8V_S5_ES1_CY28 R903 1 2 0R2J-2-GP
RSVD_TP#CY28 DY
10/09 follow NTD,charon
TGL-U-1-GP-U2
B
ZZ.00CPU.481 B
<Core Design>
A
Title
CPU (RSVD)
A4
5 4 3 2 1
5 4 3 2 1
Main Func = CPU Follow Hellcat15 Upsell TGL
VCCIN 22uF *12pcs VCCIN

10uF *6pcs
1
1
PC1001 PC1002 PC1003 PC1004
1
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP PC1031 PC1032 PC1033
2
2
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
2
DY DY DY
D D
1
1
PC1005 PC1006 PC1007 PC1008 PC1034 PC1035 PC1036
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
2
2
DY DY DY
1
1
PC1009 PC1010 PC1011 PC1012 PC1022
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP
2
2
1D8V_VCCIN_AUX 22uF *12pcs
10uF *4pcs
1
1
PC1013 PC1014 PC1015 PC1023
SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP SC22U6D3V3MX-1-DL-GP 1D8V_VCCIN_AUX
2
1
PC1026 PC1027
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
2
C C
DY DY
1
PC1016 PC1017 PC1018 PC1024

2
1
PC1028 PC1029
SC10U6D3V3MX-DL-GP SC10U6D3V3MX-DL-GP
2
DY DY
1
PC1019 PC1020 PC1021 PC1025

2
B B
A A
<Core Design>
Wistron Corporation
Title
CPU (CORE Power Cap1)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
1D8V_S5 1D05V_VCCSTG 1D05V_VCCST

C1101
SC10U6D3V3MX-DL-GP C1102 C1103 C1104 C1105 C1106 C1107
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
1
1
D D
DY DY DY DY
2
2
EMC CAPS - PLACE <4mm FROM SOC VDDQ,
PLACE on CPU Same Side WITH EACH PAIR <12mm APART
1D1V_S3 1D1V_S3
C1124 C1125 C1126 FC1128 FC1129 FC1130 C1131 C1132 C1133

SC22U6D3V3MX-1-DL-GP
SC2D2P25V1BN-GP
SC2D2P25V1BN-GP
SC2D2P25V1BN-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
C C
1
1
2
2
PLACE on BACK SIDE

1D1V_S3
B B
C1113 C1114 C1115 C1139 C1140 C1116 C1117 C1118 C1119 C1120 C1121 C1122 C1123
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
1
1
2
2
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Title
CPU (Power Cap2)
A4
5 4 3 2 1
5 4 3 2 1
5 M_A_DQ[31:0] M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
Follow Nakia Shuri N7 BOM change
15NY1$AA
M_A_DQ5 K7HT2$AA
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
DQS_A swizzling map:
M_A_DQ10
M_A_DQ11 RAM4A 1 OF 2 RAM3A 1 OF 2
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_CLK0
M_A_CLK0#
J8
CK_T_A DQ0_A
B2 M_A_DQ2
M_A_DQ3
M_B_CLK0
M_B_CLK0#
J8
CK_T_A DQ0_A
B2 M_B_DQ3
M_B_DQ7
For 4PCS RAM place
J9 C2 J9 C2
M_A_DQ15 CK_C_A DQ1_A E2 M_A_DQ4 CK_C_A DQ1_A E2 M_B_DQ0
M_A_DQ16 M_A_CLK1 P8 DQ2_A F2 M_A_DQ7 M_B_CLK1 P8 DQ2_A F2 M_B_DQ5
M_A_DQ17 M_A_CLK1# P9 CK_T_B DQ3_A F4 M_A_DQ6 M_B_CLK1# P9 CK_T_B DQ3_A F4 M_B_DQ6
M_A_DQ18 CK_C_B DQ4_A E4 M_A_DQ5 CK_C_B DQ4_A E4 M_B_DQ4
D D
M_A_DQ19 M_A_CKE0 J4 DQ5_A C4 M_A_DQ1 M_B_CKE0 J4 DQ5_A C4 M_B_DQ2
M_A_DQ20 M_A_CKE1 J5 CKE0_A DQ6_A B4 M_A_DQ0 M_B_CKE1 J5 CKE0_A DQ6_A B4 M_B_DQ1
M_A_DQ21 CKE1_A DQ7_A B11 M_A_DQ14 CKE1_A DQ7_A B11 M_B_DQ14
M_A_DQ22 M_A_CKE2 P4 DQ8_A C11 M_A_DQ13 M_B_CKE2 P4 DQ8_A C11 M_B_DQ13
M_A_DQ23 M_A_CKE3 P5 CKE0_B DQ9_A E11 M_A_DQ11 M_B_CKE3 P5 CKE0_B DQ9_A E11 M_B_DQ9
M_A_DQ24 CKE1_B DQ10_A F11 M_A_DQ10 CKE1_B DQ10_A F11 M_B_DQ10
M_A_DQ25 DQ11_A F9 M_A_DQ8 DQ11_A F9 M_B_DQ11
M_A_DQ26 M_A_CS#0 H4 DQ12_A E9 M_A_DQ9 M_B_CS#0 H4 DQ12_A E9 M_B_DQ8
M_A_DQ27 M_A_CS#1 H3 CS0_A DQ13_A C9 M_A_DQ15 M_B_CS#1 H3 CS0_A DQ13_A C9 M_B_DQ12
M_A_DQ28 CS1_A DQ14_A B9 M_A_DQ12 CS1_A DQ14_A B9 M_B_DQ15
M_A_DQ29 M_A_CS#2 R4 DQ15_A M_B_CS#2 R4 DQ15_A
M_A_DQ30 M_A_CS#3 R3 CS0_B M_B_CS#3 R3 CS0_B
M_A_DQ31 CS1_B AA2 M_A_DQ19 CS1_B AA2 M_B_DQ22
M_A_A0 H2 DQ0_B Y2 M_A_DQ18 M_B_A0 H2 DQ0_B Y2 M_B_DQ17
5 M_A_DQS_DN[3:0] M_A_DQS_DN0 M_A_A1 CA0_A DQ1_B M_A_DQ16 M_B_A1 CA0_A DQ1_B M_B_DQ18
J2 V2 J2 V2
M_A_DQS_DN1 M_A_A2 H9 CA1_A DQ2_B U2 M_A_DQ17 M_B_A2 H9 CA1_A DQ2_B U2 M_B_DQ16
M_A_DQS_DN2 M_A_A3 H10 CA2_A DQ3_B U4 M_A_DQ21 M_B_A3 H10 CA2_A DQ3_B U4 M_B_DQ20
M_A_DQS_DN3 M_A_A4 H11 CA3_A DQ4_B V4 M_A_DQ22 M_B_A4 H11 CA3_A DQ4_B V4 M_B_DQ19
5 M_A_DQS_DP[3:0]
M_A_A5 J11 CA4_A
CA5_A
DQ5_B
DQ6_B
Y4 M_A_DQ23 M_B_A5 J11 CA4_A
CA5_A
DQ5_B
DQ6_B
Y4 M_B_DQ23 Layout Note:Place as pic..
M_A_DQS_DP0 AA4 M_A_DQ20 AA4 M_B_DQ21
M_A_DQS_DP1 M_A_B0 R2 DQ7_B AA11 M_A_DQ27 M_B_B0 R2 DQ7_B AA11 M_B_DQ27 1P8V_S3
M_A_DQS_DP2
M_A_DQS_DP3
M_A_B1
M_A_B2
P2 CA0_B
CA1_B
DQ8_B
DQ9_B
Y11 M_A_DQ29
M_A_DQ31
M_B_B1
M_B_B2
P2 CA0_B
CA1_B
DQ8_B
DQ9_B
Y11 M_B_DQ30
M_B_DQ28
VDD1
R9 V11 R9 V11
M_A_B3 R10 CA2_B DQ10_B U11 M_A_DQ24 M_B_B3 R10 CA2_B DQ10_B U11 M_B_DQ26 C1203 C1204 C1205 C1206 C1207 C1208 C1209 C1210 C1211 C1212
5 M_A_CLK0# M_A_B4 CA3_B DQ11_B M_A_DQ30 M_B_B4 CA3_B DQ11_B M_B_DQ31
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
R11 U9 R11 U9
5 M_A_CLK0 1D1V_S3 M_A_B5 P11 CA4_B DQ12_B V9 M_A_DQ26 1D1V_S3 M_B_B5 P11 CA4_B DQ12_B V9 M_B_DQ25
5 M_A_CLK1# CA5_B DQ13_B Y9 M_A_DQ25 CA5_B DQ13_B Y9 M_B_DQ24
5 M_A_CLK1 DQ14_B DQ14_B
1
R1201 1 2 0R0402-PAD-2-GP M_A_ODT0 G2 AA9 M_A_DQ28 R1205 1 2 0R0402-PAD-2-GP M_B_ODT0 G2 AA9 M_B_DQ29
R1202 1 2 0R0402-PAD-2-GP M_A_ODT1 T2 ODT_CA_A DQ15_B R1206 1 2 0R0402-PAD-2-GP M_B_ODT1 T2 ODT_CA_A DQ15_B
5 M_A_CKE0 ODT_CA_B ODT_CA_B
5 M_A_CKE1
2
SM_DRAMRST# T11 SM_DRAMRST# T11
5 M_A_CKE2 RESET# D3 M_A_DQS_DP0 RESET# D3 M_B_DQS_DP0
C1202 C1201
5 M_A_CKE3 DQS0_T_A M_A_DQS_DN0 DQS0_T_A M_B_DQS_DN0
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
A1 E3 A1 E3
A2 DNU#A1 DQS0_C_A A2 DNU#A1 DQS0_C_A
5 M_A_CS#0 B1 DNU#A2 D10 M_A_DQS_DP1 B1 DNU#A2 D10 M_B_DQS_DP1
5 M_A_CS#1 DNU#B1 DQS1_T_A DNU#B1 DQS1_T_A
1
1
AA1 E10 M_A_DQS_DN1 AA1 E10 M_B_DQS_DN1 1D1V_S3
5
5
M_A_CS#2
M_A_CS#3 DY AB1 DNU#AA1
DNU#AB1
DQS1_C_A
M_A_DQS_DP2 DY AB1 DNU#AA1
DNU#AB1
DQS1_C_A
M_B_DQS_DP2
VDD2
AB2 W3 AB2 W3
2
2
A11 DNU#AB2 DQS0_T_B V3 M_A_DQS_DN2 A11 DNU#AB2 DQS0_T_B V3 M_B_DQS_DN2 C1214 C1215 C1216 C1217 C1218 C1219 C1220 C1221 C1226 C1227
5 M_A_A0 DNU#A11 DQS0_C_B DNU#A11 DQS0_C_B
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
A12 A12
5 M_A_A1 B12 DNU#A12 W10 M_A_DQS_DP3 B12 DNU#A12 W10 M_B_DQS_DP3
C C
5 M_A_A2 AA12 DNU#B12 DQS1_T_B V10 M_A_DQS_DN3 AA12 DNU#B12 DQS1_T_B V10 M_B_DQS_DN3
5 M_A_A3 DNU#AA12 DQS1_C_B DNU#AA12 DQS1_C_B
1
AB11 AB11
5 M_A_A4 AB12 DNU#AB11 AB12 DNU#AB11
5 M_A_A5 K5 DNU#AB12 K5 DNU#AB12
2
K8 DNU#K5 C3 K8 DNU#K5 C3
5 M_A_B0 N5 DNU#K8 DMI0_A C10 N5 DNU#K8 DMI0_A C10
5 M_A_B1 N8 DNU#N5 DMI1_A N8 DNU#N5 DMI1_A
5 M_A_B2 G11 DNU#N8 Y3 G11 DNU#N8 Y3
5 M_A_B3 DNU#G11 DMI0_B Y10 0D6V_VREF_S0 DNU#G11 DMI0_B Y10
5 M_A_B4 DMI1_B DMI1_B 0D6V_VREF_S0 0D6V_VREF_S0
5 M_A_B5
ZQ0
A5 M_A_ZQ0
M_A_ZQ1
R1210 1 2 240R2F-1-GP
ZQ0
A5 M_B_ZQ0
M_B_ZQ1
R1211 1 2 240R2F-1-GP VDDQ
A8 R1209 1 2 240R2F-1-GP A8 R1212 1 2 240R2F-1-GP
ZQ1 ZQ1 C1222 C1223 C1224 C1225 C1230 C1228
5 M_B_DQ[31:0] M_B_DQ0
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
M_B_DQ1 H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
M_B_DQ2
072.H9HCN.0E0U 072.H9HCN.0E0U
1
M_B_DQ3
M_B_DQ4
M_B_DQ5
2
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9 0D6V_VREF_S0RAM4B 2 OF 2 0D6V_VREF_S0RAM3B 2 OF 2
M_B_DQ10
M_B_DQ11 B3 A3 B3 A3
M_B_DQ12 B5 VDDQ VSS C1 B5 VDDQ VSS C1
M_B_DQ13 D1 VDDQ VSS C5 D1 VDDQ VSS C5
M_B_DQ14 D5 VDDQ VSS D2 D5 VDDQ VSS D2
M_B_DQ15 F3 VDDQ VSS D4 F3 VDDQ VSS D4
M_B_DQ16 U3 VDDQ VSS E1 U3 VDDQ VSS E1
M_B_DQ17 W1 VDDQ VSS E5 W1 VDDQ VSS E5
M_B_DQ18 W5 VDDQ VSS G1 W5 VDDQ VSS G1
M_B_DQ19 AA3 VDDQ VSS G3 AA3 VDDQ VSS G3
M_B_DQ20 AA5 VDDQ VSS G5 AA5 VDDQ VSS G5
M_B_DQ21 B8 VDDQ VSS J1 B8 VDDQ VSS J1
M_B_DQ22 B10 VDDQ VSS J3 B10 VDDQ VSS J3
M_B_DQ23 D8 VDDQ VSS K2 D8 VDDQ VSS K2
M_B_DQ24 D12 VDDQ VSS K4 D12 VDDQ VSS K4
M_B_DQ25 F10 VDDQ VSS N2 F10 VDDQ VSS N2
M_B_DQ26 U10 VDDQ VSS N4 U10 VDDQ VSS N4
B M_B_DQ27 W8 VDDQ VSS P1 W8 VDDQ VSS P1 B
M_B_DQ28 W12 VDDQ VSS P3 W12 VDDQ VSS P3
M_B_DQ29 AA8 VDDQ VSS T1 AA8 VDDQ VSS T1
M_B_DQ30 1P8V_S3 AA10 VDDQ VSS T3 1P8V_S3 AA10 VDDQ VSS T3
M_B_DQ31 VDDQ VSS T5 VDDQ VSS T5
F1 VSS V1 F1 VSS V1
5 M_B_DQS_DN[3:0] M_B_DQS_DN0 G4 VDD1 VSS V5 G4 VDD1 VSS V5
M_B_DQS_DN1 T4 VDD1 VSS W2 T4 VDD1 VSS W2
M_B_DQS_DN2 U1 VDD1 VSS W4 U1 VDD1 VSS W4
M_B_DQS_DN3 G9 VDD1 VSS Y1 G9 VDD1 VSS Y1
F12 VDD1 VSS Y5 F12 VDD1 VSS Y5
5 M_B_DQS_DP[3:0] M_B_DQS_DP0 T9 VDD1 VSS AB3 T9 VDD1 VSS AB3
M_B_DQS_DP1 U12 VDD1 VSS AB5 U12 VDD1 VSS AB5
M_B_DQS_DP2 1D1V_S3 VDD1 VSS A10 1D1V_S3 VDD1 VSS A10
M_B_DQS_DP3 VSS C8 VSS C8
A4 VSS C12 A4 VSS C12
F5 VDD2 VSS D9 F5 VDD2 VSS D9
5 M_B_CLK0# H1 VDD2 VSS D11 H1 VDD2 VSS D11
5 M_B_CLK0 H5 VDD2 VSS E8 H5 VDD2 VSS E8
5 M_B_CLK1# K1 VDD2 VSS E12 K1 VDD2 VSS E12
5 M_B_CLK1 K3 VDD2 VSS G8 K3 VDD2 VSS G8
N1 VDD2 VSS G10 N1 VDD2 VSS G10
5 M_B_CKE0 N3 VDD2 VSS G12 N3 VDD2 VSS G12
5
5
M_B_CKE1
M_B_CKE2
R1
R5
VDD2
VDD2
VSS
VSS
J10
J12
R1
R5
VDD2
VDD2
VSS
VSS
J10
J12
LPDDR4 LPDDR4X
5 M_B_CKE3 U5 VDD2 VSS K9 U5 VDD2 VSS K9
AB4 VDD2 VSS K11 AB4 VDD2 VSS K11
5
5
M_B_CS#0
M_B_CS#1
A9 VDD2
VDD2
VSS
VSS
N9 A9 VDD2
VDD2
VSS
VSS
N9 PWR_VDDQ VDDQ 1.1V 410mA 0.6V 185mA PWR_VDDQ_VTT
F8 N11 F8 N11
5 M_B_CS#2 H8 VDD2 VSS P10 H8 VDD2 VSS P10 PWR_VDDQ_1D8V
5 M_B_CS#3 H12 VDD2
VDD2
VSS
VSS
P12 H12 VDD2
VDD2
VSS
VSS
P12 VDD1 1.8V 6.8mA 1.8V 12mA PWR_VDDQ_1D8V
K10 T8 K10 T8
5 M_B_A0 K12 VDD2 VSS T10 K12 VDD2 VSS T10 PWR_VDDQ
5
5
M_B_A1
M_B_A2
N10 VDD2
VDD2
VSS
VSS
T12 N10 VDD2
VDD2
VSS
VSS
T12 VDD2 1.1V 290mA 1.1V 465mA 1D1V_S3
N12 V8 N12 V8
5 M_B_A3 R8 VDD2 VSS V12 R8 VDD2 VSS V12
5 M_B_A4 R12 VDD2 VSS W9 R12 VDD2 VSS W9
5 M_B_A5 U8 VDD2 VSS W11 U8 VDD2 VSS W11
AB9 VDD2 VSS Y8 AB9 VDD2 VSS Y8
5 M_B_B0 VDD2 VSS Y12 VDD2 VSS Y12
5 M_B_B1 VSS AB8 VSS AB8
A 5 M_B_B2 VSS AB10 VSS AB10 A
5 M_B_B3 VSS VSS
5 M_B_B4
5 M_B_B5
H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
5,13 SM_DRAMRST# 072.H9HCN.0E0U 072.H9HCN.0E0U
<Core Design>
Wistron Corporation
Title
DDR (LPDDR4X-CHA)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
5 M_C_DQ[31:0] M_C_DQ0
M_C_DQ1
M_C_DQ2
M_C_DQ3 Follow Nakia Shuri N7
M_C_DQ4
M_C_DQ5
M_C_DQ6
M_C_DQ7
M_C_DQ8 DQS_B swizzling map:
M_C_DQ9
M_C_DQ10
M_C_DQ11
M_C_DQ12 RAM2A 1 OF 2 RAM1A 1 OF 2
M_C_DQ13
M_C_DQ14
M_C_DQ15
M_C_CLK0
M_C_CLK0#
J8
CK_T_A DQ0_A
B2 M_C_DQ1
M_C_DQ5
M_D_CLK0
M_D_CLK0#
J8
CK_T_A DQ0_A
B2 M_D_DQ1
M_D_DQ0
For 4PCS RAM place
J9 C2 J9 C2
M_C_DQ16 CK_C_A DQ1_A E2 M_C_DQ0 CK_C_A DQ1_A E2 M_D_DQ4
M_C_DQ17 M_C_CLK1 P8 DQ2_A F2 M_C_DQ4 M_D_CLK1 P8 DQ2_A F2 M_D_DQ5
D D
M_C_DQ18 M_C_CLK1# P9 CK_T_B DQ3_A F4 M_C_DQ6 M_D_CLK1# P9 CK_T_B DQ3_A F4 M_D_DQ7
M_C_DQ19 CK_C_B DQ4_A E4 M_C_DQ7 CK_C_B DQ4_A E4 M_D_DQ6
M_C_DQ20 M_C_CKE0 J4 DQ5_A C4 M_C_DQ2 M_D_CKE0 J4 DQ5_A C4 M_D_DQ3
M_C_DQ21 M_C_CKE1 J5 CKE0_A DQ6_A B4 M_C_DQ3 M_D_CKE1 J5 CKE0_A DQ6_A B4 M_D_DQ2
M_C_DQ22 CKE1_A DQ7_A B11 M_C_DQ13 CKE1_A DQ7_A B11 M_D_DQ12
M_C_DQ23 M_C_CKE2 P4 DQ8_A C11 M_C_DQ14 M_D_CKE2 P4 DQ8_A C11 M_D_DQ14
M_C_DQ24 M_C_CKE3 P5 CKE0_B DQ9_A E11 M_C_DQ9 M_D_CKE3 P5 CKE0_B DQ9_A E11 M_D_DQ11
M_C_DQ25 CKE1_B DQ10_A F11 M_C_DQ11 CKE1_B DQ10_A F11 M_D_DQ10
M_C_DQ26 DQ11_A F9 M_C_DQ8 DQ11_A F9 M_D_DQ8
M_C_DQ27 M_C_CS#0 H4 DQ12_A E9 M_C_DQ10 M_D_CS#0 H4 DQ12_A E9 M_D_DQ9
M_C_DQ28 M_C_CS#1 H3 CS0_A DQ13_A C9 M_C_DQ12 M_D_CS#1 H3 CS0_A DQ13_A C9 M_D_DQ13
M_C_DQ29 CS1_A DQ14_A B9 M_C_DQ15 CS1_A DQ14_A B9 M_D_DQ15
M_C_DQ30 M_C_CS#2 R4 DQ15_A M_D_CS#2 R4 DQ15_A
M_C_DQ31 M_C_CS#3 R3 CS0_B M_D_CS#3 R3 CS0_B
CS1_B AA2 M_C_DQ16 CS1_B AA2 M_D_DQ19
5 M_C_DQS_DN[3:0] M_C_DQS_DN0 M_C_A0 DQ0_B M_C_DQ17 M_D_A0 DQ0_B M_D_DQ17
H2 Y2 H2 Y2
M_C_DQS_DN1 M_C_A1 J2 CA0_A DQ1_B V2 M_C_DQ22 M_D_A1 J2 CA0_A DQ1_B V2 M_D_DQ16
M_C_DQS_DN2 M_C_A2 H9 CA1_A DQ2_B U2 M_C_DQ18 M_D_A2 H9 CA1_A DQ2_B U2 M_D_DQ18
M_C_DQS_DN3 M_C_A3 H10 CA2_A DQ3_B U4 M_C_DQ20 M_D_A3 H10 CA2_A DQ3_B U4 M_D_DQ21
M_C_A4 H11 CA3_A DQ4_B V4 M_C_DQ23 M_D_A4 H11 CA3_A DQ4_B V4 M_D_DQ22
5 M_C_DQS_DP[3:0] M_C_DQS_DP0 M_C_A5 J11 CA4_A
CA5_A
DQ5_B
DQ6_B
Y4 M_C_DQ19 M_D_A5 J11 CA4_A
CA5_A
DQ5_B
DQ6_B
Y4 M_D_DQ23 Layout Note:Place as pic..
M_C_DQS_DP1 AA4 M_C_DQ21 AA4 M_D_DQ20
M_C_DQS_DP2 M_C_B0 R2 DQ7_B AA11 M_C_DQ27 M_D_B0 R2 DQ7_B AA11 M_D_DQ31 1P8V_S3
M_C_DQS_DP3 M_C_B1
M_C_B2
P2 CA0_B
CA1_B
DQ8_B
DQ9_B
Y11 M_C_DQ31
M_C_DQ30
M_D_B1
M_D_B2
P2 CA0_B
CA1_B
DQ8_B
DQ9_B
Y11 M_D_DQ30
M_D_DQ28
VDD1
R9 V11 R9 V11
M_C_B3 R10 CA2_B DQ10_B U11 M_C_DQ29 M_D_B3 R10 CA2_B DQ10_B U11 M_D_DQ29 C1303 C1304 C1305 C1306 C1307 C1308 C1309 C1310 C1311 C1312
5 M_C_CLK0# M_C_B4 CA3_B DQ11_B M_C_DQ25 M_D_B4 CA3_B DQ11_B M_D_DQ24
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
R11 U9 R11 U9
5 M_C_CLK0 1D1V_S3 M_C_B5 P11 CA4_B DQ12_B V9 M_C_DQ26 1D1V_S3 M_D_B5 P11 CA4_B DQ12_B V9 M_D_DQ26
5 M_C_CLK1# CA5_B DQ13_B Y9 M_C_DQ28 CA5_B DQ13_B Y9 M_D_DQ27
5 M_C_CLK1
1
R1301 1 2 0R0402-PAD-2-GP M_C_ODT0 G2 DQ14_B AA9 M_C_DQ24 R1305 1 2 0R0402-PAD-2-GP M_D_ODT0 G2 DQ14_B AA9 M_D_DQ25
R1302 1 2 0R0402-PAD-2-GP M_C_ODT1 T2 ODT_CA_A DQ15_B R1306 1 2 0R0402-PAD-2-GP M_D_ODT1 T2 ODT_CA_A DQ15_B
5 M_C_CKE0 ODT_CA_B ODT_CA_B
5 M_C_CKE1
2
SM_DRAMRST# T11 SM_DRAMRST# T11
5 M_C_CKE2 RESET# D3 M_C_DQS_DP0 RESET# D3 M_D_DQS_DP0
C1302 C1301
5 M_C_CKE3 DQS0_T_A M_C_DQS_DN0 DQS0_T_A M_D_DQS_DN0
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
A1 E3 A1 E3
A2 DNU#A1 DQS0_C_A A2 DNU#A1 DQS0_C_A
5 M_C_CS#0 B1 DNU#A2 D10 M_C_DQS_DP1 B1 DNU#A2 D10 M_D_DQS_DP1
5 M_C_CS#1 DNU#B1 DQS1_T_A DNU#B1 DQS1_T_A
1
1
AA1 E10 M_C_DQS_DN1 AA1 E10 M_D_DQS_DN1 1D1V_S3
5
5
M_C_CS#2
M_C_CS#3 DY AB1 DNU#AA1
DNU#AB1
DQS1_C_A
M_C_DQS_DP2 DY AB1 DNU#AA1
DNU#AB1
DQS1_C_A
M_D_DQS_DP2
VDD2
AB2 W3 AB2 W3
2
2
A11 DNU#AB2 DQS0_T_B V3 M_C_DQS_DN2 A11 DNU#AB2 DQS0_T_B V3 M_D_DQS_DN2 C1314 C1315 C1316 C1317 C1318 C1319 C1320 C1321 C1326 C1327
C C
5 M_C_A0 DNU#A11 DQS0_C_B DNU#A11 DQS0_C_B
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
A12 A12
5 M_C_A1 B12 DNU#A12 W10 M_C_DQS_DP3 B12 DNU#A12 W10 M_D_DQS_DP3
5 M_C_A2 AA12 DNU#B12 DQS1_T_B V10 M_C_DQS_DN3 AA12 DNU#B12 DQS1_T_B V10 M_D_DQS_DN3
5 M_C_A3
1
AB11 DNU#AA12 DQS1_C_B AB11 DNU#AA12 DQS1_C_B
5 M_C_A4 AB12 DNU#AB11 AB12 DNU#AB11
5 M_C_A5 K5 DNU#AB12 K5 DNU#AB12
2
K8 DNU#K5 C3 K8 DNU#K5 C3
5 M_C_B0 N5 DNU#K8 DMI0_A C10 N5 DNU#K8 DMI0_A C10
5 M_C_B1 N8 DNU#N5 DMI1_A N8 DNU#N5 DMI1_A
5 M_C_B2 G11 DNU#N8 Y3 G11 DNU#N8 Y3
5 M_C_B3 DNU#G11 DMI0_B Y10 0D6V_VREF_S0 DNU#G11 DMI0_B Y10
5 M_C_B4 DMI1_B DMI1_B 0D6V_VREF_S0
5 M_C_B5 A5 M_C_ZQ0 1 2 240R2F-1-GP A5 M_D_ZQ0 1 2 240R2F-1-GP
R1309 R1312
ZQ0 A8 M_C_ZQ1 R1310 1 2 240R2F-1-GP ZQ0 A8 M_D_ZQ1 R1311 1 2 240R2F-1-GP
ZQ1 ZQ1
5 M_D_DQ[31:0] M_D_DQ0
M_D_DQ1 H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP 0D6V_VREF_S0
M_D_DQ2
M_D_DQ3
072.H9HCN.0E0U 072.H9HCN.0E0U
VDDQ
M_D_DQ4 C1322 C1323 C1324 C1325 C1330 C1328
M_D_DQ5
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC1U10V2KX-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
M_D_DQ6
M_D_DQ7
1
M_D_DQ8
M_D_DQ9 0D6V_VREF_S0 RAM2B 2 OF 2 0D6V_VREF_S0 RAM1B 2 OF 2
M_D_DQ10
2
M_D_DQ11 B3 A3 B3 A3
M_D_DQ12 B5 VDDQ VSS C1 B5 VDDQ VSS C1
M_D_DQ13 D1 VDDQ VSS C5 D1 VDDQ VSS C5
M_D_DQ14 D5 VDDQ VSS D2 D5 VDDQ VSS D2
M_D_DQ15 F3 VDDQ VSS D4 F3 VDDQ VSS D4
M_D_DQ16 U3 VDDQ VSS E1 U3 VDDQ VSS E1
M_D_DQ17 W1 VDDQ VSS E5 W1 VDDQ VSS E5
M_D_DQ18 W5 VDDQ VSS G1 W5 VDDQ VSS G1
M_D_DQ19 AA3 VDDQ VSS G3 AA3 VDDQ VSS G3
M_D_DQ20 AA5 VDDQ VSS G5 AA5 VDDQ VSS G5
M_D_DQ21 B8 VDDQ VSS J1 B8 VDDQ VSS J1
M_D_DQ22 B10 VDDQ VSS J3 B10 VDDQ VSS J3
M_D_DQ23 D8 VDDQ VSS K2 D8 VDDQ VSS K2
M_D_DQ24 D12 VDDQ VSS K4 D12 VDDQ VSS K4
B M_D_DQ25 F10 VDDQ VSS N2 F10 VDDQ VSS N2 B
M_D_DQ26 U10 VDDQ VSS N4 U10 VDDQ VSS N4
M_D_DQ27 W8 VDDQ VSS P1 W8 VDDQ VSS P1
M_D_DQ28 W12 VDDQ VSS P3 W12 VDDQ VSS P3
M_D_DQ29 AA8 VDDQ VSS T1 AA8 VDDQ VSS T1
M_D_DQ30 1P8V_S3 AA10 VDDQ VSS T3 1P8V_S3 AA10 VDDQ VSS T3
M_D_DQ31 VDDQ VSS T5 VDDQ VSS T5
F1 VSS V1 F1 VSS V1
5 M_D_DQS_DN[3:0] M_D_DQS_DN0 G4 VDD1 VSS V5 G4 VDD1 VSS V5
M_D_DQS_DN1 T4 VDD1 VSS W2 T4 VDD1 VSS W2
M_D_DQS_DN2 U1 VDD1 VSS W4 U1 VDD1 VSS W4
M_D_DQS_DN3 G9 VDD1 VSS Y1 G9 VDD1 VSS Y1
F12 VDD1 VSS Y5 F12 VDD1 VSS Y5
5 M_D_DQS_DP[3:0] M_D_DQS_DP0 T9 VDD1 VSS AB3 T9 VDD1 VSS AB3
M_D_DQS_DP1 U12 VDD1 VSS AB5 U12 VDD1 VSS AB5
M_D_DQS_DP2 1D1V_S3 VDD1 VSS A10 1D1V_S3 VDD1 VSS A10
M_D_DQS_DP3 VSS C8 VSS C8
A4 VSS C12 A4 VSS C12
F5 VDD2 VSS D9 F5 VDD2 VSS D9
5 M_D_CLK0# H1 VDD2 VSS D11 H1 VDD2 VSS D11
5 M_D_CLK0 H5 VDD2 VSS E8 H5 VDD2 VSS E8
5 M_D_CLK1# K1 VDD2 VSS E12 K1 VDD2 VSS E12
5 M_D_CLK1 K3 VDD2 VSS G8 K3 VDD2 VSS G8
N1 VDD2 VSS G10 N1 VDD2 VSS G10
5 M_D_CKE0 N3 VDD2 VSS G12 N3 VDD2 VSS G12
5 M_D_CKE1 R1 VDD2 VSS J10 R1 VDD2 VSS J10
5 M_D_CKE2 R5 VDD2 VSS J12 R5 VDD2 VSS J12
5 M_D_CKE3 U5 VDD2 VSS K9 U5 VDD2 VSS K9
AB4 VDD2 VSS K11 AB4 VDD2 VSS K11
5 M_D_CS#0 A9 VDD2 VSS N9 A9 VDD2 VSS N9
5 M_D_CS#1 F8 VDD2 VSS N11 F8 VDD2 VSS N11
5 M_D_CS#2 H8 VDD2 VSS P10 H8 VDD2 VSS P10
5 M_D_CS#3 H12 VDD2 VSS P12 H12 VDD2 VSS P12
K10 VDD2 VSS T8 K10 VDD2 VSS T8
5 M_D_A0 K12 VDD2 VSS T10 K12 VDD2 VSS T10
5 M_D_A1 N10 VDD2 VSS T12 N10 VDD2 VSS T12
5 M_D_A2 N12 VDD2 VSS V8 N12 VDD2 VSS V8
5 M_D_A3 R8 VDD2 VSS V12 R8 VDD2 VSS V12
5 M_D_A4 R12 VDD2 VSS W9 R12 VDD2 VSS W9
5 M_D_A5 U8 VDD2 VSS W11 U8 VDD2 VSS W11
AB9 VDD2 VSS Y8 AB9 VDD2 VSS Y8
A 5 M_D_B0 VDD2 VSS Y12 VDD2 VSS Y12 A
5 M_D_B1 VSS AB8 VSS AB8
5 M_D_B2 VSS AB10 VSS AB10
5 M_D_B3 VSS VSS
5 M_D_B4
5 M_D_B5
H9HCNNNCPMMLHR-NME-GP H9HCNNNCPMMLHR-NME-GP
5,12 SM_DRAMRST# 072.H9HCN.0E0U 072.H9HCN.0E0U <Core Design>
Wistron Corporation
Title
DDR (LPDDR4X-CHB)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
DDR (RSVD) (DDR4-CHA1)
A4
5 4 3 2 1
5 4 3 2 1
18,24,25 SPI_SI_ROM
18,24,25 SPI_WP_ROM
18,24,25 SPI_HOLD_ROM GPIO GPP_C5 SPI_SI GPP_E6 GPP_B23 SPI_WP ME_UNLOCK (GPP_R2) CNVI debug MODES (GPP_F2)
3D3V_S5 3D3V_SPI 3D3V_S5
21,61 CNV_RGI_DT =20K PD= =NO INTERNAL= =NO INTERNAL= =20K PD= 3D3V_SPI
=NO INTERNAL= =20K PD= 1D8V_S5
=NO INTERNAL=
20191204(EVT)
18 SML0_ALERT#
20200219(DVT1) * PH as VCCPGPPR
1
R1501 Change to 4.7k R1504 Change to 3D3V_S5
1
Follow Nakia
18 GPP_E6 R1503 1D8V_GPPR_S5
DY R1507
4K7R2J-2-GP
R1506 100KR2J-1-GP
19 HDA_SDO
1
4K7R2J-2-GP 100KR2J-1-GP 100KR2J-1-GP R1509
2
BOOT_HALT
2
4,71 TBT_LSX0_RXD SML0_ALERT# SPI_SI_ROM GPP_E6 SPI_WP_ROM CNV_RGI_DT
Schematic DY
4 GPP_D10 Close to U2501
1
D Close to U2501 R1514 4K7R2J-2-GP R1516 D
2
1
1
R1502 R1511 R1512 ME_UNLOCK 1 2HDA_SDO
3 DBG_PMODE
DY R1515 0R2J-2-GP DY
4 GPP_D12 DY DY DY 4K7R2J-2-GP 4K7R2J-2-GP
2
20K5R2F-GP 4K7R2J-2-GP 4K7R2J-2-GP
4 GPP_E21
2
18 GPP_E10
E
S
P
I
D
i
s
a
b
l
e
D
i
s
a
b
l
e
E
n
a
b
l
e
1(
9D
.E
2R
MI
HV
ZE
C
LF
OR
CO
KM
F3
R8
O.
M4
DH
IZ
V
IC
DR
EY
RS
D
i
s
a
b
l
e
O
V
E
R
R
I
D
E
N
I
N
T
E
G
R
A
T
E
D
C
N
V
I
D
I
S
A
B
L
E
18 GPP_E11
T
A
L
)
High
E
n
a
b
l
e
3C
8R
.Y
4S
MT
HA
ZL
C(
LD
OE
CF
KA
FL
RT
O)
M
D
I
R
E
C
T
SN
EO
CT
U
RO
IV
TE
YR
MI
ED
AE
SN
U
R
E
S
E
n
a
b
l
e
D
i
s
a
b
l
e
E
n
a
b
l
e
I
N
T
E
G
R
A
T
E
D
C
N
V
I
E
N
A
B
L
E
U
R
Low =default=
GPIO TBT LSX VCCIO conf.#0 TBT LSX VCCIO conf.#1 TBT LSX VCCIO conf.#2 TBT LSX VCCIO conf.#3 A0 GPP_E10 GPP_E11
E19 3D3V_S5
=NO INTERNAL= E21 3D3V_S5
=NO INTERNAL= D10 3D3V_S5
=NO INTERNAL= D12 3D3V_S5
=NO INTERNAL= 3D3V_S5
=NO INTERNAL= 1D05V_S5_OUT
=20K PU=
20191204(EVT)
1
1
R1518 R1519 R1520 R1524 Always stuff 1D8V_S5 1D8V_S5
R1526 Follow Nakia
R1528
DY DY DY DY 100KR2J-1-GP
1KR2F-3-GP
1
4K7R2J-2-GP 4K7R2J-2-GP 4K7R2J-2-GP 4K7R2J-2-GP R1531 R1530
2
2
TBT_LSX0_RXD GPP_E21 GPP_D10 GPP_D12 SPI_HOLD_ROM DBG_PMODE 20KR2J-L2-GP 20KR2J-L2-GP
Schematic Close to U2501
1
1
R1521 sky 0329 R1522 R1523 sky 0329 R1525 R1529
2
GPP_E10 GPP_E11
sky 0329 DY
sky 0329 R1527 DY
100KR2J-1-GP
20KR2J-L2-GP 20KR2J-L2-GP 20KR2J-L2-GP 20KR2J-L2-GP 1KR2F-3-GP 20190515_neal
2
2
C C
3
.
3
V
3
.
3
V
D
i
s
a
b
l
e
D(
FD
XE
TF
EA
SU
TL
MT
O)
D
E
D
I
S
A
B
L
E
D
3
.
3
V
3
.
3
V
High
1
.
8
V
1
.
8
V
E
n
a
b
l
e
1
.
8
V
1
.
8
V
D
F
X
T
E
S
T
M
O
D
E
E
N
A
B
L
E
D
Low
Original Ref.
GPP_C5 SPI_SI GPP_E6 GPP_B23 SPI_WP ME_UNLOCK M.2 CNVI MODES TBT LSX #0
TBT LSX #1 TBT LSX #2 TBT LSX #3 A0 GPP_E10 GPP_E11
B B
A A
<Core Design>
Wistron Corporation
Title
CPU (STRAP)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
GPU
D D
M.2 SSD
63 SSD_PCIE_TX_P3
63 SSD_PCIE_TX_N3
63 SSD_PCIE_RX_P3
63 SSD_PCIE_RX_N3 9 OF 21
CPU1I
63 SSD_PCIE_TX_P2
63 SSD_PCIE_TX_N2
63 SSD_PCIE_RX_P2 SSD_SATA_TX_P BT7 CV4
63 SSD_PCIE_RX_N2 PCIE12_TXP/SATA1_TXP USB2P_10
20191204(EVT)
SSD_SATA_TX_N BT8 CY3 CNVi only, remove USB2.0 BT
SSD_SATA_RX_P CE2 PCIE12_TXN/SATA1_TXN USB2N_10
63 SSD_PCIE_TX_P1 SSD_SATA_RX_N CE1 PCIE12_RXP/SATA1_RXP DD5
63 SSD_PCIE_TX_N1 PCIE12_RXN/SATA1_RXN USB2P_9 DD4
63 SSD_PCIE_RX_P1 SSD_PCIE_TX_P1 BT9 USB2N_9
63 SSD_PCIE_RX_N1 SSD_PCIE_TX_N1 BV9 PCIE11_TXP/SATA0_TXP CW9
SSD_PCIE_RX_P1 CF4 PCIE11_TXN/SATA0_TXN USB2P_8 DA9
63 SSD_SATA_TX_P SSD_PCIE_RX_N1 CF3 PCIE11_RXP/SATA0_RXP USB2N_8
63 SSD_SATA_TX_N PCIE11_RXN/SATA0_RXN DD1 CARD1_USB20_P
63
63
SSD_SATA_RX_P
SSD_SATA_RX_N
M.2 SSD SSD_PCIE_TX_P2 BV7
PCIE10_TXP
USB2P_7
USB2N_7
DD2 CARD1_USB20_N Card Reader
SSD_PCIE_TX_N2 BV8
SSD_PCIE_RX_P2 CG2 PCIE10_TXN DA1 CCD_USB20_P
63
63
M2_PEDET1
M2_DEVSLP1
SSD_PCIE_RX_N2 CG1 PCIE10_RXP
PCIE10_RXN
USB2P_6
USB2N_6
DA2 CCD_USB20_N Camera
SSD_PCIE_TX_P3 BY7 DA12 FP1_USB20_P
SSD_PCIE_TX_N3 BY8 PCIE9_TXP
PCIE9_TXN
USB2P_5
USB2N_5
DA11 FP1_USB20_N Finger Print
SSD_PCIE_RX_P3 CG5
SSD_PCIE_RX_N3 CG4 PCIE9_RXP DC8
PCIE9_RXN USB2P_4 DC7
CB8 USB2N_4
CB7 PCIE8_TXP DB4 USB4_USB20_P
CK5 PCIE8_TXN
PCIE8_RXP
USB2P_3
USB2N_3
DB3 USB4_USB20_N TBT
CK4
PCIE8_RXN DA5 USB2_USB20_P
USB1 CD9
PCIE7_TXP
USB2P_2
USB2N_2
DA4 USB2_USB20_N USB2_IO
USB3.2 Type-A Port1 (MB) CD8
CK1 PCIE7_TXN DC11 DEBUG_USB20_P 1
C
TP1601
20191218(EVT) 20191217(EVT) C
CK2 PCIE7_RXP USB2P_1 DC9 DEBUG_USB20_N 1
PCIE7_RXN USB2N_1 TP1602 Add for Intel debug used Follow Intel check list
CG8 DP4
CG7 PCIE6_TXP GPP_E0/SATAXPCIE0/SATAGP0 DF41 M2_PEDET1
PCIE6_TXN GPP_A12/SATAXPCIE1/SATAGP1/I2S3_SFRM 3D3V_S5_VCCPRIM
CL4
CL3 PCIE6_RXP DD8 USB_OC0#
USB2 PCIE6_RXN GPP_E9/USB_OC0#
GPP_A16/USB_OC3#/I2S4_SFRM
DJ45 USB_OC3# USB_OC0# R1605 1 2 10KR2J-3-GP
CJ8 USB_OC1# 2 1 10KR2J-3-GP
USB3.2 Type-A Port2 (IO) PCIE5_TXP M2_DEVSLP1 USB_OC3#
R1606
CJ7 DN6 R1607 2 1 10KR2J-3-GP
66 USB2_USB31_TX_P CN2 PCIE5_TXN GPP_E5/DEVSLP1 DG8
66 USB2_USB31_TX_N CN1 PCIE5_RXP GPP_E4/DEVSLP0
66 USB2_USB31_RX_P PCIE5_RXN
20191224(EVT)
DN29 DUAL_BOOT_EVENT# Dell request reserve
66 USB2_USB31_RX_N CR8 GPP_H15/M2_SKT2_CFG3 DK29 WLAN_RF_DIS#
CR7 PCIE4_TXP/USB31_4_TXP GPP_H14/M2_SKT2_CFG2 DT31 PCH_TBT_PERST#_H13 R1609 1 2 100R2F-L1-GP-U PCH_TBT_PERST#
66 USB2_USB20_P CN5 PCIE4_TXN/USB31_4_TXN GPP_H13/M2_SKT2_CFG1 DR32 TBT_FORCE_PWR
66 USB2_USB20_N CN4 PCIE4_RXP/USB31_4_RXP GPP_H12/M2_SKT2_CFG0
PCIE4_RXN/USB31_4_RXN DV9 PCIE_RCOMP_P R1601 1 2 100R2F-L1-GP-U
66 USB_OC0# CU8 PCIE_RCOMP_P DT9 PCIE_RCOMP_N
4 USB_OC1# CU7 PCIE3_TXP/USB31_3_TXP PCIE_RCOMP_N
CT2 PCIE3_TXN/USB31_3_TXN DC12 USB_VBUSSENSE R1602 1 2 10KR2F-2-GP
CT1 PCIE3_RXP/USB31_3_RXP USB_VBUSSENSE DF1 USB_ID R1604 1 2 10KR2F-2-GP
PCIE3_RXN/USB31_3_RXN USB_ID DE1 USB2_COMP R1603 1 2 113R2F-GP
USB2_USB31_TX_P CW8 USB2_COMP
USB2_USB31_TX_N CW7 PCIE2_TXP/USB31_2_TXP E3
Card Reader USB2_IO USB2_USB31_RX_P CU3 PCIE2_TXN/USB31_2_TXN
PCIE2_RXP/USB31_2_RXP
RSVD_BSCAN
USB2_USB31_RX_N CT4
66 CARD1_USB20_P PCIE2_RXN/USB31_2_RXN
66 CARD1_USB20_N DA8
DA7 PCIE1_TXP/USB31_1_TXP
CV2 PCIE1_TXN/USB31_1_TXN
Camera CV1 PCIE1_RXP/USB31_1_RXP
PCIE1_RXN/USB31_1_RXN
55 CCD_USB20_P
55 CCD_USB20_N
TGL-U-1-GP-U2
ZZ.00CPU.481
Finger Print
92 FP1_USB20_N
92 FP1_USB20_P
B B
TBT
72 USB4_USB20_P
72 USB4_USB20_N
71,72 TBT_FORCE_PWR
BT
CPU1H 8 OF 21
P5 V5
WLAN P7
N1
PCIE4_TX_P3
PCIE4_TX_N3
PCIE4_TX_P1
PCIE4_TX_N1
V7
T1
N2 PCIE4_RX_P3 PCIE4_RX_P1 T2
PCIE4_RX_N3 PCIE4_RX_N1
61 WLAN_RF_DIS# T5 Y5
T7 PCIE4_TX_P2 PCIE4_TX_P0 Y7
R1 PCIE4_TX_N2 PCIE4_TX_N0 V1
R2 PCIE4_RX_P2 PCIE4_RX_P0 V2
PCIE4_RX_N2 PCIE4_RX_N0
Y12 PCIE4_RCOMP_P R1608 1 2 2K2R2F-GP 20200122(DVT1)
PCIE4_RCOMP_P V12 PCIE4_RCOMP_N Add R1608
PCIE4_RCOMP_N
TGL-U-1-GP-U2
PD PCIE4_RCOMP resistor should be stuffed
ZZ.00CPU.481
7,71 PCH_TBT_PERST# Even if PCIE4 not used.
MM
A 24 DUAL_BOOT_EVENT# A
<Core Design>
Wistron Corporation
Title
CPU (PCIE/SATA/USB)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
CPU1L 12 OF 21
61,63,71 PCH_PLTRST#
SIO_SLP_SUS# DV49 BM9 TP_VCORE_PWRGD 1 follow 612304 Ver0.9
40,53,55 SIO_SLP_S3#
DM43: SIO_SLP_S5#
TP1705
1 SIO_SLP_S5# DM43
SLP_SUS#
GPD10/SLP_S5#
PROCPWRGD
GPD3/PWRBTN#
GPD0/BATLOW#
DK41
DN41
SIO_PWRBTN#
PCH_BATLOW#
TP1702
DR41: SIO_SLP_A# SIO_SLP_S4# DJ41 DK43 AC_PRESENT
DT44: SIO_SLP_WLAN# SIO_SLP_S3# DJ43 GPD5/SLP_S4# GPD1/ACPRESENT
40,92 SIO_SLP_S4# SIO_SLP_A# GPD4/SLP_S3# TBT_PD_ALERT#
1 DR41 CW40 1
TP1707 DT44 GPD6/SLP_A# GPP_B11/PMCALERT# DN27 CPU_C10_GATE# TP1703
GPD9/SPL_WLAN# GPP_H18/CPU_C10_GATE# DG31 TPM_PRSNT#
1 SIO_SLP_S0# DD42 GPP_H3/SX_EXIT_HOLDOFF#
24,25,45 3V_5V_PWRGD TP1709 DN39 GPP_B12/SLP_S0# DK39 PCIE_WAKE_N
SLP_LAN# WAKE#
24 SIO_PWRBTN# PM_RSMRST# DM35 DM41
20200213(DVT1) SYS_RESET# DD10 RSMRST# GPD2/LAN_WAKE# DT41
D Check with EC PCH_PLTRST# SYS_RESET# GPD11/LANPHYPC/DSWLDO_MON D
R1723 NON_G3 DD41
GPP_B13/PLTRST# DN43 PCH_TBT_PERST#_GPD7 R1748 1 2 0R2J-2-GP PCH_TBT_PERST# 20200220(DVT1)
PCH_DPWROK R1723 1NON_G3
2 0R2J-2-GP DSW_PWROK_R DK35 GPD7 DY Reserve 0 ohm to GPD7
SYS_PWROK DF10 DSW_PWROK CE5 VCCSTPWRGOOD_TCSS R1731 1 2 0R0402-PAD-2-GP VCCST_OVERRIDE
24,64 PCH_RSMRST# ALL_SYS_PWRGD PCH_PWROK SYS_PWROK VCCSTPWRGOOD_TCSS VCCST_PWRGD_R
D1704 K DY A RB520S30-GP DN35 BP8
PCH_PWROK VCCST_PWRGD BP9 VCCST_OVERRIDE_R R1728 1 2 0R0402-PAD-2-GP VCCST_OVERRIDE
PWR_IMVP_PWRGD R1745 1 2 0R0402-PAD-2-GP RTC_INTRUDER# DM37 VCCST_OVERRIDE
SPI_VCC_SEL DT49 INTRUDER# DR12 EXT_PWR_GATE#
24,26 IMVP_VR_ON IMVP_VR_ON SPIVCCIOSEL GPP_F20/EXT_PWR_GATE# EXT_PWR_GATE2#
R1747 1 2 0R0402-PAD-2-GP DW12
GPP_F21/EXT_PWR_GATE2#
24 SYS_PWROK
20191204(EVT)
DY D1704 TGL-U-1-GP-U2
40,61 SIO_SLP_SUS# Follow Nakia N7 ZZ.00CPU.481
SPI SELECT STRAP SPI SELECT STRAP 3D3V_S5_VCCPRIM
40 VCCST_OVERRIDE
D1701
Cap LOW → 3.3V LOW → 3.3V 20200218(DVT1)
RB520S30-GP Change PU to 3.3V_PRIM
A K AC_IN# Cap DY → 1.8V HIGH → 1.8V 1 2 10KR2J-3-GP SYS_RESET#
R1701
Q1702 RTC_AUX_S5 3D3V_S5_VCCPRIM 20200416(DVT2)
1 6
83.R2003.A8MAC_PRESENT R1713 1 2 100KR2J-1-GP AC_PRESENT Change R1713 to 100k
Note:ZZ.27002.F7C01
3D3V_AUX_S5 Follow Intel checklist
40 CPU_C10_GATE# R1715 1 2 10KR2J-3-GP PCH_BATLOW#
1
2 5 PM_RSMRST# R1704 R1705
R1740 1 2 100KR2J-1-GP EXT_PWR_GATE#
72 TBT_PD_ALERT#
R1737 1 2 PM_RSMRST#_M 3 4
R1741 1 DY 2 100KR2J-1-GP EXT_PWR_GATE2#
DY DY
100KR2J-1-GP VCCIN_AUX_PWRGD PM_RSMRST#
R1725 1 DY 2 68KR2F-GP
2N7002KDW-1-GP 1MR2F-GP 4K7R2J-2-GP 3D3V_S5
2
75.27002.F7C RTC_INTRUDER# SPI_VCC_SEL
1
43,44 AC_IN# R1746 1 2 1KR2J-1-GP PCIE_WAKE_N
2nd = 075.27002.0E7C C1704
20200224(DVT1) DY SCD1U16V2KX-3DLGP
Reserve R1725, C1704
1
C1701 R1714 R1706 20200512(DVT2)
2
24,40,44,46 ALL_SYS_PWRGD 3D3V_S5 Follow Nakia
1MR2F-GP 4K7R2J-2-GP
SCD1U16V2KX-3DLGP
Change to 3D3V_S5
3D3V_S5 DY Follow CY20 table
2
C R1712 1 2 100KR2J-1-GP TPM_PRSNT# C
44,46 PWR_IMVP_PWRGD fTPM
2
C1702
SCD1U16V2KX-3DLGP
24 PCH_DPWROK Volatge Level 1V 1D05V_VCCST
VCCST_OVERRIDE R1730 1 2 100KR2J-1-GP
PCH_PWROK R1732 1 2 100KR2J-1-GP
1
20200102(EVT) SYS_PWROK R1733 1 2 100KR2J-1-GP
24 EC_PCH_SPI_EN Follow Intel CRB & checklist 3V_5V_PWRGD R1750 1 2 68KR2F-GP DSW_PWROK_R
PCH_PLTRST# R1744 1 2 100KR2J-1-GP DY
1
U1701 R1702
2
16,71 PCH_TBT_PERST# DSW_PWROK_R R1726 1 2 100KR2J-1-GP
1
1 5 C1750
40,50 VCCIN_AUX_PWRGD NC#1 VCC
ALL_SYS_PWRGD 2 201912119(EVT) DY SCD1U10V2KX-4DLGP
1KR2F-3-GP
2
Follow Intel design
2
A
3 4 VCCST_PWRGD_RR R1703 1 2 60D4R2F-GP VCCST_PWRGD_R
GND Y 11.11 Follow Nakia
74LVC1G07GW-GP
3D3V_S5 20191217(EVT)
73.01G07.0HG Follow Mocking bird ICL modify
2nd = 73.17S07.0AG
1
3D3V_AUX_S5 C1714
SCD1U16V2KX-3DLGP
R1707 1 2 100KR2J-1-GP
2
1
R1708
U1703
1 8 3V_5V_PWRGD_U R1772 1 2 0R0402-PAD-2-GP 3V_5V_PWRGD

Q1701 PCH_RSMRST# R1773 1 PCH_RSMRST#_U VDD 3V_5V_PWRGD
PM_RSMRST# PCH_RSMRST# 2 0R0402-PAD-2-GP 2 7
10KR2J-3-GP 4 3 R1709 1 DY 2 1KR2J-1-GP PCH_DPWROK R1775 1 PCH_DPWROK_R PCH_RSMRST# NC#7 EC_PCH_SPI_EN_R
2 0R0402-PAD-2-GP 3 6 R1774 1 2 0R0402-PAD-2-GP EC_PCH_SPI_EN
2
3D3V_S5_R R1771 1 2 0R0402-PAD-2-GP 3D3V_S5_U 4 PCH_DPWPOK EC_PCH_SPI_EN 5

3V_5V_POK# 5 2 3V_5V_POK_C R1710 1 2 0R0402-PAD-2-GP 3V_5V_PWRGD DSW_PWROK GND
Note:ZZ.27002.F7C01
6 1 R1711
SLG4E43789VTR-1-GP
B 2N7002KDW-1-GP 074.43789.M001 B
75.27002.F7C 100KR2J-1-GP
2nd = 074.03904.0053
2nd = 075.27002.0E7C
2
Power on sequence for G3 sharing

20191213(EVT)
Follow Mocking bird ICL modify
3D3V_S5_VCCPRIM 20200706(PVT)
Fine tune to 330K 3D3V_S5
Watch Dog sequence U1702
PCH_RSMRST# 1
3D3V_S5 3D3V_S5 B 5
3D3V_S5 330KR2F-L-GP U1710 DSW_PWROK 2 VCC
R1738 1 2 3D3V_S5_PCH_R 1 Q1703 R1735 A 4 PM_RSMRST#
B 5 4 3 Q1703_2_3 2 1 100KR2J-1-GP 3 Y
3D3V_S5_R VCC DY GND
R1721 1 2 2
A 4 DSW_PWROK_R 5 2
DY 74LVC1G08GW-1-GP
Note:ZZ.27002.F7C01
1
C1713 3
GND 73.01G08.L04
1
C1712
SCD1U16V2KX-3DLGP
100KR2J-1-GP R1734 1 2 0R0402-PAD-2-GP 6 1 R1736

DY 10KR2F-2-GP
1
SCD1U16V2KX-3DLGP
74LVC1G08GW-1-GP 2nd = 073.7SZ08.000G

DY 2N7002KDW-1-GP
73.01G08.L04
2
75.27002.F7C 3rd = 73.01G08.IHG

2
2
2nd = 073.7SZ08.000G 2nd = 075.27002.0E7C
3rd = 73.01G08.IHG DSW_PWROK
201912120(EVT)
1
DY because R1726 stuff
R1776 1 DY 2 0R2J-2-GP R1739
A DY 1MR2F-GP A
2
<Core Design>
D1703 D1702
DSW_PWROK_R A K PCH_DPWROK 3D3V_S5_R A K PCH_DPWROK
DY
RB520S30-GP
DY
RB520S30-GP
Wistron Corporation
83.R2003.A8M 83.R2003.A8M Taipei Hsien 221, Taiwan, R.O.C.
2nd = 083.52030.008F 2nd = 083.52030.008F
Title
CPU (PMU)
Custom
5 4 3 2 1
5 4 3 2 1
SPI ROM 3D3V_S5

RN1803
3D3V_S0
4,25 SPI_CLK_ROM 1 4 CPU_SMB_SDA
4,25 SPI_HOLD_ROM 2 3 CPU_SMB_SCL
4,25
4,25
SPI_WP_ROM
SPI_SO_ROM
1 R1821 2 SPK_ID Follow Hellcat15 Upsell TGL SRN1KJ-7-GP 11.08 3D3V_S0->3D3V_S5
4,25 SPI_SI_ROM 10KR2J-3-GP
4,25 SPI_CS_ROM_N0
4,25 SPI_CS_ROM_N1 RN1807 20191216(EVT)
1 4 SML0_SMBDATA Layout swap request
2 3 SML0_SMBCLK
SRN1KJ-7-GP
20200512(DVT2)
Change to 0 ohm CPU1E 5 OF 21
RN1801
Follow Intel TGL PDG 1.1 1 4 SML1_SMBCLK
2 3 SML1_SMBDATA
SPI_CLK_ROM 1 2 SPI0_CLK_R_CPU DJ37 DK21 CPU_SMB_SCL
D
SPI_HOLD_ROM
R1826 0R0402-PAD-2-GP
SPI0_HOLD_R_CPU SPI0_CLK GPP_C0/SMBCLK CPU_SMB_SDA
XDP SRN1KJ-7-GP D
R1827 1 2 0R0402-PAD-2-GP DG35 DM19
EC SPI_WP_ROM R1828 1 2 0R0402-PAD-2-GP SPI0_WP_R_CPU DJ39 SPI0_IO3
SPI0_IO2
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
DN19 CPU_SMB_ALERT# 20200218(DVT1)
Reverse 0 ohm R1823
SPI_SO_ROM R1829 1 2 0R0402-PAD-2-GP SPI0_SO_R_CPU DJ33
24,68 ESPI_IO0 SPI0_MISO 1 2 CPU_SMB_ALERT#
SPI_SI_ROM R1830 1 2 0R0402-PAD-2-GP SPI0_SI_R_CPU DJ35 DK19 SML0_SMBCLK_R R1812 1 2 0R0402-PAD-2-GP SML0_SMBCLK
24,68 ESPI_IO1 SPI_CS_ROM_N1 R1831 1 2 0R0402-PAD-2-GP SPI_CS_CPU_N1 DF35 SPI0_MOSI GPP_C3/SML0CLK DM17 SML0_SMBDATA_R R1813 1 2 0R0402-PAD-2-GP SML0_SMBDATA BB non-TBT 1D8V_S5 DY
10KR2J-3-GP
24,68 ESPI_IO2 SPI_CS_ROM_N0 1 2 SPI_CS_CPU_N0 DG37 SPI0_CS1# GPP_C4/SML0DATA DN17 SML0_ALERT# R1824
R1832 0R0402-PAD-2-GP
24,68 ESPI_IO3 SPI0_CS0# GPP_C5/SML0ALERT# 1 2
DF39
SPI0_CS2# DK17 SML1_SMBCLK 10KR2J-3-GP
24,68 ESPI_CS# GPP_E11 DJ6 GPP_C6/SML1CLK DJ17 SML1_SMBDATA R1825
4,40,68 ESPI_RESET# GPP_E11/SPI1_CLK/THC0_SPI1_CLK GPP_C7/SML1DATA SML1_ALERT#
Thermal.EC 1 DY 2 SML1_ALERT#
DN5 CY50
24,68 ESPI_CLK DR9 GPP_E2/SPI1_IO3/THC0_SPI1_IO3 GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1# 10KR2J-3-GP
DM6 GPP_E1/SPI1_IO2/THC0_SPI1_IO2 DN53 PCH_ESPI_CLK R1804 1 2 49D9R2F-GP ESPI_CLK
DK6 GPP_E12/SPI1_MISO_IO1/THC0_SPI1_IO1 GPP_A5/ESPI_CLK DJ53 PCH_ESPI_IO3 R1808 1 2 15R2F-2-GP ESPI_IO3
GPP_E10 DK8 GPP_E13/SPI1_MOSI_IO0/THC0_SPI1_IO0 GPP_A3/ESPI_IO3/SUSACK# DH50 PCH_ESPI_IO2 R1807 1 2 15R2F-2-GP ESPI_IO2
Audio SATA_LED# DV11 GPP_E10/SPI1_CS#/THC0_SPI1_CS#
GPP_E8/SPI1_CS1#/SATA_LED#
GPP_A2/ESPI_IO2/SUSWARN#_SUSPWRDNACK
GPP_A1/ESPI_IO1
DP50 PCH_ESPI_IO1 R1806 1 2 15R2F-2-GP ESPI_IO1
1 DGPU_HOLD_RST# DW9 DP52 PCH_ESPI_IO0 1 2 ESPI_IO0
TP1802
GPP_E6 GPP_E17/THC0_SPI1_INT# GPP_A0/ESPI_IO0 PCH_ESPI_CS#
R1805 15R2F-2-GP
ESPI_CS#
to EC,debug14pin
DT8 DK52 R1809 1 2 0R0402-PAD-2-GP
29 SPK_ID GPP_E6/THC0_SPI1_RST# GPP_A4/ESPI_CS# DL50 PCH_ESPI_RST# 1 2 ESPI_RESET#
R1810 0R0402-PAD-2-GP
DN15 GPP_A6/ESPI_RESET#
GPP_F11/THC1_SPI2_CLK R1814 1 2 75KR2F-GP 20200318(DVT1)
SPK_ID DK13 20191210(EVT) Follow Nakia
DM13 GPP_F15/GSXSRESET#/THC1_SPI2_IO3
GPP_F14/GSXDIN/THC1_SPI2_IO2 20191209(EVT) Follow EC net name
HOST_SD_WP# DN13
M.2 SSD DJ15 GPP_F13/GSXSLOAD/THC1_SPI2_IO1
GPP_F12/GSXDOUT/THC1_SPI2_IO0
Follow Intel CRB use 1% RN1808
DK15 SML0_SMBCLK 1 4 SML1_SMBCLK_THM
63 SSD_CLK_CPU_N MEM_CHA_EN DN10 GPP_F16/GSXCLK/THC1_SPI2_CS# SML0_SMBDATA 2 3 SML1_SMBDATA_THM
63 SSD_CLK_CPU_P DV14 GPP_F18/THC1_SPI2_INT# DY
63 CLK_PCIE_NVME_REQ# GPP_F17/THC1_SPI2_RST# SRN0J-6-GP
64 SATA_LED# DH3
DH4 CL_CLK RN1809
DF2 CL_DATA SML1_SMBCLK 1 4
GPU CL_RST# SML1_SMBDATA 2 DY 3
TGL-U-1-GP-U2 SRN0J-6-GP
ZZ.00CPU.481
CPU1K 11 OF 21
20191216(EVT)
SMBUS Add R1802 PU 10K
72 SML1_SMBCLK 20191204(EVT) 3D3V_S0 Follow HCAT 13 CML
72 SML1_SMBDATA BW1 DU14 MEM_SPEED_SEL 20191211(EVT) Change RN1805 to R1801
C CLKOUT_PCIE_P6 GPP_F19/SRCCLKREQ6# Follow GPIO review 3D3V_S0 C
BW2 DF23
71 SML0_SMBCLK CLKOUT_PCIE_N6 GPP_H11/SRCCLKREQ5# DG25 CLK_PCIE_NVME_REQ#
1
71 SML0_SMBDATA CB2 GPP_H10/SRCCLKREQ4# DT24
CB1 CLKOUT_PCIE_P5 GPP_D8/SRCCLKREQ3# DT30 R1801
R1802
24,26 SML1_SMBCLK_THM CLKOUT_PCIE_N5 GPP_D7/SRCCLKREQ2# DV30 10KR2J-3-GP SATA_LED# 2 1
24,26 SML1_SMBDATA_THM GPP_D6/SRCCLKREQ1# DW30
SSD_CLK_CPU_P BW4 GPP_D5/SRCCLKREQ0# 10KR2J-3-GP
2
M.2 SSD SSD_CLK_CPU_N BW5 CLKOUT_PCIE_P4
CLKOUT_PCIE_N4 XTAL_OUT
DM1 XTL_38D4M_X2_CPU CLK_PCIE_NVME_REQ#
DL1 XTL_38D4M_X1_CPU The SATALED# signal is open-collector and
CL7 XTAL_IN
CLKOUT_PCIE_P3 requires a weak external pull-up (8.2 kΩ to 10 kΩ) to Vcc3_3.
CL8 DW41 SUSCLK
CLKOUT_PCIE_N3 GPD8/SUSCLK
CB4 DT47 XTL_32K_X2_CPU
CB5 CLKOUT_PCIE_P2 RTCX2 DR47 XTL_32K_X1_CPU
CLKOUT_PCIE_N2 RTCX1 RTC_AUX_S5
BY4 DN37 RTC_RST#
WLAN BY3 CLKOUT_PCIE_P1 RTCRST# DK37 SRTC_RST#
OTHER CLKOUT_PCIE_N1 SRTCRST#
1
2
CN7
CN8 CLKOUT_PCIE_P0 RN1802
24,61 SUSCLK
CLKOUT_PCIE_N0 SRN20KJ-1-GP
R1819 1 2 60D4R2F-GP XCLK_BIASREF DJ5
XCLK_BIASREF
HW STRAP TGL-U-1-GP-U2
4
3
ZZ.00CPU.481 SRTC_RST#
15 SML0_ALERT# RTC_RST#
SC1U10V2KX-1DLGP
15 GPP_E6
2
1
C1803
G1801
15 GPP_E10
1
C1804
XTL_32K_X2_CPU
GAP-OPEN
DJ6: TS_SPI_CLK SC1U10V2KX-1DLGP
15 GPP_E11
2
DN5: TS_SPI_IO3
2
DR9: TS_SPI_IO2 XTL_32K_X1_CPU
MEMORY DM6: TS_SPI_SO
DK6: TS_SPI_SI
20 MEM_CHA_EN DK8: TS_SPI_CS# 1 2 10MR2J-L-GP
R1811
21 MEM_SPEED_SEL DW9: DGPU_HOLD_RST# Layout: Place at the open door area.
DK13: SPK_ID 1 2 20191223(EVT)
DM13: AUD_PWR_EN C1802 X1801 C1801
SD C1=C2 default
SC15P50V2JN-DL-GP
SC15P50V2JN-DL-GP
B DN13: HOST_SD_WP# XTAL-32D768KHZ-88-GP B

DJ15: WWAN_DB_DET#
66 HOST_SD_WP# 082.30003.0191
1
DK15: USBC1_AUX_P_BIAS
2nd = 082.30003.0301
DV14: USBC1_AUX_N_BIAS
2
DT24: CLK_PCIE_SD_REQ#
DT30: CLK_PCIE_LAN_REQ#
DK21: MEM_SMBCLK 20191217(EVT)
DM19: MEM_SMBDATA Follow Nakia N7 TGL
DN19: SMLB_ALERT# Intel check list
XTL_38D4M_X1_CPU R1834 1 2 0R2J-2-GP XTL_38D4M_X1_CPU_R
XTL_38D4M_X2_CPU R1835 1 2 0R2J-2-GP XTL_38D4M_X2_CPU_R R1820 1 2 200KR2F-L-GP
2 3
1 4
C1806 C1805
1
1
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
X1802
XTAL-38D4MHZ-38-GP
2
2
082.30040.0241
2nd = 082.30040.0251
3rd = 082.30040.0231
20200304(DVT1)
BOM use 082.30040.0251 main
082.30040.0241 2nd
A A
<Core Design>
Wistron Corporation
Title
CPU (SPI/LPC/SMBS/XTAL/CLK)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
CY19 Board ID Mapping table

Audio 1D8V_S5
27 HDA_SYNC_CODEC ID Description Setting Mapping
27 HDA_BITCLK_CODEC 1 2 1KR2J-1-GP RTC_DET#
R1912
27 HDA_SDOUT_CODEC
HCAT 13"
27
15
HDA_SDIN0_CPU
HDA_SDO SNDW_RCOMP R1903 1 2 200R2F-L-GP
Follow Hellcat15 Upsell TGL 11 TGL
55 DMIC_PCH_CLK
55 DMIC_PCH_DATA 10 N/A
Board ID[2:1] Board SKU ID
7 OF 21
GPU CPU1G 01 TGL-UP4
10/25 charon modify
D
HDA_BITCLK_CODEC R1904 1 2 33R2J-2-GP HDA_BCLK DR38 DW15
00 TGL-UP3 D
HDA_SYNC_CODEC R1901 1 2 33R2J-2-GP HDA_SYNC DU37 GPP_R0/HDA_BCLK/I2S0_SCLK GPP_F8/I2S_MCLK2_INOUT DW24

HDA_SDOUT_CODEC R1905 1 2 33R2J-2-GP HDA_SDO DT37 GPP_R1/HDA_SYNC/I2S0_SFRM GPP_D19/I2S_MCLK1 1D8V_S5_VCCPRIM 1D8V_S5_VCCPRIM
HDA_SDIN0_CPU DV37 GPP_R2/HDA_SDO/I2S0_TXD DG41
G SENSOR ME_FWP_SW R1902 1 2 1KR2J-1-GP GPP_R3/HDA_SDI0/I2S0_RXD GPP_A23/I2S1_SCLK
GPP_R7/I2S1_SFRM
DT38 BOARD_ID1
1
DV41 DV38 BOARD_ID2 R1908 R1910
66 FFS_INT2 DMIC_PCH_CLK DMIC_PCH_CLK_R GPP_R4/HDA_RST# GPP_R6/I2S1_TXD RTC_DET#
R1918 1 DY 2 0R2J-2-GP DL53 DW38
DMIC_PCH_DATA R1919 1 2 0R2J-2-GP DMIC_PCH_DATA_R DG51 GPP_A7/I2S2_SCLK/DMIC_CLK_A0 GPP_R5/HDA_SDI1/I2S1_RXD
DY FFS_INT2 DG50 GPP_A8/I2S2_SFRM/CNV_RF_RESET#/DMIC_DATA_0 DN31 TBT_DET#
RTC GPP_A10/I2S2_RXD/DMIC_DATA1 GPP_S6/SNDW3_CLK/DMIC_CLK_A0 DM31 10KR2J-3-GP 10KR2J-3-GP
2
DL49 GPP_S7/SNDW3_DATA/DMIC_DATA0 BOARD_ID2 BOARD_ID1
25 RTC_DET# DL52 GPP_A9/I2S2_TXD/MODEM_CLKREQ/CRF_XTAL_CLKREQ/DMIC_CLK_A1 DK33 VRAM_ID1
GPP_A11/PMC_I2C_SDA/I2S3_SCLK GPP_S4/SNDW2_CLK/DMIC_CLK_A1
1
DK31 VRAM_ID2
BT_RADIO_DIS# DH49 GPP_S5/SNDW2_DATA/DMIC_DATA1 R1911 R1909
GPP_A13/PMC_I2C_SCL/I2S3_TXD/DMIC_CLK_B0 DW35 PROJECT_ID2 DY DY
BT SNDW_RCOMP DF33
SNDW_RCOMP
GPP_S2/SNDW1_CLK/DMIC_CLK_B0
GPP_S3/SNDW1_DATA/DMIC_CLK_B1
DV35 PROJECT_ID3
10KR2J-3-GP 10KR2J-3-GP
61 BT_RADIO_DIS#
2
DT32 PROJECT_ID0
GPP_S0/SNDW0_CLK DR35 PROJECT_ID1
GPP_S1/SNDW0_DATA
20191216(EVT)
68 ME_FWP_SW Add R1913 PU 10K TGL-U-1-GP-U2
Follow HCAT 13 CML ID Description Setting Mapping
ZZ.00CPU.481
1D8V_S5_VCCPRIM
3D3V_S0
1 no TBT
10KR2J-3-GP 1 2 R1913 FFS_INT2 PROJECT_ID[3:2] PROJECT_ID[1:0] ID Description Setting Mapping TBT_DET# TBT function detected
1
1D8V_S5_VCCPRIM 1D8V_S5_VCCPRIM 1D8V_S5_VCCPRIM 1D8V_S5_VCCPRIM R1906 0 Have TBT
11 Inspiron 10KR2J-3-GP
NON_TBT
2
R1920 R1922 R1924 R1926 10 Vostro TBT_DET#
10KR2J-3-GP 10KR2J-3-GP DY 10KR2J-3-GP 10KR2J-3-GP PROJECT_ID[3:2] Project Type
1
Inspiron/Vostro Inspiron/Latitude Latitude
2 01 Reseved R1907
2
PROJECT_ID3 PROJECT_ID2 PROJECT_ID1 PROJECT_ID0 10KR2J-3-GP
TBT
1
1
00 N/A
2
R1921 R1923 R1925 R1927
C 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP DY 10KR2J-3-GP 11 3000 Sereis C
Latitude Vostro
10 5000 Sereis
2
2
PROJECT_ID[1:0] Project Series
01 7000 Sereis
00 N/A CY19 VRAM ID Mapping table
20200504(DVT2)
ID Description Setting Mapping
Add for DMIC level-shift
Follow HCAT 14" TGL 3D3V_S5
11 UMA Board
10 N/A
1
C1901
SCD1U16V2KX-3DLGP
VRAM_ID[2:1] dGPU VRAM size
01 DIS Board with 4GB VRAM
2
U1901
5 1
2 DMIC_PCH_CLK_R 00 DIS Board with 2GB VRAM
DMIC_PCH_CLK 1 R1929 2 DMIC_PCH_CLK_L 4 3 TO PCH
TO DMIC 0R0402-PAD-2-GP 1D8V_S5_VCCPRIM 1D8V_S5_VCCPRIM
M74VHC1GT50DFT1G-GP
1
C1902 73.1GT50.00H
1
1
SC27P50V2JN-2DLGP
R1928
DY DY 1KR2F-3-GP 2nd = 073.74134.0A0G R1914 R1916
10KR2J-3-GP MS10KR2J-3-GP
2
2
VRAM_ID2 VRAM_ID1
1
R1915 R1917
DY 10KR2J-3-GP 10KR2J-3-GP
1D8V_S5 UPSELL
2
B B
1
C1903
SCD1U16V2KX-3DLGP
2
U1902
1 5
DMIC_PCH_DATA 2
TO DMIC 3 4 DMIC_PCH_DATA_R
TO PCH
M74VHC1GT50DFT1G-GP
73.1GT50.00H
2nd = 073.74134.0A0G
R1930
1 2
DY
1KR2F-3-GP
1
R1931
DY 2KR2J-1-GP
2
A A
<Core Design>
Wistron Corporation
Title
CPU (HAD/I2S/SD/DMIC)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1

CPU1F 6 OF 21
TOUCH PAD/E3
3D3V_S0
65,66 PCH_I2C1_SCL_TP
65,66 PCH_I2C1_SDA_TP MEM_CHB_EN DC53 DR27
DA51 GPP_B16/GSPI0_CLK GPP_D14/ISH_UART0_TXD DW27 CAM_SHUTTER# 20200219(DVT1)
DC49 GPP_B18/GSPI0_MOSI GPP_D13/ISH_UART0_RXD DV25 KB_LED_BL_DET GPP_C10 -> GPP_D16 ISH_I2C0_ACC_SCL R2051 2 1 2K2R2J-2-GP
G SENSOR SPKR DC50 GPP_B17/GSPI0_MISO
GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1#
GPP_D16/ISH_UART0_CTS#
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/IMGCLKOUT5
DT25 Follow GPIO table ISH_I2C0_ACC_SDA R2052 2 1 2K2R2J-2-GP
DC52
66 FFS_INT1 GPP_B15/GSPI0_CS0# DB45 ISH_I2C0_ACC_SCL UART_2_CRXD_DTXD R2048 2 1 51KR2J-1-GP
CY49 GPP_B6/ISH_I2C0_SCL DB44 ISH_I2C0_ACC_SDA Accelerometer sensor UART_2_CTXD_DRXD R2049 2 DEBUG1 51KR2J-1-GP
55,66 ISH_I2C0_ACC_SCL 1 GC6_THM_DIS#_PCH CY53 GPP_B20/GSPI1_CLK GPP_B5/ISH_I2C0_SDA DEBUG
55,66 ISH_I2C0_ACC_SDA TP2010 CY52 GPP_B22/GSPI1_MOSI CY39 ISH_I2C1_ALS_SCL
GPP_B21/GSPI1_MISO GPP_B8/ISH_I2C1_SCL
20191210(EVT)
DA50 DB47 ISH_I2C1_ALS_SDA Add PU 51K
66 GSEN2_INT1_C GPP_B19/GSPI1_CS0# GPP_B7/ISH_I2C1_SDA
D 55 ISH_ACC1_INT# I2C5_SCL
Follow HCAT 13 CML D
DV21 DD47 20200218(DVT1)
FFS_INT1 DT21 GPP_C9/UART0_TXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL DD44 I2C5_SDA
GPP_C8/UART0_RXD GPP_B9/I2C5_SDA/ISH_I2C2_SDA Follow Nakia
DR21
DW21 GPP_C11/UART0_CTS# DJ8 ISH_P_SENSOR_INT# R2006 2 1 0R0402-PAD-2-GP P_GPIO 20191206(EVT)
20191211(EVT) GPP_C10/UART0_RTS# GPP_E16/ISH_GP7 DR7 LID_CL_SIO_TAB# Follow HCAT DG1
AUDIO Stuff R2050 by GPIO review DV19
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_E15/ISH_GP6
GPP_D18/ISH_GP5
DR24 ISH_LID_CL#_NB R2001 1 2 0R0402-PAD-2-GP LID_CL_SIO#
DT19 DU25 ISH_NB_MODE
27 SPKR TOUCH_DETECT R2050 1 2 0R0402-PAD-2-GP TOUCH_DETECT_CPU DR18 GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_D17/ISH_GP4 DV31 ISH_ALS_INT# R2057 1 2 0R0402-PAD-2-GP ALS_INT#
DU19 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_D3/ISH_GP3/BK3/SBK3 DU31 ISH_TABLE_MODE# R2009 1 2 0R0402-PAD-2-GP TABLE_MODE#
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_D2/ISH_GP2/BK2/SBK2 DT27 ISH_ACC2_INT# R2025 1 2 0R0402-PAD-2-GP GSEN2_INT1_C
UART_2_CTXD_DRXD DJ21 GPP_D1/ISH_GP1/BK1/SBK1 DV27 ISH_ACC1_INT#
20191213(EVT)
KEYBOARD Swap modify UART_2_CRXD_DTXD DG23 GPP_C21/UART2_TXD
GPP_C20/UART2_RXD
GPP_D0/ISH_GP0/BK0/SBK0
TOUCH_PANEL_INTR# DJ19 DR51 GPP_RCOMP R2021 1 2 200R2F-L-GP
65 KB_LED_BL_DET DF21 GPP_C23/UART2_CTS# GPP_RCOMP
GPP_C22/UART2_RTS# DN33
I2C0_SCL_TS DV18 GPP_T3/I2C7_SCL DT35
TOUCH I2C0_SDA_TS DW18 GPP_C17/I2C0_SCL GPP_T2/I2C7_SDA
OTHER GPP_C16/I2C0_SDA
GPP_U5/GSPI3_CLK
DG17
PCH_I2C1_SCL_TP DJ23 DG19
24 TABLE_MODE# PCH to Touch Pad / E3 PCH_I2C1_SDA_TP DT18 GPP_C19/I2C1_SCL
GPP_C18/I2C1_SDA
GPP_U4/GSPI3_CS0#
SDA/SCL/INT Pull UP on TP side(page65)
24 NB_MODE# DJ29
55 P_GPIO
PCH to Type-C PD DJ31 GPP_H5/I2C2_SCL
GPP_H4/I2C2_SDA
SDA/SCL/INT Pull UP on PD side(page72)
DBC_PANEL_EN DF29
MEMORY MEM_DIE_CFG1 DG29 GPP_H7/I2C3_SCL
GPP_H6/I2C3_SDA
18 MEM_CHA_EN DF25
20191224(EVT) GPP_H9/I2C4_SCL/CNV_MFUART2_TXD
Change from GPP_H15 -> GPP_H6 DF27
21 MEM_DIE_CFG1 GPP_H8/I2C4_SDA/CNV_MFUART2_RXD
TGL-U-1-GP-U2
ZZ.00CPU.481
PCH to Type-C PD
71 I2C5_SCL
71 I2C5_SDA
C C
eDP Pull high to enable DDR

55 DBC_PANEL_EN 1D8V_S5 1D8V_S5
3D3V_S5 20191206(EVT)
Follow HCAT DG1
LID 20191210(EVT)
1
1
R2031 R2033 Add R2018 100k
10KR2J-3-GP 10KR2J-3-GP Follow HCAT 13 CML R2005 3D3V_HINGE_S0
24,67,92 LID_CL_SIO# 10KR2J-3-GP
Q2001
2
MEM_CHA_EN MEM_CHB_EN ISH_NB_MODE G
2
1
68 UART_2_CTXD_DRXD R2030 R2032 D NB_MODE#

68 UART_2_CRXD_DTXD
1
R2010 1 2 10KR2J-3-GP P_GPIO
R2018 S
55 ISH_I2C1_ALS_SDA
DY DY
100KR2J-1-GP PJA138KA-GP
55 ISH_I2C1_ALS_SCL 10KR2J-3-GP 10KR2J-3-GP
2
084.00138.0A31
2
2nd = 084.00138.0C31
TOUCH
55 I2C0_SDA_TS
55 I2C0_SCL_TS
55 TOUCH_DETECT
55 TOUCH_PANEL_INTR#
55 ALS_INT#
24,67 LID_CL_SIO_TAB#
55 CAM_SHUTTER#
B B
DA51: NRB_BIT
DC49: VGA_DB_DET#
CY49: TPM_PIRQ#
CY53: GC6_THM_DIS#_PCH
CY52: PCH_3.3V_TS_EN
DA50: HDD_FALL_INT
DV21: SBIOS_TX
DR21: USBC0_AUX_N_BIAS
DW21: USBC0_AUX_P_BIAS
DV19: DGPU_MACO_EN
DT19: SIO_EXT_WAKE#
DR18: PCH_HDD_EN
DU19: LCD_CBL_DET#
DG23: cTPM_PRSNT#
DJ19: TOUCH_PANEL_INTR#
DF21: TOUCH_I2C_DET#
DV18: I2C0_SCL_TS
DW18: I2C0_SDA_TS
DF29: DBC_PANEL_EN
DG29: LOM_CABLE_DETECT#
DF25: CNV_COEX1
DF27: CNV_COEX2
DR27: STYLUS_PWR_OCP#
DW27: CAM_SHUTTER#
DT25: IO_DB_DET#
CY39: ISH_I2C1_ALS_SCL
DB47: ISH_I2C1_ALS_SDA
DD47: ISH_I2C2_SCL
DD44: ISH_I2C2_SDA DG17: ZPODD_PWR_EN#
DJ8: ISH_P_SENSOR_INT# DG19: ZPODD_DA#
DV31: ISH_ALS_INT#
A A
<Core Design>
Wistron Corporation
Title
CPU (UART/I2C/ISH)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
61
61
CNV_W R_DN0
CNV_W R_DP0
CPU1J 10 OF 21
61 CNV_W R_DN1 ID Description Setting Mapping CNV_W T_DP1
D22 DK47
61 CNV_W R_DP1 B22 CSI_F_DP1 CNVI_WT_D1P DM47 CNV_W T_DN1
E22 CSI_F_DN1 CNVI_WT_D1N DN49 CNV_W T_DP0
61 CNV_W R_CLKN 1 3733MHz D20 CSI_F_DP0 CNVI_WT_D0P DR49 CNV_W T_DN0
61 CNV_W R_CLKP MEM_Speed SEL Speed A20 CSI_F_DN0 CNVI_WT_D0N DN45 CNV_W T_CLKP
Configuration B20 CSI_F_CLK_P CNVI_WT_CLKP DN47 CNV_W T_CLKN
61 CNV_W T_DN0 0 3200MHz CSI_F_CLK_N CNVI_WT_CLKN
61 CNV_W T_DP0 B18 DU43 CNV_W R_DP1
A18 CSI_E_DP1/CSI_F_DP2 CNVI_WR_D1P DV43 CNV_W R_DN1
D D
61 CNV_W T_DN1 D18 CSI_E_DN1/CSI_F_DN2 CNVI_WR_D1N DR44 CNV_W R_DP0
61 CNV_W T_DP1 E18 CSI_E_DP0/CSI_F_DP3 CNVI_WR_D0P DT43 CNV_W R_DN0
C16 CSI_E_DN0/CSI_F_DN3 CNVI_WR_D0N DV44 CNV_W R_CLKP
61 CNV_W T_CLKN 1D8V_S5 CSI_E_CLK_P CNVI_WR_CLKP
D16 DW44 CNV_W R_CLKN
61 CNV_W T_CLKP CSI_E_CLK_N CNVI_WR_CLKN
D15 DN51 CNV_W T_RCOMP R2102 1 2 150R2F-1-GP
1
61 CNV_BRI_RSP R2110 CSI_C_DP2 CNVI_WT_RCOMP
E15
61 CNV_RGI_RSP A15 CSI_C_DN2 DJ13 CNV_RGI_RSP
3733MHZ B15 CSI_C_DP3 GPP_F3/CNV_RGI_RSP/UART0_CTS# DG13 CNV_RGI_DT
15,61 CNV_RGI_DT CSI_C_DN3 GPP_F2/CNV_RGI_DT/UART0_TXD DF15 CNV_BRI_RSP
61 CNV_BRI_DT 10KR2J-3-GP GPP_F1/CNV_BRI_RSP/UART0_RXD CNV_BRI_DT
L18 DF17
2
N18 CSI_C_DP1 GPP_F0/CNV_BRI_DT/UART0_RTS#
1 BT_PCMFRM_RSTN MEM_SPEED_SEL CSI_C_DN1
L20 DJ10 CLKREQ_CNV R2104 1 2 33R2F-3-GP BT_PCMOUT_CLKREQ0
N20 CSI_C_DP0 GPP_F5/MODEM_CLKREQ/CRF_XTAL_CLKREQ DV15
1
R2111 CSI_C_DN0 GPP_F6/CNV_PA_BLANKING CNV_RF_RESET# BT_PCMFRM_RSTN
1 BT_PCMOUT_CLKREQ0 G20 DK10 R2105 1 2 33R2F-3-GP
H20 CSI_C_CLK_P GPP_F4/CNV_RF_RESET#
3200MHZ CSI_C_CLK_N
H16
10KR2J-3-GP CSI_B_DP1
G16
2
G18 CSI_B_DN1
STYLUS_PW R_OCP# CSI_B_DP0
H18
L16 CSI_B_DN0
N16 CSI_B_CLK_P
CSI_B_CLK_N
G14
H14 CSI_B_DP2
L14 CSI_B_DN2
N14 CSI_B_DP3
C CSI_B_DN3 C
MEMORY R2103 1 2 150R2F-1-GP CSI_RCOMP K14
CSI_RCOMP
MEM_DIE_CFG0 DK25
3 MEM_CONFIG4 MEM_CONFIG1 GPP_H23/IMGCLKOUT4
DM25
MEM_CONFIG2 DN25 GPP_H22/IMGCLKOUT3
20 MEM_DIE_CFG1 MEM_CONFIG3 GPP_H21/IMGCLKOUT2
DJ25
STYLUS_PW R_OCP#DR30 GPP_H20/IMGCLKOUT1
18 MEM_SPEED_SEL GPP_D4/IMGCLKOUT_0/BK4/SBK4
20191204(EVT)
Follow HCAT DG1 TGL-U-1-GP-U2
ZZ.00CPU.481
MEM_CONFIG Mapping table

CY19 Board ID Mapping table
ID Description Setting Mapping ID Description Setting Mapping
11 DIMM Design 11 ODP
On-board memory configuration 10 Micron MEM_Die CONFIG[1:0] SDP/DDP/QDP/ODP

10 QDP
MEM_CONFIG[4:3] for chip vendor Configuration
B 01 Hynix 01 DDP B
00 Samsung 00 SDP
11 N/A 1D8V_S5 1D8V_S5
On-board memory configuration 10 16GB
1
R2106 R2108
MEM_CONFIG[2:1] for total memory size per channel
01 8GB ODP/QDP ODP/DDP
10KR2J-3-GP 10KR2J-3-GP
2
00 4GB MEM_DIE_CFG1 MEM_DIE_CFG0
1
R2107 R2109
1 QDP
MEM_CONFIG[0] QDP/DDP Configuration
SDP/DDP SDP/QDP
0 DDP 10KR2J-3-GP 10KR2J-3-GP
2
1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5
1
R2112 R2114 R2116 R2118
A Micron Hynix 16GB 8GB <Core Design>

A
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

2
MEM_CONFIG4 MEM_CONFIG3 MEM_CONFIG2 MEM_CONFIG1 Wistron Corporation

1
R2113 R2115 R2117 R2119 Taipei Hsien 221, Taiwan, R.O.C.
Title
Samsung/Hynix Samsung/Micron 4GB/8GB 4GB/16GB CPU (CSI/EMMC/CNVi)
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP
2

A3
5 4 3 2 1
5 4 3 2 1
CPU1N 14 OF 21 (1.3A)
50 VCCAUX_SENSE 1D8V_VCCIN_AUX Trace width > 40mil
1D8V_S5
1D8V_S5_VCCPRIM
50 VSSAUX_SENSE 1D05V_S5_VCCDSW _OUT
AB12 CY18 R2203 2 1 0R0603-PAD-2-GP-U
40,50 CORE_VID0 VCCIN_AUX VCCPRIM_1P8
AC10 CY20 R2205 2 1 0R0603-PAD-2-GP-U
AE10 VCCIN_AUX VCCPRIM_1P8 CY24 C2204
40,50 CORE_VID1 VCCIN_AUX VCCPRIM_1P8
SC1U10V2KX-1DLGP
AK2 CY26
VCCIN_AUX VCCPRIM_1P8
1
AR10 DA18
AT12 VCCIN_AUX VCCPRIM_1P8 DA20
AU10 VCCIN_AUX VCCPRIM_1P8 DA22
2
AW10 VCCIN_AUX VCCPRIM_1P8 DA24
VCCIN_AUX VCCPRIM_1P8 Place cap within
BV1 DA26
D
BV39 VCCIN_AUX VCCPRIM_1P8 DC18
3mm from SOC edge D
BW40 VCCIN_AUX VCCPRIM_1P8 DC20

BY39 VCCIN_AUX VCCPRIM_1P8 DC22 1D24V_S5_VCCDPHY_OUT
CC1 VCCIN_AUX VCCPRIM_1P8 DC24
CD12 VCCIN_AUX VCCPRIM_1P8 DC26
72 PROCHOT#_CPU VCCIN_AUX VCCPRIM_1P8
CF10 DD20
CG12 VCCIN_AUX VCCPRIM_1P8 DD22
VCCIN_AUX VCCPRIM_1P8 (200mA)
VNN_EN CH10 DV22 3D3V_S5_VCCPRIM Place cap within C2205
VCCIN_AUX VCCPRIM_1P8
1
SC4D7U6D3V3KX-DLGP
CJ1
54 VNN_CTRL_R
CJ12 VCCIN_AUX DA35 3mm from SOC edge
VCCIN_AUX VCCPRIM_3P3 For CNVi
CK10 DC28
40 V1P05_CTRL_R
2
CL12 VCCIN_AUX VCCPRIM_3P3 DC30 0D85V_S5_VCCLDOSTD_OUT
CM10 VCCIN_AUX VCCPRIM_3P3 DD30
CP1 VCCIN_AUX VCCPRIM_3P3
CP10 VCCIN_AUX DV34 C2213
VCCIN_AUX DCPRTC 3D3V_RTC_EXT
SC2D2U10V3KX-1DLGP-U
CR12
VCCIN_AUX
1
CT10 DV46 0D85V_S5_VCCLDOSTD_OUT
CU12 VCCIN_AUX VCCLDOSTD_0P85
CY1 VCCIN_AUX DV16 1D8V_S5_CLKLDO (165mA)
2
AK1 VCCIN_AUX VCCA_CLKLDO_1P8 DC15
PH/PL 100R at VR side. VCCIN_AUX VCCA_CLKLDO_1P8
VSSAUX_SENSE AV9 DV28
VCCIN_AUX_VSSSENSE VCCDPHY_1P24 1D24V_S5_VCCDPHY_OUT
VCCAUX_SENSE AT9
VCCIN_AUX_VCCSENSE DD38
3D3V_S5_VCCPRIM VCCDSW_1P05 1D05V_S5_VCCDSW _OUT
DD17
(200mA) 1D05V_VNN_BYPASS DD18 VCC_VNNEXT_1P05 BR3
VCC_VNNEXT_1P05 VCC1P05 BR4
1D05V_S5_OUT (1.5A) Supply to
DA15 VCC1P05 BT5 VCCST & VCCSTG
(200mA) 1D05V_S5_BYPASS VCC_V1P05EXT_1P05 VCC1P05
C DA17 C
VCC_V1P05EXT_1P05 DA31
VCCPRIM1P05_OUT_PCH 1D05V_S5_VCCPRIM_OUT (Output)
R2211 1 2 10KR2J-3-GP VRALERT# DB39 DC33
VNN_CTRL_R R2212 1 2 0R0402-PAD-2-GP VNN_CTRL DV12 GPP_B2/VRALERT# VCCPRIM1P05_OUT_PCH DC31
V1P05_CTRL_R R2213 1 2 0R0402-PAD-2-GP V1P05_CTRL DT12 GPP_F22/VNN_CTRL VCCPRIM1P05_OUT_PCH 11.12 Modify
GPP_F23/V1P05_CTRL DC35
CORE_VID0 VCCRTC RTC_AUX_S5
3D3V_S5_VCCPRIM 1
(3mA)
DB37 DD37 DY 2 R2202 3D3V_S5
CORE_VID1 DB38 GPP_B0/CORE_VID0 VCCGPPR VCCDSW_3P3 DA28 0R2J-2-GP 1D8V_S5
GPP_B1/CORE_VID1 VCCPGPPR 1D8V_GPPR_S5
20191209(EVT) 3.3V or 1.8V 1 2
CY31 3D3V_S5_VCCPRIM R2207 0R0402-PAD-2-GP Must take care
Follow Nakia N7 VCCPRIM_3P3 CY33
Intel CRB and Intel review VCCPRIM_3P3 CV39 11.12 Modify this power layout
VCCPRIM_1P8 1D8V_S5_VCCPRIM and add shield GND.
D2201 TP_VCCANA_EHV
PROCHOT#_CPU AP12 1
A K VRALERT# RSVD#AP12 TP2201
1D8V_S5 1D8V_S5_CLKLDO
RB520S30-GP
83.R2003.A8M
TGL-U-1-GP-U2
R2204 (165mA)
1 2
ZZ.00CPU.481 0R0402-PAD-2-GP C2215 C2216
2nd = 083.52030.008F
PH Same as SPI Programming Guide for details
1
1D8V_S5
2
RN2201
(1.3A)
1 4 CORE_VID0 1D8V_S5_VCCPRIM 3D3V_S5_VCCPRIM RTC_AUX_S5 3D3V_RTC_EXT 1D05V_S5_VCCPRIM_OUT
B 2 3 CORE_VID1 B
SRN10KJ-5-GP C2210 C2211 DY

1
1
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
C2248 C2203
10/09,RN2201 Pin3 ->CORE_VID1,charon
DY DY DYC2201 C2202 C2206 C2207 SCD1U16V2KX-3DLGP SC1U10V2KX-L1-GP
2
2
SC1U10V2KX-L1-GP SC1U10V2KX-1DLGP
SCD1U16V2KX-3DLGP SCD1U16V2KX-3DLGP
20200424(DVT2)
Change to PRIM power rail
(200mA) (200mA) Follow Hellcat series
1D05V_S5_BYPASS 1D05V_VNN_BYPASS
1D05V_S5_OUT 3D3V_S5_VCCPRIM 1D8V_GPPR_S5
1
C2208 C2209 1 C2214

DY C2246 DY C2247 DY SC1U10V2KX-L1-GP SC1U10V2KX-1DLGP DY SCD1U16V2KX-L-GP
2
2
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
Close to pin DD37
A A
<Core Design>
(SR#1406479253)
Wistron Corporation
Title
CPU (PCH-LP PWR&Caps)
A3
5 4 3 2 1
5 4 3 2 1
CPU1Q 17 OF 21
CPU1P 16 OF 21
CPU1R 18 OF 21
BY44 CY44
A27 B19 VSS VSS
VSS VSS BY45 CY45
A32 B2 DP53 K34 VSS VSS
VSS VSS VSS VSS BY47 CY47
A45 B23 DR11 K48 VSS VSS
VSS VSS VSS VSS BY49 CY5
A49 B27 DR16 K5 VSS VSS
VSS VSS VSS VSS BY9 D27
AA41 B32 DR22 L22 VSS VSS
VSS VSS VSS VSS C13 D32
D AA48 B36 DR28 L28 VSS VSS D
AB5 B39 DR34 L34 VSS VSS
VSS VSS VSS VSS CA48 D49
VSS VSS VSS VSS CB41 D5
AC44 B52 DT4 L42 VSS VSS
VSS VSS VSS VSS CC10 DA30
AC49 B8 DT50 L44 VSS VSS
AD4 BA48 DU11 L45 VSS VSS
AD48 BA53 DU16 L47 VSS VSS
VSS VSS VSS VSS CD44 DC17
AD8 BB4 DU22 L49 VSS VSS
VSS VSS VSS VSS CD48 DD15
AF4 BB8 DU28 M1 VSS VSS
VSS VSS VSS VSS CD7 DD24
AF8 BC1 DU34 M2 VSS VSS
VSS VSS VSS VSS CE49 DD26
AG41 BC2 DU40 M50 VSS VSS
VSS VSS VSS VSS CG48 DD28
AG42 BD12 DU46 N22 VSS VSS
AG44 BD4 DV1 N28 VSS VSS
VSS VSS VSS VSS CH41 DD39
AG48 BF39 DW51 N41 VSS VSS
AG53 BF4 E13 N48 VSS VSS
AH4 BF41 E19 P11 VSS VSS
AH8 BF42 E35 P14 VSS VSS
VSS VSS VSS VSS CH47 DE3
C AK12 BF44 E48 P16 VSS VSS C
VSS VSS VSS VSS CJ3 DE5
AK4 BF45 G22 P18 VSS VSS
VSS VSS VSS VSS CJ5 DF19
VSS VSS VSS VSS CJ9 DF37
VSS VSS VSS VSS CK39 DG15
AM1 BG48 G51 P4 VSS VSS
VSS VSS VSS VSS CL9 DG33
AM2 BG53 G52 P49 VSS VSS
VSS VSS VSS VSS CN12 DG39
AM4 BH1 H12 P8 VSS VSS
AM8 BH2 H22 R39 VSS VSS
AN41 BH4 H28 R44 VSS VSS
AN42 BH8 H34 T19 VSS VSS
AN44 BK12 H8 T29 VSS VSS
VSS VSS VSS VSS CP3 DJ1
AN45 BK4 J39 T33 VSS VSS
AN47 BK48 J49 T4 VSS VSS
AN48 BK8 K16 T48 VSS VSS
VSS VSS VSS VSS CP44 DK51
AN53 BL49 K18 T8 VSS VSS
VSS VSS VSS VSS CP45 DL3
AP4 BM1 K20 U19 VSS VSS
VSS VSS VSS VSS CP5 DL5
AP8 BM4 K22 U25 VSS VSS
VSS VSS VSS VSS CR48 DM10
AT4 BM41 K28 U39 VSS VSS
VSS VSS VSS VSS CR53 DM15
B AT48 BM42 U49 VSS VSS B
VSS VSS VSS CR9 DM21
AT51 BM44 V19 VSS VSS
VSS VSS VSS CT5 DM27
AT8 BM45 V4 VSS VSS
VSS VSS VSS CU4 DM33
AV12 BM47 V8 VSS VSS
VSS VSS VSS CU9 DM39
AV39 BM8 W1 VSS VSS
VSS VSS VSS CV10 DM4
AV4 BN48 W16 VSS VSS
VSS VSS VSS CV48 DM45
AV5 BP41 W26 VSS VSS
VSS VSS VSS CV5 DN1
AV7 BP49 W30 VSS VSS
VSS VSS VSS CV51 DN2
AV8 BP5 W39 VSS VSS
VSS VSS VSS CV52
AW1 BP50 W41 VSS
VSS VSS VSS CY17
AW2 BP7 W42 VSS
VSS VSS VSS CY22
AW48 BT44 W44 VSS
VSS VSS VSS CY35
AY4 BT48 W45 VSS
VSS VSS VSS CY41
AY41 BU49 W47 VSS
VSS VSS VSS CY42
AY42 BV3 W48 VSS
AY44 VSS VSS BV48 VSS Y4 ZZ.00CPU.481
AY45 VSS VSS BV5 VSS Y49
VSS VSS VSS TGL-U-1-GP-U2 <Core Design>
AY47 BW10 Y50
AY8 VSS VSS BY41 VSS Y8
VSS VSS VSS
A
AY9
B13 VSS VSS
BY42
VSS TGL-U-1-GP-U2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
TGL-U-1-GP-U2 ZZ.00CPU.481
Title
ZZ.00CPU.481 CPU (VSS)
A4
5 4 3 2 1
5 4 3 2 1
Main Func = KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC MODEL ID

3D3V_S5 3D3V_S5_KBC
1D05V_VCCST
20191226(EVT) 20200604(PVT)
1
49.9k for A00
1
13" Upsell 17.8K R2443
13" MS 27K R2442 BOARD_ID
PECI_VREF VREF_ADC VTR_REG VTR_PLL VTR1_ADC MODEL_ID 49K9R2F-L-GP
VTR2 17K8R2F-GP
2
1
1
SCD1U16V2KX-3DLGP
C2432
SCD1U16V2KX-3DLGP
C2427
SCD1U16V2KX-3DLGP
C2425
SCD1U16V2KX-3DLGP
C2422
SCD1U16V2KX-3DLGP
C2424
2
1
C2406
SCD1U16V2KX-3DLGP
MODEL_ID
BOARD_ID
2
2
1
40,54 PWR_VNN1D05V_PG
1
SCD1U16V2KX-3DLGP
C2407
R2441
SCD1U16V2KX-3DLGP
25 VCCDSW_EN 100KR2F-L1-GP R2444
1
C2408
100KR2F-L1-GP
2
65 DAT_TP_SIO_I2C_CLK
2
65 CLK_TP_SIO_I2C_DAT 20200424(DVT2) D2401
Change power to VCCST 1 PANEL_BKEN_EC_R 1 R2428 2 PANEL_BKEN_EC eDP backlight
17 SIO_PWRBTN# Follow Intel CRB 0R0402-PAD-2-GP Control from EC
PANEL_BKEN 3
65 KSI[0..7]
L_BKLT_EN_L R2427 L_BKLT_EN eDP backlight
2 1 2
18,68 ESPI_CS# 0R0402-PAD-2-GP Control from PCH 3D3V_S5_KBC 3D3V_S5 3D3V_S5
67 LID_POWER_ON#
BAT54C-12-GP
18,68 ESPI_CLK 3D3V_S5 3D3V_S5_KBC
75.00054.A7D
18,40,68 ESPI_RESET# R2446 2 1 0R0603-PAD-2-GP-U RN2402
D 72 CCG6_I2C_INT# 2nd = 75.00054.T7D D
2
PBAT_CHG_SMBDAT 3 2
2
20191216(EVT) L_BKLT_EN R2448 PBAT_CHG_SMBCLK 4 1
64 MASK_SATA_LED# Layout swap request R2452 DY 100KR2J-1-GP
17 SYS_PWROK 68 ME_FWP 3D3V_S5_KBC 100KR2J-1-GP SRN4K7J-8-GP
1
43,44 PBAT_PRES#
1
SCD1U16V2KX-3DLGP
C2421
SCD1U16V2KX-3DLGP
C2416
R2436 LID_CL_SIO# BB_RST
1
18,68 ESPI_IO0 25 RTCRST_ON RN2412 DY100KR2J-1-GP 3D3V_S5_KBC
1
SCD1U16V2KX-3DLGP
C2420
SCD1U16V2KX-3DLGP
C2412
SCD1U16V2KX-3DLGP
C2411
SCD1U16V2KX-3DLGP
C2410
SCD1U16V2KX-3DLGP
C2414
SCD1U16V2KX-3DLGP
C2413
1 8 KSO16
2
2 7 KSO12 PBAT_PRES#
18,68 ESPI_IO1 17,64 PCH_RSMRST# R2415 1 2 100KR2J-1-GP
2
3 6 KSO00 3D3V_S5
2
18,68 ESPI_IO2
4 5 KSO02
1
18,68 ESPI_IO3 3,65 TOUCH_PAD_INTR#
SRN100KJ-5-GP R2434
RN2409 100KR2J-1-GP POGO_PWR_EN R2488 1 2 1MR2J-1-GP
65 KSO00
1 8 KSO07
65 KSO01 20,67,92 LID_CL_SIO# 43,44 AC_DIS
2 7 KSO06
2
3 6 KSO08 USB_PWR_EN#
65 KSO02
4 5 KSO03 20200526(DVT2)
65 KSO03 17,40,44,46 ALL_SYS_PWRGD 66 USB_PWR_EN#
65 KSO04 Change to 10k ohm
3D3V_S5_KBC Internal review 20191216(EVT)
65 KSO05 65 CAP_LED#_R 3D3V_S0
SRN100KJ-5-GP If don't need RTC alarm wake up, Add R2488 PD 1M
65 KSO06
65 KSO07 64 CHG_AMBER_LED# RN2410 RN2403 can change to 3D3V_AUX_S5 For eSPI Follow HCAT 13 CML
1 8 KSO15 1 8 KSI0 U2401
65 KSO08 3D3V_RTC
2 7 KSO13 2 7 KSI3
1
65 KSO09 1D8V_S5 1D8V_S5_KBC SSD_SCP# SSD_SCP#_M2
65 KSO10 53 PRIM_PWRGD
3 6 KSO14 3 6 KSI1 A8 B64 R2474 2 1 0R0402-PAD-2-GP
4 5 4 5 B5 VTR1 GPIO101/BGPO1 B43 R2455
65 KSO11 64 BATT_WHITE_LED# KSO09 KSI5 MSCLK
B48 VTR1 GPIO104/UART0_TX/TFDP_CLK/VTR2_STRAP A41 MSDATA DY 100KR2J-1-GP
2
65 KSO12 VTR1 GPIO105/UART0_RX/TFDP_DATA/TRACECLK RESET_OUT# SYS_PWROK
B39 B3 R2408 1 2 0R0402-PAD-2-GP
65 KSO13 74 TYPEC_DCIN1_EN# SRN10KJ-6-GP R2472 VTR1 GPIO106/PWROK
SRN100KJ-5-GP A52 B36
2
65 KSO14 KSO04
RN2404 0R0402-PAD-2-GP VTR1 GPIO107/SMI#/KSO04/I2C10_SCL
65 KSO15 26 FAN_TACH1 VTR1_ADC SSD_SCP#
65 KSO16 RN2411 1 8 KSI7 A15 B37 KSO05
1 4 KSO10 2 7 KSI6 R2462 1 2 0R0402-PAD-2-GP VTR1_ADC GPIO112/KSO05 A35 KSO06
1
43,44 PBAT_CHG_SMBDAT 2 3 3 6 B26 GPIO113/KSO06/ICT9 B38 PCH_RSMRST#_R 1 0R0402-PAD-2-GPPCH_RSMRST#
KSO11 KSI4 VTR2 R2404 2 G3
4 5 KSI2
C2423 2 1 SCD1U16V2KX-3DLGP B19 VTR2 GPIO114/PS2_CLK0A/EC_SCI# A36 LID_CL_SIO#
17,26 IMVP_VR_ON VTR3 GPIO115/PS2_DAT0A PS_ID
SRN100KJ-6-GP B41
VTR_PLL B4 GPIO116 A39 TABLE_MODE# R2422 1 2 0R2J-2-GP DUAL_BOOT_EVENT# 20191224(EVT)
20 NB_MODE#
RN2407 SRN10KJ-6-GP 3D3V_ECVBAT A64 VTR_PLL GPIO117 DY Dell request reserve
1 4 KSO04 VTR_REG B9 VBAT A34 KSO07
1
SCD1U16V2KX-3DLGP
C2428
63 SSD_SCP#_M2 2 3 KSO05
3D3V_RTC
Layout Note: VREF_ADC B11 VTR_REG GPIO120/KSO07 B45 KSO08 JTAG DEBUG CONN
C2418 2 1 SC1U10V2KX-1DLGP VR_CAP B8 VREF_ADC GPIO121/PVT_IO0/KSO08 A43
65 KB_LED_PWM 2 R2457 1 Place close to Mec1515 VR_CAP GPIO122/PVT_IO1/KSO09 B46
KSO09
SRN100KJ-6-GP KSO10
2
DY GPIO123/PVT_IO2/KSO10 B10 KSO11
27 BEEP 100KR2J-1-GP SYSPWR_PRES GPIO124/PVT_CS#/KSO11/ICT12 3D3V_S5
2 1 B68 B47 KSO12
20 TABLE_MODE# 3D3V_S5_KBC SHD_CS1# B28 GPIO000/SYSPWR_PRES/VCI_IN3#/I2C11_SDA GPIO125/PVT_CLK/KSO12 A44 KSO13
R2454 GPU_THM_SMBDAT A59 GPIO002/PWM5/SHD_CS1# GPIO126/PVT_IO3/KSO13 A46 RTCRST_ON
100KR2J-1-GP GPU_THM_SMBCLK B62 GPIO003/I2C00_SDA/UART2_RI# GPIO127/A20M/UART1_RTS#
43 PS_ID RN2414
2 3 SML1_SMBCLK_THM TPAD14-OP-GP TP2404 1 AUX_ON A47 GPIO004/I2C00_SCL/UART2_DCD# A25 PBAT_CHG_SMBDAT
20200604(PVT) GPIO007/I2C03_SDA/PS2_CLK0B GPIO130/I2C01_SDA
1 4 SML1_SMBDATA_THM B27 PBAT_CHG_SMBCLK
Add RN2414 for SMBus PU GPIO131/I2C01_SCL R2485 RN2455 R2456 R2449 R2463
FPR_SCAN# B50 A49 KSO16
M_BIT
8
7
6
5
1
64 M_BIST pull high on CPU side
49D9R2F-GP
SRN10KJ-6-GP
10KR2F-2-GP
100KR2J-1-GP
10KR2F-2-GP
MASK_SATA_LED# B21 GPIO010/I2C03_SCL/PS2_DAT0B GPIO132/I2C06_SDA/KSO16
43,44 PBAT_CHG_SMBCLK SRN2K2J-1-GP VCCDSW_EN GPIO011/SMI_ALT#/PWM4/ICT7 CAP_LED#
B25 B53 JTAG DY
TPAD14-OP-GP TP2405 1DGPU_PWROK_EC A24 GPIO012/I2C07_SDA GPIO140/I2C06_SCL/ICT5/KSO17 B60 PTP_DIS# JTAG
PWM_FAN1 A27 GPIO013/I2C07_SCL GPIO141/I2C05_SDA/UART2_RTS# A57 POGO_PWR_EN
55 PANEL_MONITOR GPU_THM_SMBDAT R2447 1 2 0R0402-PAD-2-GP SML1_SMBDATA_THM GPIO014/PWM6/GPTP_IN2 GPIO142/I2C05_SCL/UART2_CTS#
SHD_IO3 A21 B61 UPD1_SMBDAT
2
68 HOST_DEBUG_TX GPIO016/GPTP_IN1/SHD_IO3/ICT3/DSW_PWROK GPIO143/I2C04_SDA/UART0_CTS# UPD1_SMBCLK JTAG1
KSI0 B32 A58
1
2
3
4
GPIO017/KSI0/UART0_DCD# GPIO144/I2C04_SCL/UART0_RTS# JTAG_TDI 11
65 PTP_DIS# GPU_THM_SMBCLK SML1_SMBCLK_THM B58 JTAG_PU
3D3V_S5_KBC 3D3V_ECVBAT R2459 1 2 0R0402-PAD-2-GP GPIO145/I2C09_SDA/JTAG_TDI/UART2_RX JTAG_TDO 1
KSI1 A29 A55
KSI2 B31 GPIO020/KSI1 GPIO146/I2C09_SCL/JTAG_TDO/UART2_TX B59 JTAG_CLK
3 PECI_CPU GPIO021/KSI2 GPIO147/I2C15_SDA/JTAG_CLK/UART2_DSR# 2 JTAG_TDI
KSI3 B34 JTAG_TMS
17 EC_PCH_SPI_EN GPIO026/KSI3/UART0_DTR#/I2C12_SDA 3
1
KSI4 B35 A56 JTAG_TMS
27 NB_MUTE# 4 JTAG_CLK
GPIO027/KSI4/UART0_DSR#/I2C12_SCL GPIO150/I2C15_SCL/JTAG_TMS/UART2_DTR#
2
R2458 A30 KSO15 3D3V_S0 JTAG_TDO
R2496 GPIO151/ICT4/KSO15 JTAG 5
C
20,67 LID_CL_SIO_TAB# 100KR2J-1-GP KSI6 A32 A9 KSO14 C
GPIO031/KSI6/GPTP_OUT1 GPIO152/KSO14 BAT2_LED# 6 MSCLK
100KR2J-1-GP KSI5 A33 B54
GPIO030/KSI5/I2C10_SDA GPIO153/LED2 CLK_TP_SIO_I2C_DAT 7 MSDATA
2
44,64 HW_ACAV_IN KSI7 B33 A48 HOST_DEBUG_TX
8
2
IMVP_VR_ON B1 GPIO032/KSI7/GPTP_OUT0/UART0_RI# GPIO154/I2C02_SDA/PS2_CLK1B B51 DAT_TP_SIO_I2C_CLK R2489
3D3V_S0 9 DEBUG_TX
1
Need very close to EC, BEEP A6 GPIO033/TACH3 GPIO155/I2C02_SCL/PS2_DAT1B B49 BREATH_LED# 1 TP2408 TPAD14-OP-GP 100KR2J-1-GP
92 FPR_SCAN# FPR_SCAN# LID_POWER_ON# GPIO035/PWM8/CTOUT1/ICT15 GPIO156/LED0 BAT1_LED# 10 R24141 20R2J-2-GP
PDG: <0.5 inches. A50 JTAG
GPIO157/LED1 Q2414 12
KSO00 A31
26 PWM_FAN1 GPIO040/GPTP_OUT2/KSO00/UART1_CTS#
1
PECI_CPU 1 2 PECI_EC A37 A54 PCIE_WAKE# 1 TP2406 TPAD14-OP-GP CAP_LED# S
2
Notice:ZZ.2N702.J3101
PANEL_BKEN_EC GPIO042/PECI_DAT/SB-TSI_DAT GPIO165/32KHZ_IN/CTOUT0 ACES-CON10-28-GP-U

3D3V_AUX_S5 R2437 B40
R2430 PECI_VREF GPIO043/SB-TSI_CLK HOST_DEBUG_TX CAP_LED#_R
43R2J-GP A38
GPIO044/VREF_VTT GPIO170/UART1_TX/JTAG_STRAP
B42 D 20.K0460.010 HOST_DEBUG_TX 1 2
1
KSO01 B57 B56 CCG6_I2C_INT#
10KR2J-3-GP
C2405 KSO02 B44 GPIO045/KSO01/PWM2_ALT/ICT14/CR_STRAP GPIO171/UART1_RX A45 PBAT_PRES# G R2484 6K2R2F-GP
U2403 DY A42 GPIO046/KSO02/ICT11 GPIO175/CMP_VOUT1/PWM8_ALT 3D3V_S0
1
SC100P50V2JN-3GP KSO03
55 LCD_TST
2
D2403
GPIO047/KSO03/PWM3_ALT/ICT13 2N7002K-2-GP
1 4 FAN_TACH1 TACH_FAN1 I_BATT
TRI_STATE VDD K A B55 A11 1 TP2407 TPAD14-OP-GP 84.2N702.J31
1
66 POGO_PWR_EN C2451 LID_CL_SIO_TAB# GPIO050/ICT0_TACH0 GPIO200/ADC00/TRACEDAT0 I_ADP
SCD01U25V2KX-3DLGP
71,72 BB_RST OSC_SUS_CLK A51 B12
2 DY 3 DY LCD_TST GPIO051/ICT1_TACH1 GPIO201/ADC01/TRACEDAT1 MODEL_ID
GND OUTPUT RB520S30-GP
KB_LED_PWM
A26
GPIO052/ICT2_TACH2 GPIO202/ADC02/TRACEDAT2
A12
TOUCH_PAD_INTR#
2nd = 084.27002.0N31
B29 B13
2
16 DUAL_BOOT_EVENT#
83.R2003.A8M NB_MODE# A28 GPIO053/PWM0 GPIO203/ADC03/TRACEDAT3 A13 BOARD_ID
55 LCD_VCC_TEST_EN OSC-32D768KHZ-17-GP 2ND = 083.52030.008F SHD_CS0# B24 GPIO054/PWM1 GPIO204/ADC04 B14 TBT_RESET_N_EC R2401 1 2 0R2J-2-GP BB_RST
SHD_CLK GPIO055/PWM2/SHD_CS0#/BSS_STRAP GPIO205/ADC05 USB_PWR_EN# DY
1
82.20035.151 C2450 A23 A14
SC15P50V2JN-DL-GP
ALL_SYS_PWRGD R2464 1 2 0R0402-PAD-2-GP RUNPWROK A2 GPIO056/PWM3/SHD_CLK GPIO206/ADC06 B15 PCH_DPWROK
DY GPIO057/VCC_PWRGD GPIO207/ADC07/CMP_STRAP
20191219(EVT)
3D3V_S5_KBC
Remove R2440 For USB TypeC
2
3D3V_S5 HW_ACAVIN_NB R2475 1 2 0R0402-PAD-2-GP HW_ACAVIN_NB_R B52 A1 NB_MUTE#
ESPI_RESET# GPIO060/KBRST/TST_CLK_OUT GPIO221/32KHZ_OUT/SYS_SHDN# Intel design R1726
B16 B30 PROCHOT
EC_PCH_SPI_EN B63 GPIO061/ESPI_RESET#/PWM7_ALT/EC_SCI_ALT# GPIO222/PROCHOT_IN# A22 SHD_IO0
TPAD14-OP-GP TP2402 1 USB_PWR_SHR_EN_L# A20 GPIO062(RESETO#)/I2C11_SCL GPIO223/SHD_IO0 B22 SHD_IO1
43,44 HW_ACAVIN_NB GPIO063/ESPI_ALERT#/PWM6_ALT/ICT8 GPIO224/GPTP_IN0/SHD_IO1
2
1
TPAD14-OP-GP TP2403 1 USB_POWERSHARE_VBUS_EN A16 A3 LCD_VCC_TEST_EN
2
ESPI_CLK B18 GPIO064/PCI_RESET# GPIO226 B23 SHD_IO2 RN2413
40 ALWON R2498 GPIO065/ESPI_CLK/I2C13_SCL/ICT5_ALT GPIO227/SHD_IO2/PWRGD_STRAP
ESPI_CS# B17 SRN2K2J-1-GP
100KR2J-1-GP
JTAG TYPEC_DCIN1_EN# A10 GPIO066/ESPI_CS#/I2C13_SDA A53
44 AD_IA GPIO067/VREF2_ADC GPIO241/PWM0_ALT/CMP_VOUT0 PANEL_MONITOR
EC G3 Flash Share B6
GPIO045 (CR_STRAP) ESPI_IO0 A17 GPIO242/CMP_VIN0 A7 AC_DIS
3D3V_S5
3
4
18,26 SML1_SMBCLK_THM 3D3V_S5_KBC ESPI_IO1 A18 GPIO070/ESPI_IO0/I2C14_SDA GPIO244/CMP_VIN1 A5 M_BIST
18,26 SML1_SMBDATA_THM JTAG_RST#
20200512(DVT2) ESPI_IO2 B20 GPIO071/ESPI_IO1/I2C14_SCL GPIO246/CMP_VREF0
Change to 100 ohm ESPI_IO3 A19 GPIO072/ESPI_IO2/I2C01_SDA_ALT A60 CABLE2_OCP# UPD1_SMBDAT
GPIO073/ESPI_IO3/I2C01_SCL_ALT GPIO253/BGPO0 CABLE2_OCP# 2 R2453 1
Follow Intel TGL PDG 1.1 SIO_PWRBTN#
2
R2409 B7
55 PANEL_BKEN C2419 GPIO254/PWM1_ALT/CMP_VREF1
2
2
A4 ME_FWP 100KR2J-1-GP UPD1_SMBCLK
100R2F-L1-GP-U
SC1U10V2KX-1DLGP
NON_JTAG POWER_SW_IN# B67 GPIO255
R2450 SPI_HOLD_ROM R2412 2 G3 1 100R2F-L1-GP-U SHD_IO3 JTAG LID_POWER_ON# VCI_IN0#/GPIO163
100KR2J-1-GP SPI_WP_ROM A63
R2413 2 G3 1 100R2F-L1-GP-U SHD_IO2
1
VCI_IN1#/GPIO162 B66
SPI_SO_ROM R2410 2 1 100R2F-L1-GP-U SHD_IO1
G3 NC#B66
1
HW_ACAV_IN A61 R2421
SPI_SI_ROM R2411 2 1 100R2F-L1-GP-U SHD_IO0 R2407
1
SPI_CLK_ROM G3 OSC_SUS_CLK 1 DY 2 ALWON B65 VCI_OVRD_IN/GPIO172 330R2J-3-GP

3,22,44,46,72 PROCHOT#_CPU
KSO01 R2416 2 G3 1 100R2F-L1-GP-U SHD_CLK VCI_OUT/GPIO250
SPI_CS_ROM_N0 0R2J-2-GP C1
R2403 2 G3 1 0R0402-PAD-2-GP SHD_CS0# GND I_ADP AD_IA
SPI_CS_ROM_N1 2 1
4 L_BKLT_EN R2418 2 G3 1 0R0402-PAD-2-GP SHD_CS1# R2406 2 PCH_SUSCLK
3D3V_S5
SUSCLK 1 A62
0R0402-PAD-2-GP nRESET_IN B2 SUSCLK_IN
55 TOUCH_REPORT_SW JTAG_RST# RESET_IN# RN2405
A40
JTAG_RST# 2 3
1
64,66,92 KBC_PWRBTN# C2435
1 4
SC2200P50V2KX-2DLGP
MEC1515H-D0-I-NB-GP Q2416 SRN100KJ-6-GP
2
72 UPD1_SMBCLK EC G3 Flash Share 071.01515.0A03
72 UPD1_SMBDAT BAT2_LED# 1 6 BATT_WHITE_LED#
S1 D1
For eSPI Q2416_G 2 5 Q2416_G 2

R2499
1
3D3V_S5_KBC G1 G2 1D8V_S5
18,25 SPI_CS_ROM_N1 100KR2J-1-GP
CHG_AMBER_LED# 3 D2 4 BAT1_LED#
18,25 SPI_CLK_ROM S2
GPIO55 (BSS_STRAP) 20200313(DVT1)
18,25 SPI_SO_ROM Reserve R2473 PROCHOT
Layout Placement Request
1
15,18,25 SPI_SI_ROM
3V_5V_PWRGD SA 1027
15,18,25 SPI_WP_ROM R2461 R2473 1 2 0R2J-2-GP PJT138KA-GP
PCH_RSMRST# Already pull low DY
15,18,25 SPI_HOLD_ROM TP2401 1 DY 10KR2J-3-GP
PRIM_PWRGD
Q2408 075.00138.0A7C IMVP_VR_ON 3D3V_S5
18,25 SPI_CS_ROM_N0 on CPU side R2470 1 DY 2 0R2J-2-GP G
2nd = 075.00138.0F7C
TPAD14-OP-GP D2406
B
2
3rd = 075.00139.007C B
1
1 D2406_1 R2471 1 2 0R0402-PAD-2-GP PWR_1D8V_PG D PROCHOT#_CPU
2
PCH_RSMRST# SHD_CS0# R2465
18,61 SUSCLK R2405 2 NON_G3
1 0R2J-2-GP nRESET_IN 3 R2417 S 10KR2F-2-GP R2466
G3 DY
1
55 CABLE2_OCP# 100KR2J-1-GP DY Notice:ZZ.2N702.J3101
100KR2J-1-GP
2
2 EC_PCH_SPI_EN 2N7002K-2-GP
PRIM_PWRGD R2402 2 NON_G3
1 0R2J-2-GP SHD_IO2
2
R2438 ED2403
84.2N702.J31
1
2
G3 100KR2J-1-GP BAT54C-12-GP AZ5725-01FDR7G-GP
SIO_PWRBTN#
R2445
75.00054.A7D DY 100KR2J-1-GP 2nd = 084.27002.0N31 DY
1
2
17,25,45 3V_5V_PWRGD
2nd = 75.00054.T7D
1
50,53 PWR_1D8V_PG 20191210(EVT)
GPIO review stuff
17 PCH_DPWROK
3D3V_S0 3D3V_S5_VCCPRIM
1
1
R2423
Power Switch Logic(PSL) R2469
10KR2F-2-GP 100KR2J-1-GP
D2402 DY
LID_CL_SIO# K A TOUCH_REPORT_SW
2
2
TABLE_MODE#
LRB751V-40T1G-GP
3D3V_ECVBAT
83.00751.08F 20191224(EVT)
2nd = 83.R2004.G8F BIOS request reserve
2
R2451
100KR2J-1-GP
R2432
1
KBC_PWRBTN# 1 2 POWER_SW_IN#
1KR2J-1-GP
1
C2426
SC2D2U6D3V2MX-DL-GP
2
JEDI15 CML
A A
<Core Design>
Wistron Corporation
Title
ECIO(MEC 1515)
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = SPI Flash 20191205(EVT)

Follow Intel TGL PDG 20191205(EVT) 3D3V_SPI
Follow Hellcat 13 CML Follow Intel TGL PDG
SPI_CLK_ROM R2507 1 2 15R2F-2-GP SPI_CLK_ROM_R
SPI_SI_ROM R2508 1 2 15R2F-2-GP SPI_SI_ROM_R SPI_CLK_ROM R2568 1 2 15R2F-2-GP SPI_CLK_ROM_R1
SPI_SO_ROM R2509 1 2 15R2F-2-GP SPI_SO_ROM_R
SPI_SI_ROM R2512 1 2 15R2F-2-GP SPI_SI_ROM_R1
1
SPI_WP_ROM R2510 1 2 15R2F-2-GP SPI_WP_ROM_R C2501
SPI_HOLD_ROM 1 2 SPI_HOLD_ROM_R SPI_SO_ROM R2513 1 2 SPI_SO_ROM_R1 DY
SC10U6D3V3MX-DL-GP
R2521 15R2F-2-GP 15R2F-2-GP DYC2502
,18,24 SPI_HOLD_ROM SPI_WP_ROM R2515 1 2 15R2F-2-GP SPI_WP_ROM_R1 SCD1U16V2KX-3GP
2
18,24 SPI_CLK_ROM
SPI_HOLD_ROM R2522 1 2 15R2F-2-GP SPI_HOLD_ROM_R1
15,18,24 SPI_SI_ROM
18,24 SPI_SO_ROM
15,18,24 SPI_WP_ROM
20191224(EVT)
18,24 SPI_CS_ROM_N0 20200504(DVT2) 3D3V_SPI Change SPI ROM power to 3D3V_SPI
18,24 SPI_CS_ROM_N1 Remove ROM socket Follow design review
3D3V_SPI
2nd ROM
D D
2
R2501
20200219(DVT1) 3D3V_SPI 8M-byte 16M-byte 32M-byte
2
4K7R2J-2-GP Change to 8M
R2502
1
BIOS1 4K7R2J-2-GP 072.25Q64.0H01 072.25128.0B51 072.25256.0H01
3D3V_SPI
SPI_CS_ROM_N0 1 8
1
SPI_SO_ROM_R 2 CS# VCC 7 SPI_HOLD_ROM_R 072.25647.000D 072.25127.0B01 072.25256.000D
SPI_WP_ROM_R 3 DO/IO1 IO3 6 SPI_CLK_ROM_R BIOS2
4 IO2 CLK 5 SPI_SI_ROM_R
GND DI/IO0 SPI_CS_ROM_N1 1 8 072.25B64.0C01 072.25128.0D61 072.25673.0A01
SPI_SO_ROM_R1 2 CS# VCC 7 SPI_HOLD_ROM_R1
SPI_WP_ROM_R1 3 DO/IO1 HOLD#/RESET#/IO3 6 SPI_CLK_ROM_R1
1
W25Q64JVSSIQ-GP SA 0201 WP#/IO2 CLK SPI_SI_ROM_R1
4 5
EC2502 EC2501 EC2503 GND DI/IO0
072.25Q64.0H01
DY DY DY
2
SC4D7P50V2BN-GP
SC4D7P50V2BN-GP
SC10P50V2JN-4GP
20191204(EVT) 2nd = 072.25647.000D W25Q128JVSIQ-GP
3D3V_S5 3D3V_SPI Add R2550
Follow HCAT DG1 072.25128.0B51
R2550 1 2 2nd = 072.25128.0D61
0R0402-PAD-2-GP
Main Func = RTC Delivery Voltage 3.19V RTC_AUX_S5

3D3V_RTC
3D3V_AUX_S5 RTC
1
24 RTCRST_ON R2505 (R2505 don't change to short pad after MP)

17,24,45 3V_5V_PWRGD 0R2J-2-GP Q2507
C
24 VCCDSW_EN C
19 RTC_DET# PJA3413-1-GP
2
S D
3D3V_RTC_SYS
084.03413.0031
G
1
2nd = 084.02301.0031
R2517
+RTC_VCC DY 47KR2F-GP 3D3V_RTC
2
R2511
2
1
D2501 RO13_20170809
RTC GEN 9 reset circuit
Follow Hellcat 13 CML 4K7R2J-2-GP
1
3 RTC_3P3_EN_D
2
1
D
C2503
BAT54C-12-GP
SCD47U25V3KX-1-DL-GP Q2510
75.00054.A7D
2
2N7002K-2-GP
2nd = 75.00054.T7D 84.2N702.J31
common part
2ND = 084.27002.0N31
R2567
S
RTCRST_ON 1 2 RTC_3P3_EN_G
Q2505
G
1
1
D RTC_DET# R2518 1MR2J-1-GP C2517

R2504 100KR2J-1-GP SCD022U16V2KX-3DLGP
2
10MR2J-L-GP S
2
2
2N7002K-2-GP
84.2N702.J31
2ND = 084.27002.0N31
B B
20191205(EVT)
20191224(EVT) 3D3V_S5
Del R2555
3D3V_S5
1
R2514
1
10KR2J-3-GP
R2520
D2503
2
100KR2J-1-GP 3V_5V_PWRGD 1
3 3V_5V_DSW_OK
2
VCCDSW_EN 2
BAT54A-11-GP
75.BAT54.07D
3D3V_S5
2nd = 075.00054.0A7D
U2502 3D3V_VCCDSW 3D3V_S5_VCCPRIM
4 3
EN/EN# FLG# 2 R2516
5 GND 1 1 2
VIN VOUT NON_DSW
0R0603-PAD-2-GP-U
RT9742CGJ5-GP
074.09742.0A9F
2nd = 074.03553.007F
A A
Add RTC GEN 9 reset circuit_20170809
Hynix 8G
Wistron Corporation
Title
Flash/RTC
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = Thermal Sensor

3D3V_THM_S0 3D3V_THM_S0
Follow Hellcat 13 CML
1
2
RN2602
18,24 SML1_SMBCLK_THM SRN2K2J-1-GP
18,24 SML1_SMBDATA_THM
17,24 IMVP_VR_ON 3D3V_S0 3D3V_THM_S0
4
3
40 PURE_HW_SHUTDOWN# R2618 SML1_SMBDATA_THM 6
Q2601
1 CPU_SMB_SDA_THM
PWM FAN1
Note:ZZ.27002.F7C01
1 2
24 FAN_TACH1 5 2
0R0603-PAD-2-GP-U 5V_S0
1
D C2602 D
24 PWM_FAN1 20200303(DVT1) 4 3
SCD1U16V2KX-3DLGP
0603 R2612
Layout Note:
5V_FAN_VCC
2
1 2
2N7002KDW-1-GP
CPU_SMB_SCL_THM 0R0603-PAD-2-GP-U
Signal Routing Guideline:
Trace width = 15mil
C2604
SC4D7U6D3V3KX-DLGP
C2605
SCD1U16V2KX-3DLGP
75.27002.F7C
1
SML1_SMBCLK_THM 2nd = 075.27002.0E7C
DY
84.T3904.H11
2
FAN1
2nd = 84.03904.T11 5
NCT7718_DXP 1
U2601
2
1
1 8 CPU_SMB_SCL_THM FAN_TACH1 3
Q2603 B C2606 C2607 2 VDD SCL 7 CPU_SMB_SDA_THM PWM_FAN1 4
LMBT3904LT1G-GP D+ SDA
DY SC470P50V3JN-2GP SC2200P50V2KX-2DLGP 3 6 ALERT# 6
2
T_CRIT# 4 D- ALERT# 5
E
NCT7718_DXN T_CRIT# GND AFTP2604 1 ACES-CON4-29-GP
1
EC2602 EC2601
SC10P50V2JN-4DLGP 20.F1639.004
2.System Sensor, Put on palm rest NCT7718W-GP SC10P50V2JN-4DLGP DY DY
74.07718.0B9 2nd = 020.F0097.0004
2
1
2nd = 074.00788.00B9
R2601 FAN_TACH1 1 AFTP2601
0R0402-PAD-2-GP Q2602 PWM_FAN1 1 AFTP2602
IMVP_VR_ON G
2
D PURE_HW_SHUTDOWN#_R 1 R2615 2 PURE_HW_SHUTDOWN# 5V_FAN_VCC 1 AFTP2603
THERM_SYS_SHDN# S 0R0402-PAD-2-GP
Layout Note: 2N7002K-2-GP DVT1 0210, for T8 function

Both DXN and DXP routing 10 mil trace width and 10 mil spacing. 84.2N702.J31
3D3V_THM_S0
2nd = 084.27002.0N31
C R2603 1 2 7K5R2F-1-GP ALERT# C
3D3V_S5
2 7K5R2F-1-GP T_CRIT#
3D3V_THM_S0
R2604 1
KBC T8
R2617 1 DY 2 7K5R2F-1-GP
Close to KBC
B B
A A
Hynix 8G
Wistron Corporation
Title
INT IO (Thermal/Fan)
A2
5 4 3 2 1
5 4 3 2 1
Main Func = Audio

3D3V_1D8V_AVDD U2701
3 34 AUD_PC_BEEP_R
DVDD PCBEEP
18 30 AUD_RING
Layout Note: Width>40mil, to improve Headpohone Crosstalk noise
1
C2722 3D3V_1D8V_AVDD_IO DVDD-IO MIC2-L(PORT-F-L)/RING2 AUD_SELEEVE
31 Change it to sharp will be better.
19 HDA_SYNC_CODEC SCD1U16V2KX-3DLGP 40 MIC2-R(PORT-F-R)/SLEEVE
19 HDA_BITCLK_CODEC
+5V_AVDD
20 AVDD1 36 LINE1_L Add 2 vias (>0.5A) when trace layer change.
2
1D8V_CPVDD CPVDD/AVDD2 LINE2-L(PORT-E-L) LINE1_R
19D HDA_SDOUT_CODEC 35 D
19 HDA_SDIN0_CPU 41 LINE2-R(PORT-E-R)
+5V_PVDD PVDD1 AUD_SPK_L+
46 42
RTC_AUX_S5 +5V_PVDD PVDD2 SPK-OUT-L+ 43 AUD_SPK_L- Layout Note:
R2756 1 2 0R0402-PAD-2-GP AUX_MODE 33 SPK-OUT-L- 45 AUD_SPK_R+
55 DMIC_SDA_CODEC 5VSTB/AUX_MODE SPK-OUT-R+
Speaker trace width >40mil @ 2W4ohm speaker power
44 AUD_SPK_R-
55 DMIC_SCL_CODEC SPK-OUT-R-
20 SPKR AUD_HPOUT_L
24 BEEP 6 27
7 I2C-DATA HPOUT-L(PORT-I-L) 26 AUD_HPOUT_R
29 MIC2_VREFO_L I2C-CLK HPOUT-R(PORT-I-R)
29 MIC2_VREFO_R EC2715
1 2 HDA_BITCLK_CODEC_R HDA_SYNC_CODEC 15
29 AUD_SPK_L+ DY HDA_BITCLK_CODEC R2755 1 2 HDA_BITCLK_CODEC_R 14 AUDIOLINK_SYNC 38 AUD_VREF C2737 2 1 SC2D2U10V3KX-1DLGP-U C2731
29 AUD_SPK_L- AUDIOLINK_BCLK VREF AUD_AGND SC10U6D3V2MX-2-GP
HDA_SDOUT_CODEC 0R0402-PAD-2-GP 17
29 AUD_SPK_R+ AUDIOLINK_SDATA-OUT
SC10P50V2JN-4DLGP HDA_SDIN0_CPU R2730 1 2 HDA_SDIN0_CODEC 16 39 LDO1_CAP 2 1
29 AUD_SPK_R- AUDIOLINK_SDATA-IN LDO1-CAP
29,66 AUD_RING 0R0402-PAD-2-GP 1 DVSS 13 21 LDO2_CAP C2734 2 1 SC10U6D3V2MX-2-GP
DC-DET/EAPD LDO2-CAP LDO3_CAP AUD_AGND
29,66 AUD_SELEEVE TP2701 19 C2736 1 2 SC10U6D3V2MX-2-GP
TPAD14-OP-GP LDO3-CAP 2 1
29 LINE1_L
11 28 MIC2_VREFO_L
29 LINE1_R I2S-MCLK MIC2-VREFO-L R2747
29,66 JACK_PLUG 10 29 MIC2_VREFO_R
12 I2S-BCLK MIC2-VREFO-R 100KR2J-1-GP AUD_AGND
24 NB_MUTE# I2S-LRCK
29,66 AUD_HPOUT_L 32 MIC_CAP C2735 1 2 SC10U6D3V2MX-2-GP
MIC2-CAP AUD_AGND
9,66 AUD_HPOUT_R 8
3D3V_1D8V_AVDD 9 I2S-IN 25 CPVEE C2741 1 2 SC1U25V3KX-1-DLGP
AUD_AGND
I2S-OUT CPVEE
JACK_PLUG R2741 2 1 200KR2F-L-GP AUD_SENSE_A 48 23 CBP
2 1 Audio_47 47 HP/LINE2-JD(JD1) CBP 24
R2744 CBN C2739 1 2 SC1U25V3KX-1-DLGP
100KR2J-1-GP I2S-IN/I2S-OUT-JD(JD2) CBN
DMIC_SDA_CODEC R2738 1 2 0R0402-PAD-2-GP DMIC_SDA_CODEC_R 4
DMIC_SCL_CODEC R2721 1 2 0R0402-PAD-2-GP DMIC_SCL_CODEC_R 5 GPIO0/DMIC-DATA12 37
GPIO1/DMIC-CLK AVSS1 AUD_AGND
1 22
DMIC-CLK-IN/I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34 AVSS2 AUD_AGND
3D3V_1D8V_AVDD
2 49
PDB GND
R2743 2 1 10KR2J-3-GP ALC3254-VA3-CG-GP

071.03254.M001 moat
NB_MUTE# 20200303(DVT1)
RO13_20171103 0603
U2701 from 071.03254.0003 to 071.03254.M001. +5V_AVDD 5V_S0
Close pin5
C C
1 R2705 2
EC2716
1 2 DMIC_SCL_CODEC 0R0603-PAD-2-GP-U
DY D2702
1
C2721 C2727
RN2702 HDA_SPKR_R 2
Layout Note:
SC10U6D3V3MX-DL-GP
SC10P50V2JN-4DLGP C2726
SCD1U16V2KX-3DLGP
SPKR 2 3
2
BEEP 1 4 3 AUD_PC_BEEP_C 1 2AUD_PC_BEEP_R Place close to Pin 40
KBC_BEEP_R 1 SCD1U16V2KX-3DLGP
SRN1KJ-7-GP
1
BAT54C-12-GP
R2745
75.00054.A7D
20200604(PVT) 10KR2J-3-GP AUD_AGND
Reserve R2702 for 1.8V 2nd = 75.00054.T7D
2
moat
1D8V_S0 3D3V_S0
1
EC2711 1 2 SCD01U50V2KX-1DLGP
R2702 R2725 EC2710 1
DY 2 SCD01U50V2KX-1DLGP
DY 0R3J-0-U-GP 3D3V_1D8V_AVDD 1
DY 2
0R0603-PAD-2-GP-U EC2713 SCD1U25V2KX-1-DL-GP
EC2709 1 DY 2 SCD01U50V2KX-1DLGP
EC2712 1 DY 2 SCD1U25V2KX-1-DL-GP
2
EC2714 1 DY 2 SCD1U25V2KX-1-DL-GP
DY
1
C2746 C2729 C2743

SC330P50V2KX-3-DL-GP
SC10U6D3V2MX-2-GP 1D8V_CPVDD
SCD1U16V2KX-3DLGP
DY 3D3V_1D8V_AVDD 1D8V_S0
AUD_AGND
2
R2742 1 R2739 2
1 2 AUD_SENSE_A 1 R2724 2
0R0603-PAD-2-GP-U
0R0603-PAD-2-GP-U
100KR2J-1-GP 1 R2740 2
0R0603-PAD-2-GP-U
1
C2730
C2740 SC10U6D3V3MX-DL-GP
B SCD1U16V2KX-3DLGP
Layout Note: B
2
AUD_AGND
R2739 should place nearby codec IC.
R2740 should place nearby audio jack.
20191206(EVT) Close pin 20
Vendor review used 1.8V AUD_AGND
Follow HCAT DG1 2.5A AUD_AGND
5V_S0 +5V_PVDD
3D3V_S0 1D8V_S0
1 R2707 2
1
0R0805-PAD-2-GP-U
R2757 R2701 3D3V_1D8V_AVDD_IO C2732 C2742 C2733
1
1
C2714
DY 0R3J-0-U-GP 0R0603-PAD-2-GP-U
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
SCD1U16V2KX-3DLGP
2
2
2
C2744 C2745
SC10U6D3V3MX-DL-GP
SCD1U16V2KX-3DLGP
Layout Note: Layout Note:

2
Close pin41 Close pin46
Layout Note:
Close pin18
A A
Hynix 8G
Wistron Corporation
Title
Audio (Codec ALC3254)

A2
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
(Reserved)
A4
5 4 3 2 1
5 4 3 2 1
Main Func = Audio

27 AUD_SPK_L+ RO13_20171002
27 AUD_SPK_L- Layout Note: Speaker follow ME connector list
SPK1
27 AUD_SPK_R+ Speaker trace width >40mil @ 2W4ohm speaker power
27 AUD_SPK_R- 7
AUD_SPK_L+ ER2902 2 1 0R0402-PAD-2-GP AUD_SPK_L+_C 1

18 SPK_ID CONN Pin Net name
D D
27 MIC2_VREFO_R AUD_SPK_L- ER2901 2 1 0R0402-PAD-2-GP AUD_SPK_L-_C 2
27 MIC2_VREFO_L AUD_SPK_R+ ER2904 2 1 0R0402-PAD-2-GP AUD_SPK_R+_C 3 Pin1 SPK_L+_C
27,66 AUD_RING AUD_SPK_R- ER2903 2 1 0R0402-PAD-2-GP AUD_SPK_R-_C 4
7,66 AUD_HPOUT_L 5 Pin2 SPK_L-_C
27 LINE1_L SPK_ID 6
,66 AUD_HPOUT_R
Pin3 SPK_R+_C
27 LINE1_R 8
,66 AUD_SELEEVE
Pin4 SPK_R-_C
AUD_SPK_L+_C
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
AUD_SPK_L-_C ACES-CON6-20-GP-U Pin5 GND
1
AUD_SPK_R+_C 20.F1639.006
EC2901
EC2902
EC2903
EC2904
AUD_SPK_R-_C Pin6 SPK_DET#_CON
27,66 JACK_PLUG 2nd = 020.F1263.0006
2
1
1
ED2908 ED2907 ED2906 ED2905
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
AUD_SPK_L-_C 1 AFTP2901
DY DY DY DY AUD_SPK_L+_C 1 AFTP2902
AUD_SPK_R-_C 1 AFTP2903
2
AUD_SPK_R+_C 1 AFTP2904
C C
RN2901
MIC2_VREFO_R
MIC2_VREFO_L
1
2
4
3
AUD_RING SRN2K2J-1-GP AUD_RING
AUD_HPOUT_L AUD_HPOUT_L
LINE1_L C2907 1 2
SC10U6D3V3MX-DL-GP
AUD_HPOUT_R AUD_HPOUT_R
LINE1_R C2908 1 2
SC10U6D3V3MX-DL-GP
AUD_SELEEVE AUD_SELEEVE
Delay circuit
(JACK_PLUG_DET: on IO Board)
B B
JACK_PLUG 10 mils 10 mils
1
C2909
JEDI 13_20180706 DY SC10U6D3V3MX-DL-GP
2
AUD_AGND
A Hynix 8G A
Wistron Corporation
Title
Audio (HP/SPK/MIC Jack)
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
(Reserved)
A4
Hellcat 13'' TGL Sheet A00
Date: Wednesday, August 05, 2020 30 of 105
5 4 3 2 1
5 4 3 2 1
Main Func = LAN
D D
C (Blanking) C
B B
<Core Design>
A
Title
LAN(RSV)
A4
5 4 3 2 1
5 4 3 2 1
Main Func = LAN
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
RJ45&Transformer(RSV)
A3
5 4 3 2 1
5 4 3 2 1
Main Func = Card Reader
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Size
Card Reader_RTL5170(RSV)
Document Number Rev
A4
5 4 3 2 1
5 4 3 2 1
Main Func = USB2.0
D D
(Blanking)
C C
B B
A <Core Design> A
Wistron Corporation
Title
USB (RSVD) (USB 2.0 CONN)
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A Hynix 8G A
Wistron Corporation
Title
USB (USB3.0 Conn)
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
USB (RSVD) (USB Charger)

A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
USB3.0 PORT
A4
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Reserved
A4
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(RSVD)
A3
5 4 3 2 1
5 4 3 2 1
17,92
17,53,55
SIO_SLP_S4#
SIO_SLP_S3#
5V_S5 RUN Power 1D8V_ES1_IN
R4050 1 DY 2 0R2J-2-GP
1D8V_S5
5V_S5
17,61 SIO_SLP_SUS#
C4011
5V_S0
SC1U10V2KX-1DLGP
K DY A
5V_S0 D4007 RB551V30-GP
1
C4012 83.R5003.H8H
1
5V_S0 Comsumption 3D3V_S5_VCCPRIM C4036
SC10U6D3V3MX-DL-GP DY 1D8V_ES1_ONLY
Peak current 5A
1
SC1U10V2KX-1DLGP
2
C4013
51 PWR_VDDQ_PG 1D8V_ES1_IN
U4006 SC10U25V5KX-DL-GP
1
C4035
22,50 CORE_VID0 DY
1
1 8 U4003 C4009
VIN#1 VOUT#8 DY
SCD1U16V2KX-3DLGP
2 7 SCD1U16V2KX-3DLGP
22,50 CORE_VID1
2
SIO_SLP_S3# R4008 1 2 0R0402-PAD-2-GP 5V_S0_ON 3 VIN#2 VOUT#7 6 5V_S0_CT 1 8
U4004
2
4 ON CT 5 1 5 2 IN#1 OUT#8 7
D D
VBIAS GND NC#1 VCC IN#2 OUT#7
1
C4049 C4014 9 6
9 ESPI_RESET# 2 IN#9 OUT#6
17 VCCST_OVERRIDE DY
SCD22U10V2KX-2-GP GND SC470P50V2KX-3DLGP A DY 3
DY
2
3 4 1D8V_ES1_EN_R R4032 1 2 68KR2J-GP 1D8V_ES1_EN 4 VBIAS 5
17,24,44,46 ALL_SYS_PWRGD
TPS22975-GP GND Y DY C4034 ON GND
SCD1U16V2KX-3DLGP
SNLVC1G04IDCK-GP
20200211(DVT1) 074.22975.0093 G5027CRD1D-GP-U
Change R4009 to C4049
17 CPU_C10_GATE# 2nd = 74.03526.093 074.05027.0B93
1
3D3V_S5
26 PURE_HW_SHUTDOWN#
DY 2nd = 074.05201.0A93
3D3V_S5
2
C4044 2019.10.08 Follow Nakia
3D3V_S0
SC1U10V2KX-1DLGP
53 PWR_1D8V_EN 3D3V_S0
1
C4045
24,50,53 PWR_1D8V_PG
1
3D3V_S0 Comsumption
SC10U6D3V3MX-DL-GP
Peak current 2.5A
1
C4015
17,50 VCCIN_AUX_PWRGD
2
U4009 SC10U25V5KX-DL-GP 084.03413.0031
2
54 PWR_1D05V_EN 1 8 2nd = 084.02301.0031
2 VIN#1 VOUT#8 7 Q4003 150mA
24 ALWON SIO_SLP_S3# R4046 1 2 0R0402-PAD-2-GP 3D3V_S0_ON 3 VIN#2 VOUT#7 6 3D3V_S0_CT PJA3413-1-GP
1D8V_S5 1D8V_S0
4 ON CT 5
VBIAS GND
1
C4046 C4016 S D
51 VDDQ_EN 9
DY GND
1
SCD22U10V2KX-2-GP SC470P50V2KX-3DLGP R4034
1
54 PWR_VNN_EN C4037 C4038 C4039
G
TPS22975-GP DY
SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP SCD1U16V2KX-3DLGP
51 PWR_VDD_EN 074.22975.0093
2
10KR2J-3-GP
2
1 2 1D8V_EN_R#
45 3V_5V_EN 2nd = 74.03526.093
R4035 20KR2J-L2-GP 1D05V_S5_OUT
1D8V_EN#
22 V1P05_CTRL_R
Q4004
SIO_SLP_S3# G
6A/Rds(on):4.5mOhm/Tr:7~20us
54 PWR_VNN1D05V_PG
D (300mA)
U4002 1D05V_VCCSTG_FIP 1D05V_VCCSTG
C S 5V_S5 C
18,24,68 ESPI_RESET#
Notice:ZZ.2N702.J3101
1 8 1 R4018 2
2N7002K-2-GP 2 IN#1 OUT#8 7
84.2N702.J31 9 IN#2 OUT#7 6 0R0603-PAD-2-GP-U
IN#9 OUT#6
2nd = 084.27002.0N31 20200303(DVT1)
3 0603
VCCSTG_EN R4053 1 2 0R0402-PAD-2-GP VCCSTG_EN_R 4 VBIAS 5
SIO_SLP_S3# D4004 A K LRB751V-40T1G-GP ON GND
10/09 DY D4002 follow PDG,
Charon
1
83.00751.08F G5027CRD1D-GP-U
1
1
2nd = 83.R2004.G8F C4010 C4028 C4024
R4054 DY C4008 074.05027.0B93
1
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
3D3V_S5 3rd = 083.00751.0B8F
SC1U10V2KX-1DLGP
100KR2J-1-GP
2
SCD1U16V2KX-3DLGP
2
2nd = 074.05201.0A93
2
VCCST_READY D4008 A K LRB751V-40T1G-GP VCCST_EN
3D3V_S5 D4002
2
20200304(DVT1)
2
BAT54C-12-GP 20191223(EVT)
1
R4005 CORE_VID0 1 83.00751.08F Add R4053, R4054, C4010 Follow internal review change
2nd = 83.R2004.G8F Follow design review
1
R4006 DY 3 3rd = 083.00751.0B8F

100KR2J-1-GP CORE_VID1 2 VCCST_READY D4009 A K LRB751V-40T1G-GP VCCSTG_EN
2
Q4001
VCCST_OVERRIDE_Q1 G 100KR2J-1-GP 83.00751.08F
2
D
2nd = 83.R2004.G8F
3rd = 083.00751.0B8F 1D05V_S5_OUT
D
S CPU_C10_GATE#
20191223(EVT) D4005 A K LRB751V-40T1G-GP
Q4002 Notice:ZZ.2N702.J3101
LSI1012LT1G-GP 2N7002K-2-GP Add D4008, D4009

84.2N702.J31 Del D4003, R4023, R4024 83.00751.08F C4002
2nd = 83.R2004.G8F
1
Follow design review
SC1U10V2KX-1DLGP
(1.05V)
VCCST_OVERRIDE G 2nd = 084.27002.0N31 3rd = 083.00751.0B8F 6A/Rds(on):4.5mOhm/Tr:7~20us
(1200mA)
084.01012.0031
2
1D05V_VCCST_FIP 1D05V_VCCST
S
2nd = 084.03426.0031 U4001

5V_S5
1 8 1 R4016 2
20191205(EVT) 2 IN#1 OUT#8 7
Follow Nakia Shuri N7 9 IN#2 OUT#7 6 0R0805-PAD-2-GP-U
IN#9 OUT#6
U4010 3D3V_S5_VCCPRIM 3
B VCCST_EN R4051 1 2 0R0402-PAD-2-GP VCCST_EN_R 4 VBIAS 5 B
SIO_SLP_SUS# 1 0R2J-2-GP U2502_IN ON GND
R4048
DSW2 4
EN OC#
3
2
Follow Hellcat15 Upsell TGL DSWGND
1
5 1 U2502_OUT R4047 2 1 C4027 G5027CRD1D-GP-U C4003
1
3D3V_S5 IN OUT DSW
1
C4004
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
0R2J-2-GP R4052 DY 074.05027.0B93
SCD1U16V2KX-3DLGP
100KR2J-1-GP
2
SY6288C20AAC-GP 2nd = 074.05201.0A93
2
074.06288.007B
2
20200304(DVT1)
20191223(EVT) Follow internal review change
Add R4051, R4052
Follow design review
10/09
3V_5V_DSW_OK
SIO_SLP_SUS# 1 2 0R0402-PAD-2-GP
R4031NON_DSW Power Sequence / Pull High PWRGD
change to SIO_SLP_SUS#,
Charon
D4006
R4025 1 PWR_1D8V_EN
1D05V_BYPASS_CTRL 3D3V_S5_VCCPRIM DSW2 4K7R2J-2-GP
3V_5V_EN A
L1SS355T1G-GP
K PURE_HW_SHUTDOWN#
PWR_VNN1D05V_VID2 R4010 1 2 0R0402-PAD-2-GP V1P05_CTRL_R 20200218(DVT1)
54 PWR_VNN1D05V_VID2
1
Follow Nakia change PRIM C4030 83.00355.G1F

DY
1
SCD1U16V2KX-L-GP
2
R4002
20KR2F-L-GP
PM_SLP_S3# R4003 1 2 10KR2J-3-GP ALWON
PWR_VNN1D05V_VID1 R4011 1 2 0R0402-PAD-2-GP SIO_SLP_S3#
54 PWR_VNN1D05V_VID1
VCCIN_AUX_PWRGD R4001 1 2 0R2J-2-GP PWR_VNN1D05V_PG
1
C4001
NON_BYPASS SC2D2U10V3KX-1DLGP-U
20191205(EVT)
2
A 3D3V_S5 A
3D3V_S0
R4026 1 2 10KR2J-3-GP PWR_VNN1D05V_PG
BYPASS
For PWR_VDDQ_EN RC delay
1
R4012
R4013 1 2 0R0402-PAD-2-GP PWR_VNN_EN
For LPDDR4x only: 0D6V_S3 Power on to after 1D1V_S3
Layout Note:Place Close to PU5101 <Core Design>
2nd = 083.52030.008F
83.R2003.A8M
SIO_SLP_S3# K A 10KR2J-3-GP VCCIN_AUX_PWRGD R4030 1 2 10KR2J-3-GP PWR_1D05V_EN
SIO_SLP_S4# R4004 1 2 20KR2J-L2-GP VDDQ_EN SIO_SLP_S4# R4027 1 2 10KR2J-3-GP PWR_VDD_EN Wistron Corporation
2
D4001 RB520S30-GP BYPASS 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
ALL_SYS_PWRGD Vincent: S3? C4006 Taipei Hsien 221, Taiwan, R.O.C.
C4031
1
C4005
1
SC1KP50V2KX-1DLGP
PWR_VDDQ_PG R4007 1 2 SCD1U16V2KX-3DLGP Title
2
1
0R0402-PAD-2-GP C4032 BYPASS Sequence (Power Enable)

2
2
SCD1U16V2KX-3DLGP SC1U10V2KX-1DLGP
2
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
V-tree_VCCIO
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Sequence (V-Tree)
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
(RSVD)
A4
Hellcat 13'' TGLSheet A00
Date: Wednesday, August 05, 2020 42 of 105
5 4 3 2 1
5 4 3 2 1
Main Func = ADT Input

5V_S5
PS_ID_R +DC_IN_C
84.T3904.H11
EC4311 EC4313
1
EC4312
2nd = 84.03904.T11
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
DY DY
SC1KP50V2KX-1DLGP
DY
1
R4302 MS
2
15KR2F-GP R4303
E
Q4302 MS10KR2J-3-GP 3D3V_S5
1
PQ3802_1 B
Layout Note: MSLMBT3904LT1G-GP
2
2
3D3V_S5
PSID Layout width > 25mil
1
R4309 PSID_DISABLE#_R_C
100KR2J-1-GP MS D4302 JGND JGND
1
MS LBAV99LT1G-1-GP
R4304
75.00099.O7D
1
Q4301 2K2R2J-2-GP
D G D
2nd = 75.00099.B7D
2
PS_ID_R D
1 EL4304 2
MS R4305
24,44 HW_ACAVIN_NB JGND MS S PS_ID_R1 1
MS 2 PS_ID
0R0805-PAD-2-GP-U
PJA138KA-GP 084.00138.0A31 33R2J-2-GP
2nd = 084.00138.0C31
1
D4303
1 EL4303 2
MS MS L30ESD24VC3-2-GP
DCIN1 0R0805-PAD-2-GP-U
9 60ohm@100MHz 83.03024.0A1
24 PS_ID 2nd = 75.04024.07D
3
1
DCR=0.02 ohm
17,44
24,44
AC_IN#
AC_DIS
2
3
Max current = 6000mA
S1
MS 4 19V_AD_JK PU4301 19V_AD+
24,44 PBAT_CHG_SMBCLK 5 AONR21321-GP
24,44 PBAT_CHG_SMBDAT 6 +DC_IN_C 1 EL4301 2 1 S D 8
24,44 PBAT_PRES# 7 MS 2 S D 7
0R0805-PAD-2-GP-U
240KR3-GP
1
3 S MS
C4305
SCD01U50V2KX-1DLGP
C4304
SCD01U50V2KX-1DLGP
R4316
20KR2J-L2-GP
8 EC4301 D 6 C4303 C4306
K
1
1
SC10U25V5KX-DL-GP
SC1U25V3KX-1-DLGP
C4301
SC10U25V5KX-DL-GP
SCD1U25V2KX-1-DL-GP
D 5
EC4302
R4307
DY DY 1 EL4302 2 MS MS MS G MS MS
SCD01U25V2KX-3DLGP
10 C4302 DY DY
MS MS SCD1U25V2KX-1-DL-GP
MS
1
0R0805-PAD-2-GP-U R4311
D4301
2
ACES-CON8-13-GP-U2
P6AF24A-R1-00001-GP 084.21321.0037 100KR2F-L1-GP
2
A
20.F1295.008 083.00624.00AM 2nd = 084.20P03.0033 DY
2nd = 20.F2120.008 2nd = 083.FJ24A.00AM Q4305
2
1
47KR2F-GP
3rd = 020.F0834.0008 JGND JGND Q4304
R2
E D4305
AD_OFF_L B
C
MS Move S2 MOSFET and control logic SCH to page 44
R4308
AC_DIS B R1
MS
R1
C AD_OFF_R MS HW_ACAVIN_NB A
DY K AC_IN#
2
E
R2 LMUN5112T1G-GP-U RB751V-40H-GP
2
LMUN5212T1G-GP
If=0.3A
R4315
084.05112.001K UPSELL
18K7R2F-GP
1
R4312 84.05212.B11
2nd = 84.02303.01K
1
MS100KR2J-1-GP 2nd = 084.00024.0B1K
3rd = 84.00124.H1K 3rd = 84.00124.Y1K
2
C C
+DC_IN_C
1
AFTP4301 1
AFTP4302 1
AFTP4303 1 PS_ID_R
AFTP4304 1
AFTP4305 1
AFTP4306 1
AFTP4307 1
AFTP4308 1
AFTP4309 JGND
B 20190621 Hellcat15 N7 X00 B
Barrel Adapter Piug-in Detect

Main Func = M-BAT Input Placement: Close to Batt Connector Follow Bandon 3D3V_S5
Batt Connecter
1
PBAT_SMBCLK1
R4313
PBAT_SMBDAT1
200KR2F-L-GP
MS
3D3V_S5
PBAT_PRES1#
BT+
2
R4320
1
100KR2F-L1-GP
K
C4308
SC100P50V2JN-3DLGP
EC4307 DY
1
EC4308 D4304
DY DY SC1KP50V2KX-1DLGP MS
2
SCD1U50V3KX-DL-GP DY SMF18A-GP 3 19V_AD_JK
3
2
1
R4314
2
ED4304 ED4305 ED4306
A
BATT1
1
10KR2F-2-GP
20191216(EVT) NP1 11 DY LBAV99LT1G-1-GP
DY LBAV99LT1G-1-GP DY LBAV99LT1G-1-GP MS
Layout swap request 1 75.00099.O7D 75.00099.O7D 75.00099.O7D R4317 U4302
150KR2F-L-GPMS
common parts
U4301- 1 5
2
1
2
RN4302 2 INPUT- VCC
2 MS
3
2
SRN100J-3-GP GND HW_ACAVIN_NB
PBAT_CHG_SMBCLK PBAT_SMBCLK1 U4301+ 3 4
2 3 4 INPUT+ OUTPUT
PBAT_CHG_SMBDAT 1 4 PBAT_SMBDAT1 5
1
PBAT_PRES1# 6 C4307
1
3D3V_S5 R4319 AS331KTR-G1-GP
SC100P50V2JN-3DLGP
PBAT_PRES# 1 R4310 2 1 R4301 2 SYS_PRES1# 7
15KR2F-GPMS DY
0R0402-PAD-2-GP 8 74.00331.H2F
100R2J-2-GP
9 2nd = 75.00099.B7D 2nd = 75.00099.B7D 2nd = 75.00099.B7D
2
EC4310 2nd = 74.00391.02F
2
EC4309 EC4306 10
NP2 12
1
SC10P50V2JN-4DLGP
SC10P50V2JN-4DLGP
1
1
SC10P50V2JN-4DLGP
DY DY DY TAR-CON10-2-GP
2
020.F1352.0010
2
For AFTE
A A
BT+
AFTP4310 1
AFTP4311 1
AFTP4312 1
AFTP4313 1
AFTP4314 1 PBAT_CHG_SMBCLK
AFTP4315 1 PBAT_CHG_SMBDAT <Core Design>
AFTP4316 1 PBAT_PRES1#
AFTP4317 1
AFTP4318
AFTP4319
1
1
Wistron Corporation
AFTP4320 1 Taipei Hsien 221, Taiwan, R.O.C.
AFTP4321 1
AFTP4322 1 Title
AFTP4323 1
INT IO (ATX/ DC/ BATT Conn)
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = Charger
OFFPAGE ISL9538H For Charger

EE needs check it!!
PBAT_CHG_SMBDAT +SDC_IN 20V_DCBATOUT

24,43 PBAT_CHG_SMBDAT
19V_AD+ PR4401
D01R6F-11-GP
24,43 PBAT_CHG_SMBCLK
PBAT_CHG_SMBCLK
S2 1 2
1
PU4415 PR4466 PG4401 PG4402
MS 100KR2F-L1-GP
1
HW_ACAV_IN
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
AONR21321-GP PC4402 PC4404 PC4405 PC4406
24,64 HW_ACAV_IN
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
8 D S 1
1
7 D S 2 PR4468 PC4469 PQ4451
2
1
100KR2J-1-GP
6 D
AC_IN# 5 D
MS S 3 AOSS21319C-GP
17,43 AC_IN#
G
MS MS G
PWR_CHG_CSIP_R
PWR_CHG_CSIN_R
2
MS PQ4451_G
2
084.21321.0037
D
CHGR_PSYS_IMVP 2nd = 084.20P03.0033
46 CHGR_PSYS_IMVP CHGR_PSYS_IMVP 1 PR4498 2 PWR_CHG_PSYS
PWR_AD_A_SW 1 PR4465 2 PQ4451_D
AD_IA 0R0402-PAD-2-GP
24 AD_IA 19V_DCBATOUT
0R0402-PAD-2-GP
D D
PBAT_CHG_SMBDAT 1 PR4488 2 PWR_CHG_SDA
PBAT_PRES#
24,43 PBAT_PRES# 0R0402-PAD-2-GP
2
HW_ACAVIN_NB
PR4467
1 PR4489 2 MS 10KR2F-2-GP
1
PBAT_CHG_SMBCLK PWR_CHG_SCL PC4401 PC4441 PC4442 PC4443 PC4444 PC4461 PC4462 PC4463 PC4464 PC4465 PC4466 PC4470
SCD1U25V2KX-1-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SC22U25V5MX-5-GP
SC22U25V5MX-5-GP
SC22U25V5MX-5-GP
VCCPD_VBUS_ACK 0R0402-PAD-2-GP DY DY DY DY
74 VCCPD_VBUS_ACK MS PR4464
2
100KR2F-L1-GP PU4402 PU4403
1 PR4490 2
2
HW_ACAV_IN ACAV_IN 2 2
2
PR4471 3 3
0R0402-PAD-2-GP PWR_AD_A_SW_R1 1 4 4 1
From NXP ACK 0R0402-PAD-2-GP
10 10
AC_IN# 1 PR4491 2 PWR_AC_IN# 9 9
1
PROCHOT#_CPU 7 7
0R0402-PAD-2-GP
1
3,22,24,46,72 PROCHOT#_CPU PQ4452 8 6 6 8
PR4422 PR4482 5 5
3 4 PQ4452_5 1R2F-GP 1R2F-GP
HW_ACAVIN_NB
24,43 HW_ACAVIN_NB AC_DIS 2 PR4440 1 PQ4452_2 2 5
MS FDMS3600-02-RJK0215-COLAY-GP
2
PC4415 FDMS3600-02-RJK0215-COLAY-GP
AC_DIS 0R0402-PAD-2-GP 1 6 DC_IN_OFF 075.07321.0073
24,43 AC_DIS 2 1
075.07321.0073
2nd = 075.00019.0073 2nd = 075.00019.0073
VCCPD_VBUS_ACK 1 PR4494 2 PQ4417_G 2N7002KDW-1-GP
SC4D7U10V3KX-DL-GP
0R0402-PAD-2-GP
75.27002.F7C
66 PWR_CHG_CSOP_R
2nd = 075.27002.0E7C
1
PC4416 PC4417
PROCHOT#_CPU 1 PR4495 2 PQ4416_3
SC1U25V3KX-1-DLGP SC1U25V3KX-1-DLGP
66 PWR_CHG_CSON_R
0R0402-PAD-2-GP
2
ALL_SYS_PWRGD
4,40,46 ALL_SYS_PWRGD
1 PR4496 2 PQ4418_3
0R0402-PAD-2-GP +SDC_IN
PWR_IMVP_PWRGD TP4401
17,46 PWR_IMVP_PWRGD +SDC_IN
10.3*11.2*2.4
TPAD14-OP-GP PC4436
SCD22U25V3KX-DL-GP DCR=14~17.0mohm
PD4407 1PWR_CHG_BTST1_A
2 1 2 Idc=9.5A, Isat=20A
1 PR4497 2 PQ4405_3 A K
19V_DCBATOUT
1
PWR_CHG_DCIN_R
PR4402
0R0402-PAD-2-GP PL4401
RB520S30-GP 2D2R3-1-U-GP
1 2 PWR_CHG_PHASE2
1
IND-2D2UH-495-GP
PBAT_PRES# 1 PR4499 2 PWR_CHG_BAT_IN# PR4403

068.2R210.1E21
DY PR4416
10R5J-GP 2D2R5J-1-GP2nd= 068.2R210.2251
0R0402-PAD-2-GP PD4408
PWR_CHG_ASGATE
PWR_CHG_UGATE1
PWR_CHG_PHASE1
2
PWR_CHG_BTST1
A K 2 1
PWR_CHG_CSIN
PWR_CHG_CSIP
+SDC_IN
1PWR_CHG_SNB
PWR_CHG_AIN RB520S30-GP
1
PWR_CHG_LGATE1
PC4419 20200305(DVT1)
SC4D7U25V3KX-2-GP Use Dell part
2
Power team confirm OK
VDD
PR4405
4D7R2F-GP DY PC4435
PWR_CHG_VDDP 1 2 SC1KP50V2KX-1DLGP
16
15
14
13
12
11
10
2
9
PU4401
1
1
PC4422
ADP
CSIP
ASGATE
CSIN
BOOT1
UGATE1
PHASE1
LGATE1
SC4D7U10V3KX-DL-GP
PR4404 PC4452
2
402KR2F-GP SC4D7U10V3KX-DL-GP
PWR_CHG_DCIN 17 8 PWR_CHG_VDDP 1 2
2
DCIN VDDP
18 7 PWR_CHG_LGATE2
VDD LGATE2
PWR_CHG_ACIN 19 6 PWR_CHG_PHASE2
ACIN PHASE2 PR4408 PC4423
PWR_CHG_OTGEN 20 ISL9538CHRTZ-T-2-GP 5 PWR_CHG_UGATE2 2D2R3-1-U-GP SCD22U25V3KX-DL-GP PC4424
1
CMIN UGATE2 SC1U25V3KX-1-DLGP

2
21 4 PWR_CHG_BTST2 2 1 PWR_CHG_BTST2_A 1 2
074.09538.0C73
1
PC4420 PR4406 PR4417 SDA BOOT2

22 3 1
SCD022U16V2KX-3DLGP 100KR2F-L1-GP 100KR2F-L1-GP
SCL VSYS DY2 PR4424 PG4405
1R2F-GP GAP-CLOSE-PWR-3-GP
2
23 2 PWR_CHG_CSOP 1 2PWR_CHG_CSOP_R 2 1
PC4439
1
PROCHOT# CSOP SC1U25V3KX-1-DLGP
AMON/BMON
1
PWR_CHG_ACOK 24 1 PWR_CHG_CSON 1 2
2
ACOK CSON
BATGONE
PR4407
SC1U25V3KX-1-DLGP
CMOUT
BGATE
C D005RL3720F-1-GP C
COMP
PROG
PSYS
33 PC4425
VBAT
1
GND
2
1 2PWR_CHG_CSON_R 2 1 BT+
PU4412
25
26
27
28
29
30
31
32
PWR_CHG_SDA 1 DY2 PR4425 PG4406
PWR_CHG_VBATIN 1 S
AONR21307-GP
1R2F-GP GAP-CLOSE-PWR-3-GP D 8
PWR_CHG_SCL 2 S
PC4451 D 7
SC1U25V3KX-1-DLGP 3 S D 6
PWR_CHG_BATGONE
PWR_CHG_OTGPG
PWR_CHG_BGATE
PWR_CHG_VBAT1
PWR_CHG_PROCHOT#
PWR_CHG_AMON
PWR_CHG_PROG
PWR_CHG_COMP
D 5
PWR_CHG_PSYS
1
PC4449 PC4450 G
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
4
2
2
084.21307.0037
2nd = 084.03305.0037
VDD VDD
PR4409
1
PWR_CHG_BAT_IN# 2 1 PC4440 PC4429
1
SC1U25V3KX-1-DLGP SC4700P50V2KX-1DLGP
PR4442 PR4429 100KR2F-L1-GP 2 1
2
100KR2F-L1-GP 100KR2F-L1-GP TP4402 1
1 TPAD14-OP-GP PR4483
PC4430 100R2F-L1-GP-U
2
PQ4415 SC10P50V2JN-4DLGP 1 2
ACOK#
4 3 2 1
2
1 2
ACAV_IN 5 2 PR4410
PG4408 PR4492 PR4413
GAP-CLOSE-PWR-3-GP 105KR2F-1-GP
0R0402-PAD-2-GP 10K2R2F-GP
1
PWR_AC_IN# 6 1
20200305(DVT1)
1
2N7002KDW-1-GP
PR4426 20200305(DVT1) Change to 10.2K ohm
196KR2F-GP Change to 105K ohm Power team change
75.27002.F7C Power team change
AD_IA
2
2nd = 075.27002.0E7C
1
PC4432
SC1KP50V2KX-1DLGP
2019.06.03
2 20V_VCCPD_VBUS 19V_AD_JK
+3D3V_VDD_DCIN
1
1
PR4411 PD44C1
499R2F-2-GP BAT54C-12-GP DY +3D3V_VDD_+SDC_IN PQ44D1
75.00054.A7D
1
PC4433 20V>+DC_IN>4.7V PU44C1 AOSS21319C-GP

2
SC1KP50V2KX-1DLGP DY PR44D0 PR44D4
3
PWR_CHG_COMP_R PU44C1_VIN 1 5 ALL_SYS_PWRGD 2 1 OVP_VR_EN S D OVP_VR_EN_A 2 1 VCORE_OVP_+A
DY DY DY
2
2 VIN OUT
DY
1
3 GND 4 0R2J-2-GP 0R2J-2-GP
1
1
EN ADJ
PU44C1_ADJ
PC4431 PR44C7 PC44C3 PR44C2 PC44C2
2
PR44D2
SCD01U25V2KX-3DLGP
Barrel Prochot DY 13K3R2F-L1-GP DY SC10U25V3MX-5-GP 16K9R2F-GP DY SC2D2U10V3KX-1DLGP-U
G
AP2204K-ADJTRG1-GP R1 DY DY PC44D1 DY4K99R2F-L-GP
2
SCD1U25V2KX-1-DL-GP
74.02204.03F
1
2
2
19V_AD+ Follow custormer circuits. OVP_VR_EN_G
PR44D6
0R2J-2-GP
PR44C4 2 1
DY
1
PU44C1_EN 1 2 PU44C1_EN_R
DY Vout=1.24*(1+(R1/R2)) PR44C3
10KR2F-2-GP PR44D5
1
100KR2F-L3-GP R2 DY DY 1KR2F-3-GP
VCORE_OVP_OUT
1
PR4437 PR44C1 PC44C1
MS 100KR2F-L1-GP
1
DY 10KR2F-2-GP DY SC100P50V2JN-3DLGP
2
OVP_VR_EN_G_A
DY PR44D1
2
200KR2F-L-GP
TypeC Prochot
2
Vcore_OVP
4
PU +VCCSTG = 1.0 V on CPU side
PQ44D0
Follow custormer circuits. PC44D0
1
3D3V_S5 3D3V_S5
1
DY 2N7002KDW-1-GP
PR4436 DY DY2 75.27002.F7C
1MR2J-1-GP 2nd = 075.27002.0E7C
3
1
3D3V_S5
E PQ4408_E
PR44D3 PR44D9
PR4472 PR4435 Charger LDO SCD22U25V3KX-DL-GP 0R2J-2-GP 0R2J-2-GP
2
100KR2F-L1-GP 100KR2F-L1-GP PWR_IMVP_PWRGD 1 2 OVP_PCH_PWROK PWR_CHG_ACIN_A 2 1PWR_CHG_ACIN
PQ4416 DY
1
1
PD4403 +3D3V_VDD_+SDC_IN VDD DY
4 3 PQ4416_3 PR4462 L1SS355T1G-GP 84.03906.R11
2
100KR2F-L1-GP 2nd = 84.T3906.E11 CPU_Core DY PR44D7
1
5 2 PWR_CHG_PROCHOT# PD4403_K K APD4403_A B
B
PQ4408 0R2J-2-GP B
PQ4418
MS MS MMBT3906-3-GP PQ4405 VCCIN DY PR44A7 DY PR44A8
2
2
PWR_CHG_PROCHOT#_R 6 1 0R2J-2-GP 0R2J-2-GP
C
2
PQ4418_3 3 4 PQ4405_3 3 4
1
OVP_PCH_PWROK_G
2N7002KDW-1-GP PR4485
2 PR4486 1 PQ4408_C 2 PR4487 1
2
PQ4417_D PQ4418_2 2 5 PQ4418_5 PQ4405_2 2 5 PQ4405_5
0R0402-PAD-2-GP MS PR44A0
75.27002.F7C DY 0R2J-2-GP
VCORE_OVP_PWR
0R0402-PAD-2-GP 1 6 0R0402-PAD-2-GP 1 6
2nd = 075.27002.0E7C
1
PC4467
1
1
PC4468
2
MS
1
VCORE_OVP_+A
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
2N7002KDW-1-GP 2N7002KDW-1-GP
1
1
PR44A2
200KR2F-L-GP
PR4439
D
2
75.27002.F7C 680KR2F-GPMS 75.27002.F7C
1
PQ4405_6
19V_DCBATOUT PR4463 DY
PQ4418_6
PR44A6
205KR2F-GP
PQ4417 PR4459 2nd = 075.27002.0E7C 0R2J-L-GP 2nd = 075.27002.0E7C DY +SDC_IN PR44A4
2N7002K-2-GP 0R2J-L-GP
DY DY DY 10KR2F-2-GP
2
84.2N702.J31 PU44A1
2
2
PWR_CHG_ACOK
PWR_CHG_ACOK
1
2
2nd = 084.27002.0N31
1
PR4461 PR4438 VCORE_OVP_- 1 5
PR4460 2 INPUT- VCC
240KR2F-L-GP PR4443 MS 240KR2F-L-GP DY
10KR2F-2-GP VCORE_OVP_+ 3 GND 4 VCORE_OVP_OUT
10KR2F-2-GP MS
S
G
INPUT+ OUTPUT
1
1
3D3V_S5 3D3V_S5
2
1
PR44A1
100KR2F-L1-GP
AS331KTR-G1-GP
1
PQ4417_G
PC44A9
SC100P50V2JN-3DLGP
PR44A3
75KR2F-GP
PC44A1
SC100P50V2JN-3DLGP
74.00331.H2F
1
DY
DY DY DY PD44A1DY
K A
2
2
L1SS355T1G-GP
83.00355.G1F
A A
RO UMA/DIS 2IN1
Wistron Corporation
21F, 88, Sec.1, Hs in Tai Wu Rd., Hs ichih,
Taipei Hs ien 221, Taiwan, R.O.C.
Title
POWER (CHARGER_ISL9538HRTZ)
Size Docum ent Num ber Rev
A0
Date: Wednes day, Augus t 05, 2020 Sheet 44 of 106
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_5V
OFFPAGE-Signal
3D3V_AUX_S5
OFFPAGE-GAP SY8288C For 5V 5V_AUX_S5
Place another side , make GND plan bigger
1
1
PR4571
DYPR4552
DY 0R2J-L-GP 100KR2J-1-GP
2
2
PR4573
D 19V_DCBATOUT PU4551 D
2 1 PWR_3V_5V_EN1_R 1 PR4572 2 PWR_5V_EN 9 PWR_5V_PG
DY 2 PG
0R0402-PAD-2-GP IN#2 Cyntec. 6.8 x7.3 x 2.4mm
0R2J-L-GP 1 PR4554 2PWR_5V_BOOT_A DCR:17~20mOhm
2
3 1 PWR_5V_BOOT 1 2 Design Current=7A
K
IN#3 BS
1
PR4574 PC4552 PC4554 Idc : 9A , Isat : 15A
0R0603-PAD-2-GP-U 10.5A<OCP>12.6A
SCD1U25V2KX-1-DL-GP
SC10U25V5KX-DL-GP
0R0402-PAD-2-GP DY PD4551 4 PC4553
IN#4 PL4551 68.1R510.20N
PJSD24W-GP SCD1U25V2KX-1-DL-GP
COIL-1D5UH-29-GP
2
5 PWR_5V
2nd = 068.1R510.2191
1
IN#5
1 PR4575 2
A
3V_5V_EN PWR_3D3V_EN 6 PWR_5V_PH 1 2
40 3V_5V_EN LX#6
0R0402-PAD-2-GP PWR_5V_PG 10 19 DY DY
NC#10 LX#19
20 PC4565 PC4556 PC4557 PC4558 PC4559 PC4560 PC4561
LX#20
1
16 Trace used 10 mil DY
PG4571 5V_S5 PWR_5V NC#16
SCD1U25V2KX-1-DL-GP
PG4562
GAP-CLOSE-PWR-3-GP
PWR_5V_PG PG4551 GAP-CLOSE-PWR-3-GP
1 2
2
GAP-CLOSE-PWR-3-GP 14 PWR_5V_VOUT 1 2
2 1 PWR_5V_VCC 17 OUT
PG4572 VCC
1
GAP-CLOSE-PWR-3-GP PG4554 PC4562 13 PWR_5V_FB 1 2PWR_5V_FB_A 2 1
1 2 PWR_3D3V_PG GAP-CLOSE-PWR-3-GP SC2D2U10V3KX-1DLGP-U FF PR4555
17,24,25 3V_5V_PWRGD 2 1 PWR_5V_EN 12 074.08288.0B43 PC4563 1KR2F-3-GP
2
EN1 SC1KP50V2KX-1DLGP
PG4556 PWR_5V_EN2 11 15 PWR_5V_LDO
GAP-CLOSE-PWR-3-GP EN2 LDO
1
2 1
For 2cell use
1
PR4556 PC4551
GND
GND
GND
GND
PG4558 1MR2J-1-GP SC4D7U6D3V3KX-DLGP
GAP-CLOSE-PWR-3-GP
2
2 1 SY8288CRAC-GP
18
21
PR4557 PWR_5V_FB
PG4560 499KR2F-1-GP
GAP-CLOSE-PWR-3-GP 1 2
19V_DCBATOUT
2 1
1
1
2
PG4563 PR4551
GAP-CLOSE-PWR-3-GP PR4558 PC4564 348KR2F-GP
2 1
DY
499KR2F-1-GP
1
SCD1U25V2KX-1-DL-GP
2
PG4564
2
GAP-CLOSE-PWR-3-GP
2 1
PG4566 Place another side , make GND plan bigger

GAP-CLOSE-PWR-3-GP
2 1
EN rating 25V
C EN Rising Threshold : 0.8V C
5V_AUX_S5
PG4565 Ilimt : 8A
GAP-CLOSE-PWR-3-GP
2 1 PWR_5V_LDO
SSID = PWR.Plane.Regulator_3D3V
OFFPAGE-Signal OFFPAGE-GAP TPS51393 For 3D3V PC4506

SCD1U25V2KX-1-DL-GP
PWR_3D3V_BOOT 1 PR4501 2 PWR_3D3V_BOOT_A 2 1
PWR_3D3V_LDO PR4516
Cyntec. 6.8 x7.3 x 2.4mm
Vin Operating range : 4.5V~24V 0R2J-2-GP
0R0603-PAD-2-GP-U DCR:17~20mOhm
Vin_Max : 26V 1 2 PWR_3D3V_VCC Idc : 9A , Isat : 15A
DY
68.1R510.20N
1
PC4522
SC2D2U10V3KX-1DLGP-U
PL4501 2nd = 068.1R510.2191 Design Current : 6A
17
COIL-1D5UH-29-GP
2
19V_DCBATOUT 20200114(DVT1) PU4501 PWR_3D3V
Power team change
VCC
2 6 PWR_3D3V_PH 1 2 20200114(DVT1)
3 VIN SW#6 19
VIN SW#19 Power team change
4 20
K VIN SW#20
1
1
PC4502 PC4501 5 PWR_3D3V_LDO
VIN
1
SC10U25V5KX-DL-GP
SCD1U25V2KX-1-DL-GP
PD4501 10 PC4509 PC4510 PC4511 PC4512 PC4514
PWR_3D3V_EN NC#10 PWR_3D3V_LDO_R 1 PR4515 2
DY PJSD24W-GP 12 15 DY
2
2
PWR_3D3V_EN2 11 EN LDO 16
0R0402-PAD-2-GP
2
ENLDO NC#16
A
20200114(DVT1)
1
3D3V_S5 PWR_3D3V PR4514 PWR_3D3V_BOOT 1
BOOT
1
PWR_3D3V_PG Power team change
1MR2J-1-GP
PG4505 9 7
GAP-CLOSE-PWR-3-GP PWR_3D3V_FB 13 PGOOD GND 8 PC4507
2 1 14 FB GND 18 SC10U6D3V3MX-DL-GP
2
VOUT GND 21
2
PG4506 GND
GAP-CLOSE-PWR-3-GP
B B
2 1 TPS51393PRJER-GP
TPS51393 JW5068B
PG4507
074.51393.0A43 PR4515 上上 DY
GAP-CLOSE-PWR-3-GP
Place another side , make GND plan bigger PR4516 DY 上上
2 1 PWR_3D3V_PH
Close to PC4511
1
PG4508 19V_DCBATOUT Trace used 10 mil
GAP-CLOSE-PWR-3-GP PG4528 PR4517
2 1 GAP-CLOSE-PWR-3-GP 2D2R6J-3-GP
DY
1
PWR_3D3V_VOUT 1 2
PG4509
2
GAP-CLOSE-PWR-3-GP PR4509
PR4506 PWR_3D3V_SNB
2 1 300KR2J-GP PC4521
1 2 PWR_3D3V_FB2 1 2
2
PG4510 EN rating :5.5V
1
GAP-CLOSE-PWR-3-GP SC470P50V2KX-3DLGP 240KR2F-L-GP
2 1 EN Rising Threshold :1.5V PC4527
EN Falling Threshold : 0.4V DY SC1500P50V2KX-2GP
2
1
PG4511
GAP-CLOSE-PWR-3-GP
2 1 PR4508
100KR2J-1-GP 20200114(DVT1)
PG4512 Power team change
2
GAP-CLOSE-PWR-3-GP
2 1
PR4505
100KR2J-1-GP
1 DY 2
3D3V_AUX_S5
3D3V_AUX_S5
PG4527
GAP-CLOSE-PWR-3-GP
2 1 PWR_3D3V_LDO
DVT2 remove FPR S5 SSO
A A
RO UMA/DIS 2IN1
Wistron Corporation
Title
POWER (SY8286_5V/3D3V)
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = CPU_CORE 1D05V_VCCST
OFFPAGE
20191203(EVT)
1
PR4606
PR4605
PR4604
SVID Follow Nakia shuri N7 Close to IC
DY PC4626
SCD1U25V2KX-1-DL-GP
2
2
2
1
1 PR4632 2 PWR_VCORE_SCLK_R
7 SVID_CLK_CPU DY
0R0402-PAD-2-GP
1 PR4633 2
1
1
2
PWR_VCORE_SDIO_R
7 SVID_DATA_CPU
43R2J-GP
56R2J-4-GP
100R2F-L1-GP-U
D 0R0402-PAD-2-GP D
1 PR4634 2 PWR_VCORE_ALERT#_R 1D05V_VCCST

7 SVID_ALERT#_CPU
0R0402-PAD-2-GP PWR_VCORE_SCLK_R
PWR_VCORE_ALERT#_R
1
PWR_VCORE_SDIO_R
PR4603
DY 1KR2F-3-GP
PR4624
PR4623
PR4622
2
5V_S5
PR4607
100R2F-L1-GP-U
1
1
1
1
PWR_VCORE_VRHOT_R 1 2
PR4617
0R0402-PAD-2-GP
1 PR4688 2 PWR_CORE_PSYS
44 CHGR_PSYS_IMVP
1 PR4601 2
2
2
2
2
0R0402-PAD-2-GP 3D3V_S0 19V_DCBATOUT
0R2F-1-GP
0R0402-PAD-2-GP
0R2F-1-GP
0R0402-PAD-2-GP
1 PR4631 2
1
PWR_VCORE_VRHOT_R
1
24,44,72 PROCHOT#_CPU PR4609 PC4613 1 2
0R0402-PAD-2-GP
10KR2F-2-GP SC1U10V2KX-1DLGP
PC4601 SCD22U25V2KX-4-GP
2
2
PWR_VCORE_VR_READY
PC4612
SC4700P50V2KX-1DLGP
PWR_VCORE_ALERT#
PWR_VCORE_VRHOT
PWR_VCORE_SCLK
PWR_VCORE_SDIO
PWR_VCORE_VR_EN
PWR_VCORE_VDD
1 2
PWR_VCORE_VIN
1 PR4636 2 PWR_VCORE_VR_READY PROG1
17,44 PWR_IMVP_PWRGD
0R0402-PAD-2-GP
PR4602 VBOOT:0V
12K1R2F-L1-GP
1 DY 2 F=750kHz
1 PR4635 2
1
C PWR_VCORE_VR_EN C
,44 ALL_SYS_PWRGD
PR4619 PR4620
0R0402-PAD-2-GP
78K7R2F-GP 9K31R2F-GP
PC4609
33
32
31
30
29
28
27
26
25
SC330P50V2KX-3-DL-GP PU4601
VCORE SENSE
2
1 2
VR_ENABLE
VR_READY
VR_HOT#
SCK
ALERT#
SDA
GND
VDD
VIN
PR4608
VSSCORE_SENSE 93K1R2F-L-GP PWR_CORE_PSYS 1 24 PWR_VCORE_PROG1 PC4610
7 VSSCORE_SENSE 1 2 PWR_VCORE_IMON 2 PSYS PROG1 23 PWR_VCORE_PROG2 SCD22U25V2KX-4-GP
PWR_VCORE_NTC 3 IMON PROG2 22 PWR_VCORE_BOOT1 1 PR4621 2 PWR_VCORE_BOOT1_N 1 2
PWR_VCORE_COMP 4 NTC ISL95869HRTZ-T-GP BOOT1 21 PWR_VCORE_UGATE1 0R0603-PAD-2-GP-U
VCCCORE_SENSE PWR_VCORE_FB 5 COMP UGATE1 20 PWR_VCORE_PHASE1
7 VCCCORE_SENSE PWR_VCORE_RTN 6 FB 074.95869.0073 PHASE1 19 PWR_VCORE_LGATE1
PWR_VCORE_ISUMN1 7 RTN LGATE1 18
8 ISUMN PWM3 17 PWR_VCORE_VDDP 1 PR4625 2
ISUMP VDDP 5V_S5
1
0R0402-PAD-2-GP
PR4616
UGATE2
PHASE2
LGATE2
10KR2F-2-GP
BOOT2
1
FCCM
ISEN1
ISEN2
ISEN3
PC4625
SC1U10V2KX-1DLGP
2
2
9
10
11
12
13
14
15
16
PWR_VCORE_NTC_N
PWR_VCORE_UGATE2
PWR_VCORE_PHASE2
PWR_VCORE_LGATE2
PWR_VCORE_BOOT2
B=4500
1
PWR_VCORE_UGATE1 PR4618
2
47 PWR_VCORE_UGATE1
NTC-470K-17-GP
PWR_VCORE_PHASE1 PR4655
47 PWR_VCORE_PHASE1
27K4R2F-GP
PWR_VCORE_LGATE1
47 PWR_VCORE_LGATE1
1
PWR_VCORE_UGATE2
47 PWR_VCORE_UGATE2
20200522(DVT2) 1 PR4611 2 PWR_VCORE_BOOT2_N 1 2
B PWR_VCORE_PHASE2 Change to 1.5K ohm B
47 PWR_VCORE_PHASE2 0R0603-PAD-2-GP-U
Power team change PC4611
PWR_VCORE_LGATE2 SCD22U25V2KX-4-GP
1
47 PWR_VCORE_LGATE2
PR4615
1K5R2F-2-GP 5V_S5
PWR_VCORE_ISEN2 PWR_VCORE_ISEN2
47 PWR_VCORE_ISEN2
2
1
PWR_VCORE_ISEN1
PWR_VCORE_COMP_N
47 PWR_VCORE_ISEN1 PWR_VCORE_ISEN1
PC4608
PWR_VCORE_ISUMP SC82P50V2JN-3-DL-GP
47 PWR_VCORE_ISUMP
2
PWR_VCORE_ISUMN 20200110(DVT1) PWR_VCORE_ISUMP

47 PWR_VCORE_ISUMN
1
Change to 392 ohm
1
PR4614 PR4613 PR4612 Power team change
2K87R2F-1-GP
2KR2F-3-GPDY 392R2F-GP PC4614 PC4618 PR4653

1 PR4629 2PWR_VCORE_ISUMP_N
1
SCD022U16V2KX-3DLGP
SCD022U16V2KX-3DLGP
2K61R2F-1-GP
PC4607 PC4623
0R0402-PAD-2-GP
2
1
VCCCORE_SENSE
SCD01U25V2KX-3DLGP
PR4628 PC4616 PC4602
2
1
1
PWR_VCORE_ISUMN_N PWR_VCORE_ISUMNP_2
SCD022U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
1 2 1 2
1PWR_VCORE_FB1
1PWR_VCORE_FB2
PR4630
2
PR4667 SC2200P50V2KX-2DLGP 3K48R2F-GP 11KR2F-L-GP
2
2
0R0402-PAD-2-GP
PWR_VCORE_FB4
2
PR4640 PR4650
B=3370
1
100R2F-L1-GP-U NTC-10K-29-GP-U
1 2 VCCIN
PC4604 PR4627
PC4606 DY SC820P50V2KX-1-DL-GP 523R2F-GP
1
SC330P50V2KX-3-DL-GP 1 2 PWR_VCORE_ISUMN
2
PC4615
SCD01U25V2KX-3DLGP
1 PR4665 2 1 PR4666 2
1
PWR_VCORE_FB3 2 DY 1 VSSCORE_SENSE PC4603
0R0402-PAD-2-GP 0R0402-PAD-2-GP SCD01U25V2KX-3DLGP
2
1
PC4638 20200514(DVT2)
1
PR4626 Change to common part

1
A PC4605 100R2F-L1-GP-U A
Confirm with power team ok
2
2
<Core Design>
Wistron Corporation
Title
POWER (ISL95869_VCORE(1/2))
A2
5 4 3 2 1
5 4 3 2 1
20200424(DVT2)
Main Func = VCCIN For acoustic noice cost down
DY TC4701, change TC4702 to 100uF
PWR_DCBATOUT_VCOREA PWR_DCBATOUT_VCOREA
19V_DCBATOUT PWR_DCBATOUT_VCOREA PWR_DCBATOUT_VCOREA
OFFPAGE
R4701 1 2 0R0805-PAD-2-GP-U
1
1
1
PC4702 PC4703 PC4704 PC4705 PC4706 DY TC4701 TC4702
PWR_VCORE_UGATE1
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SCD1U25V2KX-1-DL-GP
R4702 1 2 0R0805-PAD-2-GP-U ST33U25VDM-6-GP ST100U25VDM-1-GP
46 PWR_VCORE_UGATE1
2
077.53361.0021 077.C1071.0071
2
PWR_VCORE_PHASE1
46 PWR_VCORE_PHASE1 1 2 2nd = 077.23361.0001 2nd = 077.C1071.0101
R4703 0R0805-PAD-2-GP-U
46 PWR_VCORE_LGATE1
PWR_VCORE_LGATE1
R4704 1 2 0R0805-PAD-2-GP-U
TGL_U42 28W
D Performance D
PWR_VCORE_UGATE2
46 PWR_VCORE_UGATE2
PWR_VCORE_PHASE2
R4705 1 2 0R0805-PAD-2-GP-U
TDC=38A
46 PWR_VCORE_PHASE2
46 PWR_VCORE_LGATE2
PWR_VCORE_LGATE2
R4706 1 2 0R0805-PAD-2-GP-U
PWR_VCORE_LGATE1 ICCMAX=62A
R4707 1 2 0R0805-PAD-2-GP-U
Cyntec 6.8mmx7.6mmx3.0mm
DCR: 0.9m ohm +/-7% VCCIN
Idc : 38A , Isat : 45A
PWR_VCORE_ISEN2 R4708 1 2 0R0805-PAD-2-GP-U
10
46 PWR_VCORE_ISEN2 PU4701
PWR_VCORE_ISEN1 S2 20191203(EVT) PL4701
46 PWR_VCORE_ISEN1
20191202(EVT) PWR_VCORE_UGATE1 1 G1 G2 8 High limit change, follow HCAT13 CML COIL-D15UH-8-GP
PWR_VCORE_ISUMP Change to 0 ohm 0805 Confirmed with power team.
46 PWR_VCORE_ISUMP PWR_VCORE_PHASE1 2
Q1 Q2
7 PWR_VCORE_PHASE1 1 2
PWR_VCORE_ISUMN
Power team suggest 2 phase = 8pcs S1/D2 D2/S1
46 PWR_VCORE_ISUMN 3 D1 D2/S1 6 068.R1510.2091

2nd = 068.R1510.2111
1
4 D1 D2/S1 5
PWR_DCBATOUT_VCOREA
1
D1
DY PR4705 PT4701 PT4702
2
AOE6932-GP 2D2R6J-3-GP SE330U2D5VDM-2GPDY SE330U2D5VDM-2GP
9
075.06932.0A73 PG4711 PG4712 79.3371V.2PL 79.3371V.2PL
2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
2nd = 075.16038.0073 PWR_VCORE_SNB1 2nd = 80.3371V.L01
1
1
PC4710
DY SC1KP50V2KX-1DLGP
PWR_VCORE_ISUMP_GA
2
PWR_VCORE_ISUMN_GA
PWR_VCORE_ISEN1 1 2
1
PR4721 PR4722
100KR2F-L1-GP PR4709 100KR2F-L1-GP
10R2F-L-GP
C
PWR_VCORE_ISUMP 1 2
DY C
PWR_DCBATOUT_VCOREA
2
PR4708
3K65R2F-1-GP
PWR_VCORE_ISUMN
1
PC4717 PC4714 PC4716 PC4715 PC4718
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SCD1U25V2KX-1-DL-GP
PWR_VCORE_ISEN2
2
PWR_VCORE_LGATE2
Cyntec 6.8mmx7.6mmx3.0mm
DCR: 0.9m ohm +/-7%
10
PU4702 VCCIN
S2 20191203(EVT) PL4702
PWR_VCORE_UGATE2 1 G1 G2 8 High limit change, follow HCAT13 CML COIL-D15UH-8-GP
Confirmed with power team.
Q1 Q2
PWR_VCORE_PHASE2 2 S1/D2 D2/S1 7 PWR_VCORE_PHASE2 1 2
3 D1 D2/S1 6 068.R1510.2091
2nd = 068.R1510.2111
1
4 D1 D2/S1 5
PWR_DCBATOUT_VCOREA
D1
DY PR4714
2
AOE6932-GP 2D2R6J-3-GP
9
B PG4713 PG4714 B
075.06932.0A73
2
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
2nd = 075.16038.0073 PWR_VCORE_SNB2
1
1
PC4713
DY SC1KP50V2KX-1DLGP
PWR_VCORE_ISUMP_GB
2
PWR_VCORE_ISUMN_GB
PWR_VCORE_ISEN2 1 2
PR4723
100KR2F-L1-GP
1
PWR_VCORE_ISUMP 1 2 PR4724
PR4715 100KR2F-L1-GP
PR4716 10R2F-L-GP DY
3K65R2F-1-GP
2
PWR_VCORE_ISUMN
PWR_VCORE_ISEN1
A A
<Core Design>
Wistron Corporation
Title
POWER (ISL95869_VCORE(2/2))
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = CPU_CORE
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
POWER (IMVP9_RESERVE)
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
Wistron Corporation
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
POWER (RSVD)
A
5 4 3 2 1
5 4 3 2 1
Main Func = VCCIN_AUX

19V_DCBATOUT PWR_VCCIN_AUX_IN
PWR_VCCIN_AUX_IN
OFFPAGE R5003 1 2 0R0805-PAD-2-GP-U
VID R5004 1 2 0R0805-PAD-2-GP-U
1
PC5006 PC5007 PC5012 PC5013
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
SC10U25V3MX-5-GP
1 PR5014 2 PWR_VCCIN_AUX_VID0 R5005 1 2 0R0805-PAD-2-GP-U
22,40 CORE_VID0
2
0R0402-PAD-2-GP
R5006 1 2 0R0805-PAD-2-GP-U
D 1 PR5015 2 PWR_VCCIN_AUX_VID1 D
22,40 CORE_VID1
0R0402-PAD-2-GP 20191203(EVT)
Change to 0 ohm 0805
Power team suggest 4pcs
2 PR5012 1 PWR_VCCIN_AUX_EN_R PC5009

24,53 PWR_1D8V_PG
SC1U10V2KX-1DLGP
0R0402-PAD-2-GP PWR_VCCIN_AUX_BOOT 2 1
2 PR5013 1 PWR_VCCIN_AUX_PG
40 VCCIN_AUX_PWRGD
0R0402-PAD-2-GP
PR5002 TGL_U42 28W
10
VCCIN_AUX SENSE 133KR2F-GP PU5001
Performance
BOOT
5V_S5 1 2 PWR_VCCIN_AUX_CS 1 20 PWR_VCCIN_AUX_IN PWR_VCCIN_AUX_IN
3D3V_S5 CS_DIS VSYS
2 PR5017 1 PWR_VCCIN_AUX_FB_O
PU5002 PU5003 TDC=16A
1
22 VCCAUX_SENSE PR5001 2 2
Cyntec. 6.8 x 7.3 x 3mm
0R0402-PAD-2-GP
PR5004
10KR2F-2-GP
2D2R2J-GP
2 1 PWR_VCCIN_AUX_VCC 15
PVCC
UG
11 PWR_VCCIN_AUX_UG
1
3
4
10
3
4
10
1 DCR: 2.5~2.8 mOhm ICCMAX=32A
1
10/09 3D3V_S0 -> PC5008 12 PWR_VCCIN_AUX_LX 9 9 1D8V_VCCIN_AUX
2 PR5018 1 PWR_VCCIN_AUX_RGND PH
2
3D3V_S5,charon SC1U10V2KX-1DLGP 16 7 7
22 VSSAUX_SENSE VCC 8 6 6 8
0R0402-PAD-2-GP 20191205(EVT)
2
13 PWR_VCCIN_AUX_LG 5 5 PL5001 High limit change
PWR_VCCIN_AUX_PG 4 LG
PG Confirmed with power team.
1 2
14
PWR_VCCIN_AUX_EN_R 1 2 PWR_VCCIN_AUX_EN 19 PGND COIL-D22UH-2-GP
FDMS3600-02-RJK0215-COLAY-GP FDMS3600-02-RJK0215-COLAY-GP
1
PR5005 EN
075.07321.0073 075.07321.0073 68.R2210.20D
2
2D2R2J-GP PC5010 2 PWR_VCCIN_AUX_ISENP PR5021
C 2nd = 075.00019.0073 2nd = 075.00019.0073
C
1
SC1U10V2KX-1DLGP ISENSEP 17K8R2F-GP PR5016 PR5007 PT5001
19V_DCBATOUT PWR_DCBATOUT_VCCSA PWR_VCCIN_AUX_VID1 17 0R0402-PAD-2-GP 100R2F-L1-GP-U SE330U2D5VDM-2GP
2
VID1 3 PWR_VCCIN_AUX_ISENN
79.3371V.2PL
2
ISENSEN PC5011
1
PWR_VCCIN_AUX_VID0 18 SCD1U25V2KX-1-DL-GP 2nd = 80.3371V.L01
1 R5002 2 VID0 8 1D8V_VCCIN_AUX 2 1
VOUT
0R1206-PAD-1-GP
5 PWR_VCCIN_AUX_COMP
PR5003 COMP PR5008 PR5022
1 2 PWR_VCCIN_AUX_FSW 9 240R2F-1-GP 732R2F-GP
DY FSWSEL 6 PWR_VCCIN_AUX_FB 1 2 PWR_VCCIN_AUX_RC 1 2
FB
10KR2F-2-GP
AGND
7 PWR_VCCIN_AUX_RGND
RGND
PR5023
RT6543AGQW-GP NTC-10K-29-GP-U
21
1 2
074.06543.0073
PWR_VCCIN_AUX_FB_O
B=3370K
PC5003 PR5011 PC5002 PR5009

SC2200P50V2KX-2DLGP 10KR2F-2-GP SC470P50V2KX-3DLGP 1K6R2F-GP
1 2 PWR_VCCIN_AUX_COMP_R 1 2 2 DY 1 PWR_VCCIN_AUX_FB_R 2 DY 1
PC5004 PR5010
SC22P50V2JN-4DLGP 5K62R2F-GP
2 1 2 1
B B
PR5006
100R2F-L1-GP-U
2 1
2
PR5020
0R0402-PAD-2-GP
A A
<Core Design>
Wistron Corporation
Title
POWER (RT6543A_VCCIN_AUX)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
OFFPAGE OFFPAGE_GAP
S5(PM_SLP_S4#)
PWR_VDD_EN 19V_DCBATOUT PWR_DCBATOUT_VDDQ
40 PWR_VDD_EN
D PWR_DCBATOUT_VDDQ D
S3(VTT_CNTL)
VDDQ_EN
40 VDDQ_EN
1
PC5117 PC5101 PC5102
SC10U25V5KX-DL-GP
SC10U25V5KX-DL-GP
SCD1U25V2KX-1-DL-GP
2
2
PH on EE Side
1 R5101 2
0R1206-PAD-1-GP PWR_VDDQ_BOOT_A
PWR_VDDQ_PG 20200114(DVT1)
40 PWR_VDDQ_PG 20200505(DVT2) Power team change
Change Gap to 1206 size for E3 board Cyntec. 6.6mmx7.3mmx3.0 mm
1
Confirm with power team DCR:4.8~5.3mOhm
1
PWR_VDDQ_VLDOIN PR5109
5D1R3F-GP PC5108 Idc :16A , Isat : 17A
SCD1U25V2KX-1-DL-GP VDDQ:Design Current=8A
2
20191203(EVT)
PWR_VDDQ_BOOT 2
1
1D1V_S3 PWR_VDDQ PL5102 PWR_VDDQ
PC5103 High limit change
PG5131 COIL-D68UH-20-GP
SC10U6D3V3MX-DL-GP Confirmed with power team.
GAP-CLOSE-PWR-3-GP
2
2 1 1 2 PC5109 PC5110 PC5111 PC5112 PC5115
5V_S5 PR5110
068.R6810.2111
1
0R2F-1-GP
1
PG5132 2 1 PWR_VDDQ_VCC PU5101
GAP-CLOSE-PWR-3-GP
2
1
2 1 PC5113 7 18 DY PR5106
C
PVIN BST 17 PWR_VDDQ_PH 2D2R6J-3-GP C
SC2D2U10V3KX-1DLGP-U SW
1 5 PWR_VDDQ_SENSE
1 PR5107 2
2
PG5121 VLDOIN VDD2SNS
GAP-CLOSE-PWR-3-GP 13 2
3D3V_S5 0R0402-PAD-2-GP VCC_5V VDDQ
1
2 1 4 PWR_VDDQVTT_SENSE PWR_VDDQ_SNB
VDDQSNS 6 PWR_VDDQ_VDDQREF PG5133
VDDQREF
1
PWR_VDDQ_VDD1 14 PC5114 GAP-CLOSE-PWR-3-GP
PVIN_VDD1
1
PG5120 PR5108 15 PWR_VDDQV1D8V_PH
DY SC1500P50V2KX-2-DL-GP
2
GAP-CLOSE-PWR-3-GP 8 SW_VDD1 12 PWR_VDDQ1D8V_SENSE
DY 100KR2F-L1-GP PC5104 PC5116
2
2 1 SC10U6D3V3MX-DL-GP SCD1U16V2KX-3DLGP PGOOD VDD1SNS
2
16
2
11 PGND_VDD1 9 PWR_VDDQ_VTT
PG5125 PWR_VDDQ_PG 10 VDD_EN PGND 3
GAP-CLOSE-PWR-3-GP
PWR_VDD_EN
VDDQ_EN AGND VTT:Design Current=0.73A
2 1
1
TPS51487XRJER-1-GP PC5107
VDDQ_EN 1 PR5101 2 PWR_VDDQ_EN
074.51487.M002 SC10U6D3V3MX-DL-GP
PG5122 1 PR5104 2
0R0402-PAD-2-GP
2
GAP-CLOSE-PWR-3-GP 0R0402-PAD-2-GP
2 1 20200114(DVT1)
1
PC5106 Power team change
SC1U10V2KX-1DLGP
PG5129
2
GAP-CLOSE-PWR-3-GP PWR_VDDQ_1D8V
2 1 PL5101
1 2 VDDQ:Design Current=0.2A
IND-4D7UH-352-GP
1
PG5130 068.4R710.1111 PC5105
GAP-CLOSE-PWR-3-GP SC22U6D3V3MX-1-DL-GP
2 1 2nd = 068.4R710.1981
2
B B
PR5103
1D1V_S3 1 2
PWR_VDDQ_VLDOIN
0R0402-PAD-2-GP
PG5124 TOKO. 2.5mm×2.0mmX1.2mm
GAP-CLOSE-PWR-3-GP
1 2 DCR: 240m Ohm
Idc : 1.3A , Isat :1.5A
0D6V_VREF_S0 PWR_VDDQ_VTT
1 PR5122 2
0R0402-PAD-2-GP
1P8V_S3 PWR_VDDQ_1D8V
A A
<Core Design>
PG5126
2 1
GAP-CLOSE-PWR-3-GP Wistron Corporation

Title
POWER (TPS51487X_VDDQVTT)
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A A
Wistron Corporation
Title
Power (RSVD)
B Hellcat 13'' TGL A00
5 4 3 2 1
5 4 3 2 1
Main Func = 1D8V/1D2V

OFFPAGE OFFPAGE_GAP Design Current=1.7A
Chilisin. 2.5mm×2.0mmX1.2mm PWR_1D8V
3D3V_S5 PWR_1D8V_VIN
PH on EE Side PU5301 DCR: 59m Ohm
D
PG5301 Idc : 3 A , Isat : 4A D
PWR_1D8V_PG GAP-CLOSE-PWR-3-GP PWR_1D8V_VIN 9
PWR_1D8V_PG 1 2 PGND PL5301
4 5 IND-1UH-300-GP
PG5302 PWR_1D8V_VIN 3 PGND NC#5 6 PWR_1D8V_PH 1 2
GAP-CLOSE-PWR-3-GP PWR_1D8V_PG 2 VIN LX 7 PWR_1D8V_EN
PG EN
1
1 2 1 8 PC5302 PC5303
FB SGND
2
PR5307
R1 DY
PC5301 3D3V_S5 100KR2F-L1-GP
SC22U6D3V3MX-1-DL-GP RT5797ALGQW-GP PC5305
1
SC22P50V2JN-L-GP
074.05797.0073
2
1
PWR_1D8V_EN 1D8V_S5 PWR_1D8V
0 PWR_1D8V_EN PWR_1D8V_FB 2nd = 074.02822.0A43
PG5303 PR5305
GAP-CLOSE-PWR-3-GP 10KR2J-3-GP
1
2 1 PWR_1D8V_EN
PR5304
R2
2
PG5304 49K9R2F-L-GP
1
GAP-CLOSE-PWR-3-GP PC5307
2 1 DY SC1U10V2KX-1DLGP 20200310(DVT1)
2
Change PR5305 to 10k
2
PG5305
GAP-CLOSE-PWR-3-GP
2 1
EE confirm
C C
PRIM_PWRGD
PRIM_PWRGD
5V_S5 PWR_1D2V_VIN
Vo=0.6x(1+R1/R2)
=0.6x(1+100/49.9)
3D3V_S5 =1.802V
SIO_SLP_S3#
55 SIO_SLP_S3#
1
PC5311
SC2D2U6D3V2MX-DL-GP
1
PC5312
2
PR5301
1KR2F-3-GP
SC10U6D3V3MX-DL-GP
Design Current=0.5A
2
3D3V_S5 PWR_1D2V_VIN PU5302
2
PWR_1D2V
PG5306 5
GAP-CLOSE-PWR-3-GP 6 VIN#5 4
PRIM_PWRGD PR5302 PWR_1D2V_POK VCNTL VOUT#4
1 2 1 2 7 3
PWR_1D2V_EN 8 POK VOUT#3 2 PWR_1D2V_FB_LDO
0R0402-PAD-2-GP EN FB
9 1
VIN#9 GND
1 PR5303 2
1
B SIO_SLP_S3# PC5304 PC5314 PC5306 B
SC68P50V2JN-1DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
PC5313 APL5934KAI-TRG-GP-U DY DY
0R0402-PAD-2-GP
SC4700P50V2KX-1DLGP
20191223(EVT) 20191223(EVT) PR5311 DY DY 074.05934.003D
2
47KR2J-2-GP PR5312
Change to S0 power R1
2
Change to S0 power 2nd = 074.94611.003D 18KR2F-GP
2
1D2V_S0 PWR_1D2V
2
PG8626
GAP-CLOSE-PWR-3-GP
2 1
1
PR5306
R2 35K7R2F-GP
Vo=0.8x(1+R1/R2)
2
=0.8x(1+18/35.7)
=1.203V
<Core Design>
A A
Wistron Corporation
Title
POWER (RT5797_1D8V_S5)
B
5 4 3 2 1
5 4 3 2 1
3D3V_S5
PR5420 1 2 PW R_VNN1D05V_PG
OFFPAGE OFFPAGE-GAP 100KR2J-1-GP
DY
Murata. 2.7mm×2.2mmX1.2mm
DCR: 59m Ohm
PH on EE Side Idc : 3A , Isat : 3A
D PW R_VNN D
PL5401
VCCIN_AUX_PWRGD PW R_VNN_EN
40 PW R_VNN_EN 1D05V_VNN_BYPASS PW R_VNN 1 2
IND-1UH-382-GP PC5411 PC5412

R5499
1
1 2
1D05V_BP_PWRGD PW R_VNN1D05V_PG 0R0603-PAD-2-GP-U
2
40 PW R_VNN1D05V_PG PC5401 1 2 SC1U10V2KX-1DLGP
1D05V_S5_BYPASS PW R_1D05V
PR54131 22D2R2F-GP
5V_S5
PW R_1D05V_EN
40 PW R_1D05V_EN
1 R5498 2 PU5401 Murata. 2.7mm×2.2mmX1.2mm
PC5402 SC4D7U25V3KX-2-GP
0R0603-PAD-2-GP-U
1 2 PW R_VNN1D05V_VCC 8 15 PW R_VNN_EN DCR: 460m Ohm
PH on EE Side VCC EN1 6 PW R_1D05V_EN Idc : 0.85A , Isat : 1A PW R_1D05V
20200303(DVT1) PR5422 1 2 0R0402-PAD-2-GP PW R_VNN1D05V_VINA 11 EN2
PW R_VNN1D05V_VINB 10 VIN1 PW R_VNN1D05V_PHA PL5402
0603 PR5410 1 2 0R0402-PAD-2-GP 1
19V_DCBATOUT VIN2 LX1 PW R_VNN1D05V_PHB
1D05V_BYPASS_CTRL 4 1 2
1 2 LX2
2
PW R_VNN1D05V_VID2 PC5403 SC4D7U25V3KX-2-GP PW R_VNN1D05V_VID1 13 5 PW R_VNN1D05V_FB2
40 PW R_VNN1D05V_VID2 VID1 VOUT2 IND-10UH-330-GP
1
PC5414 PR5408
C 16 PW R_VNN1D05V_VOUT1 0R0402-PAD-2-GP C
DY
SC100P50V2JN-3GP
PW R_VNN1D05V_BOOTA_A PC5404 1 2SCD1U25V2KX-1-DL-GP PW R_VNN1D05V_BOOTA 2 VOUT1
2
PW R_VNN1D05V_BOOTB_A PC5405 1 2SCD1U25V2KX-1-DL-GP PW R_VNN1D05V_BOOTB 3 BOOT1
1
BOOT2
1
PM_SLP_S3# 17
PW R_VNN1D05V_VID1 AGND PC5410 PC5413
40 PW R_VNN1D05V_VID1
1 PR5419 2
2
PW R_VNN1D05V_VID2 14
9 PW R_VNN
2
PC5406 1 PW R_VNN1D05V_PG VID2 PGND
DY 2 SCD1U16V2KX-L-GP 7 12
0R0402-PAD-2-GP
PR5407
POK PGND DY 0R2J-L-GP
2
PR5423 1 2 0R0402-PAD-2-GP PW R_VNN1D05V_PHB APW 8743CQBI-TRG-GP PR5430
1
DY 0R2J-L-GP
074.08743.0A73
PR5401 1 2 0R0402-PAD-2-GP PW R_VNN1D05V_PHA
1
3D3V_S5 3D3V_S5
PR5426
10KR2F-2-GP
1 DY 2 PW R_VNN1D05V_VID1
B PR5427 B
10KR2F-2-GP
1 DY 2 PW R_VNN1D05V_VID2
1
1
PR5433 PR5428
10KR2F-2-GP 10KR2F-2-GP
2
2
R5401
1 2 PW R_VNN1D05V_VID1
22 VNN_CTRL_R DY
0R2J-2-GP
20191223(EVT)
Follow design review reserve
<Core Design>
A A
Wistron Corporation
Title
POWER (RT5797_1D8V_S5)
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = LCD

Follow Hellcat 13 CML Hinge up cable protection
eDP Panel D5502
L_BKLT_CTRL
D5501
1 EDP_VDD_EN 1
BKLT_CTRL 3 LVDS_VDD_EN_R
3
2 LCD_TST LCD_VCC_TEST_EN 2
16 CCD_USB20_N LCD1
33 BAT54C-12-GP
31 BAT54C-12-GP
16 CCD_USB20_P
1 DBC_EN_R R5503 1 2 0R0402-PAD-2-GP DBC_PANEL_EN 75.00054.A7D 75.00054.A7D
4 eDP_TX_CPU_N3 2nd = 75.00054.T7D 2nd = 75.00054.T7D
4 eDP_TX_CPU_P3 2
3 eDP_TX_CON_N3 C5532 1 2SCD1U16V2KX-3DLGP eDP_TX_CPU_N3
4 eDP_TX_CPU_N2 LVDS_VDD_EN_R R5586 1 2 0R0402-PAD-2-GP LVDS_VDD_EN_R_C
4 eDP_TX_CON_P3 C5531 1 2SCD1U16V2KX-3DLGP eDP_TX_CPU_P3
4 eDP_TX_CPU_P2
5 SIO_SLP_S3# 3D3V_HINGE_S0_EN
eDP_TX_CON_N2 eDP_TX_CPU_N2 R5587 1 2 0R0402-PAD-2-GP
4 eDP_TX_CPU_N1 6 C5533 1 2SCD1U16V2KX-3DLGP R5564 1 2 33R2F-3-GP DMIC_PCH_CLK
7 eDP_TX_CON_P2 C5519 1 2SCD1U16V2KX-3DLGP eDP_TX_CPU_P2
4 eDP_TX_CPU_P1 DMIC_PCH_DATA
8 R5565 1 2 33R2F-3-GP
1
9 eDP_TX_CON_N1 C5501 1 2SCD1U16V2KX-3DLGP eDP_TX_CPU_N1 C5560
4 eDP_TX_CPU_N0 3D3V_S5 C5561
D 10 eDP_TX_CON_P1 C5504 1 2SCD1U16V2KX-3DLGP eDP_TX_CPU_P1 SCD1U16V2KX-3DLGPDY D
4 eDP_TX_CPU_P0
11
DY SCD1U16V2KX-3DLGP
2
12 eDP_TX_CON_N0 C5506 1 2SCD1U16V2KX-3DLGP eDP_TX_CPU_N0 DMIC_SCL_CON R5566 1 2 33R2F-3-GP DMIC_SCL_CODEC
4 eDP_AUX_CPU_N
eDP_TX_CON_P0 eDP_TX_CPU_P0 DMIC_SDA_CON
DY DMIC_SDA_CODEC
4 eDP_AUX_CPU_P 13 C5509 1 2SCD1U16V2KX-3DLGP R5567 1 DY 2 33R2F-3-GP
14
4 EDP_HPD 15 eDP_AUX_CON_P C5510 1 2SCD1U16V2KX-3DLGP eDP_AUX_CPU_P EC5503 EC5504
1
16 eDP_AUX_CON_N C5511 1 2SCD1U16V2KX-3DLGP eDP_AUX_CPU_N
SC33P50V2JN-3DLGP
SC33P50V2JN-3DLGP
20 DBC_PANEL_EN U5501
17 3D3V_S5
4 EDP_VDD_EN 18 1 10 3D3V_LCDVDD_R
2
24 LCD_VCC_TEST_EN 19 LVDS_VDD_EN_R_C 2 IN1 OUT1 9 CABLE1_OCP#
3D3V_LCDVDD_S0
20 EN1 FLAG1
1
1
4 L_BKLT_CTRL FC5501 C5502 3 8
21 3D3V_HINGE_S0_EN 4 VB GND 7 CABLE2_R_OCP#
SC4D7U6D3V3KX-DLGP
22 SC12P50V2JN-DL-GP 3D3V_S5 EN2 FLAG2
24 LCD_TST 5 6 3D3V_HINGE_R
23 LCD_TST_C IN2 OUT2
2
24 PANEL_BKEN
2
24 eDP_HPD_CON RO13_20171026 11
25 BLON_OUT_C THERMAL_PAD
FC5501 close to LCD1
26 LCD_BRIGHTNESS
27 G2895ALK21U-GP
28
1
19V_DCBATOUT_LCD C5526 C5523
29 20191209(EVT) 074.02895.0073
SC4D7U6D3V3KX-DLGP
SC1U25V3KX-1-DLGP
30 Follow HCAT DG1 change to RN5501
32
2
20 I2C0_SDA_TS 34 CABLE1_OCP# R5527 1 2 0R0402-PAD-2-GP CABLE2_OCP#
RN5501
20 I2C0_SCL_TS LCD_TST_C 1 4 LCD_TST
STM-CON30-6-GP CABLE2_R_OCP# R5528 1 2 0R0402-PAD-2-GP
BLON_OUT_C 2 3 PANEL_BKEN
SRN100J-3-GP
20 TOUCH_DETECT
24 TOUCH_REPORT_SW 3D3V_HINGE_S0
3 TOUCH_PANEL_PD#
020.F1027.0030 LCD_BRIGHTNESS 1
R5545
2 BKLT_CTRL 3D3V_LCDVDD_S0
20 TOUCH_PANEL_INTR#
2nd = 20.F2101.030 100R2J-2-GP LCDVDD Layout 80 mil
20,66 ISH_I2C0_ACC_SDA R5546
20,66 ISH_I2C0_ACC_SCL
eDP_HPD_CON 1 R5506 2 EDP_HPD 1 2 3D3V_LCDVDD_R 1 R5516 2 3D3V_HINGE_R
20 ISH_ACC1_INT# 100R2J-2-GP 0R0805-PAD-2-GP-U
0R0805-PAD-2-GP-U
1
C5508
2
FC5505
1
20 ISH_I2C1_ALS_SDA C5520 C5559 C5522
Sensor/TOUCH PANEL/IR Camera C5507 SC18P50V2JN-1DLGP
SCD1U16V2KX-3DLGP
SC1U25V3KX-1-DLGP
SC1U10V2KX-1DLGP
SCD1U16V2KX-3DLGP
20 ISH_I2C1_ALS_SCL
TCH_INTR# SCD1U16V2KX-3DLGP DY
2
1
1
LCD_BRIGHTNESS
1
RN5502
2
27 DMIC_SCL_CODEC 1 8 eDP_HPD_CON
27 DMIC_SDA_CODEC 2 7 LVDS_VDD_EN_R
1
3 6 BLON_OUT_C
19 DMIC_PCH_CLK 4 5 BKLT_CTRL
DY EC5501
1
19 DMIC_PCH_DATA TCBD1
41 SC8P50V2DN-1DL-GP ED5502
2
3D3V_SEN_S0 DY
SRN100KJ-5-GP AZ5725-01FDR7G-GP
1 2016/12/20 change to 8P DY 83.05725.0A0
C 20191209(EVT) C
3D3V_HINGE_S0
66 DCBATOUT_LCD_R 2 Follow HCAT DG1
2
3 ISH_I2C0_ACC_SDA
EMI 20160812
4 ISH_I2C0_ACC_SCL
Sensor
2
5
66 3D3V_LCDVDD_R 6
7
ISH_ACC1_INT#
DY
R5504
100KR2J-1-GP
INVERTER POWER
8 19V_DCBATOUT_LCD
9
Touch Panel 19V_DCBATOUT
1
24 PANEL_MONITOR 10 TOUCH_DETECT
11 TCH_REPORT_SWITCH R5543 1 2 0R0402-PAD-2-GP TOUCH_REPORT_SW
12 TCH_RST# R5544 1 2 0R0402-PAD-2-GP TOUCH_PANEL_PD# 2016/12/21
13 TCH_INTR# R5523 1 2 0R0402-PAD-2-GP TOUCH_PANEL_INTR#
17,40,53 SIO_SLP_S3# 14 TCH_I2C_SDA R5522 1 2 0R0402-PAD-2-GP I2C0_SDA_TS F5503
15 TCH_I2C_SCL R5521 1 2 0R0402-PAD-2-GP I2C0_SCL_TS 20191209(EVT) 1
R5514
2 DCBATOUT_LCD_R 2 1
16 Follow HCAT DG1 20200417(DVT2) 0R1206-PAD-1-GP
24 CABLE2_OCP# 17 Change to 1k ohm PU POLYSW-1D1A24V-GP-U C5513
3D3V_TPAN_VDD
1
3D3V_HINGE_S0
SC1KP50V2KX-1DLGP
18 C5512 C5514
3D3V_CAMERA_S0 Follow HCAT 13 CML 69.50007.A31
SCD1U25V2KX-1-DL-GP
19
1
SC10U25V5KX-DL-GP
FC5502 2nd = 69.50007.G71
20 DY SC10P50V2JN-4DLGP ALS_INT# R5531 1 2 10KR2J-3-GP
2
21 3D3V_HINGE_S0
3D3V_MIC_VCC
RO13_20171026
2
22 CAM_SHUTTER# R5526 1 2 10KR2J-3-GP ISH_I2C1_ALS_SDA
20 ALS_INT# 23 FC5502 close to LCD1 R5529 1 2 1KR2J-1-GP
20 P_GPIO 24 DIAGLOOP R5559 1 2 0R0402-PAD-2-GP P_XSHUT R5525 1 2 10KR2J-3-GP ISH_I2C1_ALS_SCL R5530 1 2 1KR2J-1-GP
20 CAM_SHUTTER# 25 DMIC_SDA_CON
26 DMIC_SCL_CON
ALS_DATA R5584 1 3D3V_HINGE_S0
27 2 0R0402-PAD-2-GP ISH_I2C1_ALS_SDA
28
29
ALS_CLK
ALS_INT#
R5585 1 2 0R0402-PAD-2-GP ISH_I2C1_ALS_SCL Camera Touch Panel PH internally.
Starload height limite change to 0603 package
2015/09/24 modify
30
31
P_GPIO
P_XSHUT
TCH_I2C_SCL R5517 2 DY 1 4K7R2J-2-GP IR LED POWER
32 CAM_SHUTTER# R5518 4K7R2J-2-GP
TCH_I2C_SDA 2 1
33
MIC_GND
DY
34 CCD_USB20_CON_N
CCD_USB20_CON_P 19V_DCBATOUT DCBATOUT_IRLED
35 3D3V_HINGE_S0
36
37 TOUCH_PANEL_INTR# R5519 1 DY 2 10KR2J-3-GP
38
39
DCBATOUT_IRLED
40 F5504
R5524 1 DY 2 100KR2J-1-GP
42 2 1
R5501
1 2 POLYSW-1D1A24V-GP-U
2
ACES-CON40-18-GP
20.K0678.040 0R0402-PAD-2-GP 69.50007.A31 C5524 C5525
SCD1U25V2KX-1-DL-GP
SC4D7U25V5KX-DL-GP
2nd = 69.50007.G71
1
2nd = 020.K0160.0040
3rd = 20.K0809.040
B MIC_GND B
20191216(EVT)
Layout swap request
CCD_USB20_CON_P 2
EL5501
1 CCD_USB20_P LCD BIST for G10 (Was test only for G9)
SENSOR POWER TOUCH PANEL POWER
CCD_USB20_CON_N 3 4 CCD_USB20_N
DLM0NSN900HY2D-GP
3D3V_HINGE_S0 3D3V_SEN_S0 3D3V_HINGE_S0 3D3V_TPAN_VDD
068.09002.2001 R5551 Q5503_E
2 1
2ND = 68.02002.061 19V_DCBATOUT
0R0402-PAD-2-GP 84.03906.R11 3D3V_LCDVDD_S0
E
Q5503_B LCD_BIST
B
2nd = 84.T3906.E11
Q5512
JEDI 13 height limite change package MMBT3906-3-GP
20200508(DVT2)
2
2018/08/02 modify R5535
1 R5515 2 1
R5508
2
Modify LCD power
C
100KR2F-L1-GP
Follow Hellcat TGL series 2 Q5503_C 0R0603-PAD-2-GP-U 0R0805-PAD-2-GP-U
1
R5533
1
19V_DCBATOUT_LCD 10KR2F-2-GP R5534 LCD_BIST C5515 C5516 C5517 C5518
R5536 EC5506 SC4D7U6D3V3KX-DLGP
1
DY
SCD1U16V2KX-3DLGP
PANEL_PWRGD_R 2 1PANEL_MONITOR
4K7R2F-GP DY
SC10U6D3V3MX-DL-GP
LCD_BIST SC33P50V2JN-3DLGP
2
ED5501 0R0402-PAD-2-GP
2
LCD_BIST LCD_BIST
SC10U6D3V3MX-DL-GP
2
1
D5504 R5558 LCD_BIST
C
1
2
2 CCD_USB20_CON_N A K DCBATOUT_LCD_PWRGD 1MR2F-GP C5558
DCBATOUT_LCD_PG B Q5508 SCD1U16V2KX-3DLGP
2
1
3 C5556 RB520S30-GP R5532 C5557 LMBT3904LT1G-GP LCD_BIST

DY 200KR2F-L-GP SC2200P50V2KX-2DLGP
LCD_BIST 83.R2003.A8M
1
E
CCD_USB20_CON_P LCD_BIST
SCD1U25V2KX-1-DL-GP
1
LCD_BIST
2
2nd = 083.52030.008F LCD_BIST

84.T3904.H11
CAMERA POWER
2
AZ5315-02F-GP
83.05315.0A0
2nd = 84.03904.T11 MIC POWER
3D3V_HINGE_S0 3D3V_CAMERA_S0 3D3V_HINGE_S0 3D3V_MIC_VCC

R5540 Q5505_E
2 1
3D3V_S0
0R0402-PAD-2-GP 84.03906.R11
E
2nd = 84.T3906.E11
Q5504_B B Q5509
R5511
MMBT3906-3-GP 1 R5513 2 1 2
LCD_BIST 0R0603-PAD-2-GP-U
C
A 0R0603-PAD-2-GP-U A
1
Q5504_C C5503 C5521
2
SC4D7U6D3V3KX-DLGP SC4D7U6D3V3KX-DLGP
R5538 R5539
2
3D3V_LCDVDD_S0 10KR2F-2-GP 4K7R2F-GP
LCD_BIST LCD_BIST LCD_BIST
D5505
C
1
A KLCDVDD_PWRGD
LCDVDD_PG B Q5510
1
C5554 RB520S30-GP R5537 C5555 LMBT3904LT1G-GP

200KR2F-L-GP SC2200P50V2KX-2DLGP
Gen 10 LCD-BIST Hynix 8G
LCD_BIST 83.R2003.A8M
SCD1U16V2KX-3DLGP
Check if 3V and B+ is power on before doing

E
LCD_BIST
2
2nd = 083.52030.008F LCD_BIST panel self-test. It’s using for judge MB or panel
LCD_BIST 84.T3904.H11 damaged. Wistron Corporation
2
2nd = 84.03904.T11 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Title
LCD&CAM&DMC&Touch
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Display (CRT/IR Camera)
A2
5 4 3 2 1
5 4 3 2 1
Main Func = HDMI

4 HDMI_DDI_TX_N0
4 HDMI_DDI_TX_P0
4 HDMI_DDI_TX_N1
4 HDMI_DDI_TX_P1
4 HDMI_DDI_TX_N2 3D3V_HDMI
20200429(DVT2)
1D2V_HDMI 1D2V_HDMI 1D2V_HDMI 1D2V_HDMI Add level-shift 3D3V_HDMI
4 HDMI_DDI_TX_P2
Close to PIN 15 Close to PIN 46 Follow vendor suggest RN5702
Close to PIN 24 Close to PIN 1 SRN10KJ-5-GP
4 HDMI_DDI_TX_N3 CPU_DPB_CTRL_CLK
C5716 C5715 C5714 C5719 C5718 C5717 C5722 C5721 C5720 C5724 C5723 C5728 C5727 C5726 C5725 1 4
4 HDMI_DDI_TX_P3 CPU_DPB_CTRL_DATA
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SC4D7U6D3V3KX-DLGP
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD1U16V2KX-3DLGP
2 3
Q5701
4 CPU_DISP_HPDB
1
CPU_DPB_CTRL_CLK 4 3 HDMI_SCL_CON
SMBUS_DATA R5711 1 2 10KR2J-3-GP
4 CPU_DPB_CTRL_CLK 5 2 SMBUS_CLK R5708 1
DY 2 10KR2J-3-GP
DY
Note:ZZ.27002.F7C01
D 4 CPU_DPB_CTRL_DATA 3D3V_HDMI 3D3V_HDMI D
2
HDMI_SDA_CON 6 1 CPU_DPB_CTRL_DATA
2N7002KDW-1-GP CPU_DISP_HPDB
Close to PIN 11
75.27002.F7C
1
Close to PIN 30 2nd = 075.27002.0E7C R5750
100KR2J-1-GP
DY
17mA
2
3D3V_S0 3D3V_HDMI U5701
R5714 1 2 0R0402-PAD-2-GP 1 23 HDMI_DDI_TX_CMC_P2

24 VDD33 OUT_D2P 22 HDMI_DDI_TX_CMC_N2
6 VDD33 OUT_D2N
1D2V_S0 1D2V_HDMI 30 VDD12 20 HDMI_DDI_TX_CMC_P1
15 VDD12 OUT_D1P 19 HDMI_DDI_TX_CMC_N1
R5701 1 2 0R0402-PAD-2-GP 18 VDDTX12 OUT_D1N
43 VDDTX12 17 HDMI_DDI_TX_CMC_P0
VDDRX12 OUT_D0P
1
46 16 HDMI_DDI_TX_CMC_N0 C5730
20191202(EVT) 11 VDDRX12 OUT_D0N
Follow vendor suggest 5.1 ohm 1% VDDA12 14 HDMI_DDI_TX_CMC_P3 DY
SCD75P50V1CN-GP
2
Follow HCAT DG1 37 OUT_CLKP 13 HDMI_DDI_TX_CMC_N3
POWERSWITCH OUT_CLKN
Close to U5701
3D3V_HDMI
HDMI_DDI_TX_P2 C5702 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_P2 R5718 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_P2 38 21 HDMI_DET_CON_R
HDMI_DDI_TX_N2 C5701 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_N2 R5719 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_N2 39 IN_D2P HPD_SNK 40 CPU_DISP_HPDB_R R5712 1 2 1KR2F-3-GP CPU_DISP_HPDB
IN_D2N HPD_SRC
HDMI_DDI_TX_P1 C5704 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_P1 R5724 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_P1 41 7 HDMI_SCL_CON
1
HDMI_DDI_TX_N1 C5703 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_N1 R5726 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_N1 42 IN_D1P SCL_SNK 8 HDMI_SDA_CON R5703 R5707 R5702 R5704
IN_D1N SDA_SNK
10KR2F-2-GP
4K7R2F-GP
4K7R2F-GP
HDMI_DDI_TX_P0 C5706 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_P0 R5735 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_P0 44 34 CPU_DPB_CTRL_CLK_R R5739 1 2 0R2J-2-GP CPU_DPB_CTRL_CLK DY DY DY
HDMI_DDI_TX_N0 C5705 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_N0 R5736 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_N0 45 IN_D0P SCL_SRC/AUXP 33 CPU_DPB_CTRL_DATA_R R5740 1
DY 2 0R2J-2-GP CPU_DPB_CTRL_DATA
IN_D0N SDA_SRC/AUXN DY 4K7R2F-GP
2
HDMI_DDI_TX_P3 C5708 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_P3 R5737 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_P3 47 10 20200429(DVT2)
HDMI_DDI_TX_N3 C5707 1 2 SCD1U16V2KX-3DLGP HDMI_DDI_TX_R_N3 R5738 1 2 5D1R2F-GP HDMI_DDI_TX_ALS_N3 48 IN_CLKP RSV1 26 HDMI_ID
IN_CLKN RSV2
Follow vendor suggest
RST#
9 29 CSCL R5733 1 2 0R2J-2-GP SMBUS_CLK I2C_ADDR
HDMI_ID 32 HDMI_CEC CSCL 28 CSDA R5734 1
DY 2 0R2J-2-GP SMBUS_DATA PRE
Vendor request for distance between the CPU and PS8409A is too short HDMI_ID CSDA DY DCIN_ENB
C REXT 36 31 I2C_ADDR EQ C
RST# 35 REXT I2C_ADDR 27 PRE C5729
RESET# PRE
1
1
DCIN_ENB
SC1U10V2KX-1DLGP
R5706 4 3 R5709 R5710 R5705
PD# DCIN_ENB
4K7R2F-GP
4K7R2F-GP
4K7R2F-GP
2 5 EQ
TESTMODEB EQ
Close to PIN 36 12
CEC_EN DY DY
1
4K99R2F-L-GP 25 49
2
NC#25 GND
2
2
PS8409AQFN48GTR2-A2-GP
071.08409.0B03
20200406(DVT2)
Change CMC for SIV test
HDMI_DDI_TX_CMC_N0 R5717 1 2 0R0402-PAD-2-GP HDMI_DDI_TX_CON_N0 HDMI_DDI_TX_CMC_N1 R5722 1 2 0R0402-PAD-2-GP HDMI_DDI_TX_CON_N1 HDMI_DDI_TX_CMC_N2 R5716 1 2 0R0402-PAD-2-GP HDMI_DDI_TX_CON_N2 HDMI_DDI_TX_CMC_N3 HDMI_DDI_TX_CON_N3
2
EL5704
FILTER-4P-98-GP
68.24500.201
1
HDMI_DDI_TX_CMC_P0 R5721 1 2 0R0402-PAD-2-GP HDMI_DDI_TX_CON_P0 HDMI_DDI_TX_CMC_P1 R5731 1 2 0R0402-PAD-2-GP HDMI_DDI_TX_CON_P1 HDMI_DDI_TX_CMC_P2 R5720 1 2 0R0402-PAD-2-GP HDMI_DDI_TX_CON_P2 HDMI_DDI_TX_CMC_P3 HDMI_DDI_TX_CON_P3
B B
20200424(DVT2)
Remove F5701, R5713
Follow Nakia N7
D5702 5V_HDMI
5V_S0
1
3 GND
20200505(DVT2)
C5710 IN 2
OUT
Remove ED5703 for layout impact after add level-shift
SCD1U16V2KX-3DLGP
Confirmed with EMI team OK.

C5711 C5713 C5712
SCD1U16V2KX-3DLGP
AP2331SA-7-GP
1
5V_HDMI
ED5701
074.02331.009B
1
HDMI_DDI_TX_CON_P2 1 10 HDMI_DDI_TX_CON_P2
2nd = 074.05250.009B DY DY
2
A
2
HDMI_DDI_TX_CON_N2 2 9 HDMI_DDI_TX_CON_N2
D5704 D5703 3
LRB751V-40T1G-GP LRB751V-40T1G-GP DY 8
83.00751.08F 83.00751.08F HDMI_DDI_TX_CON_P1 4 7 HDMI_DDI_TX_CON_P1

2nd = 83.R2004.G8F 2nd = 83.R2004.G8F
K
3rd = 083.00751.0B8F 3rd = 083.00751.0B8F HDMI_DDI_TX_CON_N1 5 6 HDMI_DDI_TX_CON_N1
L05ESDL5V0NA-4-GP
5V_HDMI HDMI1 RN5704
SRN2K2J-1-GP 075.00550.0071
18 15 HDMI_SCL_CON 4 1 HDMI_SCL_R
+5V_POWER SCL 16 HDMI_SDA_CON 3 2 HDMI_SDA_R
SDA
3D3V_S0
HDMI_DDI_TX_CON_P0 7
HDMI_DDI_TX_CON_N0 9 TMDS_DATA0+ 13 TP_HDMIC_OB_CEC R5725 1 2 10KR2J-3-GP ED5702
HDMI_DDI_TX_CON_P1 4 TMDS_DATA0- CEC 17
DY
HDMI_DDI_TX_CON_N1 6 TMDS_DATA1+ DDC/CEC_GROUNG 19 HDMI_DET_CON R5729 1 2 0R0402-PAD-2-GP HDMI_DET_CON_R HDMI_DDI_TX_CON_P0 1 10 HDMI_DDI_TX_CON_P0
A HDMI_DDI_TX_CON_P2 1 TMDS_DATA1- HOT_PLUG_DETECT A
HDMI_DDI_TX_CON_N2 3 TMDS_DATA2+ 14 TP_UTILITY R5728 1 2 10KR2J-3-GP HDMI_DDI_TX_CON_N0 2 9 HDMI_DDI_TX_CON_N0
TMDS_DATA2- RESERVED#14 DY 3 8
DY
1
8 R5732
5 TMDS_DATA0_SHIELD HDMI_DDI_TX_CON_P3 4 7 HDMI_DDI_TX_CON_P3
2 TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD 20
DY HDMI_DDI_TX_CON_N3 5 6 HDMI_DDI_TX_CON_N3 <Core Design>
11 GND 21 100KR2J-1-GP
2
HDMI_DDI_TX_CON_P3 10 TMDS_CLOCK_SHIELD GND 22

HDMI_DDI_TX_CON_N3 12 TMDS_CLOCK+
TMDS_CLOCK-
HDMI
(A_Type)
GND
GND
23 1 AFTP5702 L05ESDL5V0NA-4-GP Wistron Corporation
075.00550.0071 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SKT-HDMI23-167-GP-U
022.10025.00M1 Title
2nd = 022.10025.0381
Display (HDMI Level Shifter/Conn)
HDMI_DET_CON 1 AFTP5701 Size Document Number Rev
5V_HDMI 1 AFTP5703 A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A A
Wistron Corporation
Title
(Reserved)
Custom
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
5 4 3 2 1
5 4 3 2 1
E E
D D
(Blanking)
C C
B B
A A
<Core Design>
Wistron Corporation
Title
SATA IF_HDD/ODD
A2
5 4 3 2 1
5 4 3 2 1
Main Func = WLAN 2A

3D3V_WLAN_S5
Layout Note: Close PIN4,5 Layout Note: Close PIN72,73
1
C6105 C6106 C6104 C6108 C6107 C6109
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SCD01U25V2KX-3DLGP
SCD1U16V2KX-3DLGP
SC10U6D3V3MX-DL-GP
SC10U6D3V3MX-DL-GP
2
2
D WLAN1 D
76 77
4 GND GND A26
5 3D3V GND A19 CNV_WT_CLKP_R R6129 1 2 0R0402-PAD-2-GP CNV_WT_CLKP
3D3V_WLAN_S5 3D3V WT_CLKP CNV_WT_CLKN_R CNV_WT_CLKN
A20 R6130 1 2 0R0402-PAD-2-GP
WT_CLKN A7
GND A21 CNV_WT_DP0_R R6126 1 2 0R0402-PAD-2-GP CNV_WT_DP0
WT_D0P A22 CNV_WT_DN0_R R6131 1 2 0R0402-PAD-2-GP CNV_WT_DN0
16 WLAN_RF_DIS# A4WP_IRQ# WT_D0N
A8 A31
A4WP_CLK A9 A4WP_IRQ# GND A23 CNV_WT_DP1_R R6128 1 2 0R0402-PAD-2-GP CNV_WT_DP1
3D3V_WLAN_S5 A4WP_DATA A10 A4WP_CLK WT_D1P A24 CNV_WT_DN1_R R6127 1 2 0R0402-PAD-2-GP CNV_WT_DN1
20191212(EVT) WIFI_RF_EN_R 28 A4WP_DATA WT_D1N A50
Follow HCAT 13 CML BLUETOOTH_EN_R 63 W_DISABLE1# GND 29 PEWAKE 1
PCH_PLTRST# W_DISABLE2# PEWAKE# TP6105
R6110 1 2 0R0402-PAD-2-GP PERST# 31 30
PERST# CLKREQ#
1
27 32
SUSCLK R6117 1 2 33R2J-2-GP SUSCLK_WLAN A25 SUSCLK(32KHZ)_3D3V GND 33
19 BT_RADIO_DIS# R6101 C_P32K_3D3V REFCLKN0
11 34
10KR2J-3-GP 12 COEX_TXD REFCLKP0 35
13 COEX_RXD GND 36
17,63,71 PCH_PLTRST#
2
42 COEX3 PERN0 37
WLAN_RF_DIS# R6108 2 1 WIFI_RF_EN_R 43 CLINK_CLK PERP0 38
0R0402-PAD-2-GP 44 CLINK_DATA GND 39
CLINK_RESET PETN0 40
53 PETP0 41
3D3V_WLAN_S5 20200429(DVT2) UART_WAKE#_3D3V GND
54
R6118, R6132 change to 49.9 ohm 55 LPSS_UART_RTS
Follow Intel CNVI checklist 56 LPSS_UART_RXD 45
57 LPSS_UART_TXD SDIO_RESET# 46
1
CNV_BRI_DT R6145 1 2 0R0402-PAD-2-GPCNV_BRI_DT_R A38 LPSS_UART_CTS SDIO_WAKE# 47
C R6102 BRI_DT SDIO_DATA3 C
CNV_BRI_RSP R6132 1 2 49D9R2F-GP CNV_BRI_RSP_R A39 48
21 BT_PCMOUT_CLKREQ0 10KR2J-3-GP CNV_RGI_DT BRI_RSP SDIO_DATA2
A40 49
CNV_RGI_RSP R6118 1 2 49D9R2F-GP CNV_RGI_RSP_R A41 RGI_DT SDIO_DATA1 50
21 BT_PCMFRM_RSTN BT_PCMFRM_RSTN RGI_RSP SDIO_DATA0
A42 51
BT_RADIO_DIS# 2 BLUETOOTH_EN_R
BT_PCMOUT_CLKREQ0 A43 RF_RESET_B SDIO_CMD 52
R6109 2 1
1
58 CLKREQ0 SDIO_CLK 68
0R0402-PAD-2-GP R6134 59 PCM_SYNC/I2S_WS GND 69 20191204(EVT)
1
75KR2F-GP 60 PCM_OUT/I2S_SD_OUT USB_D- 70
R6133 PCM_IN/I2S_SD_IN USB_D+
CNVi only, remove USB2.0 BT
61 71
DY 71K5R2F-1-GP WLAN_LED2# 64 PCM_CLK/I2S_SCK GND
2
SC33P50V2JN-3GP
WLAN_RF_DIS# WLAN_LED1# 65 LED#2 A45
20191217(EVT) LED#1 NC#A45
1
72
EC6101
2
18,24 SUSCLK 1D8V_S5 Follow Intel review DY 3D3V_WLAN_S5 3D3V
DY 73
3D3V
21 CNV_RGI_RSP
2
A48 A32 CNV_WR_CLKP_R R6124 1 2 0R0402-PAD-2-GP CNV_WR_CLKP
R6115 1 2 20KR2J-L2-GP CNV_BRI_DT
21 CNV_BRI_RSP
DY A49 3D3V WGR_CLKP A33 CNV_WR_CLKN_R R6122 1 2 0R0402-PAD-2-GP CNV_WR_CLKN
3D3V WGR_CLKN
1 A34 CNV_WR_DP0_R R6120 1 2 0R0402-PAD-2-GP CNV_WR_DP0
21 CNV_BRI_DT 2 UIM_POWER_SRC/GPIO1 WGR_D0P A35 CNV_WR_DN0_R CNV_WR_DN0
R6125 1 2 0R0402-PAD-2-GP
3 UIM_POWER_SNK WGR_D0N
15,21 CNV_RGI_DT UIM_SWP CNV_WR_DP1_R CNV_WR_DP1
A36 R6121 1 2 0R0402-PAD-2-GP
9 WGR_D1P A37 CNV_WR_DN1_R R6123 1 2 0R0402-PAD-2-GP CNV_WR_DN1
20191212(EVT) I2C_CLK WGR_D1N
Reserve 0 ohm 10
I2C_DATA 6
17,40 SIO_SLP_SUS# GND
3D3V_WLAN_S5 3D3V_WLAN_S5_R 3D3V_S5 8 17
R6103 2 DY 1 0R2J-2-GP ALERT# GND
14 20
15 SYSCLK/GNSS0 GND 23
TX_BLANKING/GNSS1 GND 26
21 CNV_WR_CLKP U6101 A15 GND 62
B 21 CNV_WR_CLKN LNA_EN GND B
TP6106 1 CLKIN_XTAL_LCP_R A44 74
R6113 REFCLK0 GND
1 2 1 5 75
21 CNV_WR_DP0 2 VOUT VIN C6111 GND 78
SC10U6D3V3MX-DL-GP
21 CNV_WR_DN0 0R0805-PAD-2-GP-U C6110 GND GND
1
3 4 SIO_SLP_SUS# 79
FAULT EN GND
SC10U6D3V3MX-DL-GP
80
21 CNV_WR_DP1 20200504(DVT2) GND
1
81
2
21 CNV_WR_DN1 Add R6113 for breakdown APL3556EBTI-TRG-GP GND 82
Follow HCAT15 TGL GND 83
074.03556.009F
2
21 CNV_WT_CLKP GND 84
21 CNV_WT_CLKN GND 85
2nd = 074.06288.0B9B 7 GND 86
RESERVED#7 GND
21 CNV_WT_DP0 3rd = 074.51711.009F 16
RESERVED#16 GND
87
21 CNV_WT_DN0 18 88
19 RESERVED#18 GND 89
21 CNV_WT_DP1 21 RESERVED#19 GND 90
21 CNV_WT_DN1
AFTP TESTPOINT 22 RESERVED#21 GND 91
WLAN_LED2# 1 AFTP6140 24 RESERVED#22 GND 92
WLAN_LED1# 1 AFTP6139 25 RESERVED#24 GND 93
A4WP_IRQ# 1 AFTP6141 66 RESERVED#25 GND 94
A4WP_CLK 1 AFTP6142 67 RESERVED#66 GND 95
A4WP_DATA 1 AFTP6144 RESERVED#67 GND 96
A11 GND
A12 RESERVED#A11 G1
A13 RESERVED#A12 GND G2
A RESERVED#A27 GND <Core Design> A
A28 G8
3D3V_WLAN_S5 1 AFTP6113 A29 RESERVED#A28 GND G9
WIFI_RF_EN_R 1
A46
A47
RESERVED#A30
RESERVED#A46
GND
GND
G11
G12
Wistron Corporation
AFTP6110 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BLUETOOTH_EN_R 1 AFTP6112 RESERVED#A47 GND Taipei Hsien 221, Taiwan, R.O.C.
WLAN-MODULE-123-GP-U Title
054.03149.0021
BOM change
NGFF_WLAN CONN
054.03045.0181 Custom
5 4 3 2 1
A B C D E
4 4
3
(Blanking) 3
2 2
<Core Design>
1
Wistron Corporation 1
Title
Reserved
A4
A B C D E
5 4 3 2 1
Main Func = SSD M.2
3D3V_S0 3D3V_SSD
18
17,61,71
CLK_PCIE_NVME_REQ#
PCH_PLTRST#
1 R6302 2
0R0805-PAD-2-GP-U
D D
1
EC6305 EC6304 C6306 C6308 C6307 C6317 C6318
16 M2_DEVSLP1
2
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SCD047U25V2KX-GP
SCD047U25V2KX-GP
SCD1U16V2KX-3DLGP
DY DY DY DY
18 SSD_CLK_CPU_P
18 SSD_CLK_CPU_N 3D3V_SSD
16 SSD_SATA_TX_P
16 SSD_SATA_TX_N
SSD M.2 CONN
1
3D3V_SSD SSD1
16 SSD_SATA_RX_N
16 SSD_SATA_RX_P
NP2 NP1 R6305
76 NP2 NP1 77 100KR2F-L1-GP
16 SSD_PCIE_TX_P1 76 77
74 75
16 SSD_PCIE_TX_N1
2
72 3_3VAUX GND 73
3_3VAUX GND PCIE: 1 SATA: 0
70 71
16 SSD_PCIE_RX_P1 3_3VAUX GND M2_PEDET1
16 SSD_PCIE_RX_N1 68 69
58 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 67
56 NC#58 NC#67 57
16 SSD_PCIE_TX_P2 NC#56 GND SSD_CLK_CPU_P
16 SSD_PCIE_TX_N2 54 55
CLK_PCIE_NVME_REQ# 52 PEWAKE#/NC#54 REFCLKP 53 SSD_CLK_CPU_N
3D3V_SSD PCH_PLTRST# 50 CLKREQ#/NC#52 REFCLKN 51
16 SSD_PCIE_RX_P2 PERST#/NC#50 GND SSD_SATA_TX_C_P C6302 1 SSD_SATA_TX_P
48 49 2SCD22U10V2KX-2-GP
16 SSD_PCIE_RX_N2 NC#48 PERP0/SATA_A+ SSD_SATA_TX_C_N C6303 1 SSD_SATA_TX_N
46 47 2SCD22U10V2KX-2-GP
44 NC#46 PERN0/SATA_A- 45
1
16 SSD_PCIE_TX_P3 NC#44 GND SSD_SATA_RX_N
42 43
16 SSD_PCIE_TX_N3 R6303 NC#42 PETP0/SATA_B- SSD_SATA_RX_P
C
DY 40 41 C
10KR2J-3-GP M2_DEVSLP1 R6301 MSATA_DEVSLP_R NC#40 PETN0/SATA_B+
1 2 38 39
16 SSD_PCIE_RX_P3 DEVSLP GND SSD_PCIE_TX_C_P1 C6311 1 SSD_PCIE_TX_P1
36 37 2SCD22U10V2KX-2-GP
16 SSD_PCIE_RX_N3 0R0402-PAD-2-GP NC#36 PERP1 SSD_PCIE_TX_C_N1 C6312 1 SSD_PCIE_TX_N1
34 35 2SCD22U10V2KX-2-GP
2
32 NC#34 PERN1 33
M2_DEVSLP1 30 NC#32 GND 31 SSD_PCIE_RX_P1
28 NC#30 PETP1 29 SSD_PCIE_RX_N1
1
16 M2_PEDET1 NC#28 PETN1
26 27
R6304 3D3V_SSD NC#26 GND SSD_PCIE_TX_C_P2 C6313 1 SSD_PCIE_TX_P2
64 M2_PCIE_LED# DY 24 25 2SCD22U10V2KX-2-GP
10KR2J-3-GP 22 NC#24 PERP2 23 SSD_PCIE_TX_C_N2 C6314 1 2SCD22U10V2KX-2-GP SSD_PCIE_TX_N2
20 NC#22 PERN2 21
18 NC#20 GND 19 SSD_PCIE_RX_P2
2
16 3_3VAUX PETN2 17 SSD_PCIE_RX_N2
14 3_3VAUX PETP2 15
12 3_3VAUX GND 13 SSD_PCIE_TX_C_P3 C6315 1 2SCD22U10V2KX-2-GP SSD_PCIE_TX_P3
24 SSD_SCP#_M2 3D3V_SSD M2_PCIE_LED# 3_3VAUX PERP3 SSD_PCIE_TX_C_N3 C6316 1 SSD_PCIE_TX_N3
10 11 2SCD22U10V2KX-2-GP
SA 0124 SSD_SCP#_M2 8 DAS/DSS# PERN3 9
ED6301 6 NC#8 GND 7 SSD_PCIE_RX_P3
4 NC#6 PETN3 5 SSD_PCIE_RX_N3
SSD_SATA_TX_C_P 1 10 SSD_SATA_TX_C_P 3_3VAUX PETP3
2 3
3_3VAUX GND 1
SSD_SATA_TX_C_N 2 9 SSD_SATA_TX_C_N GND
NGFF_KEY_M 75P
3 8
SSD_SATA_RX_N 4
DY 7 SSD_SATA_RX_N SKT-NGFF75P-146-GP-U
3D3V_SSD 1
062.10003.00A1 AFTP6304
MSATA_DEVSLP_R 1
SSD_SATA_RX_P 5 6 SSD_SATA_RX_P AFTP6301
2nd = 062.10003.0991
M2_PEDET1 1
B L05ESDL5V0NA-4-GP AFTP6303 B
075.00550.0071
2nd = 075.08809.0073
A <Core Design> A
Wistron Corporation
Title
(Reserved)
Custom A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = Power BTN Battery LED1 (AMBER_LED)

Follow Hellcat 13 CML Low actived from KBC GPIO
5V_S5
Q6402 R2
E
CHG_AMBER_LED# B R6401
R1
C AMBER_LED_BAT 2 1 BAT_AMBER
LDTA144VLT1G-GP 499R2F-2-GP
D 084.00144.0B11 D
2nd = 84.00144.P11 LED1

AMBER
1 + Yellow
- 3
White
2 +
24 CHG_AMBER_LED#
24 BATT_WHITE_LED# 5V_S5
WHITE
LED-YW-5-GP
18 SATA_LED# Q6401
63 M2_PCIE_LED# R2
E 083.1212A.0070
BATT_WHITE_LED# R6402
B
R1
C WHITE_LED_BAT 2 1 BAT_WHITE
24 MASK_SATA_LED# LDTA144VLT1G-GP 680R2F-GP

084.00144.0B11 BAT_AMBER
17,24 PCH_RSMRST# 2nd = 84.00144.P11 BAT_WHITE
24,66,92 KBC_PWRBTN# Battery LED2 (WHITE_LED)
1
24,44 HW_ACAV_IN Low actived from KBC GPIO DY ED6401
AZ5125-02S-R7G-GP
24 M_BIST
75.05125.07D
3
C C
BATT_WHITE_LED#
check
SATA LED Q6403

PJA138KA-GP
D
Vth(max)=1V 084.00138.0A31
2nd = 084.00138.0C31
1D8V_S0
R6406
1 2 MASK_SATA_LED#
S
HWHDLED
10KR2J-3-GP MASK_SATA_LED#
B B
D6401
SATA_LED# 1
3 SATA_PCIE_LED#
HWHDLED
M2_PCIE_LED# 2
BAT54A-11-GP
75.BAT54.07D
JEDI 13_20180709
2nd = 075.00054.0A7D
RO13_20170918
PCH_SATA_LED# PU in page16 R1606
3D3V_S0
Follow Hellcat 13 CML 1

R6405
DY 2 M2_PCIE_LED#
10KR2J-3-GP
M-BIST for G10 (Proposed schematic )

PCH_RSMRST#
3D3V_S5 需需需 Follow Hellcat 13 CML
2
Q6407
R6425 R6404
R2
E CHG_AMBER_LED#
A A
330KR2F-L-GP DY 2MR2F-GP Q6407_B B
M_BIST R1
M_BIST C Q6407_C
M-BIST(Mainboard Built-In Self Test)Check if Hynix 8G
C
1
M_BIST LMUN5112T1G-GP-U
MB is damage while press power button.
2
M_BIST B Q6406
LMBT3904LT1G-GP
084.05112.001K There is a LED will light up to indicate the MB
M_BIST 84.T3904.H11
R6413
150R2F-1-GP is damage by Wistron Corporation
E
D6402 M_BIST 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

HW_ACAV_IN K A 2nd = 84.03904.T11 Taipei Hsien 221, Taiwan, R.O.C.
1
RB520S30-GP M_BIST KBC_PWRBTN# Title

LED / Button / Power Button
1
83.R2003.A8M C6402
SC1U10V2KX-1DLGP
2nd = 083.52030.008F Size Document Number Rev
2
Custom A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = Keyboard Follow Hellcat15 Upsell TGL Main Func = TPAD Follow Hellcat15 Upsell TGL
AFTP TESTPOINT
5V_KB_BL 3D3V_S0 3D3V_TP_VDD
1
AFTP6529
KB_BL_CTRL# 1
R6502 1 2 0R0603-PAD-2-GP-U
AFTP6530
KB_LED_DET_C 1
AFTP6538
D D
24 KSI[0..7]
KB Backlight Power Consumption: 285mA max.
5V_S0 5V_KB_BL 5V_KB_BL

KBBL1
F6501 5 3D3V_TP_VDD
24 KSO00
24 KSO01 1 2 1
24 KSO02 KB_LED_DET_C
24 KSO03 POLYSW-1D1A6V-9-GP-U 2
24 KSO04 3
69.48001.081
1
C6501 KB_BL_CTRL# 4
24 KSO05
2
1
24 KSO06 2nd = 69.50011.081 SCD1U16V2KX-3DLGP 6
3D3V_TP_VDD
24 KSO07 RN6501
2
ACES-CON4-90-GP-U TPAD1
24 KSO08 DY SRN10KJ-5-GP
EC6506
SC10P50V2JN-4GP
EC6505
SC10P50V2JN-4GP
24 KSO09 10
24 KSO10 020.K0298.0004 8
1
I2C0_SDA_R 7
24 KSO11 20191216(EVT)
3
4
24 KSO12 DY DY 2nd = 020.K0311.0004 Layout swap request
I2C0_SCL_R 6
24 KSO13
5
1
RN6502 C6505 TOUCH_PAD_INTR# 4
24 KSO14 DAT_TP_SIO_I2C_CLK PTP_DIS#
24 KSO15
1 4 3
CLK_TP_SIO_I2C_DAT
SCD1U16V2KX-3DLGP
24 KSO16 2 3 2
EC I2C
2
SRN0J-6-GP 1
R6507
KB_LED_BL_DET KB_LED_DET_C PCH_I2C1_SCL_TP I2C0_SCL_R 9
1 2 R6505 1 2 0R0402-PAD-2-GP
PCH_I2C1_SDA_TP I2C0_SDA_R
CPU I2C R6506 1 2 0R0402-PAD-2-GP
1
51KR2J-1-GP
PTWO-CON8-16-GP
24 PTP_DIS#
R6508
100KR2J-1-GP 1 020.K0255.0008
3,24 TOUCH_PAD_INTR# AFTP6567 1 AFTP6540 2nd = 020.K0151.0008
EC6503
SC33P50V2JN-3GP
EC6504
SC33P50V2JN-3GP
KB1
1
C 24 DAT_TP_SIO_I2C_CLK 32 C
1
KB_DET# 30
29
DY DY
24 CLK_TP_SIO_I2C_DAT AFTP6542 KSI7
2
KB_BL_CTRL# AFTP6543 1 KSI6 28
20,66 PCH_I2C1_SCL_TP AFTP6544 1 KSI4 27 AFTP TESTPOINT
AFTP6545 1 KSI2 26
20,66 PCH_I2C1_SDA_TP AFTP6546 1 KSI5 25 3D3V_TP_VDD 1 AFTP6531
AFTP6547 1 KSI1 24
20 KB_LED_BL_DET AFTP6550 1 KSI3 23
D
AFTP6548 1 KSI0 22 I2C0_SCL_R 1 AFTP6534
4 KB_DET# Q6501 AFTP6549 1 KSO05 21 I2C0_SDA_R 1 AFTP6535
PJA3402-R1-00001-GP AFTP6551 1 KSO04 20 TOUCH_PAD_INTR# 1 AFTP6536
24 KB_LED_PWM KB_LED_PWM G AFTP6552 1 KSO07 19 PTP_DIS# 1 AFTP6537
AFTP6553 1 KSO06 18
084.03402.0031
1
24 CAP_LED#_R AFTP6554 1 KSO08 17 Need to check if it is Active High or Active Low

2nd = 084.02306.0031
S
R6509 AFTP6555 1 KSO03 16
100KR2J-1-GP DY AFTP6558 1 KSO01 15 and check if there is PH on TPAD side.
AFTP6556 1 KSO02 14
AFTP6557 1 KSO00 13
2
AFTP6559 1 KSO12 12
AFTP6560 1 KSO16 11
AFTP6561 1 KSO15 10 3D3V_TP_VDD
3D3V_TP_VDD
AFTP6562 1 KSO13 9 Pin number Pin name
AFTP6564 1 KSO14 8
AFTP6563 1 KSO09 7 1 VDD
AFTP6565 1 KSO11 6
1
AFTP6566 1 KSO10 5 2 DAT(I2C)
CAP_LED 4 20191216(EVT) R6511
CAP_LED
2
1
3 Layout swap request 10KR2J-3-GP 3 CLK(I2C)
AFTP6541 1 2 RN6503
SRN2K2J-1-GP 4 GND
2
1
31 TOUCH_PAD_INTR#
5 ATTN
3
4
B ACES-CON30-29-GP 6 GPIO B
020.K0254.0030 I2C0_SCL_R
7 DAT(PS2)
2nd = 020.K0274.0030 I2C0_SDA_R
8 CLK(PS2)
3rd = 20.K0750.030
CAP LED Control

LOW actived from KBC GPIO
5V_S5
CAP_LED_Q
Q6505
E
R2
CAP_LED#_R B
1
CAP_LED_Q CAP_LED EC6507

C 1 2
R1
R6513 1KR2J-1-GP DY
SC10P50V2JN-4GP
LDTA144VLT1G-GP
2
084.00144.0B11
A 2nd = 84.00144.P11 A
<Core Design>
Wistron Corporation
Title
Key Board&Touch Pad

Custom A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = IO Connector IOBD1

Follow Hellcat 13 CML 5V_PEN
44 CHAR1
3
42 1
40 2
UPSELL
AUD_AGND
39 AUD_SELEEVE Audio Jack 4
38
37 ACES-CON2-40-GP-U
36
35
AUD_HPOUT_R
JACK_PLUG 20.F1633.002
5V_POGO_S5 200mA
34 AUD_HPOUT_L
33 AUD_RING
2nd = 020.F0245.0002
D D
16 USB2_USB31_TX_N 32
16 USB2_USB31_TX_P 31 5V_S5 5V_POGO_S5
30 Q6601
16 USB2_USB31_RX_N AUD_AGND
16 USB2_USB31_RX_P 29 USB_OC0# Power button LED PJA3413-1-GP
28 USB_PWR_EN# Power switch
16 USB2_USB20_N 27 LID_CL_NB# S D
Power Button
SCD1U16V2KX-3DLGP
16 USB2_USB20_P 26 ISH_I2C0_ACC_SDA
25 ISH_I2C0_ACC_SCL
16 CARD1_USB20_N 084.03413.0031
1
C6622
24 GSEN2_INT1_C
1
16 CARD1_USB20_P
2nd = 084.02301.0031
G
6
23 GSEN2_INT2_C R6628
18 HOST_SD_WP# C6606
KBC_PWRBTN# 3 4 22 LID_CL_TAB# 10KR2J-3-GP
Hall sensor SC1U10V2KX-1DLGP
2
27,29 AUD_HPOUT_L
2
21 +RTC_VCC
27,29 AUD_HPOUT_R PWSW1 20 Free Fall sensor+G sensor
62.40009.E51 3D3V_AUX_S5
5V_POGO_EN# 2
27,29 AUD_SELEEVE SW-TACT-4P-59-GP 19 1 R6629 2 5V_POGO_EN_R#
27,29 AUD_RING 5V_S5
1 2 18 20KR2J-L2-GP
27,29 JACK_PLUG
17 Q6602
DEBUG 16 3D3V_S5
5
24,64,92 KBC_PWRBTN# 15 POGO_PWR_EN G
16 USB_OC0# 3D3V_S0 USB3.0 Power
14 HOST_SD_WP#
24 USB_PWR_EN# 13 D
20,55 ISH_I2C0_ACC_SDA 12
20,55 ISH_I2C0_ACC_SCL 11 S
10 CARD1_USB20_P Card Reader Notice:ZZ.2N702.J3101
9 CARD1_USB20_N 2N7002K-2-GP
20 GSEN2_INT1_C 8 USB2_USB20_P_R R6630 1 2 0R0402-PAD-2-GP USB2_USB20_P
7 USB2_USB20_N_R R6631 1 2 0R0402-PAD-2-GP USB2_USB20_N
84.2N702.J31
20 FFS_INT1 6
2nd = 084.27002.0N31 5V_PEN
5V_PEN
19 FFS_INT2 KBC_PWRBTN# For RF reserve 5 USB2_USB31_RX_N
C 4 USB2_USB31_RX_P C
3D3V_S0 5V_POGO_S5
3
IO board USB3.0
1
2 USB2_USB31_TX_N Current Limit 0.5A
2
1
67 LID_CL_TAB# R6613
67 LID_CL_NB# 1 USB2_USB31_TX_P U6601 100R2J-2-GP
1
ED6601 FC6601
41 R6620 1 2 0R1206-PAD-1-GP 5V_PEN_R 1 6
AZ5125-02S-R7G-GP SC12P50V2JN-DL-GP OUT IN
2
2 5 Current_set_2
DY GND SET
2
43 C6640 POGO_PWR_EN1 R6621 2 POGO_PWR_EN_R 3 4 DSG2
20,65 PCH_I2C1_SDA_TP 75.05125.07D FLAG/EN DSG
1
SCD1U16V2KX-3DLGP
C6641 C6642 100KR2J-1-GP
20,65 PCH_I2C1_SCL_TP
SC1U25V3KX-1-DLGP
2nd = 075.52215.007D STM-CON40-GP
DY RSET
3
G517AH1TP1U-GP
1
20.F2406.040
1
C6634
1
C6629
55 3D3V_LCDVDD_R 074.51711.009P R6682
SCD1U16V2KX-3DLGP
SC4D7U6D3V3KX-DLGP
2nd = 020.F0847.0040 DY 40K2R2F-GP
2
3rd = 020.F1427.0040
2
55 DCBATOUT_LCD_R
For EMI reserve
2
20200504(DVT2)
44 PWR_CHG_CSOP_R
Change R6682 to 40.2k
Follow CML
CARD1_USB20_P 1 AFTP6601 STYLUS_PWR_OCP# 1 R6632 2
CARD1_USB20_N 1 AFTP6602
44 PWR_CHG_CSON_R 0R0402-PAD-2-GP
3D3V_S5 KBC_PWRBTN# 1 AFTP6609
1 AFTP6607
5V_S5 1 AFTP6608
B
2016/12/16 add AFTP B
2016/12/07 add AFTP
24 POGO_PWR_EN
GSEN2_INT1_C
21 STYLUS_PWR_OCP#
TPAD14-OP-GP TP6601 1 GSEN2_INT2_C
FFS_INT1 R7012 1 2 0R0402-PAD-2-GP
FFS_INT2 R7013 1 2 0R0402-PAD-2-GP
2018/05/03 E3
CN1
R6619 1 3D3V_WLAN_S5_R_E3
2 0R0402-PAD-2-GP 1 2 19V_DCBATOUT_LCD_SEN R6610 1 2 0R0402-PAD-2-GP
IN1+ 3D3V_WLAN_S5_R 19V_DCBATOUT IN4+ LCD BACKLIGHT
WLAN
IN1- 3D3V_WLAN_S5 R6618 1 2 3D3V_WLAN_S5_E3
0R0402-PAD-2-GP 3 4 DCBATOUT_LCD_R_SEN R6609 1 2 0R0402-PAD-2-GP DCBATOUT_LCD_R IN4-
R6617 1 2 3D3V_S0_SSD_SEN
0R0402-PAD-2-GP 5 6 3D3V_LCDVDD_R_SEN R6608 1 2 0R0402-PAD-2-GP 3D3V_LCDVDD_R
SSD IN2+ 3D3V_S0
R6616 1 2 3D3V_SSD_R
0R0402-PAD-2-GP 7 8 3D3V_LCDVDD_S0_R R6607 1 2 0R0402-PAD-2-GP
IN3+ Panel logic power
3D3V_SSD 3D3V_LCDVDD_S0 IN3-
A
IN2- PCH_I2C1_SCL_TP R6604 1 2 CPU_I2C_SCL_P0_E3
0R0402-PAD-2-GP 9 E3 10 CPU_I2C_SDA_P0_E3 R6603 1 2 0R0402-PAD-2-GP PCH_I2C1_SDA_TP Hynix 8G A
11 12 3D3V_S0
R6615 1 2 PWR_DCBATOUT_VDDQ_R
0R0402-PAD-2-GP 13 14 PWR_DCBATOUT_VCOREA_R R6606 1 2 0R0402-PAD-2-GP
VDDQ input IN7- PWR_DCBATOUT_VDDQ
R6614 1 2 DCBATOUT_VDDQ_SEN
0R0402-PAD-2-GP 15 16 DCBATOUT_VCORE_SEN R6605 1 2
PWR_DCBATOUT_VCOREA IN6- CPU Core input
0R0402-PAD-2-GP
VCCSA
IN7+
input IN8-
19V_DCBATOUT
PWR_DCBATOUT_VCCSA R6612 1 2 PWR_DCBATOUT_VCCSA_R17
0R0402-PAD-2-GP 18 PWR_CHG_CSOP_E3 R6602 1 2
19V_DCBATOUT
0R0402-PAD-2-GPPWR_CHG_CSOP_R
IN6+
IN5-
Wistron Corporation
R6611 1 2 DCBATOUT_VCCSA_SEN 19
0R0402-PAD-2-GP 20 PWR_CHG_CSON_E3 R6601 1 2 0R0402-PAD-2-GPPWR_CHG_CSON_R 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
IN8+ 19V_DCBATOUT IN5+ System power source (BATT) Taipei Hsien 221, Taiwan, R.O.C.
HRS-CONN20A-2-GP Title
20.F1450.020 IO Board Connector
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = HALL SENSOR

C6702
D
1 2 D
Q6701
SCD1U16V2KX-3DLGP
LID_POWER_ON# 3 4
R6701 1
Note:ZZ.27002.F7C01
LID_CL_NB# 2 680KR2F-GP Q6701_G 2 5
R6702
1 6 2 1 3D3V_AUX_S5
1
2N7002KDW-1-GP 680KR2F-GP
C6703
SC1U10V2KX-1DLGP 75.27002.F7C
2
2nd = 075.27002.0E7C
C6701 1 2 SC1U10V2KX-1DLGP
C D6701 K A RB520S30-GP Q6701_G_D C
83.R2003.A8M
2ND = 083.52030.008F
24 LID_POWER_ON#
20,24 LID_CL_SIO_TAB#
0,24,92 LID_CL_SIO#
3D3V_AUX_S5 3D3V_AUX_S5
R6747 R6746
100KR2J-1-GP
100KR2J-1-GP
LID_CL_TAB#
LID_CL_NB#
2
D6702
D6703
B LID_CL_SIO_TAB# A K LID_CL_TAB# LID_CL_NB# K A LID_CL_SIO# B
RB520S30-GP
RB520S30-GP
83.R2003.A8M
2ND = 083.52030.008F 83.R2003.A8M
2ND = 083.52030.008F
Hynix 8G
A
Title
Reserved
A4
5 4 3 2 1
5 4 3 2 1
Main Func = Debug

Debug Connector
D DBG1 D
15
1
ESPI_CLK 2
3
10/09 add R6820,R6821,charon ESPI_RESET# 4
ESPI_CS# 5
24 HOST_DEBUG_TX ESPI_IO3 6
R6820 1 ESPI_IO2
20 UART_2_CTXD_DRXD 3D3V_S5 DY 2 0R2J-L-GP ESPI_IO1
7
8
20 UART_2_CRXD_DTXD
ESPI_IO0 9
R6821 1 2 0R0402-PAD-2-GP DEBUG_PWR 10
DEBUG
3D3V_S0
HOST_DEBUG_TX R6801 1 DEBUG2 0R2J-2-GP HOST_DEBUG_TX_CON 11
12 20.F0765.014
18,24 ESPI_CLK UART_2_CTXD_DRXD R6802 1 DEBUG2 0R2J-2-GP UART_2_CTXD_DRXD_CON 13
18,24,40 ESPI_RESET# UART_2_CRXD_DTXD R6803 1 DEBUG2 0R2J-2-GP UART_2_CRXD_DTXD_CON 14
16
18,24 ESPI_CS#
ACES-CON14-5-GP
C C
18,24 ESPI_IO0
18,24 ESPI_IO1
18,24 ESPI_IO2
18,24 ESPI_IO3 Firmware SW

ME_FWP R6878 1 ME_FWP_SW
2 0R0402-PAD-2-GP
SA 1026
MESW1
24 ME_FWP
7
SW-SLIDE3P-11-GP
B 19 ME_FWP_SW B
ME_FWP 3 NP2
ME_FWP_SW 2
R6877 MESW
2 MESW 1 MESW1_B 1 NP1
3D3V_S5_VCCPRIM
1
1KR2J-1-GP
R6804 62.40018.641
SA 1026 4K7R2F-GP DY
5
2
A B
<Core Design>
Low High
ME_FWP
A
Normal Operation
(Default)
Override
Title
Dubug connector
A4
5 4 3 2 1
5 4 3 2 1
Main FUNC = GMR
D D
Move to IO Board
C C
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
Hynix 8G
Wistron Corporation
Title
(Reserved)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = TBT HP team on applying, only murata have

sample can meet Intel request
220nF AC cap must be placed on RX lines close to SOC side U7101D 4 OF 4 HP team on applying ,only murata
20191212(EVT)
Follow Nakia N7
have sample can meet Intel request Follow Intel CRB
4 USB1_TCSS_TX_N0 USB1_TCSS_TX_P0 C7101 1 2 SCD22U10V2KX-2-GP USB1_TCSS_TX_C_P0 J1
TBT PORTS J12 USB1_TCSS_RX_RT_P0 R7114 1 2 2D2R1J-GP USB1_SSRX_RC_P0 C7141 1 2 SCD33U25V1KX-3-GP USB1_SSRX_AR_P0 R7188 1 2 220KR1F-GP
4 USB1_TCSS_TX_P0 USB1_TCSS_TX_N0 USB1_TCSS_TX_C_N0 ASSRXP1 BSSRXP1 USB1_TCSS_RX_RT_N0 USB1_SSRX_RC_N0 USB1_SSRX_AR_N0
4 USB1_TCSS_TX_N1 C7104 1 2 SCD22U10V2KX-2-GP J2 J11 R7115 1 2 2D2R1J-GP C7142 1 2 SCD33U25V1KX-3-GP R7189 1 2 220KR1F-GP
ASSRXN1 BSSRXN1
WPN DPN
Port B - TypeC Side

4 USB1_TCSS_TX_P1 USB1_TCSS_RX_P0 1 2 SCD22U10V2KX-2-GP USB1_TCSS_RX_C_P0 G1 G12 USB1_TCSS_TX_RT_P0 1 2 2D2R1J-GP USB1_SSTX_RC_P0 1 2 SCD22U10V1KX-1-GP USB1_SSTX_CON_P0 1 2 220KR1F-GP
C7105 R7120 C7111 R7192
Port A - Host Side

4 USB1_TCSS_RX_N0 USB1_TCSS_RX_N0 1 2 SCD22U10V2KX-2-GP USB1_TCSS_RX_C_N0 G2 ASSTXP1 BSSTXP1 G11 USB1_TCSS_TX_RT_N0 1 2 2D2R1J-GP USB1_SSTX_RC_N0 1 2 SCD22U10V1KX-1-GP USB1_SSTX_CON_N0 1 2 220KR1F-GP
C7102 R7121 C7112 R7193
USB1 4
4
USB1_TCSS_RX_P0
USB1_TCSS_RX_N1
ASSTXN1 BSSTXN1
USB1_TCSS_TX_P1 C7103 1 2 SCD22U10V2KX-2-GP USB1_TCSS_TX_C_P1 C1 C12 USB1_TCSS_RX_RT_P1 R7116 1 2 2D2R1J-GP USB1_SSRX_RC_P1 C7143 1 2 SCD33U25V1KX-3-GP USB1_SSRX_AR_P1 R7190 1 2 220KR1F-GP
4 USB1_TCSS_RX_P1 USB1_TCSS_TX_N1 USB1_TCSS_TX_C_N1 ASSRXP2 BSSRXP2 USB1_TCSS_RX_RT_N1 USB1_SSRX_RC_N1 USB1_SSRX_AR_N1
C7107 1 2 SCD22U10V2KX-2-GP C2 C11 R7117 1 2 2D2R1J-GP C7144 1 2 SCD33U25V1KX-3-GP R7191 1 2 220KR1F-GP
ASSRXN2 BSSRXN2
4 TBT_LSX0_TXD
USB1_TCSS_RX_P1
USB1_TCSS_RX_N1
C7108
C7106
1
1
2 SCD22U10V2KX-2-GP
2 SCD22U10V2KX-2-GP
USB1_TCSS_RX_C_P1
USB1_TCSS_RX_C_N1
E1
E2 ASSTXP2 BSSTXP2
E12
E11
USB1_TCSS_TX_RT_P1
USB1_TCSS_TX_RT_N1
R7129
R7130
1
1
2 2D2R1J-GP
2 2D2R1J-GP
USB1_SSTX_RC_P1
USB1_SSTX_RC_N1
C7113
C7114
1
1
2 SCD22U10V1KX-1-GP
2 SCD22U10V1KX-1-GP
USB1_SSTX_CON_P1
USB1_SSTX_CON_N1
R7194
R7195
1
1
2 220KR1F-GP
2 220KR1F-GP
TBT 071.00TBT.0F0U M11GX
4,15 TBT_LSX0_RXD ASSTXN2 BSSTXN2
TBT_LSX0_TXD R7101 1 2 0R0402-PAD-2-GP USB1_TCSS_TXD_R M7 M10 USB1_BB_SBU1 R7107 1 2 0R0402-PAD-2-GP USB1_CON_SBU1
TBT_LSX0_RXD R7102 1 2 0R0402-PAD-2-GP USB1_TCSS_RXD_R L7 PA_LSTX_SBU1 PB_SBU1 L10 USB1_BB_SBU2 R7108 1 2 0R0402-PAD-2-GP USB1_CON_SBU2
PA_LSRX_SBU2 PB_SBU2
73
73
USB1_SSTX_CON_P0
USB1_SSTX_CON_N0
USB1_TCSS_AUX_P
USB1_TCSS_AUX_N
R7180 1
R7181 1
2 0R0402-PAD-2-GP
2 0R0402-PAD-2-GP
USB1_TCSS_AUX_P_R
USB1_TCSS_AUX_N_R
L8
M8 PA_AUX_P
NON_TBT 071.00TBT.0D0U 7DYVG
73 USB1_SSTX_CON_P1 PA_AUX_N
73 USB1_SSTX_CON_N1
20200219(DVT1)
Add 0 ohm
D D
73 USB1_SSRX_AR_P0 Follow Nakia
73 USB1_SSRX_AR_N0
1
R7109 R7110 3D3V_S5
73 USB1_SSRX_AR_P1
1MR2F-GP
1MR2F-GP
73 USB1_SSRX_AR_N1 DY DY
73 USB1_SSTX_RC_N1 20200218(DVT1)
1
73 USB1_SSRX_RC_P1 Follow Nakia modify R7146
2
BURNSIDE-BRIDGE-GP-U1 TCP_SMBUS_SCL R7157 1 2 0R2J-2-GP SML0_SMBCLK
TCP_SMBUS_SDA R7160 1
TBT 2 0R2J-2-GP SML0_SMBDATA
73 USB1_SSRX_RC_N0 ZZ.000IC.002 TBT DY
73 USB1_SSTX_RC_N0
Vincent 10KR2F-2-GP
2
3D3V_S0_TCP1
BB_TCP1_TDI 1 TPAD14-OP-GP TP7104 TC_RETIMER_FORCE_PWR
73 USB1_SSRX_RC_P0 BB_TCP1_TMS TCP_SMBUS_SCL 20200311(DVT1)
73 USB1_SSTX_RC_P0 1 TPAD14-OP-GP TP7105 R7153 1 DY 2 1KR2F-3-GP
BB_TCP1_TCK 1 TPAD14-OP-GP TP7106 R7154 1 2 1KR2F-3-GP TCP_SMBUS_SDA 3D3V_S0_TCP1 Q7101 -> Q7102+Q7103 3D3V_S0_TCP1
DY
1
BB_TCP1_TDO 1 TPAD14-OP-GP TP7107 High limit change R7149
73 USB1_SSRX_RC_N1
73 USB1_SSTX_RC_P1 1D8V_S5
G
I2C5_SCL 10KR2F-2-GP
4 USB1_TCSS_AUX_P R7151 1 2 1KR2F-3-GP Q7102 Q7103
2
4 USB1_TCSS_AUX_N 1 OF 4 R7152 NON_TBT
1 2 1KR2F-3-GP I2C5_SDA PJE8408-R1-00001-GP PJE8408-R1-00001-GP
U7101A NON_TBT
I2C5_SDA NON_TBTD
S TCP_SMBUS_SDA I2C5_SCL NON_TBTD
S TCP_SMBUS_SCL
BB_TCP1_FLASH_DI C6 C9 BB_I2C_SCL
BB_TCP1_FLASH_DO B4 EE_DI I2C_SCL E7 BB_I2C_SDA
BB_TCP1_FLASH_CS_N B6 EE_DO I2C_SDA A10 BB_I2C_PD_INT# 1 TP7206
EE_CS# I2C_INT 084.08408.0031 084.08408.0031
FLASH
BB_TCP1_FLASH_CLK C7 B10 TC_RETIMER_FORCE_PWR R7168 1 2 0R0402-PAD-2-GP TBT_FORCE_PWR
EE_CLK FORCE_PWR A9 BB_TCP1_FLASH_BUSY_N R7131 1 2 10KR2F-2-GP 2nd = 084.00138.0E31 2nd = 084.00138.0E31
3D3V_SX_TCP1_D
POC GPIO
3D3V_LC_TCP1 FLASH_BUSY# B9 BB_TCP1_GPIO_5 R7119 1 2 10KR2F-2-GP
DEBUG
MISC &
POC_GPIO_5 A8 BB_TCP1_GPIO_6
24,72 BB_RST BB_TCP1_TDI POC_GPIO_6 TCP1_RETIMER_PERST_R_N
R7103 1 2 10KR2F-2-GP A3 B8
R7104 1 2 10KR2F-2-GP BB_TCP1_TMS C3 TDI PERST# A7 TCP_SMBUS_SCL
72,73 USB1_CON_SBU1 BB_TCP1_TCK TMS SMBUS_SCL TCP_SMBUS_SDA
R7105 1 2 10KR2F-2-GP B5 B7
JTAG
72,73 USB1_CON_SBU2 BB_TCP1_TDO TCK SMBUS_SDA BB_TCP1_FLASH_SHARE_EN
72 USB1_BB_SBU1 R7106 1 2 10KR2F-2-GP C5 A4
TDO FLASH_SHARE_EN A5 BB_TCP1_FLASH_MSTR_SLV
72 USB1_BB_SBU2 FLASH_MASTER_SLAVE BB_TCP1_GPIO_12
A6
POC_GPIO_12 L3
TP7101 1 TP_TCP1_THERMDA M11 NC_L3
17,61,63 PCH_PLTRST# THERMDA
M12
16,17 PCH_TBT_PERST# TEST_EDM
B2
FUSE_VQPS_64 L11 TCP1_RESET_N R7177 1 2 0R0402-PAD-2-GP BB_RST
72 RETIMER_PWREN RESET#
A11
20200302(DVT1) A12 MONDC L9 XTL_25M_X1_TBT1 R7111 1 2 0R2J-2-GP XTL_25M_X1_TBT1_R
Main
16,72 TBT_FORCE_PWR Change NC L12 NC#A12 XTAL_25_IN M9 XTL_25M_X2_TBT1 1 2 XTL_25M_X2_TBT1_R
R7113 0R2J-2-GP Must use Metal shielded crystal for
MONDC_SVR XTAL_25_OUT
DEBUG
X7101 better noise immunity.
R7118 1 2 100R2F-L1-GP-U BB_TCP1_TEST_PWR_GOOD B3 L5 BB_TCP1_RSENSE R7112 1 2 4K75R2D-GP
Type-C PD B11 TEST_PWR_GOOD
TEST_EN
RSENSE
RBIAS
L4 BB_TCP1_RBIAS_1
Recommended Crystal List:
FW2500025Z by Pericom
2 3 XRCGB25M00F3L12R0 by Murata
72 BB_I2C_SCL 1 TP_TCP1_ATEST_P A1
TP7102
72 BB_I2C_SDA TP_TCP1_ATEST_N ATEST_P Suggest adding GND shield across
TP7103 1 A2
ATEST_N Crystal and 18pF caps for better
18 SML0_SMBCLK RFI.
1 4
18 SML0_SMBDATA
BURNSIDE-BRIDGE-GP-U1
20 I2C5_SCL ZZ.000IC.002
1
C7109 XTAL-25MHZ-302-GP C7110 3D3V_S5
20 I2C5_SDA
SC22P50V2JN-4DLGP
SC22P50V2JN-4DLGP
082.30005.0501 PD_BB_RST#
R7164 1 2 10KR2F-2-GP R7179 1 2 100KR2F-L1-GP
2
C 2nd = 082.30005.0C81 DY DY C
3D3V_S0
R7141 1 2 10KR2F-2-GP BB_TCP1_GPIO_6 R7143 1 2 10KR2F-2-GP

DY
20200311(DVT1)
3D3V_SX_TCP1_D Change C7109, C7110 to 22pF
Follow vendor suggestion
3D3V_S5
3D3V_SX_TCP1
R7196
1 2
R7132 1 2 10KR2F-2-GP BB_TCP1_FLASH_SHARE_EN R7138 1 2 10KR2F-2-GP
0R0402-PAD-2-GP
R7155 1
DY 2 10KR2F-2-GP BB_TCP1_GPIO_12 R7158 1 2 10KR2F-2-GP
R7145 1
DY 2 10KR2F-2-GP BB_TCP1_FLASH_MSTR_SLV R7147 1
DY 2 10KR2F-2-GP
3D3V_SX_TCP1 DY DY
3D3V_SX_TCP1_D
A DY K
R7125 1 2 2K2R2J-2-GP BB_TCP1_FLASH_CS_N D7109
1
R7126 1 2 2K2R2J-2-GP BB_TCP1_FLASH_DO RB551V30-GP C7115

R7127 1 2 3K32R2F-GP BB_TCP1_FLASH_WP_N 83.R5003.H8H SC2D2U6D3V2MX-DL-GP
R7128 1 2 3K32R2F-GP BB_TCP1_FLASH_HOLD_N
2
U7103
3D3V_S5_VCCPRIM
BB_TCP1_FLASH_CS_N R7133 1 2 0R0402-PAD-2-GP BB_TCP1_FLASH_CS_N_R 1 8
BB_TCP1_FLASH_DO R7134 1 2 0R0402-PAD-2-GP BB_TCP1_FLASH_DO_R 2 CS# VCC 7 BB_TCP1_FLASH_HOLD_N
DO/IO1 HOLD#/IO3
1
BB_TCP1_FLASH_WP_N 3 6 BB_TCP1_FLASH_CLK_R R7135 1 2 0R0402-PAD-2-GP BB_TCP1_FLASH_CLK R7162
4 WP#/IO2 CLK 5 BB_TCP1_FLASH_DI_R R7137 1 2 0R0402-PAD-2-GP BB_TCP1_FLASH_DI
GND DI/IO0
DY
W25Q80DVSNIG-GP-U 4K7R2F-GP
2
072.25Q80.0C01 PCH_TBT_PERST# R7166 1 2 0R2J-2-GP TCP1_RETIMER_PERST_R_N
DY
2nd = 072.25806.0A01
1
R7170 PCH_PLTRST# R7167 1 2 0R0402-PAD-2-GP
DY 20200309(DVT1)
20KR2F-L-GP Follow Intel TBT checklist
2
B B
3D3V_SX_TCP1
0D9V_SVR_TCP1
U7101B 2 OF 4
3D3V_S0_TCP1 3D3V_A_S0_TCP1
C7118 1 2 SC2D2U10V3KX-1DLGP-U +VCC3P3_ANA_TCP1 L2 E6
VCC3P3_ANA VCC3P3_SX
20200302(DVT1)
3D3V_LC_TCP1
E5 M4 Change TP U7101C 3 OF 4
VCC3P3_LC VCC3P3_SVR M5
C7117 F6 VCC3P3_SVR J5 U7101_J5 1 B1 F12
VCC0P9_SVR_ANA NC#J5 TP7110 VSS_ANA VSS_ANA
1
G6 J7 L7102 0D9V_SVR_TCP1 B12 G7

VCC0P9_SVR_ANA VCC3P3A IND-1UH-257-GP D1 VSS_ANA VSS_ANA H1
VSS_ANA VSS_ANA
Power
E3 L1 +VCC0P9_SVR_TCP1_PHASE 1 2 D2 H2
2
SC2D2U10V3KX-1DLGP-U G3 VCC0P9_SVR SVR_IND M1 C7146 C7124 C7125 C7126 C7127 C7128 C7129 C7130 C7131 D11 VSS_ANA VSS_ANA H11
VCC0P9_SVR SVR_IND VSS_ANA
GND VSS_ANA
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC18P50V2JN-1DLGP
D12 H12
E9 M2
68.1R01F.10Y F1 VSS_ANA VSS_ANA J9
VCC0P9_SVR_PB_ANA SVR_VSS VSS_ANA VSS_ANA
1
1
G9 M3 2nd = 068.1R010.1I61 F2 K1
VCC0P9_SVR_PB_ANA SVR_VSS F7 VSS_ANA VSS_ANA K2
C7122 1 2 SC2D2U10V3KX-1DLGP-U VCC0P9_LC_1 J3 F9 VSS_ANA VSS_ANA K11
2
2
VCC0P9_LC F11 VSS_ANA VSS_ANA K12
C7123 1 2 SC10U6D3V3MX-DL-GP VCC0P9_LVR_1 L6 VSS_ANA VSS_ANA
VCC0P9_LVR
VSS
VSS
VSS
M6 J6
VCC0P9_LVR_SENSE GND
20191227(EVT) BURNSIDE-BRIDGE-GP-U1
F3
F5
G5
BURNSIDE-BRIDGE-GP-U1 Follow Intel CRB & checklist ZZ.000IC.002
ZZ.000IC.002
20200415(DVT2)
Change to S5 power
Use U7102 control 3D3V_RT_TCP1 3D3V_S0
U7102_VDD
1
3D3V_S5
R7172 20200218(DVT1)
R7173 1 2 DY 0R2J-2-GP
Del Inductor, use 0 ohm 0603
0R0402-PAD-2-GP 3D3V_S0_TCP1 3D3V_S0_TCP1 3D3V_A_S0_TCP1
2
1
C7135
U7102_VDD
3D3V_S5
SC1U10V2KX-1DLGP R7174 1 2 0R3J-0-U-GP R7161 1 2
C7136 C7119 C7120 C7121 C7140 0R0402-PAD-2-GP C7132 C7133 C7134
2
1
SC10U6D3V2MX-2-GP
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC2D2U6D3V2MX-DL-GP
SC10U6D3V2MX-2-GP
SC2D2U6D3V2MX-DL-GP
SC18P50V2JN-1DLGP
1
1
A R7176 A
20200416(DVT2)
2
2
1
1
R7163 1 2
U7102 Change C7137 to 220pF 3D3V_RT_TCP1_FIP 0R0402-PAD-2-GP
2
Internal test result
2
2
100KR2F-L1-GP 1 8 R7123 1 2 0R0603-PAD-2-GP-U
2
2 VIN#1 VOUT#8 7
RETIMER_PWREN R7175 1 2 +V3.3DX_RT_TCP1_EN 3 VIN#2 VOUT#7 6 U7102_CT C7137 1 2 SC220P50V2KX-3DLGP
0R0402-PAD-2-GP 4 ON CT 5 C7145
5V_S5 VBIAS GND
1
9
GND
2
3D3V_SX_TCP1
TPS22975-GP
074.22975.0093 R7178 1 2 0R3J-0-U-GP <Core Design>
2nd = 74.03526.093 C7139
SC10U6D3V2MX-2-GP
C7116 Wistron Corporation

1
SC2D2U6D3V2MX-DL-GP
1

20191213(EVT)
2
2
Modify by U7102 spec. Title

EXT IO (Thunderbolt(1/3)/Type C Re-driver)
A1
5 4 3 2 1
5 4 3 2 1
Main Func = TypeC 3D3V_S5

5V_S5 5V_VCONN_P1
VDDD
Close to Pin10 Close to Pin11
24 UPD1_SMBCLK 1 R7220 2
24 UPD1_SMBDAT C7216 C7217 0R0603-PAD-2-GP-U
24 CCG6_I2C_INT# C7201 C7207
SC1U10V2KX-1DLGP
SCD1U25V2KX-1-DL-GP
1
SC1U10V2KX-1DLGP
1
1
1
SC1U10V2KX-1DLGP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
74 PD_VBUS_C_CTRL1 C7210 C7211 C7212
2
2
2
73 USB1_CON_CC1
73 USB1_CON_CC2
3,22,24,44,46 PROCHOT#_CPU
D D
74 VBUS_C_CTRL_P0_GPIO
17 TBT_PD_ALERT#
16 USB4_USB20_P
16 USB4_USB20_N
73 USB1_USB20_CMCT_P
Follow Hellcat15 Upsell TGL PD Function
73 USB1_USB20_CMCT_N Normal: High
73 USB1_USB20_CMCB_P
73 USB1_USB20_CMCB_N 20200507(DVT2) 5V_S5 Avtive : Low
Update WPN for new PD FW PG7201
71,73 USB1_CON_SBU1
71,73 USB1_CON_SBU2 U7202 20V_VCCPD_VBUS VBUS_CSP_R 1 2 VBUS_CSP 20191217(EVT)
Intel review suggest
1
PD_VBUS_C_CTRL1 47 1
VBUS_C_CTRL VBUS_C 2 R7350 GAP-CLOSE-PWR-3-GP
USB1_CON_CC1 46 VBUS_C 3 D005R6F-3-GP
CC1 VBUS_C 3D3V_S5 3D3V_S5
71 USB1_BB_SBU1 USB1_CON_CC2 44 48
71 USB1_BB_SBU2 CC2 VBUS_C PG7202
2
4 VBUS_CSN_R 1 2 VBUS_CSN
4 SOC_OC_FAULT USB4_USB20_P R7260 1 2 0R0402-PAD-2-GP USB4_USB20_PD_P 23 VBUS_P 5
1
USB4_USB20_N R7261 1 2 0R0402-PAD-2-GP USB4_USB20_PD_N 22 DP_SYS VBUS_P 6
24,71 BB_RST DM_SYS VBUS_P 7 GAP-CLOSE-PWR-3-GP R7263 R7237
USB1_USB20_CMCT_P 18 VBUS_P 10KR2F-2-GP 10KR2F-2-GP
USB1_USB20_CMCT_N 19 DP_TOP 9 PD_VCCD C7203 1 2 SCD1U16V2KX-3DLGP
DM_TOP VCCD
2
SOC_OC_FAULT TBT_PD_ALERT#
USB1_USB20_CMCB_P 20 11
USB1_USB20_CMCB_N 21 DP_BOT VDDD VDDD
DM_BOT 10
USB1_CON_SBU1 R7203 1 2 0R0402-PAD-2-GP SBU1 42 VDDIO
USB1_CON_SBU2 R7204 1 2 0R0402-PAD-2-GP SBU2 43 SBU1 8
USB1_BB_SBU1 SBU1_SYS SBU2 VSYS 3D3V_S5
71 RETIMER_PWREN R7205 1 2 0R0402-PAD-2-GP 41
16,71 TBT_FORCE_PWR USB1_BB_SBU2 R7206 1 2 0R0402-PAD-2-GP SBU2_SYS 40 SBU1_SYS 45
SBU2_SYS V5V 5V_VCONN_P1 3D3V_S5
Type-C PD I2C_SDA_SCB1/P0.2
16
13
CCG6_I2C_SDA
CCG6_I2C_SCL
R7225 1
R7224 1
2 0R0402-PAD-2-GP SML1_SMBDATA
2 0R0402-PAD-2-GP SML1_SMBCLK PD to SOC 20200106(DVT1)
71 BB_I2C_SCL VBUS_CSP 39 I2C_SCL_SCB1/P0.3 17 CCG6_I2C_INT R7223 1 2 0R0402-PAD-2-GP TBT_PD_ALERT# 20191220(EVT) Reserve R7266, R7268 0 ohm
1
71 BB_I2C_SDA VBUS_CSN 38 CSP I2C_INT_TBT/P0.4 15 CCG6_I2C_ADDR
C CSN SWD_CLK/P1.0
Modify USB issue C
14 RETIMER_PWREN_R R7221 1 2 0R0402-PAD-2-GP RETIMER_PWREN SML1_SMBDATA R7266 1 2 0R2J-2-GP BB_I2C_SDA R7202
18 SML1_SMBCLK SWD_IO/P1.1 26 INT#_Typec_R R7222 1 2 0R0402-PAD-2-GP CCG6_I2C_INT# SML1_SMBCLK R7268 1
DY 2 0R2J-2-GP BB_I2C_SCL
DY
18 SML1_SMBDATA PD_XRES 34 I2C_INT_EC/P1.2 25 CCG6_UART_RX R7259 1 2 0R0402-PAD-2-GP UPD1_SMBDA_Q
DY 10KR2F-2-GP
XRES UART_RX/P1.3 24 CCG6_UART_TX R7258 1 2 0R0402-PAD-2-GP UPD1_SMBCLK_Q PD to EC
2
UART_TX/P1.4 27 BB_RST
HPD/P2.0 28 BB_I2C_SDA_CCG6 R7264 1 2 0R0402-PAD-2-GP BB_I2C_SDA USB1_CON_CC2 C7213 1 2 SC390P50V2KX-1-GP BB_RST
I2C_SDA_SCB2/P2.1
I2C_SCL_SCB2/P2.2
29 BB_I2C_SCL_CCG6 R7265 1 2 0R0402-PAD-2-GP BB_I2C_SCL PD to BB
49_THM 30 SOC_FRC_RETIMER_PWR R7262 1 2 0R2J-2-GP TBT_FORCE_PWR 20191213(EVT) USB1_CON_CC1 C7208 1 2 SC390P50V2KX-1-GP
THERMAL_PAD P2.3 DY
1
31 SOC_OC_FAULT_R R7269 1 2 0R0402-PAD-2-GP SOC_OC_FAULT Vendor review DY R7262
P2.4 35 VBUS_C_CTRL_P0_GPIO R7210
P3.0 20200106(EVT)
36 CCG6_PROCHOT# 100KR2F-L1-GP
I2C_SDA_SCB3/P3.1 CCG6_ID_1
Add R7264, R7265 0 ohm
37
I2C_SCL_SCB3/P3.2 12
20200309(DVT1)
Add R7269 0 ohm
2
P3.3 32 UPD1_SMBCLK_Q
I2C_SCL_SCB0/P4.0
I2C_SDA_SCB0/P4.1
33 UPD1_SMBDA_Q
PD to EC
CYPD6127-48LQXI-2-GP
071.06127.0B03
VDDD VDDD
EC I2C
VDDD 3D3V_S5
1 R7252
1
1
R7213
0R0402-PAD-2-GP R7256 R7257
DY 1KR2J-1-GP
0x08
R7215
Q7201
100KR2J-1-GP DY 100KR2J-1-GP
4K7R2J-2-GP
UPD1_SMBCLK 1 6 UPD1_SMBCLK_Q
Note:ZZ.27002.F7C01
2
2
CCG6_I2C_ADDR PD_XRES 2 5
3D3V_S5_KBC DY 3D3V_S5_KBC
UPD1_SMBDA_Q 3 4 UPD1_SMBDAT
1
D7201
C7214 PROCHOT#_CPU A K CCG6_PROCHOT#
R7201 DY 2N7002KDW-1-GP
DY SCD1U25V2KX-1-DL-GP
1KR2J-1-GP 75.27002.F7C
1
RB520S30-GP
B B
2nd = 075.27002.0E7C 83.R2003.A8M
2
1 R7253 2
2ND = 083.52030.008F
R7226 1 20R2J-2-GP
0R0402-PAD-2-GP DY
20191210(EVT)
Follow vendor review value VDDD
(TBT)
R7216 -> DY
R7218 -> 100K
1
R7216
(NON_TBT) 300KR2F-GP
3D3V_S5 R7216 -> 300K NON_TBT
RN7202 R7218 -> 100K
2
2 3 UPD1_SMBCLK_Q
CCG6_ID_1
1 DY 4 UPD1_SMBDA_Q
SRN2K2J-1-GP
1
1 2 INT#_Typec_R R7218
R7214 100KR2F-L1-GP
2K2R2J-2-GP
2
R7267 1 2 CCG6_I2C_INT#
2K2R2J-2-GP
20200106(DVT1)
Del RN7204
20191129(EVT)
A TP for vendor request A
20191220(EVT) VDDD
Del R7268 for USB issue
1
PD_XRES 1 TP7202
TP7201 <Core Design>
CCG6_I2C_ADDR 1
VDDD RETIMER_PWREN 1 TP7204
RN7203 TP7203
SOC_OC_FAULT 1
2 3 BB_I2C_SDA TP7205 Wistron Corporation
1 4 BB_I2C_SCL 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SRN2K2J-1-GP
Title
EXT IO (Thunderbolt(2/3)/Type C CC Logic)
A2 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = TypeC USB1

20V_VCCPD_VBUS A1 B1 20V_VCCPD_VBUS
USB1 USB1_SSTX_CON_P1 A2 GND
SSTXP1
GND
SSTXP2
B2 USB1_SSTX_CON_P0 20V_VCCPD_VBUS
USB1_SSTX_CON_N1 A3 B3 USB1_SSTX_CON_N0
71 USB1_SSTX_CON_P0 SSTXN1 SSTXN2
71 USB1_SSTX_CON_N0 A4 B4
USB1_CON_CC2 A5 VBUS#A4 VBUS#B4 B5 USB1_CON_CC1
71 USB1_SSTX_CON_P1 CC1 CC2
USB1_USB20_CONB_P A6 B6 USB1_USB20_CONT_P
71 USB1_SSTX_CON_N1 DP1 DP2 20200318(DVT1)
USB1_USB20_CONB_N A7 B7 USB1_USB20_CONT_N C7301 C7302 C7303 C7304 C7307
DN1 DN2 Reserve C7307
1
SCD1U25V1MX-1-GP
SCD1U25V1MX-1-GP
SCD1U25V1MX-1-GP
SCD1U25V1MX-1-GP
SC10U25V3MX-5-GP
71 USB1_SSRX_AR_P0 USB1_CON_SBU2 A8 B8 USB1_CON_SBU1
A9 RFU1 RFU2 B9 DY Follow Intel TBT check list
71 USB1_SSRX_AR_N0 VBUS#A9 VBUS#B9
USB1_SSRX_AR_N0 A10 B10 USB1_SSRX_AR_N1
71 USB1_SSRX_AR_P1
2
USB1_SSRX_AR_P0 A11 SSRXN2 SSRXN1 B11 USB1_SSRX_AR_P1
D 71 USB1_SSRX_AR_N1 D
A12 SSRXP2 SSRXP1 B12
GND GND
72 USB1_USB20_CMCT_P
72 USB1_USB20_CMCT_N NP1
NP2 NP1
72 USB1_USB20_CMCB_P NP2
72 USB1_USB20_CMCB_N
13
CHASSIS#13 14
72 USB1_CON_CC1 CHASSIS#14
72 USB1_CON_CC2 15
CHASSIS#15 16
CHASSIS#16
71,72 USB1_CON_SBU1
71,72 USB1_CON_SBU2
SKT-USB30-64-GP
062.10009.M029
71 USB1_SSTX_RC_N1
71 USB1_SSRX_RC_P1
20191216(EVT)
71 USB1_SSRX_RC_N0 Layout swap request
71 USB1_SSTX_RC_N0
71 USB1_SSRX_RC_P0
71 USB1_SSTX_RC_P0
EL7302 EL7301
USB1_USB20_CMCT_P 3 4 USB1_USB20_CONT_P USB1_USB20_CMCB_P 3 4 USB1_USB20_CONB_P
71 USB1_SSRX_RC_N1
USB1_USB20_CMCT_N 2 1 USB1_USB20_CONT_N USB1_USB20_CMCB_N 2 1 USB1_USB20_CONB_N
71 USB1_SSTX_RC_P1
DLM0NSN900HY2D-GP DLM0NSN900HY2D-GP
C C
068.09002.2001 068.09002.2001
2nd = 68.02002.061 2nd = 68.02002.061
3rd = 068.00104.0011 3rd = 068.00104.0011
20200508(DVT2)
Change to common part
Follow Hellcat TGL series
20191212(EVT)
Follow Nakia N7
USB1_USB20_CONB_N
USB1_USB20_CONB_P
USB1_USB20_CONT_N
USB1_USB20_CONT_P
USB1_CON_SBU2
USB1_CON_SBU1
USB1_CON_CC2
USB1_CON_CC1
USB1_CON_SBU1
USB1_CON_SBU2
Follow Intel CRB
083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF
1
B 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF C7305 C7306 B
2
SC100P50V2JN-3DLGP
SC100P50V2JN-3DLGP
ED7301 ED7302 ED7303 ED7304 ED7305 ED7306 ED7307 ED7308
DY DY
2
PESD5V0H1BSFYL-GP-U1
1
1
USB1_SSTX_RC_P0
USB1_SSTX_RC_N0
USB1_SSRX_RC_P0
USB1_SSRX_RC_N0
USB1_SSTX_RC_P1
USB1_SSTX_RC_N1
USB1_SSRX_RC_P1
USB1_SSRX_RC_N1
083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF 083.5V0H1.00AF

A 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF 2nd = 083.58017.00AF <Core Design> A
2
ED7309 ED7310 ED7311 ED7312 ED7313 ED7314 ED7315 ED7316

Wistron Corporation
1
Title
EXT IO (Thunderbolt(3/3)/Type C Conn)
A3 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main FUNC = LPS

20V_VCCPD_VBUS
72 PD_VBUS_C_CTRL1

D D
44 VCCPD_VBUS_ACK
72 VBUS_C_CTRL_P0_GPIO +SDC_IN
USB_ADT
U7418
8 D S 1
layout note: 7 D S 2
1
6 D S 3
close to U7419
1
5 D R7406
1
G 100KR2F-L1-GP R7432
2
R7404 AONR21321-GP 1MR2F-GP
S
4
1
24 TYPEC_DCIN1_EN# 1MR2F-GP C7401 R7407
084.21321.0037
2
1MR2F-GP G
2
2nd = 084.20P03.0033
C2
D2
C1
D1
B2
E1
E2
A1
B1
2
Q7401
1
PJA3413-1-GP
VBUS
VBUS
VBUS
VBUS
VBUS
VINT
VINT
VINT
VINT
3D3V_S5 084.03413.0031
D
2nd = 084.02301.0031
1 R7403 2 LPS_SW_R
20191209(EVT)
LPS_SW_C
0R0402-PAD-2-GP
OVLO
U7419
LPS_SW
Follow HCAT DG1
GND
GND
GND
ACK
EN#
R7424 NX20P5090UK-GP
100KR2J-1-GP
074.20509.007Z
A2
A3
B3
C3
D3
E3
2
2nd = 074.05007.0A9Z
1
R7401
VCCPD_VBUS_ACK R7408
200KR2F-L-GP
100KR2F-L1-GP
2
3D3V_S5
LPS_SW_A
Q7406
1
20191209(EVT)
C R7427 3 S2 4 Follow HCAT DG1 C
D2
100KR2F-L1-GP TYPEC_DCIN1_EN# 2 G1 5 PD_VBUS_C_CTRL1_R

G2
2
1 6 LPS_SW_D
S1 D1
PD_VBUS_C_EN 1 R7422 2
PJT138KA-GP
1MR2J-1-GP
075.00138.0A7C
Q7407
2nd = 075.00138.0F7C
Form EC (CY18 add) 3rd = 075.00139.007C
3 S2
4
D2
TYPEC_DCIN1_EN# 2 G1 5
G2
1
1 S1 D1
6
R7428
100KR2F-L1-GP PJT138KA-GP 1 R7433 2

075.00138.0A7C 200KR2F-L-GP
2
2nd = 075.00138.0F7C
3rd = 075.00139.007C
20V_VCCPD_VBUS
Default: High
Avtive : Low
RO13 Shauchi
1
Q7405 R7426
R7425
1 2 PD_VBUS_C_EN_A 3 4 100KR2F-L1-GP
20V_VCCPD_VBUS
100KR2F-L1-GP
2
PD_VBUS_C_CTRL1 R7410 1 2 PD_VBUS_C_CTRL1_R 2 5 PD_VBUS_C_CTRL1_R_R 20191128
Note:ZZ.27002.F7C01
Form PD control 10KR2F-2-GP 1 6
Change net name
1
2N7002KDW-1-GP
VBUS_C_CTRL_P0_GPIO R7409 1 2 PD_VBUS_C_CTRL1_R R7411 R7434
DY 750KR2F-GP 75.27002.F7C 200KR2F-L-GP
0R2J-2-GP
B
2 2nd = 075.27002.0E7C B
2
20191127
Follow vendor request
Form PD control
A A
<Core Design>
Wistron Corporation
Title
GPU(2/5)DIGITALOUT
A2
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
GPU(1/5)PEG
A3
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU
D D
C C
B B
A A
<Core Des ign>
Wistron Corporation
Title
GPU(2/5)DIGITALOUT
A0
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
GPU(2/5)DIGITALOUT
A1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A A
<Core Design>
Wistron Corporation
Title
GPU(4/5)GPIO/STRAP
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Des ign>
Wistron Corporation
Title
GPU(2/5)DIGITALOUT
A0
5 4 3 2 1
5 4 3 2 1
For 4PCS RAM place
D D
Layout Note:Place as pic..
C C
B B
LPDDR4 LPDDR4X
PWR_VDDQ VDDQ 1.1V 410mA 0.6V 185mA PWR_VDDQ_VTT
PWR_VDDQ_1D8V
VDD1 1.8V 6.8mA 1.8V 12mA PWR_VDDQ_1D8V
PWR_VDDQ
VDD2 1.1V 290mA 1.1V 465mA 1D1V_S3
A A
<Core Design>
Wistron Corporation
Title
Size Document Number

GPU-VRAM1,2 (1/4) Rev
Custom
5 4 3 2 1
5 4 3 2 1
For 4PCS RAM place
D D
Layout Note:Place as pic..
C C
B B
A A
<Core Design>
Wistron Corporation
Title
Size Document Number

GPU-VRAM3,4 (2/4) Rev
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
GPU-VRAM5,6 (3/4)
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
GPU-VRAM7,8 (4/4)
A3
5 4 3 2 1
5 4 3 2 1
OFFPAGE
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
POWER (MP2940A_VGA)
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU OFFPAGE_GAP

OFFPAGE
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
POWER (TPS51487X_VDDQ)
Custom
5 4 3 2 1
5 4 3 2 1
Main Func = VCCSTDG1

OFFPAGE OFFPAGE_GAP
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
POWER (1D05V_VCCST_GPU)
A3
5 4 3 2 1
5 4 3 2 1
Main Func = dGPU
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
GPU_PWR Sequence
A2
5 4 3 2 1
5 4 3 2 1
Main Func = UnusedParts

34.4YW18.001
H1 H2 H3 H4 H5
D HOLE233R150-GP HOLE233R150-GP HOLE233R150-GP HOLE233R150-GP HOLET355B375X375R174-GP D
1
ZZ.00PAD.WN1 ZZ.00PAD.WN1 ZZ.00PAD.WN1 ZZ.00PAD.WN1 ZZ.00PAD.XU1
H12 H9
HOLE256R142-1-GP HOLE256R142-1-GP 3D3V_S0
PWR_DCBATOUT_VCOREA
SB 0129 just footprint
1
1
1
1
EC8980
1
EC8983
1
HS1 EC8981 EC8982 EC8984 EC8985 EC8987 EC8986 EC8988 EC8989
STFT237B158R128H48-1-GP ZZ.PAD01.V91 ZZ.PAD01.V91 DY DY DY DY DY DY DY DY DY DY
SC1KP50V2KX-1DLGP
1
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
1
SC1KP50V2KX-1DLGP
EC8995
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
EC8996
2
2
2
2
2
2
DY DY
SCD1U25V2KX-1-DL-GP
SCD1U25V2KX-1-DL-GP
2
2
1
434.0HH0J.0001 5V_S0
1
1
1
1
EC8970
1
EC8973
1
EC8971 EC8972 EC8974 EC8975 EC8977 EC8976 EC8978 EC8979
DY DY DY DY DY DY DY DY DY DY
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
2
2
2
2
2
2
C C
BT+
1
1
1
1
EC8990 EC8991 EC8992 EC8993 EC8994
+SDC_IN
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY
2
3D3V_S5 DY
2
2
2
2
1
1
1
1
1
EC8960
1
EC8963
1
1
1
1
1
1
EC8921
1
EC8924
1
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY
SC1KP50V2KX-1DLGP
DY
SC1KP50V2KX-1DLGP
DY DY
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY DY
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY
2
DY DY DY DY
2
DY DY DY DY
2
2
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
2
2
2
2
2
2
SSID = EMI
Mind the voltage rating of the caps.
5V_S5 1D1V_S3
19V_DCBATOUT
1
1
EC8918
1
1
1
1
1
EC8908 EC8919
1
EC8909 EC8920 EC8927 EC8928 EC8929 EC8952 EC8953 EC8954 EC8955

1
EC8910
1
1
EC8911 EC8912 EC8913
1
1
EC8914 DY
1
EC8915
1
EC8916 EC8917 EC8930 EC8931 EC8932 EC8939 EC8940
DY DY DY DY DY DY DY DY DY EC8933 EC8934 EC8941 EC8942 EC8951
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
DY
2
2
SC1KP50V2KX-1DLGP
2
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
2
DY
2
DY DY DY
2
2
2
DY DY
2
2
2
B B
SSID = RF
5V_S5
19V_DCBATOUT
FC8905
FC8925
FC8927
FC8906
FC8907
FC8908
FC8909
FC8910
FC8912
FC8926
FC8930
SC12P50V2JN-DL-GP
FC8929
1
FC8913
FC8928
FC8931
FC8934
SC12P50V2JN-DL-GP
FC8911
FC8914
FC8915
FC8933
FC8932
SC12P50V2JN-DL-GP
1
FC8917
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
FC8916
FC8922
SC12P50V2JN-DL-GP
1
1
FC8918
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
FC8919
FC8920
FC8923
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
1
FC8921
FC8924
SC12P50V2JN-DL-GP
1
1
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
SC12P50V2JN-DL-GP
1
1
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
1
1
DY
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
20191203(EVT)
Reserve for RF
20200316(DVT1)
VCCIN 1D8V_VCCIN_AUX EMI & RF team confirm stuff
3D3V_S5 1D05V_S5_BYPASS
A A
1
1
FC8946 FC8947 FC8948 FC8949 FC8950 FC8951 FC8952 FC8953 FC8954 FC8955 FC8956 FC8957
1
DY DY DY DY DY DY
FC8935
FC8937
FC8945
FC8936
FC8940
FC8939
FC8938
FC8941
FC8943
FC8944
FC8942
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC1KP50V2KX-1DLGP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
SC12P50V2JN-DL-GP
1
1
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
SC12P50V2JN-DL-GP
1
SC12P50V2JN-DL-GP
1
SC12P50V2JN-DL-GP
2
2
Hynix 8G
2
2
2
2
2
2
Wistron Corporation
Title
UNUSED PARTS/EMI Capacitors

A2
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A Hynix 8G A
Wistron Corporation
Title
Reserved
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
INT IO (TPM)
A4 A00
Hellcat 13'' TGL
5 4 3 2 1
5 4 3 2 1
Main Func = FPR FBR(Botton side finger Print Sensor)

RO13_CFLU
PWFPR_SSO: GOODIX module
3D3V_S5 PWFPR_NON_SSO: ELAN module(R9211 R9214 R9217)

D D
1
16 FP1_USB20_N R9212
16 FP1_USB20_P 100KR2J-1-GP
PWFPR_SSO
24 FPR_SCAN#
Q9202
2
17,40 SIO_SLP_S4# 3D3V_FPR_VDD
SIO_SLP_S4# G
S
D FP_EN# G Q9201
24,64,66 KBC_PW RBTN# PWFPR_SSO PJA3413-1-GP
S PWFPR_SSO
20,24,67 LID_CL_SIO#
Notice:ZZ.2N702.J3101 084.03413.0031
2nd = 084.02301.0031
D
2N7002K-2-GP C9202
SC1U10V2KX-1DLGP
84.2N702.J31
2
2nd = 084.27002.0N31 FP_3D3V R9213
1 2
0R0603-PAD-2-GP-U
FP1
20200309(DVT1) 9
Follow HCAT CML 8
7 KBC_PW RBTN#
C 6 FP1_USB20_CON_N C
5 FP1_USB20_CON_P
4
3 LID_CL_SIO#
2 FPR_SCAN#
C9201
1
1 SC1U10V2KX-1DLGP
10
2
HIG-CON8-2-GP
020.K0270.0008
2nd = 020.K0246.0008
B FP1_USB20_N R9209 1 2 0R0402-PAD-2-GP FP1_USB20_CON_N B
FP1_USB20_P R9210 1 2 0R0402-PAD-2-GP FP1_USB20_CON_P
ED9202
A 2 FP1_USB20_CON_P Hynix 8G A
3 DY
1 FP1_USB20_CON_N
Wistron Corporation
AZ5315-02F-GP Title
83.05315.0A0 (Reserved)Finger Print
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
(Reserved)
A2
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
(Reserved)
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
(Reserved)
A4
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
LVDS_Switch
A4
5 4 3 2 1
5 4 3 2 1
Main Func = Firmware SW
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
CRT_Switch
A3
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Debug (XDP/HDT conn)
A3
5 4 3 2 1
5 4 3 2 1
CLK Block Diagram
D D
TBD
C C
B B
A A
<Core Design>
Wistron Corporation
Title
CLK Block Diagram
A2
5 4 3 2 1
5 4 3 2 1
Change notes -
DATE VERSON DATE Page Modify List OWNER
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Change History
A3
5 4 3 2 1
5 4 3 2 1
TBD
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Taipei Hsien 221, Taiw an, R.O.C.
Title
Power Sequence
Custom
5 4 3 2 1
5 4 3 2 1
D D
C C
TBD
B B
A A
<Core Design>
Wistron Corporation
Title
Power Block Diagram
A2
5 4 3 2 1
A B C D E
1 1
2 2
TBD
3 3
4 4
<Core Design>
Wistron Corporation
Title
SMBUS Block Diagram

A2 Hellcat 13'' TGL A00
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
3D3V_S5_PCH 3D3V_S0
PAGE28 D+ NCT7718_DXP
PCH MMBT3904-3-GP
SPKR_L+
SPKR_L-
D- NCT7718_DXN
SC2200P50V2KX-2GP SPKR_R-
SPKR_R+ SPEAKER
Thermal Place near CPU
SML1_DATA CPU_SMB_SDA_THM SDA
NCT7718 PWM CORE
Codec
SML1DATA/GPIO74 ‧ ‧‧ 2N7002 ‧
SML1CLK/GPIO75 SML1_CLK
‧‧ ‧ CPU_SMB_SCL_THM SCL
‧
MMBT3904-3-GP
ALC3246
T8 AUD_HP1_JACK_L HP MIC
SML1_DATA
AUD_HP1_JACK_R
SML1_CLK
PAGE20
3D3V_S0
T_CRIT# THERM_SYS_SHDN#
2N7002
S
D
PURE_HW_SHUTDOWN#
PCH_PWROK
EN 3V/5V SLEEVE COMBO
G RING2
2
‧ Put under CPU(T8 HW shutdown) 2
PAGE27 GPIO74 PAGE86
KBC GPIO73
R2714
Digital
MEC1404 2N7002
SMB_CLK_VGA_R I2CS_SCL
VGA GPIO0/DMIC_DATA
DMIC_DATA_R
0R2J-2-GP
DMIC_DATA
MIC
SMB_DATA_VGA_R I2CS_SDA DMIC_CLK_R R2716 DMIC_CLK
GPIO1/DMIC_CLK
0R2J-2-GP
GPIO4
MESO-LE
GPIO94 GPIO56
GB2-64 (23x23)
FAN_TACH1
FAN1_DAC_1
3 3
TACH
FAN
VIN
FAN_VCC1
5V
VIN VSET VOUT
FAN CONTROL
APL5606AKI
PAGE28
4 4
<Core Design>
Wistron Corporation
Title
Size
Thermal/Audio Block Diagram
Document Number Rev
Custom
A B C D E

Wistron Hellcat 13 Schematics

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Wistron Hellcat 13 Schematics

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5 4 3 2 1

A DY : None Installed <Variant Name> A

UMA: UMA only installed Wistron Corporation

OPS: DISCRTE OPTIMUS installed Title

Project code: 4PD0LB010001

LPDDR4X 4267MT/s DisplayPort to HDMI Converter

Tiger LAKE-U 4+2

CAMERA(HD) USB2.0 x 1 USB2.0 Finger Print

WLAN SIP USB2.0 LANE10

Int. Touch PAD

Follow Nakia Shuri N7

XDP_TCLK R310 1 2 51R2J-2-GP

R307 1 2 1KR2F-3-GP CPU_CATERR

CPU_POPI_RCOMP R305 1 2 49D9R2F-GP

PCH_OPI_RCOMP R306 1 2 49D9R2F-GP

Follow Hellcat15 Upsell TGL

T15 A51 TP_RSVD_A51 1 TP607

R601 1 DY 2 1KR2J-1-GP CFG14 20191203(EVT)

46 VCCCORE_SENSE Follow Hellcat15 Upsell TGL

Follow Hellcat15 Upsell TGL

Follow Hellcat15 Upsell TGL

DF53 C53 1D05V_S5_OUT

1D8V_ES1_ONLY RSVD#DF49 RSVD#A52 DW47 RSVD#DV24

Main Func = CPU Follow Hellcat15 Upsell TGL

VCCIN 22uF *12pcs VCCIN

PC1016 PC1017 PC1018 PC1024

PC1019 PC1020 PC1021 PC1025

1D8V_S5 1D05V_VCCSTG 1D05V_VCCST

C1124 C1125 C1126 FC1128 FC1129 FC1130 C1131 C1132 C1133

PLACE on BACK SIDE

TBT LSX #1 TBT LSX #2 TBT LSX #3 A0 GPP_E10 GPP_E11

Follow Hellcat15 Upsell TGL

Follow Hellcat15 Upsell TGL

1 8 3V_5V_PWRGD_U R1772 1 2 0R0402-PAD-2-GP 3V_5V_PWRGD

3D3V_S5_R R1771 1 2 0R0402-PAD-2-GP 3D3V_S5_U 4 PCH_DPWPOK EC_PCH_SPI_EN 5

Power on sequence for G3 sharing

100KR2J-1-GP R1734 1 2 0R0402-PAD-2-GP 6 1 R1736

74LVC1G08GW-1-GP 2nd = 073.7SZ08.000G

75.27002.F7C 3rd = 73.01G08.IHG

SPI ROM 3D3V_S5

B DN13: HOST_SD_WP# XTAL-32D768KHZ-88-GP B

XTL_38D4M_X2_CPU R1835 1 2 0R2J-2-GP XTL_38D4M_X2_CPU_R R1820 1 2 200KR2F-L-GP

CY19 Board ID Mapping table

HDA_SYNC_CODEC R1901 1 2 33R2J-2-GP HDA_SYNC DU37 GPP_R0/HDA_BCLK/I2S0_SCLK GPP_F8/I2S_MCLK2_INOUT DW24

Follow Hellcat15 Upsell TGL

eDP Pull high to enable DDR

MEM_CHA_EN MEM_CHB_EN ISH_NB_MODE G

68 UART_2_CTXD_DRXD R2030 R2032 D NB_MODE#

MEM_CONFIG Mapping table

11 DIMM Design 11 ODP

On-board memory configuration 10 Micron MEM_Die CONFIG[1:0] SDP/DDP/QDP/ODP

11 N/A 1D8V_S5 1D8V_S5

On-board memory configuration 10 16GB

R2112 R2114 R2116 R2118

A Micron Hynix 16GB 8GB <Core Design>

10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP

MEM_CONFIG4 MEM_CONFIG3 MEM_CONFIG2 MEM_CONFIG1 Wistron Corporation

R2113 R2115 R2117 R2119 Taipei Hsien 221, Taiwan, R.O.C.

Size Document Number Rev

BW40 VCCIN_AUX VCCPRIM_1P8 DC20

SRN10KJ-5-GP C2210 C2211 DY

C2208 C2209 1 C2214

Close to pin DD37

Main Func = KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC 3D3V_S5_KBC MODEL ID