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M74HC73

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

■ HIGH SPEED :
fMAX = 80MHz (TYP.) at VCC = 6V
■ LOW POWER DISSIPATION:
ICC =2µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY:
VNIH = V NIL = 28 % VCC (MIN.)
( s )
ct
■ SYMMETRICAL OUTPUT IMPEDANCE: DIP SOP TSSOP


|IOH| = IOL = 4mA (MIN)
BALANCED PROPAGATION DELAYS:
d u
tPLH ≅ tPHL ORDER CODES
r o
■ WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
PACKAGE

e PTUBE T&R

■ PIN AND FUNCTION COMPATIBLE WITH


74 SERIES 73
DIP
SOP
l e t M74HC73B1R
M74HC73M1R M74HC73RM13TR

DESCRIPTION
s o
TSSOP M74HC73TTR

The M74HC73 is an high speed CMOS DUAL J-K


FLIP FLOP WITH CLEAR fabricated with silicon O b
clear function is accomplished independently of
the clock condition when the clear input (CLR) is
gate C2MOS technology.
) - taken low.

(s
Depending on the logic level applied to J and K All inputs are equipped with protection circuits

c t
inputs, this device changes state on the negative
going transition of clock input pulse (CK). The
against static discharge and transient excess
voltage.

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PIN CONNECTION AND IEC LOGIC SYMBOLS

August 2001 1/11


M74HC73

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION


1, 5 1CK, 2CK Clock Input
Asynchronous Reset
2, 6 1CLR, 2CLR
Inputs
12, 9 1Q, 2Q True Flip-Flop Outputs
Complement Flip-Flop
13, 8 1Q, 2Q
Outputs
1J, 2J, 1K, Synchronous Inputs
14, 7, 3, 10
2K Flip-Flop 1 and 2
11 GND Ground (0V)
4 Vcc
)
Positive Supply Voltage

( s
TRUTH TABLE
u ct
INPUTS OUTPUTS
o d
Pr
FUNCTION
CLR J K CK Q Q
L X X X L H CLEAR
H L L Qn
e t e Qn NO CHANGE
H L H L
ol H ----
H
H
H
H
L
H
O bs H
Qn
L
Qn
----
TOGGLE
H X X
) - Qn Qn NO CHANGE
X : Don’t Care

t ( s
LOGIC DIAGRAM
u c
o d
P r
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M74HC73

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit


VCC Supply Voltage -0.5 to +7 V
VI DC Input Voltage -0.5 to VCC + 0.5 V
VO DC Output Voltage -0.5 to VCC + 0.5 V
IIK DC Input Diode Current ± 20 mA
IOK DC Output Diode Current ± 20 mA
IO DC Output Current ± 25 mA
ICC or IGND DC VCC or Ground Current ± 50 mA
PD Power Dissipation 500(*) mW
Tstg Storage Temperature -65 to +150
( s ) °C
TL Lead Temperature (10 sec) 300
c t °C

not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
d u
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is

r o
RECOMMENDED OPERATING CONDITIONS

e P
Symbol
VCC Supply Voltage
Parameter

l e t Value
2 to 6
Unit
V
VI Input Voltage
s o 0 to VCC V
VO
Top
Output Voltage
Operating Temperature
O b 0 to VCC
-55 to 125
V
°C
Input Rise and Fall Time
) - VCC = 2.0V 0 to 1000 ns
tr, tf

t ( s VCC = 4.5V 0 to 500 ns

u c VCC = 6.0V 0 to 400 ns

o d
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M74HC73

DC SPECIFICATIONS

Test Condition Value

Symbol Parameter TA = 25°C -40 to 85°C -55 to 125°C Unit


VCC
(V)
Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input 2.0 1.5 1.5 1.5
Voltage 4.5 3.15 3.15 3.15 V
6.0 4.2 4.2 4.2
VIL Low Level Input 2.0 0.5 0.5 0.5
Voltage 4.5 1.35 1.35 1.35 V
6.0 1.8 1.8 1.8
VOH High Level Output 2.0 IO=-20 µA 1.9 2.0 1.9 1.9

( s )
ct
Voltage IO=-20 µA
4.5 4.4 4.5 4.4 4.4
IO=-20 µA

du
6.0 5.9 6.0 5.9 5.9 V
4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10
6.0 IO=-5.2 mA 5.68 5.8
r
5.63 o 5.60
VOL Low Level Output
Voltage
2.0 IO=20 µA 0.0

e
0.1
P 0.1 0.1
4.5
6.0
IO=20 µA
IO=20 µA
0.0

l
0.0
e t 0.1
0.1
0.1
0.1
0.1
0.1 V

so
4.5 IO=4.0 mA 0.17 0.26 0.33 0.40

II Input Leakage
6.0

6.0
IO=5.2 mA

VI = VCC or GND
O b 0.18 0.26

± 0.1
0.33

±1
0.40

±1 µA

ICC
Current
Quiescent Supply
) -
(s
6.0 VI = VCC or GND 2 20 40 µA
Current

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M74HC73

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)

Test Condition Value

Symbol Parameter TA = 25°C -40 to 85°C -55 to 125°C Unit


VCC
(V)
Min. Typ. Max. Min. Max. Min. Max.
tTLH tTHL Output Transition 2.0 30 75 95 110
Time 4.5 8 15 19 22 ns
6.0 7 13 16 19
tPLH tPHL Propagation Delay 2.0 42 125 155 190
Time (CK - Q) 4.5 14 25 31 38 ns
6.0 12 21 26 32
tPLH tPHL Propagation Delay 2.0 54 145 180

( s )
220

ct
Time (CLR - Q) 4.5 18 29 36 44 ns
6.0 15 25 31 37
fMAX Maximum Clock 2.0 6 15 4.8
d u 4
Frequency 4.5
6.0
30
35
60
80 r
24
28 o 20
24
MHz

tW(H) Minimum Pulse 2.0 18 75

e P 95 110

let
tW(L) Width (CK) 4.5 6 15 19 22 ns
6.0 6 13 16 19
tW(L) Minimum Pulse
Width (CLR)
2.0
s o 21 75 95 110
4.5
6.0
O b 7
6
15
13
19
16
22
19
ns

ts Minimum Set-up
Time
2.0
4.5
) - 30
8
75
15
95
19
110
22 ns
6.0
t ( s 6 13 16 19
th Minimum Hold 2.0
c 0 0 0

du
Time 4.5 0 0 0 ns
6.0 0 0 0
tREM Minimum Removal
r o 2.0 25 75 95 110
Time

e P 4.5
6.0
7
6
15
13
19
16
22
19
ns

e t
ol
CAPACITIVE CHARACTERISTICS

s
O b
Symbol Parameter VCC
Test Condition
TA = 25°C
Value

-40 to 85°C -55 to 125°C Unit


(V) Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance 5.0 5 10 10 10 pF
CPD Power Dissipation
Capacitance (note 5.0 35 pF
1)
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + I CC/2 (per FLIP/
FLOP)

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M74HC73

TEST CIRCUIT

( s )
uct
o d
CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
P r
WAVEFORM 1: MINIMUM REMOVAL TIME (f=1MHz; 50% duty cycle)
e te
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(s )
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M74HC73

WAVEFORM 2 : MINIMUM PULSE WIDTH, PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)

( s )
u ct
o d
P r
e te
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b s
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WAVEFORM 3 : PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH, SETUP AND HOLD TIME
(f=1MHz; 50% duty cycle)

(s )
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M74HC73

Plastic DIP-14 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 1.39 1.65 0.055 0.065

b 0.5 0.020

b1 0.25 0.010

( s )
D 20

u ct 0.787

E 8.5
d
0.335

o
Pr
e 2.54 0.100

e3 15.24

e t e 0.600

ol
F 7.1 0.280

bs
I 5.1 0.201

L 3.3

- O 0.130

Z 1.27

( s ) 2.54 0.050 0.100

c t
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O b

P001A

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M74HC73

SO-14 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018

)
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
( s
c1 45° (typ.)

u ct
D 8.55 8.75 0.336

o d 0.344

Pr
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62

e t e 0.300
F 3.8 4.0
l
0.149 0.157
G
L
4.6
0.5
5.3

b
1.27 so 0.181
0.019
0.208
0.050
M
- O
0.68 0.026
S

(s ) 8° (max.)

c t
du
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e P
l e t
so
O b

PO13G

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M74HC73

TSSOP14 MECHANICAL DATA

mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.

A 1.2 0.047

A1 0.05 0.15 0.002 0.004 0.006

A2 0.8 1 1.05 0.031 0.039 0.041

b 0.19 0.30 0.007


( s )
0.012

ct
du
c 0.09 0.20 0.004 0.0089

ro
D 4.9 5 5.1 0.193 0.197 0.201

E 6.2 6.4 6.6 0.244

e P 0.252 0.260

E1 4.3 4.4 4.48


l e t
0.169 0.173 0.176

o
bs
e 0.65 BSC 0.0256 BSC

K 0°

- O
8° 0° 8°

L 0.45 0.60

( s ) 0.75 0.018 0.024 0.030

c t
d u
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A A2

e P
let
K L
A1 b e c E

s o
Ob D

E1

PIN 1 IDENTIFICATION
1
0080337D

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M74HC73

( s )
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics

© 2001 STMicroelectronics - Printed in Italy - All Rights Reserved


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