Design Spec

Figure of Merit
RL  90nm technology
VO  |𝐴𝑣 | ≥ 4 𝑉/𝑉
VDD
 𝑓𝑢 ≥ 100𝑀𝐻𝑧
MN1 CL
 𝐶𝐿 = 5𝑝𝐹
 𝑉𝐷𝐷 = 1.2𝑉
VDD+vin

Procedure
1 Determine gm from design spec
 𝜔𝑢
2 Pick transistor’s length L
 Short channel: high fT (that means high bandwidth)
 Long channel: high ro (that means high gain)
3 Pick gm/ID (or fT)
 Large gm/ID : low power, larger signal swing;
 Small gm/ID : high fT (high speed)
4  Determine ID/W from the figure of ID/W vs gm/ID
5  Determine W from the value of ID/W;

 Choose L based on gain

The figure shows the intrinsic gain for
L=100n, 500n and 1u respectively. We can
see from that figure, L=100n can meet our
requirement as 𝐴𝑚𝑎𝑥 = 13.48 > 4 𝑉/𝑉

 Calculate 𝑔𝑚 based on spec.

𝑔𝑚
𝜔𝑢 = 2𝜋𝑓𝑢 = => 𝑔𝑚 = 2𝜋𝑓𝑢 𝐶𝐿 = 3.14mS
𝐶𝐿
 Choose V ∗ = 200𝑚
𝑔𝑚
ID = 𝑉 ∗ × = 314𝜇𝐴
2
gm
= 10
𝐼𝐷
 Check gain and fT and Vov to make sure the value of gm/ID is acceptable.
We can see that when gm/ID =10, the device
operating in moderate region. This region
cannot be used square model. The
Vov=14.63. This is not recommended as the
value is too small. For Normal corner is ok.
But it will be failed when sweep the other
corner in real.

gm
 Choose W based on the = 10
𝐼𝐷
 314e − 6
W= = 8.686u
36.15

 Calculate the R based on Av.

1 + 20%
RL ≈ 4 × ≈ 1.5K
3.14

The results is 4.07 V/V. The error with 0.7 is because of Av assumption.