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PROBLE
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PROBLE
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a)
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Exerci

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PROBLE
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L13!g*!913%8#%%e : l%m/ncde%/0!%oqpr<! 6=ts%&%s%v$
f/;*.g"%$,+"4

a) w f/;*.g"%$,+u4x PH2$
b) w
H2

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PROBLE
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PROBLE
f/;*.gu%$,+"4x
a) w f/;*.gu%$,+)4 H2.
b) w f/;*.gu%$'%s4x PH2.
c) w f/;*.gu%$' x H2.
d) w f/;*.gu%$'%&4x H2.
e) w f/;*.gu%$'s%-4x H2. xC.2/;9;l/413%8
0!*C%h 0!9;/.Pckeq18 : <%
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clarification
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1
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1b3b913!28hn;.$


 
 

0
M
u
x

Add ALU
result
Add
RegDst
Branch

4
Instruction [31 26]

Control

Shift
left 2

PCSrc

MemRead
MemtoReg
ALUOp
MemWrite
ALUSrc
RegWrite

PC

Instruction [25 21]

Read
address
Instruction
[310]
Instruction
memory

Read
register 1

Instruction [20 16]

Instruction [15 11]

Instruction [15 0]

0
M
u
x
1

Read
data 1
Read
register 2
Registers Read
Write
data 2
register

0
M
u
x
1

Write
data

16

Instruction [5 0]

Sign
extend

32
ALU
control

Zero
ALU ALU
result

Address

Write
data

Read
data
Data
memory

1
M
u
x
0


 


33

PCWriteCond

PCSource

PCWrite
ALUOp
IorD Outputs
ALUSrcB
MemRead
ALUSrcA
MemWrite Control
RegWrite
MemtoReg
IRWrite

Op
[50]

RegDst
0

26

Instruction [250]

PC

0
M
u
x
1

Instruction
[31-26]

Address
Memory
MemData
Write
data

Instruction
[2521]

Read
register 1

Instruction
[2016]

Read
Read
register 2 data 1
Registers
Write
Read
register data 2

Instruction
[150]
Instruction
register
Instruction
[150]
Memory
data
register

0
M
Instruction u
x
[1511]
1
0
M
u
x
1

B
4

Write
data

16

Sign
extend

0
M
u
x
1

32

Instruction [50]

Shift
left 2

Shift
left 2

28

Jump
address [31-0]

PC [31-28]

Zero
ALU ALU
result

0
1 M
u
2 x
3

ALU
control

ALUOut

1 u
x
2