Impact of Noise on the Resilience and the Security
of Quantum Computing
(Invited Paper)
2021 22nd International Symposium on Quality Electronic Design (ISQED) | 978-1-7281-7641-3/20/$31.00 ©2021 IEEE | DOI: 10.1109/ISQED51717.2021.9424258
Abdullah Ash Saki Mahabubul Alam
Electrical Engineering Electrical Engineering
Pennsylvania State University Pennsylvania State University
University Park, PA, USA University Park, PA, USA
axs1251@psu.edu mxa890@psu.edu
Abstract—Qubits, which are building blocks of quantum
computers, are fragile and prone to noise and error. Some
prominent errors include decoherence/dephasing, gate error,
readout error, leakage, and crosstalk. The computation quality
degrades in the presence of errors. Therefore, even though
quantum computing can theoretically speed-up certain classes
of problems, the present-day Noisy Intermediate-Scale Quantum
(NISQ) computers can only solve small-scale ones. In this work,
we present an overview of various noise sources and their impact
on the resilience and the security of quantum circuits. Our
analysis indicates that noise sources (e.g., crosstalk) create a new
attack surface (e.g., fault injection), especially for future large-
scale quantum computers that may employ a multi-programming
compute model. We also propose countermeasures against the
reliability and security issues.
Index Terms—Quantum computing, resilience, security
I. I NTRODUCTION
Quantum computers have generated excitement in a diverse
set of communities by offering promises to solve computation-
ally intractable problems. Some examples include material and
drug discovery, database search, chemistry [1], and machine
learning [2]. Companies such as Google have demonstrated
quantum advantage with their 53-qubit superconducting qubit
based quantum processor [3]. Despite all the promises and
potentials, quantum computers are still in infancy. Existing
Noisy Intermediate-Scale Quantum (NISQ) [4] era computers
have limited qubit connectivity. Besides, the qubits are noisy
and have a short lifetime.
Various orthogonal approaches are proposed to solve the
noise issue. First, qubits and gate operations can be made
more robust and accurate from a fabrication and control
perspective. Second, Quantum Error Correction (QEC) can
fix errors. However, in existing devices with a few qubits,
applying QEC is not practical. Hybrid algorithms can use these
NISQ machines without QEC where a quantum and a classical
processor work in tandem to optimize the parameters of a
Parameterized Quantum Circuit (PQC) [1], [5]–[7]. In [8]–
[12], the authors studied resilience of a variational algorithm,
The work is supported in parts by National Science Foundation (NSF)
(CNS-1722557, CCF-1718474, OIA-2040667, DGE-1723687 and DGE-
1821766) and seed grants from Penn State Institute for Computational and
Data Sciences and Penn State Huck Institute of the Life Sciences.
978-1-7281-7641-3/21/$31.00 ©2021 IEEE 186
Authorized licensed use limited to: Univ of Calif Santa Barbara. Downloaded on June 23,2021 at 07:31:15 UTC from IEEE Xplore. Restrictions apply.
Swaroop Ghosh
Electrical Engineering
Pennsylvania State University
University Park, PA, USA
szg212@psu.edu
namely, quantum approximate optimization algorithm (QAOA)
under noise, and proposed compilation techniques to achieve
better resilience. Ref [13] investigated the resiliency of various
quantum factoring algorithms. In [14], authors utilized a hy-
brid quantum-classical approach to counteract noise in NISQ
based true random number generator. These are few works to
achieve noise resiliency through parameter optimization.
The research community is exploring other software tech-
niques such as mapping to squeeze performance out of these
NISQ devices for useful applications. Mapping of quantum
circuits, i.e., allocating logical qubits to physical hardware
qubits, is necessary to address the connectivity issues of the
NISQ devices. The existing mapping techniques (e.g., [15])
formulate the problem to minimize the additional SWAP gate-
count to resolve the connectivity issue. Besides gate-count,
reducing the circuit depth is necessary to address the short
qubit lifetime or decoherence. Existing quantum computers
exhibit qubit-to-qubit variation in terms of error-rates (e.g.,
gate-error, readout error). Techniques such as Variation-Aware
Allocation [16] exploit these variations and map operations to
less noisy qubits to improve the program success probability.
Recent works also address readout error and crosstalk. Ref [17]
included the readout error in the noise-adaptive mapping flow
by defining weighted gate-error and readout-error in the cost
function. The work in [18] addresses crosstalk by serializing
selected gate operations in a mapped circuit. The work in
[19] proposes to fuse outcomes of different mappings of the
same circuit to filter out dissimilar errors and improve the
inferencing strength of a quantum-circuit.
Considering the scaling trend of current NISQ computers,
hardware architectures with more than 200-1000 qubits will
become a reality in less than 5-years. Therefore, parallel
execution of multiple programs is proposed in [20] to max-
imize hardware utilization. However, programs concurrently
running on the same hardware in a multi-programming scheme
suffer from crosstalk noise that introduces two issues. First,
it degrades program fidelity, and second, it creates security
vulnerabilities.
Therefore, the noise in NISQ devices has a significant
impact on security and resiliency. In this paper, we present
security vulnerabilities in NISQ devices along with design for
22nd Int'l Symposium on Quality Electronic Design
 uWave pulses
1
Gate error
2 applied on qubit-1 and 2 of IBMQX2 (Fig. 1) but cannot be
decoherence
uWave
uWave
4 lines
lines
Q3 Q4
Readout 1
Qubit
error Q2
0 2
Q1 Q0
3 4
crosstalk Qubit
Fig. 1: Diagram of a 5 qubit quantum computer from IBM. The
boxes are the superconducting qubits and the zigzag lines are
wave-guides that carry the gate and readout microwave pulses.
Various errors are annotated. The coupling graph (IBMQX2)
is also shown on the right.
resiliency and security considerations.
Contributions: We, (i) review various sources of noise
in NISQ computers; (ii) present two security vulnerabilities:
crosstalk induced fault injection and readout error dependent
information leakage attack models; (iii) describe program
isolation to mitigate the security threat and qubit reallocation
for resilience.
The following is the outline of the rest of the paper:
Section II discusses the basics of quantum computing. Sec-
tion III reviews various noise sources. Section IV discusses
security vulnerabilities. Section V presents techniques to han-
dle resilience and security issues. Finally, Section VI draws
conclusion.
II. BASICS OF Q UANTUM C OMPUTING
Qubits: Qubit is the building block of a quantum processor.
It is a two-level system that stores data as quantum states.
Qubits have unique properties like superposition, entangle-
ment, and interference. For example, the amplitude of a
qubit state can be both negative and positive. Thus, quantum
algorithms can tailor the gate operations to either cancel out
or amplify particular states using quantum interference. These
properties are at the core of quantum advantage.
Quantum gates: Quantum gates are operations that mod-
ulate the data (current state) of a qubit to perform desired
computation. Unlike classical logic gates, quantum gates are
not physical. Instead, they are realized using pulses. For
superconducting qubits (used in IBM machines), the pulse is
electromagnetic (radio-frequency). Fig. 1 shows a diagram of
a 5-qubit IBM quantum processor (IBMQX2). Intuitively, the
gate pulses induce a varied amount of rotation (depends on
pulse amplitude, duration, and shape) along different axes in
the Bloch sphere.
In existing systems, only a handful of native gates or basis
gates are possible. For IBM systems, the basis gates are single-
qubit: U1, U2, U3, and ID, and 2-qubit: CNOT. Any non-
native gate in a quantum circuit is decomposed using the native
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gates. The native 2-qubit gate can only be applied on qubits
that have an edge in the graph. For instance, CNOT can be
applied between qubit-1 and 3. This limited connectivity is
known as coupling constraints.
Variational circuits or Parameterized Quantum Circuits:
Parameterized Quantum Circuits (PQC), composed of a set
of parameterized single and controlled single-qubit gates, is
known to be resilient to errors [1], [5], [21]. A classical
3
optimizer iteratively optimizes the parameters to obtain a
desired input-output relationship. For example, a low-depth
variational algorithm [7] is used for supervised learning. It
encodes the input classical feature vectors into the amplitudes
of a quantum system. A PQC is then used to classify the
inputs.
Multi-programming: The multi-programming environment
in quantum computers [20] is similar to cloud-based servers in
the classical domain where programs from various users may
run on the same server simultaneously. Each program may use
different copies of computational blocks or the same block in
a time-multiplexed manner. Similarly, two quantum programs
can run simultaneously on two different sets of qubits in
quantum computers. The multi-programming model aims to
reduce the queue size and maximize hardware resource usage.
III. E RRORS IN NISQ COMPUTERS
A. Errors in qubit
Various errors annotated in Fig. 1 are described below:
1) Gate error: Gate errors are due to imperfect logical
operations. As mentioned earlier, quantum gates are realized
with pulses that can be imperfect. For example, consider
the RYπ/2 gate. Due to variation, the pulse intended for a
π/2 rotation may under or over-rotate the qubit. For existing
systems, the 2-qubit gate errors (e.g., CNOT error) is an order
of magnitude higher than the 1-qubit gate error. Quantum
circuit with more number of gates will accumulate more gate
error. Thus, one objective of compilation and error-tolerant
mapping is to reduce the number of gates.
2) Decoherence: Qubits may interact with the environment
and spontaneously lose their state. To illustrate the issue, we
show the effect of relaxation which one type of decoherence.
Due to this, a qubit in state 1 spontaneously loses energy
and ends up in state 0. Decoherence of a qubit is usually
characterized by T1 relaxation time and T2 dephasing time.
If the gate time is tg , then roughly 1 − exp(tg /T 1) is the
error probability. Thus, an error-tolerant mapping must try to
minimize the depth of the quantum circuit.
3) Readout or measurement error: The readout error is
the classical bit-flip error due to the imperfect measurement
circuitry. For example, say state 0 is prepared and measured
10000 times. Out of these 10000 trials, 9000 times it reads 0
and other 1000 times it reads 1. Thus, measurement error rate
M01 will be 1000/10000 = 0.1 (Mxy stands for probability of
reading out state ‘y’ while the prepared state is ‘x’). Readout
error is gate count agnostic and depends only on the state.

 
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Fig. 2: The trend of 1-qubit U3 gate error and T1 relaxation
time collected over 30 days period from ibmq vigo. The trend
clearly shows the error-rate varied over time. Moreover, the
mean values for different qubits do not coincide meaning there
are qubit-to-qubit variations.
4) Crosstalk: The gate pulse targeted for one qubit can
leak to a non-target qubit. This unintentional excitation can
be called ‘crosstalk’. A recent experimental study reveals that
crosstalk between parallel gates can increase gate-errors by
2X-3X [18]. In [22], authors show that including crosstalk
error in simulation matches experimental results closely prov-
ing the significant impact of crosstalk. Crosstalk introduces
a conflicting compilation decision. For example, maximizing
parallel operations reduce decoherence. However, it can intro-
duce more crosstalk.
B. Qubit-to-qubit variation in quality metrics
Fig. 2 shows error-rate variations among qubits in an IBM
quantum computer. The figures clearly show that some of the
qubits have a smaller error-rate compared to others. Thus,
utilizing qubits with a smaller error-rate to perform more
operations can be beneficial. Several works [16], [17], [23],
[24] leverage this spatial variability of qubit error-rates to
improve the error tolerance of a quantum program.
C. Temporal variation in quality metrics
Error-rates exhibit temporal variations i.e., the error-rates
tend to drift in time (Fig. 2). Quantum circuits like classifiers,
which are trained once and used multiple times, are heavily
affected by the temporal variation in qubit quality [25].
IV. I MPACT OF N OISE ON R ESILIENCE AND S ECURITY
A. Impact on Resilience
Fig.3 shows the simulated impact of noise on circuit
resilience [23]. Ideally, the output fidelity of the quantum
program is 1.0. Fidelity measures how close is the
 noisy output
is to the target output. It can be defined as (ρ1/2 σρ1/2 ).
Here, ρ is the ideal output density matrix, and σ is the output
with noise. However, when we simulate the QFT-3 benchmark
with various noise, it shows a varied drop from the ideal
value (Fig.3a) with 2-qubit CNOT gate-error causing the most
degradation. Fig. 3b shows the fidelity under noise for and
gate counts in several more benchmarks. The trend shows that
2-qubit gate-error is the dominant error type. The results also
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Fig. 3: (a) Fidelity distribution of QFT-3 benchmark under
different error sources in isolation. The distribution shows
that 2-qubit gate error is the dominant error source. (b) Mean
fidelity and gate counts for several benchmarks showing that
2-qubit gate error causes maximum loss in fidelity.
QV0
User A (victim) circuit
QV1
QA0
Xtalk
…
QA1
User B (aggressor) driving qubits to
introduce crosstalk error in victim qubits
Fig. 4: Conceptual diagram of the proposed fault injection
scheme [26]. The adversary can continually drive his/her
qubits with quantum gates (here, CNOT) to inject error in
victim’s outcome through crosstalk.
substantiate that noise adversely affects circuit performance or
resilience.
B. Impact on Security (Attack model-1: Fault injection)
The attack model assumes the adversary can run his/her
program on the same quantum hardware as the victim program.
A conceptual diagram of the attack is given in Fig. 4. The
adversary may be interested in launching a denial-of-service
(DoS) attack by corrupting the victim’s computational out-
come. It is appealing to the adversary as the victim’s compu-
tation may have substantial socio-economical significance. For
example, an engineered fault injection in the weather forecast
or financial portfolio optimization calculation can provide
Fig. 5: Experimental output probabilities of Grover–3 algo-
rithm from ibmqx2 (on Qubits–0,1,2). The probability of the
correct output degrades with increasing number of adversarial
CNOTs. After a certain number of CNOT, the victim cannot
infer the output with sufficient confidence.
 


 


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Fig. 6: (a) Coupling graph of 7 qubit ibmq casablanca. (b)-(e) Reading out 1 vs 0 has distinct crosstalk effect on the outcome
of neighboring qubit which can be exploited to leak information i.e., what data is being read at victim end.

an undue financial or political advantage to the adversary. Experimental validation: We experimentally demonstrate
The adversary is assumed to have the following capabilities: the attack on 7-qubit ibmq casablanca (Fig. 6a). We choose a
He/she, (i) has public information about the quantum computer pair of qubit on the device one of which runs the adversary
such as coupling map of the hardware; and (iii) can run several sensing circuit and another runs the victim circuit. The victim
copies of small quantum circuits. It enables the adversary to circuit is two types: (i) one puts the victim qubit at state “0”
more number of remaining qubits after the victim program and (ii) another puts the victim at state “1”. We use even
is allocated. Thus, it ensures at least one adversary circuit is (4) and odd (5) numbers of X gates in the victim circuits
strongly coupled to the victim circuit for fault injection. to generate states 0 and 1, respectively. In both cases, the
Analysis and experimental validation Fig. 5 shows the adversary sensing circuit contains only one X-gate. Fig. 6b–e
output probability variation for Grover–3 search algorithm plot the output distribution of the adversary qubit (count of
with a varied number of adversarial CNOT gates. Note that the 1 vs. count of 0) for the victim being 0 (red square) and 1
correct output for this circuit is ‘110’ (thick black line). The (solid black diamond). The figures clearly show that adversary
experimental results clearly show that state ‘110’ is prominent output distributions form distinct clusters for victim qubit 0
among other states without adversarial drive (or with a smaller and 1. These reference signatures can be used to classify an
drive). unknown victim output using statistical distance such as Total
Under a varying number of adversarial CNOT gates, the Variation Distance (TVD), Kullback-Leibler divergence, etc. If
state ‘110’ starts degrading. After ∼20 CNOTs, the probability it is closer to 0, then the victim output can be classified as 0
of ‘110’ drops below the probability of other states. At and vice versa.
this point, the correct result from Grover–3 search cannot V. D ESIGN FOR RESILIENCE AND SECURITY
be inferred with reasonable confidence. Here, the confidence
This section presents exemplary directions to address the
is defined as the ratio of the probability of correct output
resilience (both spatial and temporal) and security issues.
state and maximum probability among remaining output state.
Ideally, confidence should be as high as possible (at least A. Design for resilience
> 1.0). The gate error and readout error are rooted in the control
circuitry and the fabrication of qubits. The crosstalk errors
C. Impact on Security (Attack model-2: information leakage) are tied closely with the physical layout of and the coupling
strength among qubits. These topics are beyond the scope of
The readout of qubits shows state-dependent error prob- this paper. Instead, we focus on design automation techniques
abilities i.e., reading out 1 vs. 0 has asymmetric bit-flip to optimize the performance of quantum circuits in presence of
probabilities. Moreover, the error rates are correlated among constraints like spatial and temporal variation of qubit quality
qubits. An adversary can exploit this property to sense a as described below.
victim’s output by reading out his/her qubits. The adversary’s 1) Addressing spatial variations: We exploit the physical
sensing circuit can consist of a single X (NOT) gate that will qubits with smaller error-rates to improve the program fidelity.
put the qubit in a “1” state. The adversary circuit will run in We start with a depth-optimal (SWAP-inserted and nearest-
parallel with a victim circuit for a set number of trials (also neighbor (NN)-compliant) version of a quantum circuit that
known as shots in IBM Q). Ideally, adversary output should can be generated using mapping techniques like [15]. The
always be 1. However, due to state-dependent readout error initial logical-to-physical qubit mapping of the circuit is
(and noise sources), it will not always be “1”. Example: If named initial mapping (IM ). The IM itself is a sub-graph
the adversary circuit prepared in state “1” is measured for of the coupling map of the quantum computer. There can
8192 shots, it may generate the following distribution of 1s be multiple isomorphic sub-graphs (ISG) of the IM in the
and 0s {“1”: 7000, “0”: 1192}. This output distribution of the parent graph. The circuit can be mapped to any of these sub-
adversary will be different for the victim being “0” and “1”. graphs without any modification or gate insertion. Since gate-
This dependence leaks a signature of the victim state. error varies from qubit-to-qubit, some ISGs may be better

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Fig. 7: Finding ISGs for a hypothetical workload on 15-qubit ibmq 16 melbourne.
in terms of fidelity than others. Finding all the ISGs is NP-
complete [27] problem and can be intractable for larger qubit
systems. However, quantum hardware developed so far shows
some regularities in their coupling graph [23]. Major vendors
fabricate superconducting qubits in a regularized structure for
scalability e.g., IBM’s 15-qubit (ibmq 16 melbourne) and 20-
qubit (e.g., ibmq tokyo) chips placed their qubits on the nodes
of 2x8 and 4x5 lattices, respectively [28]. These regularities
can be exploited to reduce the time and space complexity of
finding the ISGs. The steps are described with an example
in Fig. 7. For instance, consider a hypothetical workload that
can initially be mapped to physical qubits p0, p1, p2, and p13
of ibmq 16 melbourne (Fig. 7a). Fig. 7b shows the extracted
rectangular (H) grid with two dummy qubits that are not a
part of the original workload. Next, the H-grid is slid over
the parent graph to generate new grids or sub-graphs. Inside
each H-Grid, the given workload can be mapped in at least 4
different ways as shown in Fig. 7c. The above steps generate
a pool of ISGs from which the best need to be selected in
terms of program fidelity. For Fig. 7 this sliding and mirroring
generates 20 sub-graphs. The proposed approach offers a
trade-off between scalability and the theoretically best solution
as it does not search ISGs exhaustively. The best NISG can be
picked using the approximate equation SP = i=1 (1 − i ).
Here, SP denotes the probability of success, N = total number
of gate operations, and i is the error-rate of the ith gate
operation. The ISG with the highest SP should be used.
2) Addressing temporal variations: Noise in quantum
computers changes temporally [25]. A circuit optimized on
a day may perform poorly at a later stage. In practical appli-
cations, we may need to reuse a quantum circuit frequently,
e.g. a trained quantum classifier may be used later to perform
classification tasks. In this section, we review two recent
proposals to address temporal variations in qubits for noise-
resilient computation.
Just-in-time Compilation: This technique [29] resembles
just-in-time (JIT) compilation techniques in classical compu-
tation that manipulate the knowledge of the run-time envi-
ronment for program speed-up. In this approach, the quantum
program is compiled just before execution with the most recent
noise calibration data of the target hardware using the existing
noise-resilient compilation techniques. The authors reported
≈3X improvement in circuit reliability on average.
Noise-aware Training of PQC: PQC is used in most near-
term quantum algorithms e.g., Quantum Generative Adversar-
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Fig. 8: Inference performance of a 4-bit parity classifier
(trained with three different approaches) on IBMQX4 [25].
ial Network (QGAN), Quantum Neural Network (QNN), etc.
Any application involving these algorithms has two distinct
phases: (i) the training phase, and (ii) the inference phase.
Training can be done entirely in a classical computer (with a
quantum simulator) or a hybrid environment (a quantum and
a classical processor working in a loop) [25]. Due to scarce
quantum computing resources, training in a fully classical
environment can be an attractive option as training is expected
to be done once.
During training, we may neglect any device noises (app-01)
or we can model device noises with appropriate noise channels
(app-02) [25]. If we take the most recent noise calibration data
(app-02:a), the trained circuit may be optimized for the current
noise levels. It may perform poorly at a later stage when the
noise level changes. In [25], we proposed to use the average
value of the noise parameters collected over a large number
of calibration runs (app-02:b). A 4-bit parity classifier PQC
was trained with app-01, app-02:a, and app-02:b. Hardware
experiments on IBMQX4 showed that, although the app-02:b
(NoisyAVG in Fig. 8) fared poorly over app-02:a when the
trained circuit was executed on the hardware at the end of
the training phase (Noisy in Fig. 8) in terms of the ratio of
correct and incorrect measured output over 1024 samples, it
performed better than app-02:a when the circuit was executed
on a different day (NoisyDD in Fig. 8). Both approach fared
better than app-01 (Pure in Fig. 8).
B. Design for security
In this section, we discuss a countermeasure for crosstalk-
induced fault injection. Introducing isolation/buffer qubits be-
tween user programs can minimize the impact of crosstalk
and can thwart fault injection attacks. This is illustrated
experimentally with an example on ibmq 16 melbourne.

 [9] M. Alam, A. Ash-Saki, J. Li, A. Chattopadhyay, and S. Ghosh, “Noise
     resilient compilation policies for quantum approximate optimization
  algorithm,” in 2020 IEEE/ACM International Conference On Computer
 
!"#
Aided Design (ICCAD), 2020, pp. 1–7.
 [10] M. Alam, A. Ash-Saki, and S. Ghosh, “Circuit compilation method-
ologies for quantum approximate optimization algorithm,” in 2020
53rd Annual IEEE/ACM International Symposium on Microarchitecture
(MICRO), 2020, pp. 215–228.
 [11] M. Alam, A. A. Saki, and S. Ghosh, “An efficient circuit compilation
flow for quantum approximate optimization algorithm,” in 2020 57th
ACM/IEEE Design Automation Conference (DAC), 2020, pp. 1–6.

[12] M. Alam, A. Ash-Saki, and S. Ghosh, “Accelerating quantum approx-

 
 
 
imate optimization algorithm using machine learning,” in Proceedings
 

 of the 23rd Conference on Design, Automation and Test in Europe, ser.
Fig. 9: Adding buffer qubit can minimize fault-injection. With
buffer qubit, the program confidence remains generally higher
than the case with no-buffer qubit.
Suppose, the user–1 program is allocated to
{p0,p1,p13,p14}. Now, there are two options to allocate
a 2nd program on the hardware: (i) without buffers qubits
and (ii) with buffer qubits. In option–1, the 2nd program will
be allocated to neighboring qubits {p2, p12} so that two user
programs are next to each other. In option–2, however, the
user–2 program will be allocated to {p3, p11} leaving {p2,
p12} unallocated to any program (i.e., buffer qubits).
Fig. 9 shows the experimental confidence trend for these two
options. In option–1 (without buffer qubits) confidence drops
below 1.0 for many cases. However, in scenario–2 (with buffer
qubits) confidence remains above 1.0. The trend shows that the
implementation with buffer qubits provides higher reliability
(up to 1.87x). However, it incurs overhead in terms of few
used qubits in the device.
VI. C ONCLUSION
Various error sources reduce the computing power of quan-
tum computers. We presented an overview of these error
sources and described the mapping/compilation technique to
minimize the impact of errors. We also discussed emerging se-
curity threats on quantum computers in a multi-programming
environment and discussed countermeasures.
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