Basic Electronics IIES

Basic Electronics
Training Material
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Basic Electronics
Semiconductor —I
• Materials that permit flow of electrons are called conductors
(e.g., gold, silver, copper, etc.).
• Materials that block flow of electrons are called insulators
(e.g., rubber, glass, Teflon, mica, etc.).
• Materials whose conductivity falls between those of conductors and insulators are
called semiconductors.
• Semiconductors are “part-time” conductors whose conductivity can be controlled.
Semiconductor —II
• Silicon is the most common material used to build semiconductor devices.
• Si is the main ingredient of sand and it is estimated that a cubic mile of seawater
contains 15,000 tons of Si.
• Si is spun and grown into a crystalline structure and cut into wafers to make electronic
devices.
Semiconductor —III
• Atoms in a pure silicon wafer contains four electrons in outer orbit (called valence
electrons).
– Germanium is another semiconductor material with four valence electrons.
• In the crystalline lattice structure of Si, the valence electrons of every Si atom are
locked up in covalent bonds with the valence electrons of four neighboring Si atoms.
– In pure form, Si wafer does not contain any free charge carriers.
– An applied voltage across pure Si wafer does not yield electron flow through the
wafer.
– A pure Si wafer is said to act as an insulator.
• In order to make useful semiconductor devices, materials such as phosphorus (P) and
boron (B) are added to Si to change Si’s conductivity.
Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

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Fig 1
N-Type Silicon
• Pentavalent impurities such as phosphorus, arsenic, antimony, and bismuth have 5 valence electrons.
• When phosphorus impurity is added to Si, every phosphorus atom’s four valence electrons are locked
up in covalent bond with valence electrons of four neighboring Si atoms. However, the 5th valence
electron of phosphorus atom does not find a binding electron and thus remains free to float. When a
voltage is applied across the silicon-phosphorus mixture, free electrons migrate toward the positive
voltage end.
• When phosphorus is added to Si to yield the above effect, we say that Si is doped with phosphorus.
The resulting mixture is called N-type silicon (N: negative charge carrier silicon).
• The pentavalent impurities are referred to as donor impurities.
Fig 2

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P-Type Silicon I
• Trivalent impurities e.g., boron, aluminum, indium, and gallium have 3 valence electrons.
• When boron is added to Si, every boron atom’s three valence electrons are locked up in covalent bond
with valence electrons of three neighboring Si atoms. However, a vacant spot “hole” is created within
the covalent bond between one boron atom and a neighboring Si atom. The holes are considered to be
positive charge carriers. When a voltage is applied across the silicon-boron mixture, a hole moves toward
the negative voltage end while a neighboring electron fills in its place.
• When boron is added to Si to yield the above effect, we say that Si is doped with boron. The resulting
mixture is called P-type silicon (P: positive charge carrier silicon).
• The trivalent impurities are referred to as acceptor impurities.
Fig 3
P-Type Silicon —II
• The hole of boron atom points towards the negative terminal.
• The electron of neighboring silicon atom points toward positive terminal.
• The electron from neighboring silicon atom falls into the boron atom filling the hole in boron atom and
creating a “new” hole in the silicon atom.
• It appears as though a hole moves toward the negative terminal!
Analog Electronics: Branch of engineering where we deal with continuous

Signals.
Example: Current, Voltage, Temperature, humidity etc.
Passive Components: Passive components are one which consumes power, that
Means there is always IR drop will be there.
Example: Resistor, capacitor and inductor.
Active Components: Active components are one which will amplify are pass the
Signal as it is. Power dissipation will be less.

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Example: Transistor, op-Amps etc.
Passive Components
Resistor(R): Element which opposes the flow of current through it. Therefore there is
always a voltage drop across the resistor. Therefore power consumption
is more. The property of resistor is known as Resistance.
So resistance is given by R α L/A
Where R= Resistance of a material.
L= Length of the material.
A= Area of the material.
Resistors can be connected in series or parallel in an electrical network.
Electrical network is one which consists of circuit elements connected in different fashion that forms a
closed loop.
Resistors in series: When resistors are connected in series the current through resistors is same but
voltage across it will be different.
If 3 resistors say R1, R2 and R3 are connected in series as shown below,
the effective resistance will be Requ= R1+R2+R3.
Fig 4
Resistors in parallel: Current through each resistor will be different but voltage across the resistors
will be same.
If they are connected in parallel as below then the effective resistance will be
Requ=1/R1+1/R2+1/R3.

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Fig 5
Capacitors(C): Which stores energy in the form of electric field. It has two terminals. The property of
the capacitor is known as capacitance.
Capacitance is given by C α A/D.
C= Capacitance.
A= Area of plates.
D= Distance between the plates
Capacitors in series: If 3 capacitors in series as shown below then effective capacitance will be
Cequ=1/C1+1/C2+1/C3.
Fig 6
Capacitors in parallel: If 3 capacitors in parallel as shown below then effective capacitance will be
Cequ= C1+C2+C3.
Fig 7
Types of capacitors:
1) Polarized capacitor

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2) Non-polarized capacitor
Polarized capacitor: Having implicit polarity.it can only be connected in one way in a circuit.
Ex: Electrolytic capacitors
Non-polarized capacitor: Capacitors with no polarity. It can be connected in either way.
Ex: Ceramic Capacitors.
Inductors (L): Element which stores the energy in the form of Magnetic field.
Inductors are also called as coil or choke.
Power consumption is less compared to resistors.
Sometimes we can replace resistors with inductors, particularly in filter
applications where we need less power consumption.
The property of the inductor is known as Inductance and denoted by L
L α N2A/l (for air core)
Where N= number of turns.
A= Cross section area.
l= length of the coil.
Inductors in Series: If 3 inductors connected in series as shown below then
effective inductance will be Lequ=L1+L2+L3
Fig 8
Inductors in Parallel: If 3 inductors connected in parallel then effective
inductance will be Lequ=1/L1+1/L2+1/L3

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Fig 9
RC, RL and RLC circuits: The above 3 components in different combinations

form RC,RL and RLC circuits.
Applications: Filtering circuits, chokes, multivibrator, oscillators etc.
RC circuit: Let us consider a resistor and capacitor connected in series with a power supply as shown
below.
Fig 10
Assume initially voltage across both resistor and capacitor is zero, when the switch is opened.
When the switch is closed capacitor initially opposes the change in voltage so the voltage across
capacitor is zero and voltage across resistor is maximum.

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When the time (t= rc) goes of the capacitor allows the current to flow through it so voltage start building
across it and voltage across resistor starts decreasing. When the capacitor is fully charged the voltage
across resistor will be zero. Wave form is shown below.
Fig 11
RL circuit: Let us consider resistor and inductor are connected in series as shown
below
Fig 12
As soon as the switch is closed the voltage across the resistive load is increases
exponentially because inductor initially opposes the change in current. Once the current
reaches this maximum steady state value at 5τ, the inductance of the coil has reduced to
zero acting more like a short circuit and effectively removing it from the circuit.
The waveforms are as shown below.

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Fig 13
RLC circuit:
Fig 14
The series RLC circuit above has a single loop with the instantaneous current flowing
through the loop being the same for each circuit element. Since the inductive and
capacitive reactance’s XL and XC are a function of the supply frequency, the sinusoidal
response of a series RLC circuit will therefore vary with frequency, ƒ. Then the individual
voltage drops across each circuit element of R, L and C element will be “out-of-phase”
with each other as shown below.

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Fig 15

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Kirchhoff’s voltage law (KVL):

It states that “The algebraic sum of all the voltages (source voltage and voltage drops) is
equal to zero around a closed path”.
Ex:
Fig 16
Kirchhoff’s current law (KCL):
It states that “In an electrical network current entering the node is equal to current
leaving the node”
Ex:
Fig 17
Thevenin’s theorem:

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It states that “Any linear circuit containing several voltages and resistances can be
replaced by just one single voltage in series with a single resistance onnected across the
load”.
Ex:
Fig 18
Step1:Open the 5kΩ load resistor
Step2:Calculate / measure the open circuit voltage. This is the Thevenin Voltage (VTH)
Step3:Open current sources and short voltage sources as shown below.

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Step4:Calculate / measure the open circuit resistance. This is the Thevenin Resistance
(RTH)
Step5:Connect the RTHin series with Voltage Source VTH and re-connect the load
resistor.i.e. Thevenin circuit with load resistor. This the Thevenin’s equivalent circuit.
Step6:Now apply the last step i.e Ohm’s law . Calculate the total load current & load
voltage.

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Answer:
Norton’s theorem:
It states that “Any linear circuit containing several energy sources and resistances can be replaced by a
single constant current generator in parallel with a single resistor”.
Ex:

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Fig 19
Step1: Short the 1.5Ω load resistor
Step2:Calculate / measure the Short Circuit Current. This is the Norton Current (IN)
Step3:Open Current Sources, Short Voltage Sources and Open Load Resistor
Step4:Calculate /measure the Open Circuit Resistance. This is the Norton Resistance
(RN)

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Step5:Connect the RN in Parallel with Current Source INand re-connect the load resistor.this is
Norton Equivalent circuit with load resistor.
Step6:Now apply the last step i.e. calculate the load current through and Load voltage across
load resistor by Ohm’s Law
Answer:

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Maximum Power transfer theorem (MPT):

It states that “Maximum power is transferred to the load from the source when the load resistance is
equal to source resistance”.
Superposition theorem:
It states that “In a linear circuit with several sources, the current and voltage for any element in the
circuit is the sum of the currents and voltages produced by each source acting independently”.
Ex:
Fig20
Step1: Since we have two sources of power in this circuit, we will have to calculate two sets of values
for voltage drops and/or currents, one for the circuit with only the 28-volt battery in effect.

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Step2: circuit with only the 7-volt battery in effect
Step3: Analyzing the circuit with only the 28-volt battery.
Step4:Analyzing the circuit with only the 7-volt battery.

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Step5:superimposing these values of voltage and current, we have to be very careful to consider polarity
(of the voltage drop) and direction (of the current flow), as the values have to be added algebraically.
Step6:Currents add up algebraically as well and can either be superimposed as done with
the resistor voltage drops or simply calculated from the final voltage drops and respective resistances
(I=E/R). Either way, the answers will be the same. Here I will show the superposition method applied
to current.
Step7:Once again applying these superimposed figures to our circuit.

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DIODES
Diodes: As the name indicates, Di means two; it is having two electrodes, Anode and
cathode. It conducts current only in one direction.
Symbol:
Fig 21
Bias: Application of the proper voltage for the operation of the diode.
Circuit diagram:
Forward bias: Where anode is connected to positive terminal of the supply and cathode is connected to
negative terminal of the supply. When it is forward biased diode is on and acts as a closed switch.

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Fig 22
Reverse bias: Where anode is connected to negative terminal of the supply and cathode is connected
to positive terminal of the supply. When it is reverse biased diode is off and acts as an open switch.
Fig 23
Fig 24
VI Characteristics of Diode:

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Fig 25
Applications
1) Switch(on/off)
2) Wave shaping circuits (Clippers and Clampers).
3) Rectifier (AC to DC).
Clippers: It is a wave shaping circuit which removes either positive half or negative half or both
halves together of the input wave.
Positive clipper: Removes the positive half of the input signal.
Ex:
Fig 26
Negative clipper: Removes the negative half of the input signal.
Ex:

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Fig 27
Double ended clipper: Removes both the halves of the input signal.
Ex:
Fig 28
Biased Clippers: Instead of removing the entire positive or negative or both halves completely it will
remove part of positive or negative or both halves of the input.

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Fig 29
Clampers: It is a circuit that consists of a diode, resistor and a capacitor which shifts the waveform to
a desired DC level without changing the actual appearance of the applied signal.
Positive clamper: Circuit which places the signal above the reference (positive side)
Ex:
Fig 30
Negative Clamper: Circuit which places the signal below the reference (negative side)
Ex:
Fig 31
Rectifiers: Diodes can also be used as rectifiers to convert input AC to pulsating DC.
Types:
1) Half Wave Rectifier
•Diode converts ac input voltage to a pulsed dc output voltage.
•Whenever the ac input becomes negative at diode’s anode, the diode blocks current flow.
o/p voltage become zero.
•Diode introduces a 0.6V drop so o/p peak is 0.6V smaller than the i/p peak.
•The o/p frequency is same as the i/p frequency.

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Fig 32
2) Full Wave Rectifier
• A full-wave rectifier does not block negative swings in the i/p voltage, rather it transforms
them into positive swings at the o/p.
• To gain an understanding of device operation, follow current flow through pairs of diodes
in the bridge circuit.
• It is easily seen that one pair (D3-Rout-D2) allows current flow during the +ve half cycle of
Vin while the other pair (D4-Rout-D1) allows current flow during the -ve half cycle of Vin.
• o/p voltage peak is 1.2V below the i/p voltage peak.
• The o/p frequency is twice the i/p frequency.
Fig 33
•An AC2DC power supply is built using a transformer and a full-wave rectifier. •Transformer is used
to step down the voltage i/p.
•Rectifier converts AC to pulsed DC.
•A filter capacitor is used to smooth out the pulses.
•Capacitor must be large enough to store sufficient charge so as to provide a steady current supply to
the load.

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Filters:
A circuit which removes certain part of the input and allows the rest
Types:
1) Passive filters.
2) Active filters.
Passive filters:
Filter circuits which consists of only passive components such R,L and C and combination of
these.
Types:
1) Capacitor filter
2) Choke filter
3) Pi filter
Capacitor filter:
A typical capacitor filter circuit diagram is shown below. The designing of this circuit can be done
with a capacitor (C) as well as load resistor (RL). The rectifier’s exciting voltage is given across the
terminals of a capacitor.
Fig 34
Whenever the voltage of the rectifier enhances then the capacitor will be charged as well as supplies the
current to the load.
At the last part of the quarter phase, the capacitor will be charged to the highest rectifier voltage value
that is denoted with Vm, and then the voltage of the rectifier starts to reduce.
As this happens, the capacitor starts discharging through the voltage across it and load.
The voltage across the load will reduce little only because the next peak voltage occurs instantaneously
to charge the capacitor.

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This procedure will repeat many times and the output waveform will be seen that very slight ripple is
missing in the output.
Fig 35
Choke filter:
The below Fig. shows a typical choke input filter circuit. It consists of a Choke L connected in series
with the rectifier output and a filter capacitor C across the load. The pulsating output of the rectifier is
applied across terminals 1 and 2 of the filter circuit. As discussed before, the pulsating output of rectifier
contains a.c. and d.c. components. The choke offers high opposition to the passage of a.c. component
but negligible opposition to the d.c. component.
The result is that most of the a.c. component appears across the choke while whole of d.c. component
passes through the choke on its way to load. This results in the reduced pulsations at terminal 3.
Fig 36
Pi filter:
Pi filter consists of a shunt capacitor at the input side, and it is followed by an L-section filter. The
output from the rectifier is directly given across capacitor. The pulsating DC output voltage is filtered

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first by the capacitor connected at the input side and then by choke coil and then by another shunt
capacitor. The filters we have discussed in our previous articles are also efficient in removing AC ripples
from the output voltage of rectifier, but Pi filter is more efficient in removing ripples as it consists of
one more capacitor at the input side.
Fig37
Zener diode:
 A lightly doped diode has very high breakdown voltage.
 When ordinary crystal diode is properly doped so that it has a sharp breakdown voltage.
 So a properly doped crystal diode which has a sharp breakdown voltage is known as a
ZENER diode.
Symbol: VI characteristics:
Fig 39
Fig38
* When forward biased it is same as ordinary diode.

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* When reverse biased it is having sharp breakdown voltage as shown above.

* Therefore zener is always reverse connected.
Applications:
* Voltage Stabilizer
Zener diode as a voltage regulator:
Fig 40
A zener diode can be used as a voltage regulator to provide a constant voltage from a source whose
voltage may vary over sufficient range. The circuit arrangement is shown in Fig above
The zener diode of zener voltage Vz is reverse connected across the load RL across which constant output
is desired. The series resistance R absorbs the output voltage fluctuations so as to maintain constant
voltage across the load. It may be noted that the zener will maintain a constant voltage Vz (= E0) across
the load so long as the input voltage does not fall below Vz

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Fig 41
• Case 1:Suppose the input voltage increases. Since the zener is in the breakdown region, the
zener diode is equivalent to a battery VZ as shown in Fig 35.
• It is clear that output voltage remains constant at VZ (= E0).
• The excess voltage is dropped across the series resistance R.
• This will cause an increase in the value of total current I.
• The zener will conduct the increase of current in I while the load current remains constant.
• Hence, output voltage E0 remains constant irrespective of the changes in the input voltage Ei.
• Case2: Now suppose that input voltage is constant but the load resistance RL decreases.
• This will cause an increase in load current.
• The extra current cannot come from the source because drop in R (and hence source current I)
will not change as the zener is within its regulating range.
• The additional load current will come from a decrease in zener current IZ. Consequently, the
output voltage stays at constant value.
Transistors
• A three lead semiconductor device that acts as: – an electrically controlled switch, or – a
current amplifier.
• Transistor is analogous to a faucet. – Turning faucet’s control knob alters the flow rate of water
coming out from the faucet.
• A small voltage/current applied at transistor’s control lead controls a larger current flow
through its other two leads.
Transistor

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The Transistor is a three terminal solid state device which is formed by connecting two diodes back to
back. Hence it has got two PN junctions. Three terminals are drawn out of the three semiconductor
materials present in it. This type of connection offers two types of transistors. They
are PNP and NPN which means an N-type material between two Ptypes and the other is a P-type material
between two N-types respectively.
Emitter
 The left hand side of the above shown structure can be understood as Emitter.
 This has a moderate size and is heavily doped as its main function is to supply a number
of majority carriers, i.e. either electrons or holes.
 As this emits electrons, it is called as an Emitter.
 This is simply indicated with the letter E.
Base
 The middle material in the above figure is the Base.
 This is thin and lightly doped.
 Its main function is to pass the majority carriers from the emitter to the collector.
 This is indicated by the letter B.
Collector
 The right side material in the above figure can be understood as a Collector.
 Its name implies its function of collecting the carriers.
 This is a bit larger in size than emitter and base. It is moderately doped.
 This is indicated by the letter C.
 the symbols of PNP and NPN transistors are as shown below.

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 The arrow-head in the above figures indicated the emitter of a transistor. As the collector of a
transistor has to dissipate much greater power, it is made large. Due to the specific functions of
emitter and collector, they are not interchangeable. Hence the terminals are always to be kept
in mind while using a transistor
Transistor Biasing
As we know that a transistor is a combination of two diodes, we have two junctions here. As one
junction is between the emitter and base, that is called as Emitter-Base junction and likewise, the other
is Collector-Base junction.
Biasing is controlling the operation of the circuit by providing power supply. The function of both the
PN junctions is controlled by providing bias to the circuit through some dc supply. The figure below
shows how a transistor is biased/

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 The N-type material is provided negative supply and P-type material is given positive supply to
make the circuit Forward bias.
 The N-type material is provided positive supply and P-type material is given negative supply to
make the circuit Reverse bias.
By applying the power, the emitter base junction is always forward biased as the emitter resistance
is very small. The collector base junction is reverse biased and its resistance is a bit higher. A small
forward bias is sufficient at the emitter junction whereas a high reverse bias has to be applied at the
collector junction.
The direction of current indicated in the circuits above, also called as the Conventional Current, is the
movement of hole current which is opposite to the electron current.
Operation PNP Transistor

The operation of a PNP transistor can be explained by having a look at the following figure, in which
emitter-base junction is forward biased and collector-base junction is reverse biased.
The voltage VEE provides a positive potential at the emitter which repels the holes in the P-type material
and these holes cross the emitter-base junction, to reach the base region. There a very low percent of
holes recombine with free electrons of N-region. This provides very low current which constitutes the
base current IB. The remaining holes cross the collector-base junction, to constitute collector current IC,
which is the hole current.
As a hole reaches the collector terminal, an electron from the battery negative terminal fills the space
in the collector. This flow slowly increases and the electron minority current flows through the emitter,

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where each electron entering the positive terminal of VEE, is replaced by a hole by moving towards the
emitter junction. This constitutes emitter current IE.
Hence we can understand that −
 The conduction in a PNP transistor takes place through holes.

 The collector current is slightly less than the emitter current.
 The increase or decrease in the emitter current affects the collector current.
Operation NPN Transistor

The operation of an NPN transistor can be explained by having a look at the following figure, in which
emitter-base junction is forward biased and collector-base junction is reverse biased.
The voltage VEE provides a negative potential at the emitter which repels the electrons in the N-type
material and these electrons cross the emitter-base junction, to reach the base region. There a very low
percent of electrons recombine with free holes of P-region. This provides very low current which
constitutes the base current IB. The remaining holes cross the collector-base junction, to constitute the
collector current IC.
As an electron reaches out of the collector terminal, and enters the positive terminal of the battery, an
electron from the negative terminal of the battery VEE enters the emitter region. This flow slowly
increases and the electron current flows through the transistor.
Transistor biasing
The supply of suitable external dc voltage is called as biasing. Either forward or reverse biasing is done
to the emitter and collector junctions of the transistor. These biasing methods make the transistor circuit

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to work in four kinds of regions such as Active region, Saturation region, Cutoff region and Inverse
active region
Active region
This is the region in which transistors have many applications. This is also called as linear region. A
transistor while in this region, acts better as an Amplifier.
This region lies between saturation and cutoff. The transistor operates in active region when the emitter
junction is forward biased and collector junction is reverse biased. In the active state, collector current
is β times the base current, i.e.,
IC= collector current
β= current amplification factor
IB = base current

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Saturation region
This is the region in which transistor tends to behave as a closed switch. The transistor has the effect of
its collector and Emitter being shorted. The collector and Emitter currents are maximum in this mode
of operation.
The figure below shows a transistor working in saturation region.
The transistor operates in saturation region when both the emitter and collector junctions are forward
biased. As it is understood that, in the saturation region the transistor tends to behave as a closed switch,
we can say that,
IC=IE
Where IC = collector current and IE = emitter current.
Cutoff region
This is the region in which transistor tends to behave as an open switch. The transistor has the effect of
its collector and base being opened. The collector, emitter and base currents are all zero in this mode of
operation.
The following figure shows a transistor working in cutoff region.

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Common Base CB Configuration

The name itself implies that the Base terminal is taken as common terminal for both input and output
of the transistor. The common base connection for both NPN and PNP transistors is as shown in the
following figure.
For the sake of understanding, let us consider NPN transistor in CB configuration. When the emitter
voltage is applied, as it is forward biased, the electrons from the negative terminal repel the emitter
electrons and current flows through the emitter and base to the collector to contribute collector current.
The collector voltage VCB is kept constant throughout this.
In the CB configuration, the input current is the emitter current IE and the output current is the collector
current IC.
Common Collector CC Configuration

The name itself implies that the Collector terminal is taken as common terminal for both input and
output of the transistor. The common collector connection for both NPN and PNP transistors is as
shown in the following figure.

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Just as in CB and CE configurations, the emitter junction is forward biased and the collector junction
is reverse biased. The flow of electrons is controlled in the same manner. The input current is the base
current IB and the output current is the emitter current IE here.
Common Emitter CE Configuration

The name itself implies that the Emitter terminal is taken as common terminal for both input and output
of the transistor. The common emitter connection for both NPN and PNP transistors is as shown in the
following figure.
Just as in CB configuration, the emitter junction is forward biased and the collector junction is reverse
biased. The flow of electrons is controlled in the same manner. The input current is the base
current IB and the output current is the collector current IC here.
Current Amplification Factor α

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The ratio of change in collector current ΔIC to the change in emitter current IE when collector
voltage VCB is kept constant, is called as Current amplification factor. It is denoted by α.
Base Current Amplification factor ββ
The ratio of change in collector current $ΔIC$$ΔIC$ to the change in base current $ΔIB$$ΔIB$ is
known as Base Current Amplification Factor. It is denoted by β
Relation between β and α
Knee Voltage
In CE configuration, by keeping the base current IB constant, if VCE is varied, IC increases nearly to 1v
of VCE and stays constant thereafter. This value of VCE up to which collector current IC changes
with VCE is called the Knee Voltage. The transistors while operating in CE configuration, they are
operated above this knee voltage.
Characteristics of CE Configuration
 This configuration provides good current gain and voltage gain.
 Keeping VCE constant, with a small increase in VBE the base current IB increases rapidly than in
CB configurations.
 For any value of VCE above knee voltage, IC is approximately equal to βIB.
 The input resistance ri is the ratio of change in base emitter voltage VBE to the change in base
current IIB$ at constant collector emitter voltage VCE.

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 As the input resistance is of very low value, a small value of VBE is enough to produce a large
current flow of base current IB.
Common Emitter Connection (or CE Configuration)
Definition: The configuration in which the emitter is connected between the collector and base is known
as a common emitter configuration. The input circuit is connected between emitter and base, and the
output circuit is taken from the collector and emitter. Thus, the emitter is common to both the input and
the output circuit, and hence the name is the common emitter configuration. The common emitter
arrangement for NPN and PNP transistor is shown in the figure below.

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Base Current Amplification Factor (β)

The base current amplification factor is defined as the ratio of the output and input current in a common
emitter configuration. In common emitter amplification, the output current is the collector current IC, and
the input current is the base current IB.
In other words, the ratio of change in collector current with respect to base current is known as the base
amplification factor. It is represented by β (beta).
Relation Between Current Amplification Factor (α) & Base Amplification Factor (β)
The above equation shows that the when the α reaches to unity, then the β reaches to infinity. In other
words, the current gain in a common emitter configuration is very high, and because of this reason, the
common emitter arrangement circuit is used in all the transistor applications.
Characteristics of Common emitter (CE) Configuration

The characteristic of the common emitter transistor circuit is shown in the figure below. The base to
emitter voltage varies by adjusting the potentiometer R1. And the collector to emitter voltage varied by
adjusting the potentiometer R2. For the various setting, the current and voltage are taken from the
millimeters and voltmeter. On the basis of these readings, the input and output curve plotted on the curve.

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Input Characteristic Curve

The curve plotted between base current IB and the base-emitter voltage VEB is called Input characteristics
curve. For drawing the input characteristic the reading of base currents is taken through the ammeter on
emitter voltage VBE at constant collector-emitter current. The curve for different value of collector-base
current is shown in the figure below.
The curve for common base configuration is similar to a forward diode characteristic. The base current
IB increases with the increases in the emitter-base voltage VBE. Thus the input resistance of the CE
configuration is comparatively higher that of CB configuration.
The effect of CE does not cause large deviation on the curves, and hence the effect of a change in VCE on
the input characteristic is ignored.
Input Resistance: The ratio of change in base-emitter voltage VBE to the change in base current ∆IB at
constant collector-emitter voltage VCE is known as input resistance, i.e.,

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Output Characteristic
In CE configuration the curve draws between collector current IC and collector-emitter voltage VCE at a
constant base current IB is called output characteristic. The characteristic curve for the typical NPN
transistor in CE configuration is shown in the figure below.
In the active region, the collector current increases slightly as collector-emitter VCE current increases.
The slope of the curve is quite more than the output characteristic of CB configuration. The output
resistance of the common base connection is more than that of CE connection.
The value of the collector current IC increases with the increase in VCE at constant voltage IB, the value
β of also increases.
When the VCE falls, the IC also decreases rapidly. The collector-base junction of the transistor always in
forward bias and work saturate. In the saturation region, the collector current becomes independent and
free from the input current IB
In the active region IC = βIB, a small current IC is not zero, and it is equal to reverse leakage current ICEO
The Common Emitter Configuration.
As well as being used as a semiconductor switch to turn load currents "ON" or "OFF" by controlling the
Base signal to the transistor in ether its saturation or cut-off regions, NPN Transistors can also be used
in its active region to produce a circuit which will amplify any small AC signal applied to its Base
44
terminal with the Emitter grounded. If a suitable DC "biasing" voltage is firstly applied to the transistors
Base terminal thus allowing it to always operate within its linear active region, an inverting amplifier
circuit called a single stage common emitter amplifier is produced. One such Common Emitter Amplifier
configuration of an NPN transistor is called a Class A Amplifier. A "Class A Amplifier" operation is
one where the transistors Base terminal is biased in such a way as to forward bias the Baseemitter
junction. The result is that the transistor is always operating halfway between its cut-off and saturation
regions, thereby allowing the transistor amplifier to accurately reproduce the positive and negative
halves of any AC input signal superimposed upon this DC biasing voltage. Without this "Bias Voltage"
only one half of the input waveform would be amplified. This common emitter amplifier configuration
using an NPN transistor has many applications but is commonly used in audio circuits such as pre-
amplifier and power amplifier stages. With reference to the common emitter configuration shown below,
a family of curves known as the Output Characteristics Curves, relates the output collector current, (Ic)
to the collector voltage, (Vce) when different values of Base current, (Ib) are applied to the transistor for
transistors with the same β value. A DC "Load Line" can also be drawn onto the output characteristics
curves to show all the possible operating points when different values of base current are applied. It is
necessary to set the initial value of Vce correctly to allow the output voltage to vary both up and down
when amplifying AC input signals and this is called setting the operating point or Quiescent Point,
Qpoint for short and this is shown below.
Single Stage Common Emitter Amplifier Circuit

45
Output Characteristics Curves for a Typical Bipolar Transistor
The most important factor to notice is the effect of Vce upon the collector current Ic when Vce is greater
than about 1.0 volts. We can see that Ic is largely unaffected by changes in Vce above this value and
instead it is almost entirely controlled by the base current, Ib. When this happens we can say then that
the output circuit represents that of a "Constant Current Source". It can also be seen from the common
emitter circuit above that the emitter current Ie is the sum of the collector current, Ic and the base current,
Ib, added together so we can also say that " Ie = Ic + Ib " for the common emitter configuration.
There are many types of transistors in use. Each transistor is specialized in its application. The main
classification is as follows.

46
Bipolar Junction Transistor

A Bipolar junction transistor, shortly termed as BJT is called so as it has two PN junctions for its
function. This BJT is nothing but a normal transistor. It has got two types of
configurations NPN and PNP. Usually NPN transistor is preferred for the sake of convenience.
Field Effect Transistor

An FET is a three-terminal unipolar semiconductor device. It is a voltage controlled device unlike a
bipolar junction transistor. The main advantage of FET is that it has a very high input impedance, which
is in the order of Mega Ohms. It has many advantages like low power consumption, low heat dissipation
and FETs are highly efficient devices.
The FET is a unipolar device, which means that it is made using either p-type or n-type material as
main substrate. Hence the current conduction of a FET is done by either electrons or holes.
Features of FET
The following are the varied features of a Field Effect Transistor.
 Unipolar − It is unipolar as either holes or electrons are responsible for conduction.

 High input impedance − The input current in a FET flows due to the reverse bias. Hence it has
high input impedance.
 Voltage controlled device − As the output voltage of a FET is controlled by the gate input
voltage, FET is called as the voltage controlled device.
 Noise is low − There are no junctions present in the conduction path. Hence noise is lower than
in BJTs.

47
 Gain is characterized as transconductance. Transconductance is the ratio of change in output

current to the change in input voltage.
 The output impedance of a FET is low.
JFET BJT
It is an unipolar device It is a bipolar device
Voltage driven device Current driven device
High input impedance Low input impedance
Low noise level High noise level
Better thermal stability Less thermal stability
Gain is characterized by trans-conductance Gain is characterized by voltage g
Applications of FET
 FET is used in circuits to reduce the loading effect.
 FETs are used in many circuits such as Buffer Amplifier, Phase shift Oscillators and Voltmeters.
FET Terminals
Though FET is a three terminal device, they are not the same as BJT terminals. The three terminals of
FET are Gate, Source and Drain. The Source terminal in FET is analogous to the Emitter in BJT,
while Gate is analogous to Base and Drain to Collector.
The symbols of a FET for both NPN and PNP types are as shown below

48
Source
 The Source terminal in a Field Effect Transistor is the one through which the carriers enter the
channel.
 This is analogous to the emitter terminal in a Bipolar Junction Transistor.
 The Source terminal can be designated as S.
 The current entering the channel at Source terminal is indicated as IS.
Gate
 The Gate terminal in a Field Effect Transistor plays a key role in the function of FET by
controlling the current through the channel.
 By applying an external voltage at Gate terminal, the current through it can be controlled.
 Gate is a combination of two terminals connected internally that are heavily doped.
 The channel conductivity is said to be modulated by the Gate terminal.
 This is analogous to the base terminal in a Bipolar Junction Transistor.
 The Gate terminal can be designated as G.
 The current entering the channel at Gate terminal is indicated as IG.
Drain
 The Drain terminal in a Field Effect Transistor is the one through which the carriers leave the
channel.
 This is analogous to the collector terminal in a Bipolar Junction Transistor.
 The Drain to Source voltage is designated as VDS.
 The Drain terminal can be designated as D.
 The current leaving the channel at Drain terminal is indicated as ID.
Types of FET
There are two main types of FETS. They are JFET and MOSFET. The following figure gives further
classification of FETs.

49
Operation of N-channel FET

Before going into the operation of the FET one should understand how the depletion layers are formed.
For this, let us suppose that the voltage at gate terminal say VGG is reverse biased while the voltage at
drain terminal say VDD is not applied. Let this be the case 1.
 In case 1, When VGG is reverse biased and VDD is not applied, the depletion regions between P
and N layers tend to expand. This happens as the negative voltage applied, attracts the holes
from the p-type layer towards the gate terminal.
 In case 2, When VDD is
applied positiveterminaltodrainandnegativeterminaltosourcepositiveterminaltodrainandnegativ
eterminaltosource and VGG is not applied, the electrons flow from source to drain which
constitute the drain current ID.
Let us now consider the following figure, to understand what happens when both the supplies are given.
The supply at gate terminal makes the depletion layer grow and the voltage at drain terminal allows the
drain current from source to drain terminal. Suppose the point at source terminal is B and the point at
50
drain terminal is A, then the resistance of the channel will be such that the voltage drop at the terminal
A is greater than the voltage drop at the terminal B. Which means,
VA>VB
Hence the voltage drop is being progressive through the length of the channel. So, the reverse biasing
effect is stronger at drain terminal than at the source terminal. This is why the depletion layer tends to
penetrate more into the channel at point A than at point B, when both VGG and VDD are applied. The
following figure explains this.
Now that we have understood the behavior of FET, let us go through the real operation of FET.
MOSFET stands for Metal Oxide Silicon Field Effect Transistor or Metal Oxide Semiconductor Field
Effect Transistor.
Construction of a MOSFET
The construction of a MOSFET is a bit similar to the FET. An oxide layer is deposited on the substrate
to which the gate terminal is connected. This oxide layer acts as an insulator (sio2 insulates from the
substrate), and hence the MOSFET has another name as IGFET. In the construction of MOSFET, a
lightly doped substrate, is diffused with a heavily doped region. Depending upon the substrate used,
they are called as P-type and N-type MOSFETs.
The following figure shows the construction of a MOSFET.

51
The voltage at gate controls the operation of the MOSFET. In this case, both positive and negative
voltages can be applied on the gate as it is insulated from the channel. With negative gate bias voltage,
it acts as depletion MOSFET while with positive gate bias voltage it acts as an Enhancement
MOSFET.
Classification of MOSFETs
Depending upon the type of materials used in the construction, and the type of operation, the MOSFETs
are classified as in the following figure.

52
Operational Amplifier:
 High gain differential amplifier with high input impedance and low output
 Impedance.
 It is called as operational amplifier because it can be configured to perform various
operations such as addition, subtraction, integration, differentiation etc.
Basic op-amp
* As shown in the figure below basic op amp is having
1) Two input terminals
*Inverting
*Non inverting
2) One output terminal
3) Two power supply terminals
Fig 50
Feedback:
Process of feeding the part of the output back to input.
Types:
1) Positive feedback
2) Negative feedback
Positive feedback:
53
* Feedback signal is in phase with the input signal.

* Positive feedback drives a circuit into oscillation
* So positive feedback is used in oscillators.
Fig 51
Negative feedback:
* Feedback signal is out of phase with the input signal.
* Negative feedback results in decreased gain.
* Since op amp’s are having high gain negative feedback is used in
op-amp circuits.
Fig 52
Open Loop Voltage Gain(A)
The open loop voltage gain without any feedback for an ideal op amp is infinite. But typical values of
open loop voltage gain for a real op amp ranges from 20,000 to 2, 00,000.
Input Impedance(Zin)
Input Impedance is defined as the input voltage by the input current. The input impedance of an ideal
op amp is infinite. That is there no current flowing in the input circuit. However, an ideal op amp has
certain current flowing in the input circuit of the magnitude of few pico-amps to a few milli-amps

54
Output Impedance (Zout)

Output impedance is defined as the ratio of the output voltage to the input current. The output
impedance of an ideal op amp is zero, however, real op amps have an output impedance of 10-20 kΩ.
Bandwidth(BW)
An ideal op amp has an infinite bandwidth that is it can amplify any signal from DC to the highest AC
frequencies without any losses. So therefore, an ideal op amp is said to have infinite frequency
response. In real op amps, the bandwidth is generally limited. The limit depends on the gain bandwidth
(GB)
Offset Voltage(Vio)
The offset voltage of an ideal op amp is zero, which means that the output voltage will be zero if the
difference between the inverting and non-inverting terminal is zero.
Common Mode Rejection Ratio(CMRR)

Common mode refers to the situation when the same voltage is applied to both the inverting and non-
inverting terminal of the op amp. The common mode rejection refers to the ability of the op amp to
reject the common mode signal.
Where, AD is the differential gain of the op amp, ∞ for an ideal op amp.

* Basic op-amp configurations
1) Inverting amplifier
2) Non inverting amplifier
Inverting amplifier:
* Widely used constant gain amplifier circuit
* Output is obtained by multiplying the input by a constant gain.
* Constant gain is set by the input and feedback resistors.
* Output is also being inverted from the input.

55
Fig 53
Non inverting amplifier:
* Gain is again decided by the input and feedback resistors.
* Here the output is in phase with the input.
Fig 54
Applications of op-amp:
* op-amps have lot of applications
1) Adder
2) Sub tractor
3) Integrator
4) Differentiator
5) Filters
6) Instrumentation amplifier etc.

56

57
Active filters:
* Popular application of op-amp is to build active filters.
* as we know filters can be designed using passive components: Resistor and
Capacitor.
* An active filter additionally uses an amplifier to provide voltage
Amplification or buffering.
Types of active filters
1) Low pass filter
2) High pass filter
3) Band pass filter
Low pass filter
* A filter that provides or passes the signals below cutoff frequency.
* As shown in the frequency response below gain is constant up to cut
off frequency.
* After that gain decreases to zero.
Fig 55
This first-order low pass active filter, consists simply of a passive RC filter stage providing a low
frequency path to the input of a non-inverting operational amplifier. The amplifier is configured as a

58
voltage-follower (Buffer) giving it a DC gain of one, Av = +1 or unity gain as opposed to the previous
passive RC filter which has a DC gain of less than unity.
The advantage of this configuration is that the op-amps high input impedance prevents excessive loading
on the filters output while its low output impedance prevents the filters cut-off frequency point from
being affected by changes in the impedance of the load.
While this configuration provides good stability to the filter.
High pass filter

* A filter that provides or passes the signals above cut off frequency
* As shown in the frequency response below gain is zero up to cut of
Frequency.
* After that gain is constant.
Fig 56

59
Band pass filter:

* When the filter circuit passes signals that are above one ideal cutoff
frequency and below second cutoff frequency.
* Frequency response is as shown below.
Active Band Pass Filter is slightly different in that it is a frequency selective filter circuit used
in electronic systems to separate a signal at one particular frequency, or a range of signals that lie within
a certain “band” of frequencies from signals at all other frequencies. This band or range of frequencies
is set between two cut-off or corner frequency points labeled the “lower frequency” ( ƒL ) and the “higher
frequency” ( ƒH ) while attenuating any signals outside of these two points.
Simple Active Band Pass Filter can be easily made by cascading together a single Low Pass
Filter with a single High Pass Filter as shown.

60
Fig 57
Band Stop Filter
A band Stop Filter known also as a Notch Filter, blocks and rejects frequencies that lie between its two
cut-off frequency points passes all those frequencies either side of this range.

61
Instrumentation amplifiers:
* A popular area of op-amp application is in instrumentation circuits
such as DC or AC voltmeters.
*Gain of the amplifier can be adjusted without changing more than
one resistor values.
* An instrumentation amplifier is a differential op-amp circuit
providing high input impedance with ease of gain adjustment
through the variation of a single resistor.
* The gain of the instrumentation amplifier is given by
* The above equation shows that gain of the amplifier can be adjusted
just by varying the resistor Rgain
* Consider the following circuit to understand the operation

62
Fig 58
* The negative feedback of the upper-left op-amp causes the voltage at point 1 (top of Rgain) to be
equal to V1 (virtual ground).
* Likewise, the voltage at point 2 (bottom of Rgain) is held to a value equal to V2 (Virtual ground).
* This establishes a voltage drop across Rgain equal to the voltage difference between V1 and V2.
* That voltage drop causes a current through Rgain, and since the feedback loops of the two input op-
amps draw no current (high input impedance), that same amount of current through Rgain must be going
through the two “R” resistors above and below it.
* This produces a voltage drop between points 3 and 4 equal to:
* The regular differential amplifier on the right-hand side of the circuit then takes this voltage drop
between points 3 and 4 and amplifies it by a gain of 1 (assuming again that all “R” resistors are of equal
value).
Comparator:
* Op- amp comparator compare the magnitude of the two voltage levels at the input and determines
which is the largest of the two inputs.
* Op- amp as a comparator either use positive feedback or no feedback at all (open-loop mode) to switch
its output between two saturated states( open loop gain is very high).

63
* Due to this high open loop gain, the output from the comparator swings either fully to its positive
supply rail, +Vcc or fully to its negative supply rail, -Vcc on the application of varying input signal
which passes some preset threshold value.
* It is as shown below
Fig 59
ZCD( Zero crossing detector)

* A zero crossing detector or ZCD is a one type of voltage comparator, used to detect a sine waveform
transition from positive and negative, that coincides when the i/p crosses the zero voltage condition.

64
Fig 60
555 Timer:
 The basic 555 timer gets its name from the fact that there are three internally connected 5kΩ
resistors.
 The 555 timer IC is a very cheap, popular and useful precision timing device which can act as
either a simple timer to generate single pulses or long time delays.
 The 555 timer chip is extremely robust and stable 8-pin device that can be operated either as a
very accurate Monostable, Bistable or Astable Multivibrator.
 applications
 one-shot or delay timers, pulse generation, LED and lamp flashers, alarms and
tone generation, logic clocks, frequency division, power supplies and converters
etc.
555 Timer block diagram
Fig 61
 Pin 1. – Ground, The ground pin connects the 555 timer to the negative (0v) supply rail.
 Pin 2. – Trigger, The negative input to comparator No 1. A negative pulse on this pin “sets”
the internal Flip-flop when the voltage drops below 1/3Vcc causing the output to switch from
a “LOW” to a “HIGH” state.

65
 Pin 3. – Output, The output pin can drive any TTL circuit and is capable of sourcing or sinking
up to 200mA of current at an output voltage equal to approximately Vcc – 1.5V so small
speakers, LEDs or motors can be connected directly to the output.
 Pin 4. – Reset, This pin is used to “reset” the internal Flip-flop controlling the state of the
output, pin 3. This is an active-low input and is generally connected to a logic “1” level when
not used to prevent any unwanted resetting of the output.
 Pin 5. – Control Voltage, This pin controls the timing of the 555 by overriding the 2/3Vcc
level of the voltage divider network. By applying a voltage to this pin the width of the output
signal can be varied independently of the RC timing network. When not used it is connected to
ground via a 10nF capacitor to eliminate any noise.
 Pin 6. – Threshold, The positive input to comparator No 2. This pin is used to reset the Flip-
flop when the voltage applied to it exceeds 2/3Vcc causing the output to switch from “HIGH”
to “LOW” state. This pin connects directly to the RC timing circuit.
 Pin 7. – Discharge, The discharge pin is connected directly to the Collector of an internal NPN
transistor which is used to “discharge” the timing capacitor to ground when the output at pin 3
switches “LOW”.
 Pin 8. – Supply +Vcc, This is the power supply pin and for general purpose TTL 555 timers is
between 4.5V and 15V.
Monostable Multivibrator using 555

A monostable multivibrator (MMV) often called a one-shot multivibrator, is a pulse generator circuit
in which the duration of the pulse is determined by the R-C network, connected externally to the 555
timer. In such a vibrator, one state of output is stable while the other is quasi-stable (unstable).

66
Fig 62
 When a negative ( 0V ) pulse is applied to the trigger input (pin 2) of the Monostable
configured 555 Timer oscillator, the internal comparator, (comparator No1) detects this
input and “sets” the state of the flip-flop, changing the output from a “LOW” state to a
“HIGH” state.
 This action in turn turns “OFF” the discharge transistor connected to pin 7, thereby
removing the short circuit across the external timing capacitor, C1.
 This action allows the timing capacitor to start to charge up through resistor, R1 until the
voltage across the capacitor reaches the threshold (pin 6) voltage of 2/3Vcc set up by the
internal voltage divider network.
 At this point the comparators output goes “HIGH” and “resets” the flip-flop back to its
original state which in turn turns “ON” the transistor and discharges the capacitor to
ground through pin 7.
 This causes the output to change its state back to the original stable “LOW” value
awaiting another trigger pulse to start the timing process over again.
Astable multivibrator using 555

An Astable Multivibrator is an oscillator circuit that continuously produces rectangular wave without
the aid of external triggering. So Astable Multivibrator is also known as Free Running Multivibrator.

67
*An astable multivibrator, often called a free-running multivibrator. This circuit does not require
any external trigger to change the state of the output, hence the name free-running.
*One of the most common application for an astable multivibrator is to generate time delays.
*Let’s say you want to turn an LED “ON” for 1 second and keep it “OFF” for 0.5 seconds, then an
astable multivibrator is the best circuit you could use to build this application.
*An Astable Multivibrator can be designed by adding two resistors (RA and RB in circuit diagram) and
a capacitor (C in circuit diagram) to the 555 Timer IC.
*These two resistors and the capacitor (values) are selected appropriately so as to obtain the desired
‘ON’ and ‘OFF’ timings at the output terminal (pin 3).
*So basically, the ON and OFF time at the output (i.e the ‘HIGH’ and ‘LOW’ state at the output terminal)
is dependent on the values chosen for RA,RB and C.
Capacitor charging, discharging and the output waveform

68
Fig 65
 lets assume the circuit is powered up and right now the status at non inverting flip flop output –
Q is LOW.
 When Q is LOW, Vout will be HIGH (which we call as Timer Output).
 You see that Q is directly connected to base of transistor (at the discharge terminal). So when Q
is LOW, transistor will be in its cut off state (OFF state).
 In this state, capacitor C is directly connected to power supply Vcc through resistors RA and RB.
 So the capacitor will start charging towards the supply voltage Vcc and the charging time
constant will be defined by RA and RB values as (RA+RB)*C.
 The capacitor will charge towards Vcc and this will increase the threshold voltage (voltage across
pin 6) of 555 IC.
 When the capacitor charges upto 2/3Vcc and beyond, the threshold voltage will also surpass
2/3Vcc level and this will force the op amp output (comparator 1) to go HIGH (take note that the
reference voltage at – terminal of comparator 1 is 2/3Vcc).
 Since the op amp output of comparator 1 is connected ‘S’ (SET input) of SR flip flop, the flip
flop will be triggered and the Q output (non inverting output) of flip flop will turn HIGH.
 You got upto this? You may recall that we have begun this explanation by assuming Q is LOW
initially. Now as a result of capacitor charging, Q has turned HIGH automatically from LOW.
 When Q goes HIGH, Vout will automatically go to LOW as Vout is nothing but a compliment
of Q.

69
 When Q is HIGH, the transistor at pin 7 (the discharge terminal) will be turned ON and the
transistor will get saturated.
 When the transistor gets saturated, the pin 7 (discharge terminal) will act as a ground for the
capacitor.
 As a result, a new path is available for the capacitor to discharge from 2/3Vcc level to zero volts.
 The capacitor will start discharging through the new path (through RB) and this will result in
decrease in voltage across the trigger terminal (pin 2) of 555 IC.
 The discharging time constant is defined by RB*C.
 Once the capacitor discharges to a level below 1/3Vcc, resulting in the same voltage (voltage of
capacitor) across the trigger terminal (notice that the reference input voltage at + terminal of
comparator 2 is 1/3Vcc), the op amp output of comparator 2 will go HIGH.
 Since the output of comparator 2 is connected to ‘R’ – the RESET input terminal of SR flip flop,
the Q output of flip flop will go from HIGH to LOW.
 When Q goes to LOW, Vout will automatically go to HIGH. Thus an automatic transition from
HIGH to LOW and then from LOW to HIGH is achieved in an Astable.
Oscillators:
Electronic device that generates sinusoidal oscillations of desired frequency
is known as a sinusoidal oscillator.
Types of sinusoidal oscillations
1) Damped oscillations
Electrical oscillations whose amplitude goes on decreasing with time are called damped
oscillations.
Fig 66

70
2) Undamped oscillations
The electrical oscillations whose amplitude remains constant with time are called
Undamped oscillations.
Fig 67
Oscillatory circuit:
 A circuit which produces electrical oscillations of any desired frequency is
known as an oscillatory circuit or tank circuit.
 A simple oscillatory circuit consists of a capacitor (c) and inductance coil (L) in parallel as
shown below.
Fig 68
Barkhausen Criterion
 Barkhausen criterion is that in order to produce continuous undamped
oscillations at the output of an amplifier, the positive feedback should be
such that

71
mvAv=1
where Av=voltage gain of amplifier without feedback
mv= Feedback fraction
 once this condition is set in the positive feedback amplifier, continuous undamped
oscillations can be obtained at the output immediately after connecting the necessary power
supplies.
Basic RC Oscillator Circuit

An oscillator is a circuit which produces a continuous, repeated, alternating waveform without any
input. Oscillators basically convert unidirectional current flow from a DC source into an alternating
waveform which is of the desired frequency, as decided by its circuit
The different types of oscillators are; Crystal Oscillator, , Hartley oscillator, Cross-Coupled Oscillator,
Colpitts Oscillators, , RC Phase Shift Oscillator , Optoelectronic Oscillator, Phase Shift Oscillator, Wein
Bridge Oscillator.
In an RC Oscillator circuit the input is shifted 180o through the amplifier stage and 180o again through
a second inverting stage giving us “180o + 180o = 360o” of phase shift which is effectively the same as
0o thereby giving us the required positive feedback. In other words, the phase shift of the feedback loop
should be “0”.
The basic RC Oscillator which is also known as a Phase-shift Oscillator, produces a sine wave output
signal using regenerative feedback obtained from the resistor-capacitor combination. This regenerative
feedback from the RC network is due to the ability of the capacitor to store an electric charge, (similar
to the LC tank circuit).

72
This resistor-capacitor feedback network can be connected as shown above to produce a leading phase
shift (phase advance network) or interchanged to produce a lagging phase shift (phase retard network)
the outcome is still the same as the sine wave oscillations only occur at the frequency at which the overall
phase-shift is 360o.
By varying one or more of the resistors or capacitors in the phase-shift network, the frequency can be
varied and generally this is done by keeping the resistors the same and using a 3-ganged variable
capacitor. If all the resistors, R and the capacitors, C in the phase shift network are equal in value, then
the frequency of oscillations produced by the RC oscillator is given as:
Sampling
 The process of converting the continuous signal into a discrete signal
 A common example is the conversion of a sound wave (a continuous signal) to a sequence
of samples (a discrete-time signal). A sample is a value or set of values at a point in time
and/or space.
Fig 69
Sampling Theorem
The sampling rate should be such that the data in the message signal should neither be lost nor it should
get over-lapped. The sampling theorem states that, “a signal can be exactly reproduced if it is sampled
at the rate fs, which is greater than or equal to twice the maximum frequency of the given signal W.”
Mathematically, we can write it as

73
fs≥2W
Where,
 Fs is the sampling rate

 Wis the highest frequency of the given signal
If the sampling rate is equal to twice the maximum frequency of the given signal W, then it is called
as Nyquist rate.
Analog to digital conversion (ADC) and Digital to analog conversion (DAC)

Need for A to D and D to A conversion
1) Real time signals like temperature, pressure and humidity etc. are available analog in nature.
2) Analog signals cannot be stored.
3) Analog signals cannot be processed directly by processor.
4) Analog signal get interfered to noise easily.
For all the above reasons A to D conversion is needed.
1) At the end to convert the signals back to its original form D to A converter is needed.
R-2R ladder DAC

The R-2R resistor ladder based digital-to-analog converter (DAC) is a simple, effective, accurate
and inexpensive way to create analog voltages from digital values.
Fig 70
In case of R-2R ladder D/A converter, Resistors of only two value (R and 2R) are used.
In ladder circuit the output voltage is also weighted sum of the corresponding digital input.

74
Let take an example to understand how it works? As we can see the above network is a 4-bit ladder
network so we take an example to convert analog signal correspond of 1000 digital bit.
For 1000 bit we can see only MSB got 1 and rest all bits got 0.
Successive approximation ADC

A successive approximation ADC is a type of analog-to-digital converter that converts a continuous
analog waveform into a discrete digital representation via a binary search through all possible
quantization levels before finally converging upon a digital output for each conversion.
Fig 71
It consists of a successive approximation register (SAR), DAC and comparator. The output of SAR is
given to n-bit DAC. The equivalent analog output voltage of DAC, VD is applied to the non-inverting
input of the comparator. The second input to the comparator is the unknown analog input voltage VA.
The output of the comparator is used to activate the successive approximation logic of SAR.
When the start command is applied, the SAR sets the MSB to logic 1 and other bits are made logic 0, so
that the trial code becomes 1000.
Digital Electronics
Binary digits, Logic level and Digital waveforms
• Digital electronics involves circuits and systems in which there are only two possible states.

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• Binary digits: ‘0’ & ‘1’ (bits)

• Logic Levels: voltages used to represent bits.
• Digital waveform: binary information that is handled by digital systems appears as waveforms
that represents sequence of bits.
Number System
• Binary
• Octal
• Decimal
• Hexadecimal
Number Conversion
• Binary to Decimal: Add the decimal equivalent of each position occupied by a 1.(sum of
weights)
• Decimal to Binary: By double dabble method. Divide the decimal numbers by 2, note down the
remainders; remainders are taken in the reverse order to form the binary equivalent.(repeated
division)
Binary to Decimal
(11001)2
= (1x2^4) +(1x2^3) +(0x2^2) +(0x2^1) +(1x2^0)
=16+8+0+0+1
=(25)10
2. Decimal to Binary
(23)10= (10111)2
• Octal to Binary: replace each bit by its 3-bit binary equivalent.

• Binary to Octal: group 3 bits starting from LSB.
(647)8 = (110 100 111)2
(101110011)2 = (563)8
(101 110 011)2 = (563)8
Assignment
1. Convert Binary to decimal (111001.01)2
2. Convert Decimal to Binary (23.375)10
3. Octal to Decimal
4. Hexadecimal to binary
5. Binary to hexadecimal.
Boolean Arithmetic
• Binary Addition
0+0= 0 sum of 0 with carry of 0

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1 + 1 = 10 sum of 0 with carry of 1
1+0 + 0 = 01 sum of 1 with carry of 0
Binary Subtraction
• 0-0= 0
• 1-0= 1
• 1-1= 0
• 10 - 1 = 1
Binary Multiplication
• 0x0= 0
• 1x0= 0
• 0x1= 0
• 1x1= 1
1’s compliment & 2’s compliment of Binary numbers

• 1’s compliment
1 0
0 1
• 2’s compliment
add 1 to 1’s complimented value
Eg: find 2’s compliment of 10110010
Signed Numbers
 Digital systems such as computers must be able to handle both positive and negative numbers.
 A signed binary consists of both sign and magnitude information.
 The sign indicates whether the number is positive or not and the magnitude is the value of the
number.
 There are three forms in which signed numbers can be represented in binary: sign magnitude,
1’s compliment and 2’s compliment.
 Sign magnitude form: +25=00011001
-25=10011001
In the sign magnitude form, a negative number has the same magnitude bits as the corresponding positive
number but the sign bit is a 1 rather than 0.
2. 1’s compliment form:+25= 00011001
-25= 11100110

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3. 2’s compliment form: -25= 11100110

+1
= 11100111
Logic Gates
1. Implement an Inverter using only NAND gate

2. Implement AND using only NAND gate
3. Implementing OR gate using NAND gates only.
4. Implement an Inverter using only NOR gate
5. Implement AND using only NOR gate
6. Implementing OR gate using NOR gates only.
Universal Gates

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1. Implement the logic circuits for the expression

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a. F = (a+b) cd
b. F= ab+cd+e
c. F= (a+b) (c+d)
d. F= ab+cd
e. F= a’b’+cd+e’
Boolean Algebra
 A+0=A • Demorgan’s Theorem
 A+A=A • (AB)’ = A’ + B’
 A+1=1 • (A+B)’ = A’.B’
 A + A’ = 1
 A.0 = 0
 A.1 = A
 A.A = A
 A.A’ = 0
 (A’)’ = A
 A + AB = A
 A + A’B= A+B
Simplify the following

1. A+ AB
= A(1+B) = A. 1= A
2. A+ A’B
=A+AB + A’B
=A+B(A+A’)
=(A+B)
1. Factorize the following Boolean expressions

a. Y = AB'+AB
b. Y = AB+ AC+ BD+ CD
c. Y = (B+ CA) (C+ A'B)
d. Y = A’B’C’D’+A’B’C’D+AB’C’D’+AB’C’D
Karnaugh map
The Karnaugh map (KM or K-map) is a method of simplifying Boolean algebra expressions. The
Karnaugh map reduces the need for extensive calculations by taking advantage of humans' pattern-
recognition.

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Example
Following are two different notations describing the same function in un simplified Boolean algebra,
using the Boolean variables A, B, C, D, and their inverses.

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Combinational Circuits
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Combinational Circuits
 when logic gates are connected together to produce a specified output for certain specified
combination of input variables with no storage involved, the resulting circuit is called a
combinational circuit.
 The output is always dependent on the combination of inputs and has no feedback.
Binary Adding Circuits

• Half adder
• Full adder
• Full adder using 2 half adders
• Ripple carry adder
Half Adder

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For the SUM bit:

SUM = A XOR
B=A⊕B
For
the CARRY bit:
CARRY = A AN
D B = A.B
Full Adder
A full adder is a logical circuit that performs an addition operation on three one-bit binary numbers. The
full adder produces a sum of the three inputs and carry value. It can be combined with other full adders
(see below) or work on its own.
Truth Table:
For the SUM (S) bit:

SUM = (A XOR B) XOR Cin = (A ⊕ B) ⊕ Cin
SUM = A’B’Cin + A’BC’in + AB’C’in +ABCin
For the CARRY-OUT (Cout) bit:
CARRY-OUT = A AND B OR Cin(A XOR B) = A.B + Cin(A ⊕ B)

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CARRY-OUT = AB+BC+CA
Half subtractor
The half subtractor is a combinational circuit which is used to perform subtraction of two bits. It has two
inputs, the minuend and subtrahend and two outputs the difference and borrows out.

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Full subtractor
Parallel Adders:
• Two or more full adders are connected to form a parallel adder.
• Here the carry output of each adder is connected to the carry input of the next higher adder.
• There are different methods to handle carries in parallel adder:
> Ripple carry
> Look ahead carry
Ripple Carry: The carry output of each FA is connected to the carry input of next higher order
stage.

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Disadvantage: The sum and carry output of any stage cannot be produced until the input carry occurs.
This causes a delay in the addition process( propagation delay).
Look Ahead Carry: It anticipates the output carry of each stage and based on the inputs bits of each stage
produces the output carry.
• The advantage of carry look ahead adders is that the length of time a carry look ahead adder
needs in order to produce the correct SUM is independent of the number of data bits used in the
operation, unlike the cycle time a parallel ripple adder needs to complete the SUM which is a
function of the total number of bits in the addend.
Carry-look ahead depends on two things:

1. Calculating for each digit position whether that position is going to propagate a carry if one
comes in from the right.

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2. Combining these calculated values to be able to deduce quickly whether, for each group of digits,
that group is going to propagate a carry that comes in from the right.
Supposing that groups of four digits are chosen the sequence of events goes something like this:
1. All 1-bit adders calculate their results. Simultaneously, the lookahead units perform their
calculations.
2. Assuming that a carry arises in a particular group, that carry will emerge at the left-hand end of
the group within at most five gate delays and start propagating through the group to its left.
3. If that carry is going to propagate all the way through the next group, the lookahead unit will
already have deduced this. Accordingly, before the carry emerges from the next group, the look
ahead unit is immediately (within one gate delay) able to tell the next group to the left that it is
going to receive a carry – and, at the same time, to tell the next look ahead unit to the left that a
carry is on its way.
Comparators:
• Digital or Binary Comparators are made up from standard AND, NOR and NOT gates that
compare the digital signals present at their input terminals and produce an output depending upon
the condition of those inputs.
 Equality: XOR gate.
 Inequality: XNOR gate.
 There are two main types of Digital Comparator available and these are.
 Identity Comparator – an Identity Comparator is a digital comparator that has only one output
terminal for when A = B either “HIGH” A = B = 1 or “LOW” A = B =
 Magnitude Comparator – a Magnitude Comparator is a digital comparator which has three output
terminals, one each for equality, A = B greater than, A > B and less than A < B

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Encoders
Encoding is the process of converting from familiar symbols or numbers to a coded format is called
encoding.
Encoder in Digital Logic
An Encoder is a combinational circuit that performs the reverse operation of Decoder.It has maximum
of 2^n input lines and ‘n’ output lines, hence it encodes the information from 2^n inputs into an n-bit
code. It will produce a binary code equivalent to the input, which is active High. Therefore, the encoder
encodes 2^n input lines with ‘n’ bits.

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4: 2 Encoder –
The 4 to 2 Encoder consists of four inputs Y3, Y2, Y1 & Y0 and two outputs A1 & A0. At any time,
only one of these 4 inputs can be ‘1’ in order to get the respective binary code at the output. The figure
below shows the logic symbol of 4 to 2 encoder:

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8: 3 Encoder (Octal to Binary) –

The 8 to 3 Encoder or octal to Binary encoder consists of 8 inputs : Y7 to Y0 and 3 outputs : A2, A1 &
A0. Each input line corresponds to each octal digit and three outputs generate corresponding binary
code.

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• One of the main disadvantages of standard digital encoders is that they can generate the wrong
output code when there is more than one input present at logic level “1”.
• For example, if we make inputs D1 and D2 HIGH at logic “1” both at the same time, the resulting
output is neither at “01” or at “10” but will be at “11” which is an output binary number that is
different to the actual input present. Also, an output code of all logic “0”s can be generated when
all of its inputs are at “0” OR when input D0 is equal to one.
• One simple way to overcome this problem is to “Prioritize” the level of each input pin and if
there was more than one input at logic level “1” the actual output code would only correspond to
the input with the highest designated priority. Then this type of digital encoder is known
commonly as a Priority Encoder or P-encoder for short.

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Decoders
The basic function of a decoder is to detect the presence of a specified combination of bits on its inputs
and to indicate the presence of that code by a specified output level.
1) 2 to 4 decoder
2) 3 to 8 decoder

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Multiplexers in Digital Logic
It is a combinational circuit which has many data inputs and single output depending on control or select
inputs. For N input lines, log n (base2) selection lines, or we can say that for 2 n input lines, n selection
lines are required. Multiplexers are also known as “Data n selector, parallel to serial convertor, many
to one circuit, universal logic circuit”. Multiplexers are mainly used to increase amount of the data
that can be sent over the network within certain amount of time and bandwidth.

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2-input Multiplexer Design

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De-multiplexer
A circuit that receives information on a single line and transmits this information on one of 2^n possible
output lines. The selection of specific output lines is controlled via values of n selection lines.

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Encoding Types
1.Binary
2. Binary coded decimal(BCD)
0 to 9 is represented by a binary code of four bits.
3. Gray
it exhibits only a single bit change from one code word to another in the sequence.
- K map follows Gray code
• ASCII: American Standard Code for Information Interchange.
• Excess – 3 code: is a digital code related to BCD that is derived by adding 3 to each decimal digit
and then converting the result of that addition to a 4 bit binary value.
• One hot
• One cold
In digital circuits, one hot refers to the group of bits among which the legal combination of values are
only those with a single high(1) and all others being low(0). A similar implementation in which all bits
are ‘1’ except one ‘0’is called one cold.
Binary to Gray converter

Gray Code system is a binary number system in which every successive pair of numbers differs in only
one bit. It is used in applications in which the normal sequence of binary numbers generated by the

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hardware may produce an error or ambiguity during the transition from one number to the next. For
example, the states of a system may change from 3(011) to 4(100) as- 011 — 001 — 101 — 100.
Therefore there is a high chance of a wrong state being read while the system changes from the initial
state to the final state. This could have serious consequences for the machine using the information. The
Gray code eliminates this problem since only one bit changes its value during any transition between
two numbers.

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Converting Gray Code to Binary –

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Sequential Circuits
101
A sequential circuit is a logical circuit, where the output depends on the present value of the input signal
as well as the sequence of past inputs. While a combinational circuit is a function of present input only.
A sequential circuit is a combination of combinational circuit and a storage element.
The combinational circuits do not use any memory. Hence the previous state of input does not have any
effect on the present state of the circuit. But sequential circuits have memory so output can vary based
on present input condition as well as past history of these inputs. Hence they require memory units.
• Latches

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- are bi-stable elements which are the basic building block of most sequential circuits. They are
capable of holding data for 1clock cycle. They are made up of digital logic gates.
1. SR Latch
2. Gated D latch
3. Gated SR Latch
SR Latch
S R Q Q
0 0 Latched
0 1 0 1
1 0 1 0
1 1 XX

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Enable S R Q Q’
0 0 0 Latched
0 0 1 Latched
0 1 0 Latched
0 1 1 Latched
Gated SR latch
1 0 0 Latched
1 0 1 0 1
1 1 0 1 0
1 1 1 Metastable
D latch
Enable D Q Q
0 0 Latched
0 1 Latched
1 0 0 1
1 1 1 0
Flip-flops
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The bi-stable elements which are the building blocks of most sequential circuits. The main difference
between latches and FF is in the method used for changing their state.
Latches are Level triggered.
Flip-flops are edge triggered.
The Basic SR Flip-flop
JK Flip Flop

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T-Flipflop
Flip Flop Conversions

1. SR Flip Flop to D Flip Flop
2. SR Flip Flop to JK Flip Flop
3. SR Flip Flop to T Flip Flop
4. JK Flip Flop to T Flip Flop
5. JK Flip Flop to D Flip Flop
6. D Flip Flop to T Flip Flop
7. T Flip Flop to D Flip Flop
SR to JK Flip-flop

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JK to T Flip-flop
D to JK Flip-flop

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Registers
• Registers are groups of flip-flops (FF), where each flip-flop(FF) is capable of storing one bit of
information.
• An n-bit register is a group of n flip-flops. The basic function of a register is to hold information
in a digital system and make it available to the logic elements for the computing process.
• Registers consist of a finite number of flip-flops. Since each flip-flop is capable of storing either
a "0" or a "1", there is a finite number of 0-1 combinations that can be stored into a register.
• Each of those combinations is known as state or content of the register.
• Registers are synchronous circuits and all flip-flops are controlled by a common clock pulse. As
registers are often used to collect serial data they are also called accumulators.
Types of Registers
 Shift Registers.
 Cyclic Registers.
 Parallel in serial out registers
Shift Registers.
 A REGISTER capable of shifting binary information in one or both directions.
 Consists of a series of flip flops cascaded together with the output of one flip flop connected to
the input of the other flip flop.
 All flip flops receive common clock pulses that initiate the shift from one stage to the next.

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 They are generally provided with a Clear or Reset connection so that they can be "SET" or
"RESET" as required.
 Controlled with certain clock pulses by inhibiting the clock from the input of the register if shift
is not required.
 It is also able to provide extra circuits to control the shift operation through the D inputs of the
flip flops rather than the clock input.
Shift Register Logical diagram
Cyclic register or Bidirectional:

A register capable of shifting in one direction only is called unidirectional shift register. A
register that can shift in both directions is called bidirectional shift register.
Sometimes it is necessary to “recycle” the same values again and again. Thus the bit that usually would
get dropped is fed to the register input again to receive a cyclic serial register.
Parallel in serial out register

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Counters
• Counter is a sequential circuit. A digital circuit which is used for counting pulses is known
counter. Counter is the widest application of flip-flops. It is a group of flip-flops with a clock
signal applied. Counters are of two types.
– Asynchronous or ripple counters.
– Synchronous counters.
Design of synchronous counters

• 3 bit binary counter :

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Design of synchronous counters

112
Design of Asynchronous counters

113

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Asynchronous decade counter

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n-bit Johnson Counter in Digital Logic
Johnson counter also known as creeping counter, is an example of synchronous counter. In Johnson
counter, the complemented output of last flip flop is connected to input of first flip flop and to implement
n-bit Johnson counter we require n flip-flop. It is one of the most important type of shift register counter.
It is formed by the feedback of the output to its own input. Johnson counter is a ring with an inversion.
Another name of Johnson counter are: creeping counter, twisted ring counter, walking counter, mobile
counter and switch tail counter.

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Ring Counter.
Then by looping the output back to the input, (feedback) we can convert a standard shift register circuit
into a ring counter.
The synchronous Ring Counter example above, is preset so that exactly one data bit in the register is
set to logic “1” with all the other bits reset to “0”. To achieve this, a “CLEAR” signal is firstly applied
to all the flip-flops together in order to “RESET” their outputs to a logic “0” level and then a “PRESET”
pulse is applied to the input of the first flip-flop ( FFA ) before the clock pulses are applied. This then
places a single logic “1” value into the circuit of the ring counter.
So on each successive clock pulse, the counter circulates the same data bit between the four flip-flops
over and over again around the “ring” every fourth clock cycle. But in order to cycle the data correctly

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around the counter we must first “load” the counter with a suitable data pattern as all logic “0’s” or all
logic “1’s” outputted at each clock cycle would make the ring counter invalid.
Application of counters
• Frequency counters
• Digital clock
• Time measurement
• Frequency divider circuits
Mealy and Moore models
Frequency divider using D FF

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Frequency divider using T FF
Multiplexer can act as universal combinational circuit. All the standard logic gates can be implemented
with multiplexers.

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a) Implementation of NOT gate using 2 : 1 Mux
NOT Gate :
b) Implementation of AND gate using 2 : 1 Mux

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c) Implementation of OR gate using 2 : 1 Mux using “n-1” selection lines
NOR Truth Table
x y Z
0 0 1
0 1 0
1 0 0
1 1 0

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NAND Truth Table
x y Z
0 0 0
0 1 1
1 0 1
1 1 1
XOR Truth Table
x y Z
0 0 0
0 1 1
1 0 1
1 1 0
XNOR Truth Table
x y Z
0 0 1
0 1 0
1 0 0
1 1 1

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1 Bit Full Adder using Multiplexer

Full Adder
The full adder accepts two inputs bits and an input carry and generates a sum output and an output carry.
The first two inputs are A and B and the third input is an input carry designated as Cin. When a full
adder logic is designed we will be able to string four of them together to create a 4 bit adder and cascade
the carry bit from one adder to the next. The output carry is designated as Cout and the normal output is
designated as S

123

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Questions:
1. Obtain the truth table of the logic sequence for intended counter to be designed. Alternatively
obtain the state diagram of the counter.
2. Determine the number and type of flip-flop to be used.
3. From the excitation table of the flip-flop, determine the next state logic.
4. From the output state, use Karnaugh map for simplification to derive the Circuit output functions
and the flip-flop output functions.
5. Draw the logic circuit diagram.
6. Masking of gates ?
7. Basic gates using 2:1 MUX ?
8. Design a 4 input NAND gate using 2 input NAND gate?
9. Why most of the interrupts are active low ?
10. Two ways of converting 2 input NAND gate into an inverter?
11. How you detect two 8 bit signals are same ?
12. If N – XOR gates are connected serially, what is the output ?
13. Design a circuit that calculates square of a number ?
14. How do you find weather given combinational and sequential circuits ?

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Embedded Systems - Processors
Processor is the heart of an embedded system. It is the basic unit that takes inputs and produces an
output after processing the data. For an embedded system designer, it is necessary to have the
knowledge of both microprocessors and microcontrollers.
Processors in a System
A processor has two essential units −
 Program Flow Control Unit (CU)

 Execution Unit (EU)
The CU includes a fetch unit for fetching instructions from the memory. The EU has circuits that
implement the instructions pertaining to data transfer operation and data conversion from one form to
another.
The EU includes the Arithmetic and Logical Unit (ALU) and also the circuits that execute instructions
for a program control task such as interrupt, or jump to another set of instructions.
A processor runs the cycles of fetch and executes the instructions in the same sequence as they are
fetched from memory.
Types of Processors
Processors can be of the following categories −
 General Purpose Processor (GPP)

o Microprocessor
o Microcontroller
o Embedded Processor
o Digital Signal Processor
o Media Processor
 Application Specific System Processor (ASSP)
 Application Specific Instruction Processors (ASIPs)
 GPP core(s) or ASIP core(s) on either an Application Specific Integrated Circuit (ASIC) or a Very Large Scale
Integration (VLSI) circuit.
Microprocessor
A microprocessor is a single VLSI chip having a CPU. In addition, it may also have other units such as
coaches, floating point processing arithmetic unit, and pipelining units that help in faster processing of
instructions.

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Earlier generation microprocessors’ fetch-and-execute cycle was guided by a clock frequency of order
of ~1 MHz. Processors now operate at a clock frequency of 2GHz
Microcontroller
A microcontroller is a single-chip VLSI unit (also called microcomputer) which, although having
limited computational capabilities, possesses enhanced input/output capability and a number of on-chip
functional units.
CPU RAM ROM
I/O Port Timer Serial COM Port
Microcontrollers are particularly used in embedded systems for real-time control applications with on-
chip program memory and devices.
Microprocessor vs Microcontroller
Let us now take look at the most notable differences between a microprocessor and a microcontroller.
Microprocessor Microcontroller
Microprocessors are multitasking in nature. Single task oriented. For example, a

Can perform multiple tasks at a time. For washing machine is designed for washing
example, on computer we can play music while clothes only.
writing text in text editor.
RAM, ROM, I/O Ports, and Timers can be RAM, ROM, I/O Ports, and Timers cannot
added externally and can vary in numbers. be added externally. These components are
to be embedded together on a chip and are
fixed in numbers.

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Designers can decide the number of memory Fixed number for memory or I/O makes a
or I/O ports needed. microcontroller ideal for a limited but
specific task.
External support of external memory and I/O Microcontrollers are lightweight and
ports makes a microprocessor-based system cheaper than a microprocessor.
heavier and costlier.
External devices require more space and their A microcontroller-based system consumes
power consumption is higher. less power and takes less space.
CISC and RISC

The following points differentiate a CISC from a RISC −
CISC RISC
Larger set of instructions. Easy to program Smaller set of Instructions. Difficult to

program.
Simpler design of compiler, considering Complex design of compiler.

larger set of instructions.
Many addressing modes causing complex Few addressing modes, fix instruction format.
instruction formats.
Instruction length is variable. Instruction length varies.
Higher clock cycles per second. Low clock cycle per second.
Emphasis is on hardware. Emphasis is on software.
Control unit implements large instruction set Each instruction is to be executed by

using micro-program unit. hardware.
Slower execution, as instructions are to be Faster execution, as each instruction is to be

read from memory and decoded by the executed by hardware.
decoder unit.
Pipelining is not possible. Pipelining of instructions is possible,

considering single clock cycle.

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Embedded Systems - Tools & Peripherals
Compilers and Assemblers

Compiler
A compiler is a computer program (or a set of programs) that transforms the source code written in a
programming language (the source language) into another computer language (normally binary format).
The most common reason for conversion is to create an executable program. The name "compiler" is
primarily used for programs that translate the source code from a highlevel programming language to
a low-level language (e.g., assembly language or machine code).
Cross-Compiler
If the compiled program can run on a computer having different CPU or operating system than the
computer on which the compiler compiled the program, then that compiler is known as a cross-
compiler.
Decompiler
A program that can translate a program from a low-level language to a high-level language is called a
decompiler.
Assemblers
An assembler is a program that takes basic computer instructions (called as assembly language) and
converts them into a pattern of bits that the computer's processor can use to perform its basic operations.
An assembler creates object code by translating assembly instruction mnemonics into opcodes,
resolving symbolic names to memory locations. Assembly language uses a mnemonic to represent each
low-level machine operation (opcode).

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Von Neumann Architecture:

(Single memory of General Purpose Processors).
• Developed by John Von Neumann

• Most widely used architecture.
• Implemented in majority of the processors.
• All elements in the system are controlled by single bunch of 3 busses.
• Address bus.
• Data bus.
• Control bus.
Harvard architecture (dual memory)

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• Developed at Harvard university.

• Uses two different bus systems to transport
– Instruction codes from the program memory
• Program memory has its own address, data and control bus.
– Data to CPU from peripherals or memory to CPU.
• Data bus has its own address, data and control bus.
• Program and data memories physically/logically separated (accessed using different buses)
• Simultaneous fetch of instructions from program memory and data from data memory.
• Von Neumann
– Allows instructions and data to be mixed and stored in the same memory module
– More flexible and easier to implement
– Suitable for most of the general purpose processors
• Harvard:
– Uses separate memory modules for instructions and for data
– It is easier to pipeline
– Higher memory throughput
– Can be faster
– Suitable for DSP (Digital Signal Processors), embedded sytems

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Endianness:
• Specifies the order in which multi byte data is stored in the memory by processor operations in
a multi byte system.
– Big Endian (SPARC, Motorola)
– Little Endian (Intel)
– Mixed Endian
Execution Unit Example

Right Operand
Left Operand
Status Registers
R1
General Registers
R2
…
…
Functional
Unit
Rn Systems – IIES (Koramangala – Bangalore)
Indian Institute of Embedded
Result
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• //Code for a = b + c
• LD R3, b //copy value b from memory to R3
• LD R4, c //copy value c from memory to R4
• add R3, R4 //sum placed in R3
• ST R3, a //store the result into memory
Pipelining

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• CISC (Complex Instruction Set Computing)

– Large number of instructions
– Complex Instructions available
– Reduces software complexity and size
– Processor architecture in complex
– Intel x86 family, Motorola 68000 series processor.
• RISC (Reduced Instruction Set Computing)
– Limited number of instructions
– Simpler processor architecture
– Complex instruction obtained by executing a sequence of simple instructions
– Software more complex.
– ARM,ATMEL AVR,MIPS,MicrochipPIC,PPC and Sun SPARC
– Generally used in embedded systems
–

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Difference between 8085 and 8086 Microprocessor

8085 Microprocessor 8086 Microprocessor
It is an 8-bit microprocessor. It is a 16-bit microprocessor.
It has a 16-bit address line. It has a 20-bit address line.
It has a 8-bit data bus. It has a 16-bit data bus.
The memory capacity is 64 KB. The memory capacity is 1 MB.
The Clock speed of this microprocessor is 3 MHz. The Clock speed of this microprocessor varies
between 5, 8 and 10 MHz for different versions.

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It has five flags. It has nine flags.
8085 microprocessor does not support memory 8086 microprocessor supports memory
segmentation. segmentation.
It does not support pipelining. It supports pipelining.
It is accumulator based processor. It is general purpose register based processor.
It has no minimum or maximum mode. It has minimum and maximum modes.
In 8085, only one processor is used. In 8086, more than one processor is used. An
additional external processor can also be
employed.
It contains less number of transistors compare to It contains more number of transistors compare to
8086 microprocessor. It contains about 6500 8085 microprocessor. It contains about 29000 in
transistor. size.
The cost of 8085 is low. The cost of 8086 is high.
Architecture of 8086
The following diagram depicts the architecture of a 8086 Microprocessor −
Features of 8086
The most prominent features of a 8086 microprocessor are as follows −
 It has an instruction queue, which is capable of storing six instruction bytes from the memory
resulting in faster processing.

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 It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus, and 16-
bit external data bus resulting in faster processing.
 It is available in 3 versions based on the frequency of operation −
o 8086 → 5MHz
o 8086-2 → 8MHz
o (c)8086-1 → 10 MHz
 It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which improves
performance.
 Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.
 Execute stage executes these instructions.
 It has 256 vectored interrupts.
 It consists of 29,000 transistors.
8086 Microprocessor is divided into two functional units, i.e., EU (Execution Unit) and BIU (Bus
Interface Unit).
EU (Execution Unit)
Execution unit gives instructions to BIU stating from where to fetch the data and then decode and
execute those instructions. Its function is to control operations on data using the instruction decoder &
ALU. EU has no direct connection with system buses as shown in the above figure, it performs
operations over data through BIU.
Let us now discuss the functional parts of 8086 microprocessors.
ALU:
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations.
Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored
in the accumulator. It has 9 flags and they are divided into 2 groups − Conditional Flags and Control
Flags.
Conditional Flags
It represents the result of the last arithmetic or logical instruction executed. Following is the list of
conditional flags −
 Carry flag − This flag indicates an overflow condition for arithmetic operations.

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 Auxiliary flag − When an operation is performed at ALU, it results in a carry/barrow from lower
nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3
bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion.
 Parity flag − This flag is used to indicate the parity of the result, i.e. when the lower order 8-
bits of the result contains even number of 1’s, then the Parity Flag is set. For odd number of 1’s,
the Parity Flag is reset.
 Zero flag − This flag is set to 1 when the result of arithmetic or logical operation is zero else it
is set to 0.
 Sign flag − This flag holds the sign of the result, i.e. when the result of the operation is negative,
then the sign flag is set to 1 else set to 0.
 Overflow flag − This flag represents the result when the system capacity is exceeded.
Control Flags
Control flags controls the operations of the execution unit. Following is the list of control flags −
 Trap flag − It is used for single step control and allows the user to execute one instruction at a
time for debugging. If it is set, then the program can be run in a single step mode.
 Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption
of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled
condition.
 Direction flag − It is used in string operation. As the name suggests when it is set then string
bytes are accessed from the higher memory address to the lower memory address and vice-a-
versa.
General purpose register
There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can
be used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register
pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and
DX respectively.
 AX register − It is also known as accumulator register. It is used to store operands for arithmetic
operations.
 BX register − It is used as a base register. It is used to store the starting base address of the
memory area within the data segment.
 CX register − It is referred to as counter. It is used in loop instruction to store the loop counter.
 DX register − This register is used to hold I/O port address for I/O instruction.

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Stack pointer register

It is a 16-bit register, which holds the address from the start of the segment to the memory location,
where a word was most recently stored on the stack.
o CS − It stands for Code Segment. It is used for addressing a memory location in the code
segment of the memory, where the executable program is stored.
o DS − It stands for Data Segment. It consists of data used by the program andis accessed
in the data segment by an offset address or the content of other register that holds the
offset address.
o SS − It stands for Stack Segment. It handles memory to store data and addresses during
execution.
o ES − It stands for Extra Segment. ES is additional data segment, which is used by the
string to hold the extra destination data.
 Instruction pointer − It is a 16-bit register used to hold the address of the next instruction to be
executed.
 Power supply and frequency signals
 It uses 5V DC supply at VCC pin 40, and uses ground at VSS pin 1 and 20 for its operation.
 Clock signal
 Clock signal is provided through Pin-19. It provides timing to the processor for operations. Its
frequency is different for different versions, i.e. 5MHz, 8MHz and 10MHz.
 Address/data bus
 AD0-AD15. These are 16 address/data bus. AD0-AD7 carries low order byte data and
AD8AD15 carries higher order byte data. During the first clock cycle, it carries 16-bit address
and after that it carries 16-bit data.
 Address/status bus
 A16-A19/S3-S6. These are the 4 address/status buses. During the first clock cycle, it carries 4-
bit address and later it carries status signals.
Addressing modes used by 8086 microprocessor are discussed below:
 Immediate mode: In immediate addressing the operand is specified in the instruction itself. In
this mode the data is 8 bits or 16 bits long and data is the part of instruction.
 MOV AX,1234H
 MOV BX,2000H

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 Register mode: In register addressing the operand is placed in one of 8 bit or 16 bit general
purpose registers. The data is in the register that is specified by the instruction.
 MOV AX,BX
 MOV CX,DX
 Register Indirect mode: In this addressing the operand’s offset is placed in any one of the
registers BX,BP,SI,DI as specified in the instruction. The effective address of the data is in the
base register or an index register that is specified by the instruction.
 MOV AX,[DX]
 MOV CX,[SI]
 Direct Mode: The operand’s offset is given in the instruction as an 8 bit or 16 bit displacement
element. In this addressing mode the 16 bit effective address of the data is the part of the
instruction.
Example: ADD AL,[0301]
 Base addressing: The operand’s offset is sum of an 8 bit or 16 bit displacement and the contents
of the base register BX or BP.BX is used as a base register for data segment ,and BP is used as
a base register for stack segment.
Example: MOV AL,[BX+05]
 Indexed addressing mode: The operand’s offset is the sum of the content of an index register
SI or DI and an 8 bit or 16 bit displacement.
Example : MOV AX, [SI +05]
 Based Indexed Addressing: The operand’s offset is sum of the content of a base register BX or
BP and an index register SI or DI.
Example: ADD AX, [BX+SI]
Instruction Set
 Data Transfer Instructions

 Arithmetic Instructions
 Bit Manipulation Instructions
 String Instructions: REP
 Program Execution Transfer Instructions (Branch & Loop Instructions)
 Processor Control Instructions
 Iteration Control Instructions
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 Interrupt Instructions
Data Transfer Instructions
These instructions are used to transfer the data from the source operand to the destination operand.
Following are the list of instructions under this group −
MOV,PUSH,POP,EXHG
Arithmetic Instructions
These instructions are used to perform arithmetic operations like addition, subtraction,
multiplication, division, etc.
Following is the list of instructions under this group −
ADD,ADC,SUB,SBB,MUL,DIV,DAA,AAA,INC,DEC
Bit Manipulation Instructions
These instructions are used to perform operations where data bits are involved, i.e. operations like
logical, shift, etc.
Following is the list of instructions under this group −
NOT, AND,OR,XOR,SHIFT,ROTATE INS.
Program Execution Transfer Instructions (Branch and Loop Instructions)
These instructions are used to transfer/branch the instructions during an execution. It includes the
following instructions −
Instructions to transfer the instruction during an execution without any condition −CALL,RET,JMP
Instructions to transfer the instruction during an execution with some conditions
JC,JNC,JE,JNE

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Processor Control Instructions
These instructions are used to control the processor action by setting/resetting the flag values.
STC,CLC,STD,CLD
Features of 8051 Microcontroller
An 8051 microcontroller comes bundled with the following features −

 4KB bytes on-chip program memory (ROM)
 128 bytes on-chip data memory (RAM)
 Four register banks
 128 user defined software flags
 8-bit bidirectional data bus
 16-bit unidirectional address bus
 32 general purpose registers each of 8-bit
 16 bit Timers (usually 2, but may have more or less)
 Three internal and two external Interrupts
 Four 8-bit ports,(short model have two 8-bit ports)
 16-bit program counter and data pointer
 8051 may also have a number of special features such as UARTs, ADC, Op-amp
Block Diagram of 8051 Microcontroller
The following illustration shows the block diagram of an 8051 microcontroller −

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In 8051, I/O operations are done using four ports and 40 pins. The following pin diagram shows the
details of the 40 pins. I/O operation port reserves 32 pins where each port has 8 pins. The other 8 pins
are designated as Vcc, GND, XTAL1, XTAL2, RST, EA (bar), ALE/PROG (bar), and PSEN (bar). It is
a 40 Pin PDIP (Plastic Dual Inline Package)

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Storage Registers in 8051

We will discuss the following types of storage registers here −
 Accumulator
 R register
 B register
 Data Pointer (DPTR)
 Program Counter (PC)
 Stack Pointer (SP)

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Accumulator
The accumulator, register A, is used for all arithmetic and logic operations. If the accumulator is not
present, then every result of each calculation (addition, multiplication, shift, etc.) is to be stored into
the main memory. Access to main memory is slower than access to a register like the accumulator
because the technology used for the large main memory is slower (but cheaper) than that used for a
register.
The "R" Registers

The "R" registers are a set of eight registers, namely, R0, R1 to R7. These registers function as auxiliary
or temporary storage registers in many operations
The "B" Register

The "B" register is very similar to the Accumulator in the sense that it may hold an 8-bit (1-byte) value.
The "B" register is used only by two 8051 instructions: MUL AB and DIV AB. To quickly and easily
multiply or divide A by another number, you may store the other number in "B" and make use of these
two instructions. Apart from using MUL and DIV instructions, the "B" register is often used as yet
another temporary storage register, much like a ninth R register.
The Data Pointer

The Data Pointer (DPTR) is the 8051’s only user-accessible 16-bit (2-byte) register. The Accumulator,
R0–R7 registers and B register are 1-byte value registers. DPTR is meant for pointing to data. It is used
by the 8051 to access external memory using the address indicated by DPTR. DPTR is the only 16-bit
register available and is often used to store 2-byte values.
The Program Counter

The Program Counter (PC) is a 2-byte address which tells the 8051 where the next instruction to execute
can be found in the memory. PC starts at 0000h when the 8051 initializes and is incremented every time
after an instruction is executed. PC is not always incremented by 1. Some instructions may require 2 or
3 bytes; in such cases, the PC will be incremented by 2 or 3.
Branch, jump, and interrupt operations load the Program Counter with an address other than the next
sequential location. Activating a power-on reset will cause all values in the register to be lost. It means
the value of the PC is 0 upon reset, forcing the CPU to fetch the first opcode from the ROM location

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0000. It means we must place the first byte of upcode in ROM location 0000 because that is where the
CPU expects to find the first instruction.
The Stack Pointer (SP)

The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit (1-byte) value. The Stack
Pointer tells the location from where the next value is to be removed from the stack. When a value is
pushed onto the stack, the value of SP is incremented and then the value is stored at the resulting
memory location. When a value is popped off the stack, the value is returned from the memory location
indicated by SP, and then the value of SP is decremented.
8051 Flag Bits and PSW Register

The program status word (PSW) register is an 8-bit register, also known as flag register. It is of 8-bit
wide but only 6-bit of it is used. The two unused bits are user-defined flags. Four of the flags are
called conditional flags, which means that they indicate a condition which results after an instruction
is executed. These four are CY (Carry), AC (auxiliary carry), P (parity), and OV (overflow). The bits
RS0 and RS1 are used to change the bank registers. The following figure shows the program status
word register.
The PSW Register contains that status bits that reflect the current status of the CPU.
CY CA F0 RS1 RS0 OV - P
CY PSW.7 Carry Flag
AC PSW.6 Auxiliary Carry Flag
F0 PSW.5 Flag 0 available to user for general purpose.
RS1 PSW.4 Register Bank selector bit 1
RS0 PSW.3 Register Bank selector bit 0
OV PSW.2 Overflow Flag
- PSW.1 User definable FLAG
P PSW.0 Parity FLAG. Set/ cleared by hardware during instruction cycle to indicate even/odd
number of 1 bit in accumulator.
We can select the corresponding Register Bank bit using RS0 and RS1 bits.

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RS1 RS2 Register Bank Address
0 0 0 00H-07H
0 1 1 08H-0FH
1 0 2 10H-17H
1 1 3 18H-1FH
 CY, the carry flag − This carry flag is set (1) whenever there is a carry out from the D7 bit. It is affected after
an 8-bit addition or subtraction operation. It can also be reset to 1 or 0 directly by an instruction such as
"SETB C" and "CLR C" where "SETB" stands for set bit carry and "CLR" stands for clear carry.
 AC, auxiliary carry flag − If there is a carry from D3 and D4 during an ADD or SUB operation, the AC bit
is set; otherwise, it is cleared. It is used for the instruction to perform binary coded decimal arithmetic.
 P, the parity flag − The parity flag represents the number of 1's in the accumulator register only. If the A
register contains odd number of 1's, then P = 1; and for even number of 1's, P = 0.
 OV, the overflow flag − This flag is set whenever the result of a signed number operation is too large causing
the high-order bit to overflow into the sign bit. It is used only to detect errors in signed arithmetic operations.
RAM Memory Space Allocation in 8051

The 128 bytes of RAM inside the 8051 are assigned the address 00 to 7FH. They can be accessed
directly as memory locations and are divided into three different groups as follows −
 32 bytes from 00H to 1FH locations are set aside for register banks and the stack.
 16 bytes from 20H to 2FH locations are set aside for bit-addressable read/write memory.
 80 bytes from 30H to 7FH locations are used for read and write storage; it is called as scratch pad. These 80
locations RAM are widely used for the purpose of storing data and parameters by 8051 programmers.

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Register Banks in 8051

A total of 32 bytes of RAM are set aside for the register banks and the stack. These 32 bytes are divided
into four register banks in which each bank has 8 registers, R0–R7. RAM locations from 0 to 7 are set
aside for bank 0 of R0–R7 where R0 is RAM location 0, R1 is RAM location 1, R2 is location 2, and
so on, until the memory location 7, which belongs to R7 of bank 0.
The second bank of registers R0–R7 starts at RAM location 08 and goes to locations OFH. The third
bank of R0–R7 starts at memory location 10H and goes to location to 17H. Finally, RAM locations
18H to 1FH are set aside for the fourth bank of R0–R7.
Default Register Bank

If RAM locations 00–1F are set aside for the four registers banks, which register bank of R0–R7 do we
have access to when the 8051 is powered up? The answer is register bank 0; that is, RAM locations
from 0 to 7 are accessed with the names R0 to R7 when programming the 8051. Because it is much
easier to refer these RAM locations by names such as R0 to R7, rather than by their memory locations.

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How to Switch Register Banks

Register bank 0 is the default when the 8051 is powered up. We can switch to the other banks using
PSW register. D4 and D3 bits of the PSW are used to select the desired register bank, since they can be
accessed by the bit addressable instructions SETB and CLR. For example, "SETB PSW.3" will set
PSW.3 = 1 and select the bank register 1.
RS1 RS2 Bank Selected
0 0 Bank0
0 1 Bank1
1 0 Bank2
1 1 Bank3
Stack and its Operations

Stack in the 8051
The stack is a section of a RAM used by the CPU to store information such as data or memory address
on temporary basis. The CPU needs this storage area considering limited number of registers.
How Stacks are Accessed

As the stack is a section of a RAM, there are registers inside the CPU to point to it. The register used
to access the stack is known as the stack pointer register. The stack pointer in the 8051 is 8-bits wide,
and it can take a value of 00 to FFH. When the 8051 is initialized, the SP register contains the value
07H. This means that the RAM location 08 is the first location used for the stack. The storing operation
of a CPU register in the stack is known as a PUSH, and getting the contents from the stack back into a
CPU register is called a POP.
Pushing into the Stack

In the 8051, the stack pointer (SP) points to the last used location of the stack. When data is pushed
onto the stack, the stack pointer (SP) is incremented by 1. When PUSH is executed, the contents of the
register are saved on the stack and SP is incremented by 1. To push the registers onto the stack, we
must use their RAM addresses. For example, the instruction "PUSH 1" pushes register R1 onto the
stack.

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Popping from the Stack

Popping the contents of the stack back into a given register is the opposite to the process of pushing.
With every pop operation, the top byte of the stack is copied to the register specified by the instruction
and the stack pointer is decremented once.
Timer/Counter
A timer is a specialized type of clock which is used to measure time intervals. A timer that counts from
zero upwards for measuring time elapsed is often called a stopwatch. It is a device that counts down
from a specified time interval and used to generate a time delay, for example, an hourglass is a timer.
A counter is a device that stores (and sometimes displays) the number of times a particular event or
process occurred, with respect to a clock signal. It is used to count the events happening outside the
microcontroller. In electronics, counters can be implemented quite easily using register-type circuits
such as a flip-flop.
Difference between a Timer and a Counter
Timer Counter
The register incremented for every The register is incremented considering 1 to 0 transition at its
machine cycle. corresponding to an external input pin (T0, T1).
Maximum count rate is 1/12 of the Maximum count rate is 1/24 of the oscillator frequency.
oscillator frequency.
A timer uses the frequency of the internal A counter uses an external signal to count pulses.
clock, and generates delay.
Timers of 8051 and their Associated Registers

The 8051 has two timers, Timer 0 and Timer 1. They can be used as timers or as event counters. Both
Timer 0 and Timer 1 are 16-bit wide. Since the 8051 follows an 8-bit architecture, each 16 bit is
accessed as two separate registers of low-byte and high-byte.
Timer 0 Register
The 16-bit register of Timer 0 is accessed as low- and high-byte. The low-byte register is called TL0
(Timer 0 low byte) and the high-byte register is called TH0 (Timer 0 high byte). These registers can be

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accessed like any other register. For example, the instruction MOV TL0, #4H moves the value into the
low-byte of Timer #0.
Timer 1 Register
The 16-bit register of Timer 1 is accessed as low- and high-byte. The low-byte register is called TL1
(Timer 1 low byte) and the high-byte register is called TH1 (Timer 1 high byte). These registers can be
accessed like any other register. For example, the instruction MOV TL1, #4H moves the value into the
low-byte of Timer 1.
TMOD (Timer Mode) Register

Both Timer 0 and Timer 1 use the same register to set the various timer operation modes. It is an 8-bit
register in which the lower 4 bits are set aside for Timer 0 and the upper four bits for Timers. In each
case, the lower 2 bits are used to set the timer mode in advance and the upper 2 bits are used to specify
the location.
Gate − When set, the timer only runs while INT(0,1) is high.
C/T − Counter/Timer select bit.
M1 − Mode bit 1.
M0 − Mode bit 0.

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GATE
Every timer has a means of starting and stopping. Some timers do this by software, some by hardware,
and some have both software and hardware controls. 8051 timers have both software and hardware
controls. The start and stop of a timer is controlled by software using the instruction SETB
TR1 and CLR TR1 for timer 1, and SETB TR0 and CLR TR0 for timer 0.
The SETB instruction is used to start it and it is stopped by the CLR instruction. These instructions start
and stop the timers as long as GATE = 0 in the TMOD register. Timers can be started and stopped by
an external source by making GATE = 1 in the TMOD register.
C/T (CLOCK / TIMER)

This bit in the TMOD register is used to decide whether a timer is used as a delay generator or an event
manager. If C/T = 0, it is used as a timer for timer delay generation. The clock source to create the
time delay is the crystal frequency of the 8051. If C/T = 0, the crystal frequency attached to the 8051
also decides the speed at which the 8051 timer ticks at a regular interval.
Timer frequency is always 1/12th of the frequency of the crystal attached to the 8051. Although various
8051 based systems have an XTAL frequency of 10 MHz to 40 MHz, we normally work with the XTAL
frequency of 11.0592 MHz. It is because the baud rate for serial communication of the 8051.XTAL =
11.0592 allows the 8051 system to communicate with the PC with no errors.
M1 / M2
M1 M2 Mode
0 0 13-bit timer mode.
0 1 16-bit timer mode.
1 0 8-bit auto reload mode.
1 1 Spilt mode.
Different Modes of Timers

Mode 0 (13-Bit Timer Mode)
Both Timer 1 and Timer 0 in Mode 0 operate as 8-bit counters (with a divide-by-32 prescaler). Timer
register is configured as a 13-bit register consisting of all the 8 bits of TH1 and the lower 5 bits of TL1.
The upper 3 bits of TL1 are indeterminate and should be ignored. Setting the run flag (TR1) does not

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clear the register. The timer interrupt flag TF1 is set when the count rolls over from all 1s to all 0s.
Mode 0 operation is the same for Timer 0 as it is for Timer 1.
Mode 1 (16-Bit Timer Mode)

Timer mode "1" is a 16-bit timer and is a commonly used mode. It functions in the same way as 13-bit
mode except that all 16 bits are used. TLx is incremented starting from 0 to a maximum 255. Once the
value 255 is reached, TLx resets to 0 and then THx is incremented by 1. As being a full 16-bit timer,
the timer may contain up to 65536 distinct values and it will overflow back to 0 after 65,536 machine
cycles.
Mode 2 (8 Bit Auto Reload)

Both the timer registers are configured as 8-bit counters (TL1 and TL0) with automatic reload.
Overflow from TL1 (TL0) sets TF1 (TF0) and also reloads TL1 (TL0) with the contents of Th1 (TH0),
which is preset by software. The reload leaves TH1 (TH0) unchanged.
The benefit of auto-reload mode is that you can have the timer to always contain a value from 200 to
255. If you use mode 0 or 1, you would have to check in the code to see the overflow and, in that case,
reset the timer to 200. In this case, precious instructions check the value and/or get reloaded. In mode
2, the microcontroller takes care of this. Once you have configured a timer in mode 2, you don't have
to worry about checking to see if the timer has overflowed, nor do you have to worry about resetting
the value because the microcontroller hardware will do it all for you. The auto-reload mode is used for
establishing a common baud rate.
Mode 3 (Split Timer Mode)

Timer mode "3" is known as split-timer mode. When Timer 0 is placed in mode 3, it becomes two
separate 8-bit timers. Timer 0 is TL0 and Timer 1 is TH0. Both the timers count from 0 to 255 and in
case of overflow, reset back to 0. All the bits that are of Timer 1 will now be tied to TH0.
When Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be set in modes 0, 1 or 2, but
it cannot be started/stopped as the bits that do that are now linked to TH0. The real timer 1 will be
incremented with every machine cycle.

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Initializing a Timer
Decide the timer mode. Consider a 16-bit timer that runs continuously, and is independent of any
external pins.
Initialize the TMOD SFR. Use the lowest 4 bits of TMOD and consider Timer 0. Keep the two bits,
GATE 0 and C/T 0, as 0, since we want the timer to be independent of the external pins. As 16-bit mode
is timer mode 1, clear T0M1 and set T0M0.
Interrupt Vector Table

There are six interrupts including RESET in 8051.
Interrupts ROM Location (Hex) Pin
Interrupts ROM Location (HEX)
Reset 0000 9
External HW interrupt 0 (INT0) 0003 P3.2 (12)
External HW interrupt 1 (INT1) 0013 P3.3 (13)
Timer 0 (TF0) 000B
Timer 1 interrupts(TF1) 001B
Serial COM (RI and TI) 0023
Steps to Execute an Interrupt

When an interrupt gets active, the microcontroller goes through the following steps −
 The microcontroller closes the currently executing instruction and saves the address of the next instruction
(PC) on the stack.
 It also saves the current status of all the interrupts internally (i.e., not on the stack).
 It jumps to the memory location of the interrupt vector table that holds the address of the interrupts service
routine.
 The microcontroller gets the address of the ISR from the interrupt vector table and jumps to it. It starts to
execute the interrupt service subroutine, which is RETI (return from interrupt).
 Upon executing the RETI instruction, the microcontroller returns to the location where it was interrupted.
First, it gets the program counter (PC) address from the stack by popping the top bytes of the stack into the
PC. Then, it start to execute from that address.

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Enabling and Disabling an Interrupt

Upon Reset, all the interrupts are disabled even if they are activated. The interrupts must be enabled
using software in order for the microcontroller to respond to those interrupts.
IE (interrupt enable) register is responsible for enabling and disabling the interrupt. IE is a bit
addressable register.
Interrupt Enable Register
EA - ET2 ES ET1 EX1 ET0 EX0

 EA − Global enable/disable.
 - − Undefined.
 ET2 − Enable Timer 2 interrupt.
 ES − Enable Serial port interrupt.
 EX1 − Enable External 1 interrupt.
 EX0 − Enable External 0 interrupt.
To enable an interrupt, we take the following steps −
 Bit D7 of the IE register (EA) must be high to allow the rest of register to take effect.
 If EA = 1, interrupts will be enabled and will be responded to, if their corresponding bits in IE
are high. If EA = 0, no interrupts will respond, even if their associated pins in the IE register are
high.
Assembling and Running an 8051 Program

Here we will discuss about the basic form of an assembly language. The steps to create, assemble, and
run an assembly language program are as follows −
 First, we use an editor to type in a program similar to the above program. Editors like MS-DOS
EDIT program that comes with all Microsoft operating systems can be used to create or edit a
program. The Editor must be able to produce an ASCII file. The "asm" extension for the source
file is used by an assembler in the next step.
 The "asm" source file contains the program code created in Step 1. It is fed to an 8051 assembler.
The assembler then converts the assembly language instructions into machine code instructions
and produces an .obj file (object file) and a .lst file (list file). It is also called as a source file,

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that's why some assemblers require that this file have the "src" extensions. The "lst" file is
optional. It is very useful to the program because it lists all the opcodes and addresses as well
as errors that the assemblers detected.
 Assemblers require a third step called linking. The link program takes one or more object files
and produces an absolute object file with the extension "abs".
 Next, the "abs" file is fed to a program called "OH" (object to hex converter), which creates a
file with the extension "hex" that is ready to burn in to the ROM.
Addressing modes of 8051
1. Immediate addressing mode:

In this type, the operand is specified in the instruction along with the opcode. In simple way, it means
data is provided in instruction itself.

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Ex: MOV A,#05H -> Where MOV stands for move, # represents immediate data. 05h is the data. It
means the immediate date 05h provided in instruction is moved into A register.
2. Register addressing mode:

Here the operand in contained in the specific register of microcontroller. The user must provide the name
of register from where the operand/data need to be fetched. The permitted registers are A, R7-R0 of each
register bank.
Ex: MOV A,R0-> content of R0 register is copied into Accumulator.
3. Direct addressing mode:

In this mode the direct address of memory location is provided in instruction to fetch the operand. Only
internal RAM and SFR's address can be used in this type of instruction.
Ex: MOV A, 30H => Content of RAM address 30H is copied into Accumulator.
4. Register indirect addressing mode:

Here the address of memory location is indirectly provided by a register. The '@' sign indicates that the
register holds the address of memory location i.e. fetch the content of memory location whose address
is provided in register.
Ex: MOV A,@R0 => Copy the content of memory location whose address is given in R0 register.
5. Indexed Addressing mode:

This addressing mode is basically used for accessing data from look up table. Here the address of
memory is indexed i.e. added to form the actual address of memory.
Ex: MOVC A,@A+DPTR => here 'C' means Code. Here the content of A register is added with content
of DPTR and the resultant is the address of memory location from where the data is copied to A register.

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8051 Instruction Set

 ACALL - Absolute Call  NOP - No Operation
 ADD, ADDC - Add Accumulator  ORL - Bitwise OR
(With Carry)  POP - Pop Value From Stack

 AJMP - Absolute Jump  PUSH - Push Value Onto Stack
 ANL - Bitwise AND  RET - Return From Subroutine
 CJNE - Compare and Jump if Not  RETI - Return From Interrupt
Equal  RL - Rotate Accumulator Left
 CLR - Clear Register  RLC - Rotate Accumulator Left
 CPL - Complement Register Through Carry
 DA - Decimal Adjust  RR - Rotate Accumulator Right
 DEC - Decrement Register  RRC - Rotate Accumulator Right
 DIV - Divide Accumulator by B Through Carry
 DJNZ - Decrement Register and Jump  SETB - Set Bit
if Not Zero  SJMP - Short Jump
 INC - Increment Register  SUBB - Subtract From Accumulator
 JB - Jump if Bit Set With Borrow
 JBC - Jump if Bit Set and Clear Bit  SWAP - Swap Accumulator Nibbles
 JC - Jump if Carry Set  XCH - Exchange Bytes
 JMP - Jump to Address  XCHD - Exchange Digits
 JNB - Jump if Bit Not Set  XRL - Bitwise Exclusive OR
 JNC - Jump if Carry Not Set  Undefined - Undefined Instruction
 JNZ - Jump if Accumulator Not Zero
 JZ - Jump if Accumulator Zero
 LCALL - Long Call
 LJMP - Long Jump
 MOV - Move Memory
 MOVC - Move Code Memory

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 MOVX - Move Extended Memory

 MUL - Multiply Accumulator by B
8255A - Programmable Peripheral Interface
The 8255A is a general purpose programmable I/O device designed to transfer the data from I/O to
interrupt I/O under certain conditions as required. It can be used with almost any microprocessor. It
consists of three 8-bit bidirectional I/O ports (24I/O lines) which can be configured as per the
requirement.
Ports of 8255A
8255A has three ports, i.e., PORT A, PORT B, and PORT C.
 Port A contains one 8-bit output latch/buffer and one 8-bit input buffer.
 Port B is similar to PORT A.
 Port C can be split into two parts, i.e. PORT C lower (PC0-PC3) and PORT C upper (PC7-PC4)
by the control word.
These three ports are further divided into two groups, i.e. Group A includes PORT A and upper PORT
C. Group B includes PORT B and lower PORT C. These two groups can be programmed in three
different modes, i.e. the first mode is named as mode 0, the second mode is named as Mode 1 and the
third mode is named as Mode 2.
Features of 8255A
The prominent features of 8255A are as follows −
 It consists of 3 8-bit IO ports i.e. PA, PB, and PC.
 Address/data bus must be externally demux'd.
 It is TTL compatible.
 It has improved DC driving capability.
8255 Architecture
The following figure shows the architecture of 8255A −

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Features of 8253 / 54
The most prominent features of 8253/54 are as follows −
 It has three independent 16-bit down counters.
 It can handle inputs from DC to 10 MHz.
 These three counters can be programmed for either binary or BCD count.
 It is compatible with almost all microprocessors.
 8254 has a powerful command called READ BACK command, which allows the user to check
the count value, the programmed mode, the current mode, and the current status of the counter.
8259 PIC Microprocessor

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8259 microprocessor is defined as Programmable Interrupt Controller (PIC) microprocessor. There

are 5 hardware interrupts and 2 hardware interrupts in 8085 and 8086 respectively. But by connecting
8259 with CPU, we can increase the interrupt handling capability. 8259 combines the multi interrupt
input sources into a single interrupt output. Interfacing of single PIC provides 8 interrupts inputs from
IR0-IR7.
For example, Interfacing of 8085 and 8259 increases the interrupt handling capability of 8085
microprocessor from 5 to 8 interrupt levels.
Features of 8259 PIC microprocessor –
1. Intel 8259 is designed for Intel 8085 and Intel 8086 microprocessor.
2. It can be programmed either in level triggered or in edge triggered interrupt level.
3. We can masked individual bits of interrupt request register.
4. We can increase interrupt handling capability upto 64 interrupt level by cascading further 8259
PIC.
5. Clock cycle is not required.
Direct memory access with DMA controller 8257/8237

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Suppose any device which is connected at input-output port wants to transfer data to transfer data to
memory, first of all it will send input-output port address and control signal, input-output read to input-
output port, then it will send memory address and memory write signal to memory where data has to be
transferred. In normal input-output technique the processor becomes busy in checking whether any
input-output operation is completed or not for next input-output operation, therefore this technique is
slow.
This problem of slow data transfer between input-output port and memory or between two memory is
avoided by implementing Direct Memory Access (DMA) technique. This is faster as the
microprocessor/computer is bypassed and the control of address bus and data bus is given to the DMA
controller.
 HOLD – hold signal

 HLDA – hold acknowledgment
 DREQ – DMA request
 DACK – DMA acknowledgment
Suppose a floppy drive which is connected at input-output port wants to transfer data to memory, the
following steps are performed:
 Step-1: First of all the floppy drive will send DMA request (DREQ) to the DMAC, it means the
floppy drive wants its DMA service.

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 Step-2: Now the DMAC will send HOLD signal to the CPU.
 Step-3: After accepting the DMA service request from the DMAC, the CPU will send hold
acknowledgement (HLDA) to the DMAC, it means the microprocessor has released control of the
address bus the data bus to DMAC and the microprocessor/computer is bypassed during DMA
service.
 Step-4: Now the DMAC will send one acknowledgement (DACL) to the floppy drive e=which is
connected at the input-output port. It means the DMAC tells the floppy drive be ready for its DMA
service.
 Step-5: Now with the help of input-output read and memory write signal the data is transferred
from the floppy drive to the memory.
Modes of DMAC:
1. Single Mode – In this only one channel is used, means only a single DMAC is connected to the
bus system.
Cascade Mode – In this multiple channels are used, we can further cascade more number of
DMACs

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Basic Elements of Electronic Communications System
Electronic communications is the transmission, reception, and processing of information between two
or more locations with the use of electronic circuits. The basic components of electronic communications
system are the transmitter, communications channel or medium, receiver, and noise. Analog signals
(such human voice) or digital signals (binary data) are inputted to the system, processed in the electronic
circuits for transmission, and then decoded by the receiver. The system is said to be reliable and effective
only when errors are minimized in the process.
Transmitter
Transmitter is defined as a collection of one or more electronic devices or circuits that converts the
original source information - also called as baseband signal - to a form suitable for transmission. It is a
part of the system where the sender inputs or encodes the information. Examples of transmitters are our
mobile phones and AM radio transmitters.
Functions of a Radio Transmitter

A radio transmitter is an electronic unit that accepts the information signal to be transmitted and converts
it into a radio frequency (RF) signal capable of being transmitted over long distances.
A transmitter must:
 generate a signal of desired frequency
 provide some form of modulation that allows the information signal to modify a signal of higher
frequency, also known as the carrier signal. Amplitude Modulation (AM) and Frequency
Modulation are commonly used in broadcasting.
 provide power amplification in order to ensure that the signal level is high, in such a way that it
will carry over the desired distance for which the signal is to be sent

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Communications channel
The channel is the medium by which the electronic signal is sent or propagated from one place to another.
It provides a means of transporting signals between a transmitter and a receiver. The channel can be as
simple as copper wire or as complex as the optical fiber and satellite systems. Signals can also be
propagated through radio waves or free space depending upon the type of modulation and frequency
being used.
Although channel provides a way for communication, it also attenuates the signal that carries the
message. All types of media are capable of degrading the signals, resulting to weaker signals, and appear
to have smaller amplitudes. Amplifiers are included both in the transmitter and receiver to compensate
this problem.
Receiver
The receiver is a collection of electronic devices and circuits that accepts the transmitted signals from
the transmission medium and then converts those signals back to their original form which is
understandable by humans. One good example of a receiver is the television.
Need for Modulation

Modulation is extremely necessary in communication system because of the following reasons:
1) Avoids mixing of signals
2) Increase the range of communication
3) Wireless communication
4) Reduces the effect of noise
5) Reduces height of antenna
Modulation Definition
Modulation is the process of changing the characteristics (amplitude, frequency or phase) of the carrier
signal, in accordance with the amplitude of the message signal.

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Analog modulation
In analog modulation, the analog signal (sinusoidal signal) is used as a carrier signal that modulates the
analog message signal. In analog modulation, the characteristics (amplitude, frequency or phase) of the
carrier signal are varied in accordance with the amplitude of the message signal.
There are four basic types of analog modulation:
1) Amplitude modulation
2) Frequency modulation
3) Phase modulation
4) Analog pulse modulation
1) Amplitude Modulation (AM)

Amplitude modulation is a type of modulation where the amplitude of the carrier signal is varied
(changed) in accordance with the amplitude of the message signal while the frequency and phase of
carrier signal remain constant.

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The above figure shows the amplitude modulation. The first figure shows the modulating signal or
message signal which contains information, the second figure shows the high frequency carrier signal
which contains no information and the last figure shows the resultant amplitude modulated signal. From
the above three figures, it can be observed that the amplitude of the carrier signal is varied in accordance
with the instant amplitude of the message signal.
Modulation index or modulation depth describes how the amplitude, frequency or phase of the carrier
signal and message signal affects the amplitude, frequency or phase of the modulated signal.
Amplitude modulation index describes how the amplitude of the carrier signal and message signal affects
the amplitude of the amplitude modulated (AM) signal.
or

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Amplitude modulation index is defined as the ratio of the maximum amplitude of message signal to the
maximum amplitude of carrier signal. i.e.,
Where,
Am is the maximum amplitude of the message signal
Ac is the maximum amplitude of the carrier signal
Advantages of Amplitude Modulation

1. Few components needed: At the receiver side, the original signal is extracted (demodulated) using a
circuit consisting of very few components.
2. Low cost: The components used in amplitude modulation are very cheap. So the AM transmitter and
AM receiver build at low cost.
3. It is simple to implement.
4. Long distance communication: Amplitude modulated waves can travel a longer distance.
Applications of Amplitude Modulation

1. Air band radio: The amplitude modulation is extensively used in aerospace industry. The VHF (Very
High Frequency) transmissions made by the airborne equipment still use amplitude modulation. The
radio contact between ground to ground and also ground to air use amplitude modulated (AM) signals.
2. Broadcast transmission: Amplitude modulation (AM) is still widely used for broadcasting either
short or medium or long wave bands.
3. Quadrature amplitude modulation: Amplitude modulation is used in the transmission of data of

almost everything, from short-range transmission such as wifi to cellular communications. Quadrature
amplitude modulation is formed by mixing two carriers that are out of phase by 90°.
4. Single sideband: The amplitude modulation (AM) in the form of single sideband is still used for HF
(High Frequency) radio links.
For simple sine wave modulation this means that we require . This means that a sinewave
modulated AM wave will have the form of

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2) Frequency modulation
Frequency modulation is a type of modulation where the frequency of the carrier signal is varied
(changed) in accordance with the amplitude of the message signal while the amplitude and phase of
carrier signal remain constant.

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The above figure shows the frequency modulation. The first figure shows the modulating signal or
message signal, the second figure shows the high frequency carrier signal which contains no information
and the last figure shows the resultant frequency modulated signal. From the above three figures, it can
be observed that the frequency of the carrier signal is varied in accordance with the instant amplitude of
the message signal.

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Example: A sinusoidal modulating waveform of amplitude 5 V and a frequency of 2 KHz is applied to

FM generator, which has a frequency sensitivity of 40 Hz/volt. Calculate the frequency deviation,
modulation index, and bandwidth.

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3) Phase modulation
Phase modulation is a type of modulation where the phase of the carrier signal is varied (changed) in
accordance with the amplitude of the message signal while the amplitude of carrier signal remains
constant.

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The above figure shows the phase modulation. The first figure shows the modulating signal or message
signal, the second figure shows the high frequency carrier signal which contains no information and the
last figure shows the resultant phase modulated signal. From the above three figures, it can be observed
that the phase of the carrier signal is varied in accordance with the instant amplitude of the message
signal. In this type of modulation, when the phase is changed it also affects the frequency so this
modulation also comes under frequency modulation.
The frequency and phase modulation comes under angle modulation. When the frequency or phase of
the carrier signal is varied (changed) in accordance with the amplitude of the message signal, then it is
called angle modulation.

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4) Analog pulse modulation (Pulse Amplitude Modulation)

In amplitude, frequency and phase modulation techniques, the carrier and message signals are
continuous signals (sinusoidal signals). However, in analog pulse modulation, the carrier signal is a
discontinuous signal (series of pulses) and message signal is a continuous signal (sinusoidal signal).
Analog pulse modulation is the process of changing the characteristics (pulse amplitude, pulse width or
pulse position) of the carrier pulse, in accordance with the amplitude of the message signal.
The analog pulse modulation is again classified as,
1. Pulse amplitude modulation
2. Pulse width modulation
3. Pulse position modulation
Example:
The analog pulse modulation can be understood with a simple example. The below figure shows the
pulse amplitude modulation.

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The first figure shows the message signal (continuous signal), the second figure shows the carrier pulse
train (series of pulses) which contains no information and the last figure shows the resultant pulse
amplitude modulated (PAM) signal.
From the above three figures, it can be observed that the amplitude of the series of carrier pulses are
varied (changed) in accordance with the instant amplitude of the message signal while the width and
positions of the carrier pulses remain constant.
Analog modulation is more sensitive to noise. Noise is an unwanted signal that enters the communication
system via the communication channel and interferes with the transmitted signal. The noise signal
degrades the transmitted signal (signal containing information). Therefore, this drawback can be
overcome by the digital modulation technique.

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Analog modulation Digital modulation
In analog modulation, the modulated In digital modulation, the

(message) signal is continuous both in modulated(message)signal is discrete both in time
amplitude and time. and amplitude
In this modulation, the transmission Transmission of the data in digital format in terms
of data in analog format and output of 1’s and 0’s and output also digital in nature.
also analog in nature.
In analog modulation, any value In digital modulation only 2 values, one value is 0
between maximum and minimum is and another is 1 and remaining values are
valid. considered as noise and are rejected.
Analog modulation is more preferable In case of transmission of any signal digital

than digital in Case of transmission of modulation is less preferable. for example if you
data, a voice signal can directly considered a voice signal, transmission of voice
transmitted through analog. signal through digital modulation is very difficult
first we need to pass it through an ADC(analog to
digital converter ) at transmitter side and
DAC(digital to analog converter) at receivers side
to receive the original signal .
It is more sensitive to noise. Less sensitive to noise
Implementation of analog Digital modulation implementation is costly than

modulation is cheaper. analog
It gives less accurate results. It Produces more accurate output than analog.
Amplitude Shift Keying

Amplitude Shift Keying ASKASK is a type of Amplitude Modulation which represents the binary
data in the form of variations in the amplitude of a signal. Any modulated signal has a high frequency
carrier. The binary signal when ASK modulated, gives a zero value for Low input while it gives
the carrier output for High input. The following figure represents ASK modulated waveform along
with its input.

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To find the process of obtaining this ASK modulated wave, let us learn about the working of the ASK
modulator.
ASK Modulator
The ASK modulator block diagram comprises of the carrier signal generator, the binary sequence from
the message signal and the band-limited filter. Following is the block diagram of the ASK Modulator.
The carrier generator sends a continuous high-frequency carrier. The binary sequence from the message
signal makes the unipolar input to be either High or Low. The high signal closes the switch, allowing a
carrier wave. Hence, the output will be the carrier signal at high input. When there is low input, the

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switch opens, allowing no voltage to appear. Hence, the output will be low. The band-limiting filter
shapes the pulse depending upon the amplitude and phase characteristics of the band-limiting filter or
the pulse-shaping filter.
Frequency Shift Keying

Frequency Shift Keying FSKFSK is the digital modulation technique in which the frequency of the
carrier signal varies according to the digital signal changes. FSK is a scheme of frequency modulation.
The output of a FSK modulated wave is high in frequency for a binary High input and is low in
frequency for a binary Low input. The binary 1s and 0s are called Mark and Space frequencies.
The following image is the diagrammatic representation of FSK modulated waveform along with its
input.
To find the process of obtaining this FSK modulated wave, let us know about the working of a FSK
modulator.
FSK Modulator

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The FSK modulator block diagram comprises of two oscillators with a clock and the input binary
sequence. Following is its block diagram.
The two oscillators, producing a higher and a lower frequency signals, are connected to a switch along
with an internal clock. To avoid the abrupt phase discontinuities of the output waveform during the
transmission of the message, a clock is applied to both the oscillators, internally. The binary input
sequence is applied to the transmitter so as to choose the frequencies according to the binary input.
Digital Communication - Phase Shift Keying
Phase Shift Keying PSKPSK is the digital modulation technique in which the phase of the carrier
signal is changed by varying the sine and cosine inputs at a particular time. PSK technique is widely
used for wireless LANs, bio-metric, contactless operations, along with RFID and Bluetooth
communications.
PSK is of two types, depending upon the phases the signal gets shifted. They are −
Binary Phase Shift Keying BPSKBPSK

This is also called as 2-phase PSK or Phase Reversal Keying. In this technique, the sine wave carrier
takes two phase reversals such as 0° and 180°.
BPSK is basically a Double Side Band Suppressed Carrier DSBSCDSBSC modulation scheme, for
message being the digital information.

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Quadrature Phase Shift Keying QPSK: This is the phase shift keying technique, in wich the sine wave
carrier takes four phase reversals such as 0°, 90°, 180°, and 270°. If this kind of techniques is further
extended, PSK can be done by eight or sixteen values also, depending upon the requirement.
BPSK Modulator
The block diagram of Binary Phase Shift Keying consists of the balance modulator which has the carrier
sine wave as one input and the binary sequence as the other input. Following is the diagrammatic
representation.
The modulation of BPSK is done using a balance modulator, which multiplies the two signals applied
at the input. For a zero binary input, the phase will be 0° and for a high input, the phase reversal is
of 180°. Following is the diagrammatic representation of BPSK Modulated output wave along with its
given input.

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The output sine wave of the modulator will be the direct input carrier or the
inverted 180°phaseshifted180°phaseshifted input carrier, which is a function of the data signal.
Time-division multiple access (TDMA) is a channel access method for shared-medium networks. It
allows several users to share the same frequency channel by dividing the signal into different time
slots. The users transmit in rapid succession, one after the other, each using its own time slot. This allows
multiple stations to share the same transmission medium (e.g. radio frequency channel) while using only
a part of its channel capacity. TDMA is used in the digital 2G cellular systems such as Global System for
Mobile Communications (GSM), IS-136, Personal Digital Cellular (PDC) and iDEN, and in the Digital
Enhanced Cordless Telecommunications (DECT) standard for portable phones.
TDMA is a type of time-division multiplexing (TDM), with the special point that instead of having
one transmitter connected to one receiver, there are multiple transmitters. In the case of the uplink from
a mobile phone to a base station this becomes particularly difficult because the mobile phone can move
around and vary the timing advance required to make its transmission match the gap in transmission
from its peers.
TDMA characteristics
 Shares single carrier frequency with multiple users
 Non-continuous transmission makes handoff simpler
 Slots can be assigned on demand in dynamic TDMA
 Less stringent power control than CDMA due to reduced intra cell interference
 Higher synchronization overhead than CDMA

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 Advanced equalization may be necessary for high data rates if the channel is "frequency
selective" and creates Intersymbol interference
 Cell breathing (borrowing resources from adjacent cells) is more complicated than in CDMA
 Frequency/slot allocation complexity
 Pulsating power envelope: interference with other devices
Time division multiple access (TDMA).
TDMA occupies a channel but it allows two users to occupy the same channel at what appears to them
to be the same time. An analogy could be the still shot frame rates in cinema, where at around 30 frames
per second it gives the illusion of continuous movement but it is actually a time shuttling exercise. With
a 2-time slot TDMA system, two users can share the same frequency in the following manner: User 1
gets to use the frequency for a very short fixed period of time, perhaps 50 milliseconds. Then the channel
reverts to user 2 who gets 50 milliseconds. Then it cycles again back to user one who gets a further 50
milliseconds, and so on and so forth.
This process is so fast that each user thinks they have exclusive use of the frequency channel. With 2-
time slot TDMA, in order to have more than two conversations going on at the same time then another
radio channel is needed. If it is another 2-time slot TDMA channel then two frequencies can

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simultaneously support four conversations; or apparently simultaneously, because of this shuttling

exercise.
TDMA Frame
This image below shows a sequence of two successive TDMA frames passing through the satellite. The
carrier bit rate is 250 kbit/s
frequency division multiple access (FDMA). This method separates channels by frequency, so if users
want to have two channels they’ll have two separate frequencies. If a conversation runs across a channel,
it occupies the whole of the channel exclusively. There is only one conversation and one user at a time
per radio channel. More radio channels require more frequencies.
Frequency division multiple access (FDMA) is a channel access method used in some multiple-access
protocols. FDMA allows multiple users to send data through a single communication channel, such as
a coaxial cable or microwave beam, by dividing the bandwidth of the channel into separate non-
overlapping frequency sub-channels and allocating each sub-channel to a separate user. Users can send
data through a subchannel by modulating it on a carrier wave at the sub channel’s frequency. It is used
in satellite communication systems and telephone trunk lines.

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 Disadvantage: Crosstalk may cause interference among frequencies and disrupt the transmission.
 In FDMA, all users share the satellite transponder or frequency channel simultaneously but each
user transmits at single frequency.
 FDMA can be used with both analog and digital signal but it generally used with analog signal.
 FDMA requires high-performing filters in the radio hardware, in contrast to TDMA and CDMA.
 FDMA is not vulnerable to the timing problems that TDMA has. Since a predetermined
frequency band is available for the entire period of communication, stream data (a continuous
flow of data that may not be packetized) can easily be used with FDMA.
 Due to the frequency filtering, FDMA is not sensitive to near-far problem which is pronounced
for CDMA.
 Each user transmits and receives at different frequencies as each user gets a unique frequency
slots.

Code-division multiple access

Code-division multiple access (CDMA) is a channel access method used by
various radio communication technologies. CDMA is an example of multiple access, where several
transmitters can send information simultaneously over a single communication channel. This allows

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several users to share a band of frequencies (see bandwidth). To permit this without undue interference
between the users, CDMA employs spread spectrum technology and a special coding scheme (where
each transmitter is assigned a code).
CDMA is used as the access method in many mobile phone standards. IS-95, also called "cdmaOne",
and its 3G evolution CDMA2000, are often simply referred to as "CDMA", but UMTS, the 3G standard
used by GSM carriers, also uses "wideband CDMA", or W-CDMA, as well as TD-CDMA and TD-
SCDMA, as its radio technologies.
Steps in CDMA modulation

CDMA is a spread-spectrum multiple-access technique. A spread-spectrum technique spreads the
bandwidth of the data uniformly for the same transmitted power. A spreading code is a pseudo-random
code that has a narrow ambiguity function, unlike other narrow pulse codes. In CDMA a locally
generated code runs at a much higher rate than the data to be transmitted. Data for transmission is
combined by bitwise XOR (exclusive OR) with the faster code. The figure
shows how a spread-spectrum signal is generated. The data signal with pulse duration of (symbol
period) is XORed with the code signal with pulse duration of (chip period). (Note: bandwidth is
proportional to , where = bit time.) Therefore, the bandwidth of the data signal is and the bandwidth
of the spread spectrum signal is . Since is much smaller than , the bandwidth of the spread-spectrum
signal is much larger than the bandwidth of the original signal. The ratio is called the spreading factor
or processing gain and determines to a certain extent the upper limit of the total number of users
supported simultaneously by a base station.
Generation of a CDMA signal

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Each user in a CDMA system uses a different code to modulate their signal. Choosing the codes used to
modulate the signal is very important in the performance of CDMA systems. The best performance
occurs when there is good separation between the signal of a desired user and the signals of other users.
The separation of the signals is made by correlating the received signal with the locally generated code
of the desired user. If the signal matches the desired user's code, then the correlation function will be
high and the system can extract that signal. If the desired user's code has nothing in common with the
signal, the correlation should be as close to zero as possible (thus eliminating the signal); this is referred
to as cross-correlation. If the code is correlated with the signal at any time offset other than zero, the
correlation should be as close to zero as possible. This is referred to as auto-correlation and is used to
reject multi-path interference.
Wireless Communication with Applications
The term wireless communication was introduced in the 19th century and wireless communication
technology has developed over the subsequent years. It is one of the most important mediums of
transmission of information from one device to other devices. In this technology, the information can be
transmitted through the air without requiring any cable or wires or other electronic conductors, by using
electromagnetic waves like IR, RF, satellite, etc. In the present days, the wireless communication
technology refers to a variety of wireless communication devices and technologies ranging from smart
phones to computers, tabs, laptops, Bluetooth Technology, printers. This article gives an overview of
wireless communication and types of wireless communications.

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Introduction To Wireless Communication

In the present days, wireless communication system has become an essential part of various types of
wireless communication devices, that permits user to communicate even from remote operated areas.
There are many devices used for wireless communication like mobiles. Cordless telephones, Zigbee
wirelss technology, GPS, Wi-Fi, satellite television and wireless computer parts. Current wireless
phones include 3 and 4G networks, Bluetooth and Wi-Fi technologies.
Types of Wireless Communication

The different types of wireless communication mainly include, IR wireless communication, satellite
communication, broadcast radio, Microwave radio, Bluetooth, Zigbee etc.
Satellite Communication
Satellite communication is one type of self contained wireless communication technology, it is widely
spread all over the world to allow users to stay connected almost anywhere on the earth. When the signal
(a beam of modulated microwave) is sent near the satellite then, satellite amplifies the signal and sent it
back to the antenna receiver which is located on the surface of the earth. Satellite communication
contains two main components like the space segment and the ground segment.The ground segment
consists of fixed or mobile transmission, reception and ancillary equipment and the space segment,
which mainly is the satellite itself.

189
Infrared Communication
Infrared wireless communication communicates information in a device or systems through IR radiation
. IR is electromagnetic energy at a wavelength that is longer than that of red light. It is used for security
control, TV remote control and short range communications. In the electromagnetic spectrum, IR
radiation lies between microwaves and visible light. So, they can be used as a source of communication
For a successful infrared communication, a photo LED transmitter and a photo diode receptor are
required. The LED transmitter transmits the IR signal in the form of non visible light, that is captured
and saved by the photoreceptor. So the information between the source and the target is transferred in
this way. The source and destination can be mobile phones, TVs, security systems, laptops etc supports
wireless communication.
Infrared Waves
Infrared (IR) light is electromagnetic radiation with longer wavelengths than those of visible light,
extending from the nominal red edge of the visible spectrum at 0.74 micrometers (µm) to 1 mm. This

190
range of wavelengths corresponds to a frequency range of approximately 300 GHz to 400 THz, and
includes most of the thermal radiation emitted by objects near room temperature. Infrared light is emitted
or absorbed by molecules when they change their rotational-vibrational movements.
Broadcast Radio
The first wireless communication technology is the open radio communication to seek out widespread
use, and it still serves a purpose nowadays. Handy multichannel radios permit a user to speak over short
distances, whereas citizen’s band and maritime radios offer communication services for sailors. Ham
radio enthusiasts share data and function emergency communication aids throughout disasters with their
powerful broadcasting gear, and can even communicate digital information over the radio frequency
spectrum.
Mostly an audio broadcasting service, radio broadcasts sound through the air as radio waves. Radio uses
a transmitter which is used to transmit the data in the form of radio waves to a receiving
antenna(Different Types of Antennas). To broadcast common programming, stations are
associated with the radio N/W’s. The broadcast happens either in simulcast or syndication or both.
Radio broadcasting may be done via cable FM, the net and satellites. A broadcast sends information over
long distances at up to two megabits/Sec (AM/FM Radio).
Radio waves are electromagnetic signals, that are transmitted by an antenna. These waves have
completely different frequency segments, and you will be ready to obtain an audio signal by changing
into a frequency segment.

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For example, you can take a radio station. When the RJ says you are listening to 92.7 BIG FM, what he
really means is that signals are being broadcasted at a frequency of 92.7megahertz, that successively
means the transmitter at the station is periodic at a frequency of 92.700,000 Cycles/second.
When you would like to listen to 92.7 BIG FM, all you have to do is tune the radio to just accept that
specific frequency and you will receive perfect audio reception.
Radio waves are a type of electromagnetic (EM) radiation with wavelengths in the electromagnetic
spectrum longer than infrared light. They have have frequencies from 300 GHz to as low as 3 kHz, and
corresponding wavelengths from 1 millimeter to 100 kilometers.
Microwave Communication
Microwave wireless communication is an effective type of communication, mainly this transmission
uses radio waves, and the wavelengths of radio waves are measured in centimeters. In this
communication, the data or information can be transfers using two methods. One is satellite method and
another one is terrestrial method.

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Wherein satellite method, the data can be transmitted though a satellite, that orbit 22,300 miles above
the earth. Stations on the earth send and receive data signals from the satellite with a frequency ranging
from 11GHz-14GHz and with a transmission speed of 1Mbps to 10Mbps. In terrestrial method, in which
two microwave towers with a clear line of sight between them are used, ensuring no obstacles to disrupt
the line of sight. So it is used often for the purpose of privacy. The frequency range of the terrestrial
system is typically 4GHz-6GHz and with a transmission speed is usually 1Mbps to 10Mbps.
Microwaves are a form of electromagnetic radiation with wavelengths ranging from about one meter to
one millimeter; with frequencies between 300 MHz (1 m) and 300 GHz (1 mm). Different sources
define different frequency ranges as microwaves; the above broad definition includes both UHF and
EHF (millimeter wave) bands.
The main disadvantage of microwave signals is, they can be affected by bad weather, especially rain.
Wi-Fi
Wi-Fi is a low power wireless communication, that is used by various electronic devices like smart
phones, laptops, etc.In this setup, a router works as a communication hub wirelessly. These networks
allow users to connect only within close proximity to a router. WiFi is very common in networking
applications which affords portability wirelessly. These networks need to be protected with passwords
for the purpose of security, otherwise it will access by others

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Mobile Communication Systems

The advancement of mobile networks is enumerated by generations. Many users communicate across a
single frequency band through mobile phones. Cellular and cordless phones are two examples of devices
which make use of wireless signals. Typically, cell phones have a larger range of networks to provide a
coverage.But, Cordless phones have a limited range. Similar to GPS devices, some phones make use of
signals from satellites to communicate.
Bluetooth Technology
The main function of the Bluetooth technology is that permits you to connect a various electronic devices
wirelessly to a system for the transferring of data.Cell phones are connected to hands free earphones,
mouse, wireless keyboard. By using Bluetooth device the information from one device to another device.
This technology has various functions and it is used commonly in the wireless communication market.
Bluetooth operates at frequencies between 2.402 and 2.480 GHz, or 2.400 and 2.4835 GHz including
guard bands 2 MHz wide at the bottom end and 3.5 MHz wide at the top. This is in the globally
unlicensed (but not unregulated) industrial, scientific and medical (ISM) 2.4 GHz short-range
radio frequency band.
GPS, or the Global Positioning System, is a global navigation satellite system that provides location,
velocity and time synchronization.
GPS, or the Global Positioning System, is a global navigation satellite system that uses at least 24
satellites, a receiver and algorithms to provide location, velocity and time synchronization for air, sea
and land travel. The satellite system consists of six earth-centered orbital planes, each with four satellites.

194
GPS works at all times and in almost all weather conditions. This post answers "What is GPS?" and
explains how it works.
In general, there are five key uses of GPS:
1. Location — Determining a position.

2. Navigation — Getting from one location to another.
3. Tracking — Monitoring object or personal movement.
4. Mapping — Creating maps of the world
5. Timing — Making it possible to take precise time measurements.
GPS is extremely relevant today and used in numerous industries for preparing accurate surveys and
maps, taking precise time measurements, tracking position or location, and navigating. Some examples
of GPS applications include:
 Emergency Response: When there is an emergency or natural disaster, first responders can use
GPS for mapping, following and predicting weather, and keeping track of emergency personnel
for safety. In the EU and Russia, the eCall regulation which comes into effect in 2018 relies on
GLONASS technology and telematics to send data to emergency services in the case of a vehicle
crash, reducing response time. Read more on the benefits of telematics.
 Entertainment: GPS is being used for activities and games like Pokemon Go and Geocaching.
 Health and Fitness: Smartwatches and wearable technology can be used to track your fitness
activity (such as miles run,) and benchmark it against others that match your demographics.
 Construction: From locating equipment, to measuring and improving asset allocation, GPS
tracking allows companies to increase their return on assets.
 Transportation: Logistics companies are implementing telematics systems to improve driver
productivity and safety.
How Do GPS Systems Work?
A series of satellites orbiting the earth send a unique signal that is then read and interpreted by a GPS
device, situated on or near the earth’s surface. In order to calculate location, a GPS device must be able
to read the signal from at least four satellites.
Each satellite in the network circles the earth twice a day, and each satellite sends a unique signal, orbital
parameters, and time. At any given time, a GPS device can read the signals from six or more satellites,
but there needs to be at least four.

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To better understand this, we could use a simple two-dimensional example. Instead of dealing with
spheres, we could look at circles. When a satellite sends a signal, it creates a circle with the radius being
the distance of the GPS device from the satellite. When we add a second satellite, it creates a second
circle and the location is narrowed down to two points — the two points where the circle intersects. A
third satellite is used to determine the location of the device. The device is at the intersection of all three
circles produced by the distance of the device from a given satellite. In reality we live in a three-
dimensional world, which means that each satellite produces a sphere not a circle. The intersection of
three spheres produces two points of intersection — the point nearest Earth is chosen. While we only
need three satellites to produce a location on earth’s surface, a fourth satellite is often used to validate
location. A fourth satellite is also required to move us into the third-dimension and calculate the altitude
of a device.
General Packet Radio Service (GPRS) is a packet oriented mobile data standard on
the 2G and 3G cellular communication network's global system for mobile communications (GSM).
GPRS was established by European Telecommunications Standards Institute (ETSI) in response to the
earlier CDPD and i-mode packet-switched cellular technologies. It is now maintained by the 3rd
Generation Partnership Project (3GPP).

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The General Packet Radio Service (GPRS) is a technology for the support of packet switching traffic in
a GSM network. GPRS enables high-speed wireless Internet and other data communications in GSM.
The data speed of GPRS is more than four times greater speed than conventional GSM systems. Using
a packet data service, subscribers are always connected and always on line so services will be easy and
quick to access.
In GPRS, the GSM time slots are dynamically allocated to various users according to their instantaneous
demand. Users can alternately transmit data in the same slot. All data is packetized and send
instantaneously through available resources. This gives the user the experience of being permanently
linked to the network.
The Global System for Mobile Communications (GSM) is a standard developed by the European
Telecommunications Standards Institute (ETSI) to describe the protocols for second-generation (2G)
digital cellular networks used by mobile devices such as mobile phones and tablets. It was first deployed
in Finland in December 1991.[2] By the mid-2010s, it became a global standard for mobile
communications achieving over 90% market share, and operating in over 193 countries and territories.
2G networks developed as a replacement for first generation (1G) analog cellular networks. The GSM
standard originally described a digital, circuit-switched network optimized for full
duplex voice telephony. This expanded over time to include data communications, first by circuit-
switched transport, then by packet data transport via General Packet Radio Service (GPRS),
and Enhanced Data Rates for GSM Evolution (EDGE).
GSM is a circuit-switched system that divides each 200 kHz channel into eight 25 kHz time-slots. GSM
operates on the mobile communication bands 900 MHz and 1800 MHz in most parts of the world. In the
US, GSM operates in the bands 850 MHz and 1900 MHz.
GSM makes use of narrowband Time Division Multiple Access (TDMA) technique for transmitting
signals.
Enhanced Data rates for GSM Evolution (EDGE) (also known

as Enhanced GPRS (EGPRS), IMT Single Carrier (IMT-SC), or Enhanced Data rates for Global
Evolution) is a digital mobile phone technology that allows improved data transmission rates as
a backward-compatible extension of GSM. EDGE is considered a pre-3G radio technology and is part

197
of ITU's 3G definition.[1] EDGE was deployed on GSM networks beginning in 2003 – initially
by Cingular (now AT&T) in the United States.[2]
EDGE is standardized also by 3GPP as part of the GSM family. A variant, so called Compact-EDGE,
was developed for use in a portion of Digital AMPS network spectrum.[3]
Through the introduction of sophisticated methods of coding and transmitting data, EDGE delivers
higher bit-rates per radio channel, resulting in a threefold increase in capacity and performance compared
with an ordinary GSM/GPRS connection.
As its name suggests, EDGE (Enhanced Data rates for Global Evolution) is an enhancement of the
GSMTM radio access technology to provide faster bit rates for data applications, both circuit- and packet-
switched. As an enhancement of the existing GSM physical layer, EDGE is realized via modifications
of the existing layer 1 3GPP specifications TS 45.000 rather than by separate, stand-alone specifications.
The increased data rate is accomplished by a new modulation technique (8PSK as opposed to
GSM/GPRS's GMSK, yielding a three-fold increase in bit rate for an identical symbol rate) coupled with
new channel coding, resulting in improved spectral efficiency. This is important, because it allows
EDGE to be introduced piecemeal into existing GSM networks without disrupting the frequency reuse
plan of the existing deployment.
In fact, to cater for the potentially increased sensitivity to noise in marginal coverage areas, EDGE uses
a combination of 8PSK and GMSK, to give a balanced improvement in bit rate under virtually all radio
conditions. The four coding schemes of GPRS are increased to nine in EDGE, and new segmentation
techniques can radically improve throughput by permitting the coding scheme to be changed on the fly
in case of retransmission of a segment in rapidly changing radio conditions. In addition, the packet
window size increased to 1024 compared with the 64 for GPRS, resulting in more robust transmission
and reception
LTE (Long Term Evolution) is the project name given to development of a high performance air
interface for cellular mobile communication systems. It is the last step toward the 4th generation (4G)
of radio technologies designed to increase the capacity and speed of mobile telephone networks. While
the former generation of mobile telecommunication networks are collectively known as 2G or 3G, LTE
is marketed as 4G.

198
Bluetooth work
Definition
A Bluetooth technology is a high speed low powered wireless technology link that is designed to connect
phones or other portable equipment together. It is a specification (IEEE 802.15.1) for the use of low
power radio communications to link phones, computers and other network devices over short distance
without wires. Wireless signals transmitted with Bluetooth cover short distances, typically up to 30 feet
(10 meters).
It is achieved by embedded low cost transceivers into the devices. It supports on the frequency band of
2.45GHz and can support upto 721KBps along with three voice channels. This frequency band has been
set aside by international agreement for the use of industrial, scientific and medical devices (ISM).rd-
compatible with 1.0 devices.
Bluetooth can connect up to “eight devices” simultaneously and each device offers a unique 48 bit
address from the IEEE 802 standard with the connections being made point to point or multipoint.
How Bluetooth Works:

Bluetooth Network consists of a Personal Area Network or a piconet which contains a minimum of 2 to
maximum of 8 bluetooth peer devices- Usually a single master and upto 7 slaves. A master is the device
which initiates communication with other devices. The master device governs the communications link
and traffic between itself and the slave devices associated with it. A slave device is the device that
responds to the master device. Slave devices are required to synchronize their transmit/receive timing
with that of the masters. In addition, transmissions by slave devices are governed by the master device
(i.e., the master device dictates when a slave device may transmit). Specifically, a slave may only begin
its transmissions in a time slot immediately following the time slot in which it was addressed by the
master, or in a time slot explicitly reserved for use by the slave device.

199
The frequency hopping sequence is defined by the Bluetooth device address (BD_ADDR) of the master
device. The master device first sends a radio signal asking for response from the particular slave devices
within the range of addresses. The slaves respond and synchronize their hop frequency as well as clock
with that of the master device.
Scatter nets are created when a device becomes an active member of more than one piconet. Essentially,
the adjoining device shares its time slots among the different piconets.
Bluetooth Specifications:
 Core Specifications: It defines the Bluetooth protocol stack and the requirements for testing and
qualification of Bluetooth-based products.
 The profiles specification: It defines usage models that provide detailed information about how to
use the Bluetooth protocol for various types of applications.
The core specification consists of 5 layers:
 Radio: Radio specifies the requirements for radio transmission – including frequency, modulation,
and power characteristics – for a Bluetooth transceiver.
 Baseband Layer: It defines physical and logical channels and link types (voice or data); specifies
various packet formats, transmit and receive timing, channel control, and the mechanism for
frequency hopping (hop selection) and device addressing. It specifies point to point or point to
multipoint links. The length of a packet can range from 68 bits (shortened access code) to a maximum
of 3071 bits.
 LMP- Link Manager Protocol (LMP): defines the procedures for link set up and ongoing link
management.

200
 Logical Link Control and Adaptation Protocol (L2CAP): is responsible for adapting upper-layer
protocols to the baseband layer.
 Service Discovery Protocol (SDP): – allows a Bluetooth device to query other Bluetooth devices
for device information, services provided, and the characteristics of those services.
ZigBee Wireless Technology Architecture and

Applications
Zigbee communication is specially built for control and sensor networks on IEEE 802.15.4 standard for
wireless personal area networks (WPANs), and it is the product from Zigbee alliance.
This communication standard defines physical and Media Access Control (MAC) layers to handle many
devices at low-data rates. These Zigbee’s WPANs operate at 868 MHz, 902-928MHz and 2.4 GHz
frequencies. The date rate of 250 kbps is best suited for periodic as well as intermediate two way
transmission of data between sensors and controllers.
Zigbee is low-cost and low-powered mesh network widely deployed for controlling and monitoring
applications where it covers 10-100 meters within the range. This communication system is less
expensive and simpler than the other proprietary short-range wireless sensor networks as Bluetooth and
Wi-Fi.
Zigbee supports different network configurations for master to master or master to slave
communications. And also, it can be operated in different modes as a result the battery power is

201
conserved. Zigbee networks are extendable with the use of routers and allow many nodes to interconnect
with each other for building a wider area network.
Zigbee protocol architecture consists of a stack of various layers where IEEE 802.15.4 is defined by
physical and MAC layers while this protocol is completed by accumulating Zigbee’s own network and
application layers.
Physical Layer: This layer does modulation and demodulation operations up on transmitting and
receiving signals respectively. This layer’s frequency, date rate and number of channels are given below.
MAC Layer: This layer is responsible for reliable transmission of data by accessing different networks
with the carrier sense multiple access collision avoidance (CSMA). This also transmits the beacon
frames for synchronizing communication.
Network Layer: This layer takes care of all network related operations such as network setup, end
device connection and disconnection to network, routing, device configurations, etc.
Application Support Sub-Layer: This layer enables the services necessary for Zigbee device object
and application objects to interface with the network layers for data managing services. This layer is
responsible for matching two devices according to their services and needs.
Application Framework: It provides two types of data services as key value pair and generic message
services. Generic message is a developer defined structure, whereas the key value pair is used for getting
attributes within the application objects. ZDO provides an interface between application objects and
APS layer in Zigbee devices. It is responsible for detecting, initiating and binding other devices to the
network.

202
Wi-Fi Working Principle, Types of Technologies and Applications
A Brief Introduction About Wi-Fi:

Wi-Fi is a popular wireless networking technology. Wi-Fi stands for “wireless fidelity”. The Wi-Fi was
invented by NCR corporation/AT&T in Netherlands in 1991. By using this technology we can exchange
the information between two or more devices. Wi-Fi has been developed for mobile computing devices,
such has laptops, but it is now extensively using for mobile applications and consumer electronics like
televisions, DVD players and digital cameras. There should be two possibilities in communicating with
the Wi-Fi connection that may be through access point to the client connection or client to client
connection. Wi-Fi is a one type of wireless technology. It is commonly called as wireless LAN (local
area network). Wi-Fi allows local area networks to operate without cable and wiring. It is making popular
choice for home and business networks. A computer’s wireless adaptor transfers the data into a radio
signal and transfers the data into antenna for users.
Working Principle:
Wi-Fi is a high speed internet connection and network connection without use of any cables or wires.
The wireless network is operating three essential elements that are radio signals, antenna and router. The
radio waves are keys which make the Wi-Fi networking possible. The computers and cell phones are
ready with Wi-Fi cards. Wi-Fi compatibility has been using a new creation to constituent within the
ground connected with community network. The actual broadcast is connected with in sequence in fact
it is completed by way of stereo system surf as well as the worth of wires with monitor to classification
prone. Wi-Fi allows the person in order to get access to web any place in the actual provided area. You
can now generate a system within Resorts, library, schools, colleges, campus, personal institutes, as well
as espresso stores as well as on the open public spot to help to make your company much more lucrative

203
as well as interact with their own customer whenever. Wi-Fi compatibility can make surf with stare to
company using their inspiring cable television much a smaller amount force down.
The radio signals are transmitted from antennas and routers that signals are picked up by Wi-Fi
receivers, such has computers and cell phones that are ready with Wi-Fi cards. Whenever the computer
receives the signals with in the range of 100-150 feet for router it connect the device immediately. The
range of the Wi-Fi is depends upon the environment, indoor or outdoor ranges. The Wi-Fi cards will
read the signals and create an internet connection between user and network. The speed of the device
using Wi-Fi connection increases as the computer gets closer to the main source and speed is decreases
computer gets further away.
Many new laptops, mobile phones have inbuilt Wi-Fi card you don’t have to do anything which is one
of the best thing. If it is a free- based type of network connection the user will be promoted with a login
id and password. The free base network connections also well in some areas. The Wi-Fi network
connection is creating hot spots in the cities. The hot spots are a connection point of Wi-Fi network. It
is a small box that is hardwired in to the internet. There are many Wi-Fi hot spots available in public
places like restaurants, airports, and hotels offices, universities etc.
Security:
Security is impartment element in the Wi-Fi technology. Security is our personal decision but having a
wireless connection we should pay attention to protect our private details. We can connect easily to

204
unsecured wireless routers. The problem is any one is connected to your wireless router using the data
like download games, download apps and planning terrorist activities, shirring illegal music and movie
files etc. So it is necessary to provide security to the wireless technologies based devices.
How to make the Security?
All routers have a web page that you can connect for configuring the Wi-Fi security. And turn on WEP
(Wire Equivalence Privacy) and enter a password and remember this password. Next time when you
will connect your laptop Wi-Fi router will ask you to enter the connection password and you enter that
password.
Types of WI-FI Technologies:

Currently they are four major types of WIFI technologies.
 Wi-Fi-802.11a
 Wi-Fi-802.11b
 Wi-Fi-802.11g
 Wi-Fi-802.11n
802.11a is the one of a series of wireless technology. That defines the format and structure of the radio
signals sent out by WI-FI networking routers and antennas.
Wi-Fi-802.11b:
802.11b is the one of a series of wireless technology. 802. 11b support bandwidth 11mbps. Signal in
unregulated frequency spectrum around 2.4 GHz. This is a low frequency compared with Wi-Fi-802.11a
means it is working reasonable distance. It is interference with micro owns cordless phones and other
appliance. It is low-cost; signal range is good using home appliance.
Wi-Fi-802.11g:
In 2002 and 2003, This Technology supporting a newer slandered products. It is best technology of
802.11a and 802.11b. The 802.11 b support bandwidth upto 54mbps and it use a 2.4 GHz frequency for
greater range. This cost is more than 802.11b. It is fast accessing and maximum speed.
Wi-Fi-802.11n:
The 802.11n is the newest WIFI technology. It was designed to improve on 802.11g .The amount of
bandwidth supported by utilizing multiple wireless signals and antennas instead of one. It supports 100
mbps bandwidth and increased signal intensity.
Applications:
 Mobile applications

205
 Business applications
 Home applications
 Computerized application
 Automotive segment
 Browsing internet
 Video conference
Advantages:
 Wireless laptop can be moved from one place to another place

 Wi-Fi network communication devices without wire can reduce the cost of wires.
 Wi-Fi setup and configuration is easy than cabling process
 It is completely safe and it will not interfere with any network
 We can also connect internet via hot spots
 We can connect internet wirelessly
Disadvantages:
 Wi-Fi generates radiations which can harm the human health

 We must disconnect the Wi-Fi connection whenever we are not using the server
 There are some limits to transfer the data, we cant able to transfer the data for long distance
 Wi-Fi implementation is very expensive when compared to the wired connection
Transducers
Basically, Transducer converts one form of energy into another form of energy. The transducer, which
converts non-electrical form of energy into electrical form of energy is known as electrical transducer.
The block diagram of electrical transducer is shown in below figure.
As shown in the figure, electrical transducer will produce an output, which has electrical energy. The
output of electrical transducer is equivalent to the input, which has non-electrical energy.

206
Types of Electrical Transducers

Mainly, the electrical transducers can be classified into the following two types.
 Active Transducers
 Passive Transducers
Now, let us discuss about these two types of transducers briefly.
Active Transducers
The transducer, which can produce one of the electrical quantities such as voltage and current is known
as active transducer. It is also called self-generating transducer, since it doesn’t require any external
power supply.
The block diagram of active transducer is shown in below figure.
As shown in the figure, active transducer will produce an electrical quantity (or signal), which is
equivalent to the non-electrical input quantity (or signal).
Examples
Following are the examples of active transducers.
 Piezo Electric Transducer

 Photo Electric Transducer
 Thermo Electric Transducer
We will discuss about these active transducers in next chapter.
Passive Transducers
The transducer, which can’t produce the electrical quantities such as voltage and current is known
as passive transducer. But, it produces the variation in one of passive elements like resistor (R),
inductor (L) and capacitor (C). Passive transducer requires external power supply.
The block diagram of passive transducer is shown in below figure.

207
As shown in the figure, passive transducer will produce variation in the passive element in accordance
with the variation in the non-electrical input quantity (or signal).
Examples
Following are the examples of passive transducers.
 Resistive Transducer
 Inductive Transducer
 Capacitive Transducer
Devices which perform an “Input” function are commonly called Sensors because they “sense” a
physical change in some characteristic that changes in response to some excitation, for example heat or
force and covert that into an electrical signal. Devices which perform an “Output” function are generally
called Actuators and are used to control some external device, for example movement or sound.
Electrical Transducers are used to convert energy of one kind into energy of another kind, so for
example, a microphone (input device) converts sound waves into electrical signals for the amplifier to
amplify (a process), and a loudspeaker (output device) converts these electrical signals back into sound
waves and an example of this type of simple Input/Output (I/O) system is given below.
There are many different types of sensors and transducers available in the marketplace, and the choice
of which one to use really depends upon the quantity being measured or controlled, with the more
common types given in the table below:

208
Input type transducers or sensors, produce a voltage or signal output response which is proportional to
the change in the quantity that they are measuring (the stimulus). The type or amount of the output signal
depends upon the type of sensor being used. But generally, all types of sensors can be classed as two
kinds, either Passive Sensors or Active Sensors.
Generally, active sensors require an external power supply to operate, called an excitation signal which
is used by the sensor to produce the output signal. Active sensors are self-generating devices because
their own properties change in response to an external effect producing for example, an output voltage
of 1 to 10v DC or an output current such as 4 to 20mA DC. Active sensors can also produce signal
amplification.
A good example of an active sensor is an LVDT sensor or a strain gauge. Strain gauges are pressure-
sensitive resistive bridge networks that are external biased (excitation signal) in such a way as to produce
an output voltage in proportion to the amount of force and/or strain being applied to the sensor.

209
Unlike an active sensor, a passive sensor does not need any additional power source or excitation voltage.
Instead a passive sensor generates an output signal in response to some external stimulus. For example,
a thermocouple which generates its own voltage output when exposed to heat. Then passive sensors are
direct sensors which change their physical properties, such as resistance, capacitance or inductance etc.

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Basic Electronics

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Analog Electronics: Branch of engineering where we deal with continuous

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Example: Transistor, op-Amps etc.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

RC, RL and RLC circuits: The above 3 components in different combinations

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

The waveforms are as shown below.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Kirchhoff’s voltage law (KVL):

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Step3:Open current sources and short voltage sources as shown below.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Maximum Power transfer theorem (MPT):

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Step2: circuit with only the 7-volt battery in effect

Step3: Analyzing the circuit with only the 28-volt battery.

Step4:Analyzing the circuit with only the 7-volt battery.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Step7:Once again applying these superimposed figures to our circuit.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

* When forward biased it is same as ordinary diode.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

* When reverse biased it is having sharp breakdown voltage as shown above.

Zener diode as a voltage regulator:

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Operation PNP Transistor

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Hence we can understand that −

 The conduction in a PNP transistor takes place through holes.

Operation NPN Transistor

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

IC= collector current

β= current amplification factor

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

The figure below shows a transistor working in saturation region.

The following figure shows a transistor working in cutoff region.

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Common Base CB Configuration

Common Collector CC Configuration

Indian Institute of Embedded Systems – IIES (Koramangala – Bangalore)

Common Emitter CE Configuration