The Islamic University of Gaza

Electrical Engineering & Smart Systems Department

Microcontroller Systems Design Laboratory (EELE 4103)

LAB 5
Interrupt
By:
Eng. Malak E. Al-Ashi

22/3/2022
 Objectives

• To be familiar with interrupt and its configuration.

• To learn types of interrupt.
• To list PIC18F4550 Interrupt sources.
 What is interrupt?
• An interrupt is a signal to a processor, generated by hardware or
software, of the occurrence of a particular event.
• The processor receiving the interrupt signal and requested to stop the
current execution sequence and attend to a different code sequence
called the interrupt vector or Interrupt Service Routine( ISR ).
• After executing the ISR, the previous execution of sequence is
resumed. The processor may choose to ignore or act on the request
according to the configuration set by the programmer with the help of
registers
 Interrupts in PIC18F4550

• There are 2 types of interrupts based on origin:

• Software Interrupt: It comes from a program that is executed by a
microcontroller or by internal peripherals of the microcontroller.
• Hardware Interrupt: These interrupt requests are sent by external
hardware devices connected to certain pins of the microcontroller.
 Interrupts in PIC18F4550

• Interrupts could also be classified based on their priority:

• High priority Interrupt: These interrupts cannot be interrupted. A high
priority interrupt vector is located at 0008h in the program memory.
• Low priority Interrupt: These interrupts itself could be interrupted by
high priority interrupts and its interrupt vector is located at 0018h.
• The interrupt used in PIC18f4550 are edge triggered and the edge
trigger could be configured as a rising edge or falling edge.
 Steps for executing an Interrupt request
1. Finished current instruction execution.
2. Stores the next instruction address (Program Counter) and the current
status in the Stack memory.
3. Jumps to a fixed memory location called Interrupt vector table which
contains the address of the ISR.
4. Jumps to the ISR address obtained from the Interrupt vector table.
5. Executes all instructions in the ISR.
6. Upon exiting the ISR, restores the program counter and the status, as
before interrupt request, from the stack.
7. Continues executing the initial instruction sequence.
• The processor will automatically follow these steps once the interrupt
control registers are properly configured and the ISR is defined.
 Interrupt Handling
• PIC18F4550 can handle multiple interrupt request and treat them
based on priority. The configuration and functioning of interrupts are
done with the help of the following ten registers:
• RCON
• INTCON
• INTCON2
• INTCON3
• PIR1, PIR2
• PIE1, PIE2
• IPR1, IPR2
 Interrupt Handling

• The main functionality of these registers is to store configuration

bits for each interrupts. These bits are:
• Enable bits: To enable a specific interrupt request. A processor will
branch to its ISR only if the interrupt is enabled.
• Priority bits: To specify the priority of a particular request, to set as High
priority or Low priority.
• Flag bits: Bits set when the particular interrupt request is received.
 Interrupt Handling

• The high priority signals are located at program memory location

008h and the low priority signals at 018h. If the priority is
disabled, by default, all the interrupts branch to 008h memory
location.
• Once the execution reaches the ISR, the interrupt is determined
by polling the interrupt flags and associated code sequence is
executed. After execution of code, the flag bit must be cleared in
software to avoid recursion.
 PIC18F4550 Interrupt Sources

• Timers 0, 1, 2, 3
• Pins RB0, RB1, RB2 for external hardware interrupts INT0, INT1,
INT2
• PORTB-Change interrupt (any one of the upper four Port B pins)
• Serial communication’s USART interrupts: receive and transmit,
respectively
• ADC (analog-to-digital converter)
• CCP (compare capture pulse-width-modulation)
 Registers associated with Interrupt

• Reset control register (RCON):

• it contains the IPEN bit which enables interrupt priorities

 Registers associated with Interrupt
• Interrupt control register (INTCON)

• GIE/GIEH: Global Interrupt Enable bit

• When IPEN is disabled, GIE enables all interrupts
• When IPEN is enabled, GIEH enables all high priority interrupts
• PEIE/GIEL: Peripheral Interrupt Enable bit
• When IPEN is disabled, PEIE enables all peripheral interrupts
• When IPEN is enabled, GIEL enables all low priority interrupts
 Registers associated with Interrupt
• INTCON2

• INTEDGx: External Interrupt x Edge Select bit.

• If set Interrupt flag is set on rising edge.
• If cleared Interrupt flag is set on falling edge
• TMR0IP: TMR0 Overflow Interrupt Priority bit. If set, TMRO interrupt is
set as a High priority interrupt
• RBIP: RB Port Change Interrupt Priority bit. If set, RB Port Change
Interrupt is set as a High priority interrupt
 Registers associated with Interrupt
• INTCON3

• INTxIP: INTx External Interrupt Priority bit. If set, INTx External

Interrupt is set as a High priority interrupt
• INTxIE: INTx External Interrupt Enable bit. Enables the INTx
external interrupt
• INTxIF: INTx External Interrupt Flag bit. The bit sets when INTx
external interrupt occurs
 Registers associated with Interrupt
• PERIPHERAL INTERRUPT REQUEST (flag)
• (PIR1)

• (PIR2)
 Registers associated with Interrupt
• PERIPHERAL INTERRUPT ENABLE
• (PIE1)

• (PIE2)
 Registers associated with Interrupt
• PERIPHERAL INTERRUPT PRIORITY
• (IPR1)

• (IPR2)
 Registers associated with Interrupt

• Q1:Uses the external interrupt sources to interrupt a flasher (with

3 buttons to another 3 flashers).
• Q2: Using priority High and low in external interrupt sources to
interrupt a flasher (with 2 buttons to another 2flashers).
• Q3: Use RB interrupt to control the speed of the flasher (fast -
medium - low).
• Q4: Make a Five prayer program that count down in BCD7seg
(25-20 -15-10-5) then after done from counting a speaker is
activated.
Good Luck