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Single chip FPGA based realization of arbitrary waveform generator using

rademacher and walsh functions

Conference Paper · December 2006

DOI: 10.1109/ICET.2006.336022 · Source: IEEE Xplore

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IEEE—ICET 2006
2nd International Conference on Emerging Technologies
Peshawar, Pakistan 13-14 November 2006
Single Chip FPGA Based Realization of Arbitrary
Waveform Generator using Rademacher and
Walsh Functions
Syed Manzoor Qasim and Shuja Ahmad Abbasi
Department of Electrical Engineering, VLSI Research Lab
King Saud University, Riyadh, Saudi Arabia 11421
{smanzoor, abbasi}@ksu.edu.s
Abstract: Arbitrary waveform generators (AWGs) are
becoming increasingly important for test and
measurement applications. This paper describes a
new approach for generating arbitrary waveforms
using FPGA and a set of Rademacher and Walsh
Functions. Utilizing these orthogonal functions, any
periodic waveform can be realized. Recent
advancements in Field Programmable Gate Array
(FPGA) technology have made waveform generation
very easy and cost-effective. For demonstration
purpose we used a custom defined arbitrary
waveform that is a concatenation of trapezoidal,
sinusoidal and triangular waveforms. Simulation
results for the proposed AWG are presented. Top-
down approach has been adopted to realize the
waveform generator in Spartan-3 FPGA. The
maximum clock frequency for this design is 24.944
MHz with a power consumption of 62 mW.
Keywords: Arbitrary Waveform Generation, Field-
Programmable Gate Array (FPGA), Rademacher,
Walsh Functions, VHDL
1. INTRODUCTION
The ability to generate arbitrary waveform is
of importance for many commercial and military
applications. By using arbitrary waveforms,
engineers and scientists are able to generate
unique waveform signals that are specific to
their applications. Most often, arbitrary
waveforms are designed to simulate real world
signals. A number of techniques utilizing both
analog and digital approaches are available for
the generation of arbitrary waveforms. However,
digital methods, based on high-level design
methodology offer better flexibility at the cost of
increased complexity.
Orthogonal functions such as Rademacher
and Walsh functions are a set of discrete valued
functions [1]í[5]. These functions and their
transforms are important analytical tools for
1-4244-0502-5/06/$20.00©2006 IEEE
signal processing and have wide applications in
digital communication, digital image processing,
statistical analysis and waveform generation [3].
Since Walsh functions are binary related,
they are easy to generate and control using
relatively simple hardware and readily lend itself
for real-time waveform generation ideal for the
synthesis of different waveforms.
With the recent advancement in Field
Programmable Gate Array (FPGA) technology,
it is now possible to realize high performance
Arbitrary Waveform Generator (AWG) in a
single chip. This will drastically reduce the
system cost and thus avoid the dependency on
external function generators to generate arbitrary
waveforms. These waveforms can be easily
generated on-chip. Being dynamically recon-
figurable, the same FPGA can be used for
different applications [6].
The objective of this paper is to realize a
single-chip low cost approach for arbitrary
waveform generation. To achieve this we used
FPGA architecture for high-speed generation of
arbitrary waveforms. In this paper, we have used
a set of Rademacher and Walsh functions for the
generation of digital arbitrary waveform in
FPGA.
The rest of the paper is organized as follows.
Orthogonal functions such as Rademacher and
Walsh functions are defined and the methods
used for their generation are discussed in section
2. Section 3 gives a brief overview of the
Spartan-3 FPGA architecture and the top-down
design methodology adopted in this work is
described in section 4. In section 5, techniques
for the generation of arbitrary waveform using
Rademacher-Walsh functions is described.
Section 6 summarizes the FPGA implementation
results and finally section 7 gives some
concluding remarks.
205
2. GENERATION OF RADEMACHER The same functions generated using
AND WALSH FUNCTIONS MATLAB for the purpose of verification are
shown in Fig.2.
The Rademacher functions constitute an
incomplete and orthogonal set of periodic square
waveforms of amplitude +1 and í1.
Mathematically, kth order Rademacher function
is defined by the relation [4]

I (k+1, x) = sgn {sin (2ʌ2k x)}, k =

(1)
0,1,2,....
where I (0, x) = 1 and
­  1, xt0
sgn  x  ® (2)
¯ 1 , x0
Fig. 2. First four Rademacher functions generated using
Fig. 1 depicts the first four Rademacher MATLAB
functions.
A simple digital counter circuit is used for the
generation of Rademacher functions.
The Walsh functions form a complete and
orthogonal set of functions of rectangular
waveforms taking only two amplitudes +1 and
í1. We denote the Walsh function by \ n, x 
defined on the interval [0,1) such that [5]
\ 0, x  1 , 0 d x 1 (3)
and
N
Fig. 1. First four Rademacher Functions
The Rademacher functions are generated as
follows [4]:
ƒ Let I (0, x) be the function with the
value 1 for the entire interval of duration
T = 1 i.e., I (0, x) = 1.
ƒ To obtain I (1, x), divide the interval
(0,1) in half, and let the value of I (1, x)
in the first half interval be +1 and in the
second half of the interval í1.
ƒ To obtain I (2, x), divide each of the
intervals (0,1/2) and (1/2,1) in half and
let the value of the function in the first
half of each interval be +1 and in the
second half of the interval í1.
The process is repeated until each interval is a
single-pulse element.
206
\n,x 3>Ii 1, x@ ni ^0,1`
ni
, (4)
i 0
where the integer n is represented by [5]
N
(5)
n ¦2 n i
i
i 0
Fig. 3 shows the first eight continuous Walsh
functions. All the eight functions take on the
values {+1,í1}. Every function starts with the
value +1.
The same functions generated using
MATLAB for verification purpose are shown in
Fig.4. The Walsh functions can be generated by
many methods [4]. One way to compute the
Walsh functions are by using Rademacher
functions. The Walsh functions are generated
using products of the Rademacher functions.
The Walsh functions are developed as products
 ƶ (0 ,x )
1
0 x
level logic blocks such as block RAMs
1

1
ƶ (1 ,x ) (BRAMs), 18-bit multipliers, digital clock
0 x
-1
ƶ (2 ,x )
½ 1
managers (DCMs) and even CPUs [6].
1
0 x
½ 1
-1

1
ƶ (3 ,x ) 4. DESIGN FLOW
0 x
½ 1
- 1
1
ƶ (4 ,x ) An FPGA design flow is the process of
0 x
½ 1
-1

1
ƶ (5 ,x )
turning an FPGA design into a correctly timed
0
-1
½ 1
x
bitstream file used to program the FPGA. In
ƶ ( 6 ,x )
1
0 ½ 1
x order to realize any algorithm on an FPGA it
-1

1
ƶ (7 ,x )
0 x
-1
½ 1
Fig. 3. First eight continuous Walsh functions
Fig. 4. MATLAB generated First Eight Walsh functions
of the Rademacher functions, based on the gray
code conversion of the Walsh function index
sequence. If we convert the ±1 amplitudes of the
Walsh functions to a binary logic {0,1}
representation with the conversions +1 ĺ “0”
and í1 ĺ “1”, then multiplication of
Rademacher functions is equivalent to
Exclusive-OR operation.
must be programmed (configured) first. To
achieve this, a design methodology is adopted.
Usually, design entry is done using hardware
description language (HDL) such as Very High
Speed Integrated Circuit Hardware Description
Language (VHDL) or Verilog. In this paper, the
design entry is done in VHDL.
The objective is to make the system
description independent of the physical
hardware such that it can be used on other
FPGAs and even on Application Specific
Integrated Circuits (ASICs). Once a design has
been completed it is simulated to verify the
correct operation. A netlist is generated from the
design and is mapped onto the FPGA using
synthesis, place and route and optimizing tools.
Mapping produces a bit-stream file that is used
to program the FPGA [7].
5. GENERATION OF ARBITRARY
WAVEFORM USING WALSH
FUNCTIONS
Generating arbitrary waveforms using Walsh
functions consists of three stages:

3. SPARTAN-3 FPGA 1) Generation of the Rademacher functions

ARCHITECTURE
The Spartan-3 FPGA architecture consists of
an array of Configurable Logic Blocks (CLBs),
which are the basic elements that can be
programmed to perform various logic functions.
Each CLB is coupled with a programmable
interconnect switch matrix that connects the
CLB to adjacent and nearby CLBs [6].
Each CLB contains four logic slices, where
each logic slice usually consists of two four-
input Look Up Tables (LUTs), two configurable
flip-flops, some muxes, and other control logic.
In addition to the CLBs and the switch matrices,
the Spartan-3 FPGA have a number of higher–
2) Generation of the Walsh functions using
Rademacher functions, and
3) Adjustment of the coefficients of each
Walsh function.
Generation of periodic arbitrary waveform
involves weighted addition of different Walsh
functions. The addition of more Walsh functions
would produce a smoother approximation of a
particular waveform, of course at the cost of
more computational complexity. The
functionality of the arbitrary waveform
generator is written in VHDL and synthesized
into a configuration file that is downloaded into
the Spartan-3 FPGA [6]. This is done using

207
Xilinx ISE 7.1i software. By using a single, For validation of results, MATLAB was
appropriately sized FPGA, digital arbitrary used. Fairly smooth arbitrary waveform was
waveform as defined by f  x  can be obtained through MATLAB simulation as
synthesized thus avoiding the use of any analog shown in Fig. 6.
to digital converter and hence minimizing the
area and cost of hardware. TABLE 1
Since Walsh functions constitute a complete WALSH FUNCTION COEFFICIENTS

set, any arbitrary function f  x  can be Walsh coefficients (n = 64)

expressed as follows [2]: A0 0.4591 A23 -0.0669 A46 -0.0023

f A1 0 A24 -0.0214 A47 -0.0040
f x  ¦ An \ n, x  A2 -0.0083 A25 0.0084 A48 -0.0024
n 0 (6)
A3 -0.0008 A26 0.0083 A49 0

where, An are the coefficients of the expansion A4 0.0166 A27 0.0048 A50 0

and can be obtained by [2] A5 -0.1758 A28 -0.0084 A51 0.0031

A6 0.0008 A29 0.0214 A52 0
1
An ³ f x \ n, x dx
0 (7)
A7
A8
0.0085
0
A30
A31
-0.0048
-0.0081
A53
A54
0.0028
-0.0031
A9 -0.0658 A32 -0.0006 A55 0
The arbitrary waveform defined by (8) is shown A10 -0.0048 A33 -0.0159 A56 0
in fig. 5. A11 -0.0043 A34 -0.0022 A57 0.0013
­ 4.8 x 0 d x  0.125
f x  = ° 0.6 0. 125 d x  0.25
A12 0.0658 A35 -0.0009 A58 0.0012
° A13 0 A36 0.0159 A59 0
°° 4.8 x  1.8 0.25 d x  0.375
®
°sin( 4S ( x  0.375) 0.375 d x  0.625 A14 -0.0040 A37 0 A60 -0.0013
°  2.667  4.267 x 0.625 d x  0.8125
(8)
° A15 -0.1369 A38 -0.0012 A61 0
¯°  4.267 x  4.267 0.8125 d x d 1
A16 -0.0006 A39 -0.0333 A62 0
A17 -0.0318 A40 -0.0107 A63 0.0009
The sixty four expansion coefficients required
for the generation of arbitrary waveform as A18 -0.0039 A41 0.0043
defined by (8) are listed in Table 1. Some of the A19 -0.0019 A42 0.0042
coefficients turn out to be zero. A20 0.0318 A43 0.0023

As shown in Table 1, approximations to the A21 0 A44 -0.0043

arbitrary waveform can be obtained by using 64 A22 -0.0022 A45 0.0107
Walsh functions.

Fig. 5. Custom-defined arbitrary waveform Fig. 6. MATLAB generated arbitrary waveform

208
 6. FPGA IMPLEMENTATION
RESULTS
Based on the given architecture, design and
simulation of the AWG has been performed
using VHDL. The design is synthesized and
placed and routed into Xilinx Spartan-3 FPGA
(XC3S200-4ft256) using Xilinx ISE 7.1i [8].
The hardware resource utilization is reported for
an XC3S200-4ft256 Spartan-3 FPGA device and
the results are summarized in Table 2.
Modelsim is used for both pre-synthesis and
post-synthesis simulation. Fig. 7 represents the
snapshot of simulation results of Rademacher
Fig. 7. Snapshot of Simulation of Rademacher, Walsh and arbitrary waveform.
209
functions (R1íR6), Walsh functions (W1íW63)
and 16-bit digital arbitrary waveforms (P0íP15).
As shown in fig. 7, clk is the clock signal,
reset is the reset signal. The estimated
power consumption of the architecture
was obtained with Xilinx XPower
software using a clock frequency of
24.944 MHz.
7. CONCLUSION
A new technique for high-speed arbitrary
waveform generation using FPGA and a set of
Rademacher and Walsh functions has been
presented. Rademacher and Walsh are
 orthogonal functions widely used in engineering
applications such as waveform generation.
Xilinx spartan-3 (XC3S200-4FT) FPGA chip is
used. FPGA implementation results have been
presented which shows that the proposed design
is very compact utilizing just 17% of total FPGA
slices, so there is a possibility of implementing
more parallel processors on the same FPGA.
TABLE 2
HARDWARE RESOURCE UTILIZATION FOR XC3S200 SPARTAN-3
FPGA
Number of Slices 340 out of 1,920
Number 4 input LUTs
540 out of 3,840
Number of bonded IOBs 87 out of 173
Number of GCLKs 1 out of 8
Maximum Frequency (After Place and Route) : 24.944
MHz
Total estimated power consumption : 62 mW
The proposed design being digital can be
easily integrated as an IP Core for on-chip
waveform generation. AWG works correctly as
shown by the simulation results and validated by
MATLAB.
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The chip was thoroughly tested after
implementation. The maximum clock frequency
obtained after place and route of the design is
24.944 MHz consuming only 62 mW of power.
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functions,” Amer. J. of Math, vol. 55, pp. 5-24, 1923.
[2] K. G. Beauchamp, Walsh functions and their
applications, Academic Press: New York, 1975.
[3] H. F. Harmuth, “Applications of Walsh functions in
communications,” IEEE Spectrum, vol.6, pp.82-91,
17% Nov. 1969.
[4] J. S. Lee and L. E. Miller, CDMA Systems
14% Engineering Handbook, Artech House: Boston, 1998.
50% [5] B. Golubov, A. Efimov and V. Skvortsov, Walsh
12% series and transforms: Theory and applications,
Kluwer Academic Publishers: Dordrecht 1991.
[6] T. Tuan, S. Kao, A. Rahman, S. Das, and S.
Trimberger, “ A 90 nm low-power FPGA for battery-
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[7] J-P. Deschamps, G. J. A. Bioul, and G. D. Sutter,
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http://www.xilinx.com
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